2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
9 #include <linux/init.h>
11 #include <linux/ioport.h>
13 #include <linux/export.h>
14 #include <linux/delay.h>
15 #include <linux/interrupt.h>
16 #include <asm/reboot.h>
18 #include <lantiq_soc.h>
21 #include "../devices.h"
23 #define ltq_gptu_w32(x, y) ltq_w32((x), ltq_gptu_membase + (y))
24 #define ltq_gptu_r32(x) ltq_r32(ltq_gptu_membase + (x))
27 /* the magic ID byte of the core */
28 #define GPTU_MAGIC 0x59
29 /* clock control register */
33 /* interrupt node enable */
34 #define GPTU_IRNEN 0xf4
35 /* interrupt control register */
36 #define GPTU_IRCR 0xf8
37 /* interrupt capture register */
38 #define GPTU_IRNCR 0xfc
39 /* there are 3 identical blocks of 2 timers. calculate register offsets */
40 #define GPTU_SHIFT(x) (x % 2 ? 4 : 0)
41 #define GPTU_BASE(x) (((x >> 1) * 0x20) + 0x10)
42 /* timer control register */
43 #define GPTU_CON(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x00)
44 /* timer auto reload register */
45 #define GPTU_RUN(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x08)
46 /* timer manual reload register */
47 #define GPTU_RLD(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x10)
48 /* timer count register */
49 #define GPTU_CNT(x) (GPTU_BASE(x) + GPTU_SHIFT(x) + 0x18)
52 #define CON_CNT BIT(2)
53 #define CON_EDGE_FALL BIT(7)
54 #define CON_SYNC BIT(8)
55 #define CON_CLK_INT BIT(10)
58 #define RUN_SEN BIT(0)
61 /* set clock to runmode */
62 #define CLC_RMC BIT(8)
63 /* bring core out of suspend */
64 #define CLC_SUSPEND BIT(4)
66 #define CLC_DISABLE BIT(0)
68 #define TIMER_INTERRUPT (INT_NUM_IM3_IRL0 + 22)
79 static struct resource ltq_gptu_resource
=
80 MEM_RES("GPTU", LTQ_GPTU_BASE_ADDR
, LTQ_GPTU_SIZE
);
82 static void __iomem
*ltq_gptu_membase
;
84 static irqreturn_t
timer_irq_handler(int irq
, void *priv
)
86 int timer
= irq
- TIMER_INTERRUPT
;
87 ltq_gptu_w32(1 << timer
, GPTU_IRNCR
);
91 static void gptu_hwinit(void)
93 struct clk
*clk
= clk_get_sys("ltq_gptu", NULL
);
95 ltq_gptu_w32(0x00, GPTU_IRNEN
);
96 ltq_gptu_w32(0xff, GPTU_IRNCR
);
97 ltq_gptu_w32(CLC_RMC
| CLC_SUSPEND
, GPTU_CLC
);
100 static void gptu_hwexit(void)
102 ltq_gptu_w32(0x00, GPTU_IRNEN
);
103 ltq_gptu_w32(0xff, GPTU_IRNCR
);
104 ltq_gptu_w32(CLC_DISABLE
, GPTU_CLC
);
107 static int ltq_gptu_enable(struct clk
*clk
)
109 int ret
= request_irq(TIMER_INTERRUPT
+ clk
->bits
, timer_irq_handler
,
110 IRQF_TIMER
, "timer", NULL
);
112 pr_err("gptu: failed to request irq\n");
116 ltq_gptu_w32(CON_CNT
| CON_EDGE_FALL
| CON_SYNC
| CON_CLK_INT
,
117 GPTU_CON(clk
->bits
));
118 ltq_gptu_w32(1, GPTU_RLD(clk
->bits
));
119 ltq_gptu_w32(ltq_gptu_r32(GPTU_IRNEN
) | clk
->bits
, GPTU_IRNEN
);
120 ltq_gptu_w32(RUN_SEN
| RUN_RL
, GPTU_RUN(clk
->bits
));
124 static void ltq_gptu_disable(struct clk
*clk
)
126 ltq_gptu_w32(0, GPTU_RUN(clk
->bits
));
127 ltq_gptu_w32(0, GPTU_CON(clk
->bits
));
128 ltq_gptu_w32(0, GPTU_RLD(clk
->bits
));
129 ltq_gptu_w32(ltq_gptu_r32(GPTU_IRNEN
) & ~clk
->bits
, GPTU_IRNEN
);
130 free_irq(TIMER_INTERRUPT
+ clk
->bits
, NULL
);
133 static inline void clkdev_add_gptu(const char *con
, unsigned int timer
)
135 struct clk
*clk
= kzalloc(sizeof(struct clk
), GFP_KERNEL
);
137 clk
->cl
.dev_id
= "ltq_gptu";
138 clk
->cl
.con_id
= con
;
140 clk
->enable
= ltq_gptu_enable
;
141 clk
->disable
= ltq_gptu_disable
;
143 clkdev_add(&clk
->cl
);
146 static int __init
gptu_setup(void)
148 /* remap gptu register range */
149 ltq_gptu_membase
= ltq_remap_resource(<q_gptu_resource
);
150 if (!ltq_gptu_membase
)
151 panic("Failed to remap gptu memory");
153 /* power up the core */
156 /* the gptu has a ID register */
157 if (((ltq_gptu_r32(GPTU_ID
) >> 8) & 0xff) != GPTU_MAGIC
) {
158 pr_err("gptu: failed to find magic\n");
163 /* register the clocks */
164 clkdev_add_gptu("timer1a", TIMER1A
);
165 clkdev_add_gptu("timer1b", TIMER1B
);
166 clkdev_add_gptu("timer2a", TIMER2A
);
167 clkdev_add_gptu("timer2b", TIMER2B
);
168 clkdev_add_gptu("timer3a", TIMER3A
);
169 clkdev_add_gptu("timer3b", TIMER3B
);
171 pr_info("gptu: 6 timers loaded\n");
176 arch_initcall(gptu_setup
);