3 #include <dt-bindings/input/input.h>
6 compatible = "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
9 bootargs = "console=ttyLTQ0,115200";
14 led-failsafe = &power;
22 reg = <0x0 0x4000000>;
26 compatible = "lantiq,phy-xrx200";
27 firmware1 = "lantiq/xrx200_phy11g_a14.bin";
28 firmware2 = "lantiq/xrx200_phy11g_a22.bin";
33 compatible = "gpio-keys-polled";
36 poll-interval = <100>;
39 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
40 linux,code = <KEY_RESTART>;
44 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
45 linux,code = <KEY_PHONE>;
50 compatible = "gpio-leds";
53 label = "easy80920:green:power";
54 gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
55 default-state = "keep";
58 label = "easy80920:green:warning";
59 gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
62 label = "easy80920:green:fxs1";
63 gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
66 label = "easy80920:green:fxs2";
67 gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
70 label = "easy80920:green:fxo";
71 gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
74 label = "easy80920:green:usb1";
75 gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
78 label = "easy80920:green:usb2";
79 gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
82 label = "easy80920:green:sd";
83 gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
86 label = "easy80920:green:wps";
87 gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
94 compatible = "lantiq,xrx200-pdi";
101 compatible = "lantiq,xrx200-pdi-port";
104 phy-handle = <&phy13>;
107 compatible = "lantiq,xrx200-pdi-port";
110 phy-handle = <&phy11>;
113 compatible = "lantiq,xrx200-pdi-port";
116 phy-handle = <&phy1>;
119 compatible = "lantiq,xrx200-pdi-port";
122 phy-handle = <&phy0>;
127 compatible = "lantiq,xrx200-pdi";
128 #address-cells = <1>;
134 compatible = "lantiq,xrx200-pdi-port";
137 phy-handle = <&phy5>;
142 #address-cells = <1>;
144 compatible = "lantiq,xrx200-mdio";
147 phy0: ethernet-phy@0 {
149 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
151 phy1: ethernet-phy@1 {
153 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
155 phy5: ethernet-phy@5 {
157 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
159 phy11: ethernet-phy@11 {
161 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
163 phy13: ethernet-phy@13 {
165 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
171 pinctrl-names = "default";
172 pinctrl-0 = <&state_default>;
174 state_default: pinmux {
176 lantiq,groups = "exin3";
177 lantiq,function = "exin";
180 lantiq,groups = "stp";
181 lantiq,function = "stp";
184 lantiq,groups = "nand cle", "nand ale",
185 "nand rd", "nand rdy";
186 lantiq,function = "ebu";
189 lantiq,groups = "mdio";
190 lantiq,function = "mdio";
193 lantiq,groups = "gnt1", "req1";
194 lantiq,function = "pci";
197 lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
198 "io4", "io5", "io6", /* stp */
206 lantiq,pins = "io38";
211 lantiq,pins = "io39", /* exin3 */
212 "io48"; /* nand rdy */
216 pins_spi_default: pins_spi_default {
218 lantiq,groups = "spi_di";
219 lantiq,function = "spi";
222 lantiq,groups = "spi_do", "spi_clk",
224 lantiq,function = "spi";
231 pinctrl-names = "default";
232 pinctrl-0 = <&pins_spi_default>;
237 #address-cells = <1>;
239 compatible = "jedec,spi-nor";
241 spi-max-frequency = <1000000>;
244 compatible = "fixed-partitions";
245 #address-cells = <1>;
250 label = "SPI (RO) U-Boot Image";
255 reg = <0x20000 0x10000>;
261 reg = <0x30000 0x10000>;
267 reg = <0x40000 0x10000>;
273 reg = <0x50000 0x003a0000>;
283 lantiq,shadow = <0xffff>;
284 lantiq,groups = <0x7>;
293 gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
294 lantiq,portmask = <0x3>;