target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch

   1 From 91f8d0c8fbb9ea70bf78a291e312157177be8ee3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sat, 20 Aug 2011 18:55:13 +0200
   4 Subject: [PATCH 01/24] MIPS: lantiq: fix early printk
   5
   6 The code was using a 32bit write operation in the early_printk code. This
   7 resulted in 3 zero bytes also being written to the serial port. Change the
   8 memory access to 8bit.
   9
  10 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
  11 Signed-off-by: John Crispin <blogic@openwrt.org>
  12 Cc: linux-mips@linux-mips.org
  13 ---
  14  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    4 ++++
  15  arch/mips/lantiq/early_printk.c                    |   14 ++++++++------
  16  2 files changed, 12 insertions(+), 6 deletions(-)
  17
  18 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  19 index 8a3c6be..e6d1ca0 100644
  20 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  21 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  22 @@ -34,6 +34,10 @@
  23  #define LTQ_ASC1_BASE_ADDR     0x1E100C00
  24  #define LTQ_ASC_SIZE           0x400
  25
  26 +/* during early_printk no ioremap is possible
  27 +   lets use KSEG1 instead  */
  28 +#define LTQ_EARLY_ASC          KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
  29 +
  30  /* RCU - reset control unit */
  31  #define LTQ_RCU_BASE_ADDR      0x1F203000
  32  #define LTQ_RCU_SIZE           0x1000
  33 diff --git a/arch/mips/lantiq/early_printk.c b/arch/mips/lantiq/early_printk.c
  34 index 972e05f..5089075 100644
  35 --- a/arch/mips/lantiq/early_printk.c
  36 +++ b/arch/mips/lantiq/early_printk.c
  37 @@ -12,11 +12,13 @@
  38  #include <lantiq.h>
  39  #include <lantiq_soc.h>
  40
  41 -/* no ioremap possible at this early stage, lets use KSEG1 instead  */
  42 -#define LTQ_ASC_BASE   KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
  43  #define ASC_BUF                1024
  44 -#define LTQ_ASC_FSTAT  ((u32 *)(LTQ_ASC_BASE + 0x0048))
  45 -#define LTQ_ASC_TBUF   ((u32 *)(LTQ_ASC_BASE + 0x0020))
  46 +#define LTQ_ASC_FSTAT  ((u32 *)(LTQ_EARLY_ASC + 0x0048))
  47 +#ifdef __BIG_ENDIAN
  48 +#define LTQ_ASC_TBUF   ((u32 *)(LTQ_EARLY_ASC + 0x0020 + 3))
  49 +#else
  50 +#define LTQ_ASC_TBUF   ((u32 *)(LTQ_EARLY_ASC + 0x0020))
  51 +#endif
  52  #define TXMASK         0x3F00
  53  #define TXOFFSET       8
  54
  55 @@ -27,7 +29,7 @@ void prom_putchar(char c)
  56         local_irq_save(flags);
  57         do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET);
  58         if (c == '\n')
  59 -               ltq_w32('\r', LTQ_ASC_TBUF);
  60 -       ltq_w32(c, LTQ_ASC_TBUF);
  61 +               ltq_w8('\r', LTQ_ASC_TBUF);
  62 +       ltq_w8(c, LTQ_ASC_TBUF);
  63         local_irq_restore(flags);
  64  }
  65 --
  66 1.7.5.4
  67