1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 10 Sep 2014 22:42:14 +0200
4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
9 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
10 arch/mips/lantiq/xway/Makefile | 3 +
11 arch/mips/lantiq/xway/ath_eep.c | 282 ++++++++++++++++++++
12 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++
13 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 ++++++++
14 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
15 7 files changed, 539 insertions(+)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
22 diff --git a/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
24 index 0000000..095d261
26 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
28 +#ifndef _PCI_ATH_FIXUP
29 +#define _PCI_ATH_FIXUP
31 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
33 +#endif /* _PCI_ATH_FIXUP */
34 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
35 index 133336b..779715c 100644
36 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
37 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
38 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr);
39 extern void ltq_pmu_enable(unsigned int module);
40 extern void ltq_pmu_disable(unsigned int module);
42 +/* allow the ethernet driver to load a flash mapped mac addr */
43 +const u8* ltq_get_eth_mac(void);
45 #endif /* CONFIG_SOC_TYPE_XWAY */
46 #endif /* _LTQ_XWAY_H__ */
47 diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
48 index 2dd442c..de876e1 100644
49 --- a/arch/mips/lantiq/xway/Makefile
50 +++ b/arch/mips/lantiq/xway/Makefile
51 @@ -2,4 +2,7 @@ obj-y := prom.o sysctrl.o clk.o reset.o dma.o timer.o dcdc.o
53 obj-y += vmmc.o tffs.o
56 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
58 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
59 diff --git a/arch/mips/lantiq/xway/ath_eep.c b/arch/mips/lantiq/xway/ath_eep.c
61 index 0000000..aff42ac
63 +++ b/arch/mips/lantiq/xway/ath_eep.c
66 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
67 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
68 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
69 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
70 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
72 + * This program is free software; you can redistribute it and/or modify it
73 + * under the terms of the GNU General Public License version 2 as published
74 + * by the Free Software Foundation.
77 +#include <linux/init.h>
78 +#include <linux/module.h>
79 +#include <linux/platform_device.h>
80 +#include <linux/etherdevice.h>
81 +#include <linux/ath5k_platform.h>
82 +#include <linux/ath9k_platform.h>
83 +#include <linux/pci.h>
84 +#include <linux/err.h>
85 +#include <linux/mtd/mtd.h>
86 +#include <pci-ath-fixup.h>
87 +#include <lantiq_soc.h>
89 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
90 +struct ath5k_platform_data ath5k_pdata;
91 +struct ath9k_platform_data ath9k_pdata = {
94 +static u8 athxk_eeprom_mac[6];
96 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
98 + dev->dev.platform_data = &ath9k_pdata;
102 +static int ath9k_eep_load;
103 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
105 + struct device_node *np = pdev->dev.of_node, *mtd_np;
106 + struct resource *eep_res, *mac_res = NULL;
107 + void __iomem *eep, *mac;
108 + int mac_offset, led_pin;
109 + u32 mac_inc = 0, pci_slot = 0;
111 + struct mtd_info *the_mtd;
112 + size_t flash_readlen;
113 + const __be32 *list;
117 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
118 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
119 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
120 + of_get_property(mtd_np, "label", NULL)) || (part =
121 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
122 + != ERR_PTR(-ENODEV)) {
123 + i = mtd_read(the_mtd, be32_to_cpup(list),
124 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
125 + (void *) ath9k_pdata.eeprom_data);
126 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
127 + size_t mac_readlen;
128 + mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
129 + (void *) athxk_eeprom_mac);
131 + put_mtd_device(the_mtd);
132 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
133 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
137 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
138 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
141 + dev_err(&pdev->dev, "failed to load eeprom address\n");
144 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
145 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
149 + eep = ioremap(eep_res->start, resource_size(eep_res));
150 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
151 + ATH9K_PLAT_EEP_MAX_WORDS << 1);
154 + if (of_find_property(np, "ath,eep-swap", NULL))
155 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
156 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
158 + if (of_find_property(np, "ath,eep-endian", NULL)) {
159 + ath9k_pdata.endian_check = true;
161 + dev_info(&pdev->dev, "endian check enabled.\n");
164 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
166 + if (resource_size(mac_res) != 6) {
167 + dev_err(&pdev->dev, "mac has an invalid size\n");
170 + mac = ioremap(mac_res->start, resource_size(mac_res));
171 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
172 + } else if (ltq_get_eth_mac()) {
173 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
176 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
177 + dev_warn(&pdev->dev, "using random mac\n");
178 + random_ether_addr(athxk_eeprom_mac);
181 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
182 + athxk_eeprom_mac[5] += mac_inc;
184 + ath9k_pdata.macaddr = athxk_eeprom_mac;
185 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
187 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
188 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
190 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
191 + if (ath9k_eep_load) {
192 + struct pci_dev *d = NULL;
193 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
194 + PCI_ANY_ID, d)) != NULL)
195 + pci_fixup_device(pci_fixup_early, d);
200 + if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
201 + ath9k_pdata.led_pin = led_pin;
202 + dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
205 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
210 +static struct of_device_id ath9k_eeprom_ids[] = {
211 + { .compatible = "ath9k,eeprom" },
215 +static struct platform_driver ath9k_eeprom_driver = {
217 + .name = "ath9k,eeprom",
218 + .owner = THIS_MODULE,
219 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
223 +static int __init of_ath9k_eeprom_init(void)
225 + int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
228 + ath9k_eep_load = 1;
233 +static int __init of_ath9k_eeprom_init_late(void)
235 + if (!ath9k_eep_load)
237 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
239 +late_initcall(of_ath9k_eeprom_init_late);
240 +subsys_initcall(of_ath9k_eeprom_init);
243 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
245 + dev->dev.platform_data = &ath5k_pdata;
249 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
251 + struct device_node *np = pdev->dev.of_node, *mtd_np;
252 + struct resource *eep_res, *mac_res = NULL;
253 + void __iomem *eep, *mac;
257 + struct mtd_info *the_mtd;
258 + size_t flash_readlen;
259 + const __be32 *list;
263 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
264 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
265 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
266 + of_get_property(mtd_np, "label", NULL)) || (part =
267 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
268 + != ERR_PTR(-ENODEV)) {
269 + i = mtd_read(the_mtd, be32_to_cpup(list),
270 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
271 + (void *) ath5k_pdata.eeprom_data);
272 + put_mtd_device(the_mtd);
273 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
275 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
279 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
280 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
283 + dev_err(&pdev->dev, "failed to load eeprom address\n");
286 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
287 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
291 + eep = ioremap(eep_res->start, resource_size(eep_res));
292 + ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
294 + memcpy_fromio(ath5k_pdata.eeprom_data, eep,
295 + ATH5K_PLAT_EEP_MAX_WORDS << 1);
298 + if (of_find_property(np, "ath,eep-swap", NULL))
299 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
300 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
302 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
303 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
304 + } else if (mac_res) {
305 + if (resource_size(mac_res) != 6) {
306 + dev_err(&pdev->dev, "mac has an invalid size\n");
309 + mac = ioremap(mac_res->start, resource_size(mac_res));
310 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
311 + } else if (ltq_get_eth_mac())
312 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
314 + dev_warn(&pdev->dev, "using random mac\n");
315 + random_ether_addr(athxk_eeprom_mac);
318 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
319 + athxk_eeprom_mac[5] += mac_inc;
321 + ath5k_pdata.macaddr = athxk_eeprom_mac;
322 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
324 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
329 +static struct of_device_id ath5k_eeprom_ids[] = {
330 + { .compatible = "ath5k,eeprom" },
334 +static struct platform_driver ath5k_eeprom_driver = {
336 + .name = "ath5k,eeprom",
337 + .owner = THIS_MODULE,
338 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
342 +static int __init of_ath5k_eeprom_init(void)
344 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
346 +device_initcall(of_ath5k_eeprom_init);
347 diff --git a/arch/mips/lantiq/xway/eth_mac.c b/arch/mips/lantiq/xway/eth_mac.c
349 index 0000000..d288a0e
351 +++ b/arch/mips/lantiq/xway/eth_mac.c
354 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
356 + * This program is free software; you can redistribute it and/or modify it
357 + * under the terms of the GNU General Public License version 2 as published
358 + * by the Free Software Foundation.
361 +#include <linux/init.h>
362 +#include <linux/module.h>
363 +#include <linux/of_platform.h>
364 +#include <linux/if_ether.h>
366 +static u8 eth_mac[6];
367 +static int eth_mac_set;
369 +const u8* ltq_get_eth_mac(void)
374 +static int __init setup_ethaddr(char *str)
376 + eth_mac_set = mac_pton(str, eth_mac);
377 + return !eth_mac_set;
379 +__setup("ethaddr=", setup_ethaddr);
381 +int __init of_eth_mac_probe(struct platform_device *pdev)
383 + struct device_node *np = pdev->dev.of_node;
384 + struct resource *mac_res;
389 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
392 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
395 + dev_err(&pdev->dev, "failed to load mac\n");
398 + if (resource_size(mac_res) != 6) {
399 + dev_err(&pdev->dev, "mac has an invalid size\n");
402 + mac = ioremap(mac_res->start, resource_size(mac_res));
403 + memcpy_fromio(eth_mac, mac, 6);
405 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
406 + eth_mac[5] += mac_inc;
411 +static struct of_device_id eth_mac_ids[] = {
412 + { .compatible = "lantiq,eth-mac" },
416 +static struct platform_driver eth_mac_driver = {
418 + .name = "lantiq,eth-mac",
419 + .owner = THIS_MODULE,
420 + .of_match_table = of_match_ptr(eth_mac_ids),
424 +static int __init of_eth_mac_init(void)
426 + return platform_driver_probe(ð_mac_driver, of_eth_mac_probe);
428 +device_initcall(of_eth_mac_init);
429 diff --git a/arch/mips/lantiq/xway/pci-ath-fixup.c b/arch/mips/lantiq/xway/pci-ath-fixup.c
431 index 0000000..c87ffb2
433 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
436 + * Atheros AP94 reference board PCI initialization
438 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
440 + * This program is free software; you can redistribute it and/or modify it
441 + * under the terms of the GNU General Public License version 2 as published
442 + * by the Free Software Foundation.
445 +#include <linux/pci.h>
446 +#include <linux/init.h>
447 +#include <linux/delay.h>
448 +#include <lantiq_soc.h>
450 +#define LTQ_PCI_MEM_BASE 0x18000000
457 +static int ath_num_fixups;
458 +static struct ath_fixup ath_fixups[2];
460 +static void ath_pci_fixup(struct pci_dev *dev)
463 + u16 *cal_data = NULL;
469 + for (i = 0; i < ath_num_fixups; i++) {
470 + if (ath_fixups[i].cal_data == NULL)
473 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
476 + cal_data = ath_fixups[i].cal_data;
480 + if (cal_data == NULL)
483 + if (*cal_data != 0xa55a) {
484 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
488 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
490 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
492 + pr_err("pci %s: ioremap error\n", pci_name(dev));
496 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
497 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
498 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
499 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
500 + pci_write_config_word(dev, PCI_COMMAND, cmd);
502 + /* set pointer to first reg address */
504 + while (*cal_data != 0xffff) {
508 + val |= (*cal_data++) << 16;
510 + ltq_w32(swab32(val), mem + reg);
514 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
515 + dev->vendor = val & 0xffff;
516 + dev->device = (val >> 16) & 0xffff;
518 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
519 + dev->revision = val & 0xff;
520 + dev->class = val >> 8; /* upper 3 bytes */
522 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
523 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
525 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
526 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
527 + pci_write_config_word(dev, PCI_COMMAND, cmd);
529 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
533 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
535 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
537 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
540 + ath_fixups[ath_num_fixups].slot = slot;
541 + ath_fixups[ath_num_fixups].cal_data = cal_data;
544 diff --git a/arch/mips/lantiq/xway/rt_eep.c b/arch/mips/lantiq/xway/rt_eep.c
546 index 0000000..00f2d4c
548 +++ b/arch/mips/lantiq/xway/rt_eep.c
551 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
553 + * This program is free software; you can redistribute it and/or modify it
554 + * under the terms of the GNU General Public License version 2 as published
555 + * by the Free Software Foundation.
558 +#include <linux/init.h>
559 +#include <linux/module.h>
560 +#include <linux/pci.h>
561 +#include <linux/platform_device.h>
562 +#include <linux/rt2x00_platform.h>
564 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
565 +static struct rt2x00_platform_data rt2x00_pdata;
567 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
569 + dev->dev.platform_data = &rt2x00_pdata;
573 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
575 + struct device_node *np = pdev->dev.of_node;
576 + const char *eeprom;
578 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
579 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
583 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
584 +// rt2x00_pdata.mac_address = mac;
585 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
587 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
592 +static struct of_device_id ralink_eeprom_ids[] = {
593 + { .compatible = "ralink,eeprom" },
597 +static struct platform_driver ralink_eeprom_driver = {
599 + .name = "ralink,eeprom",
600 + .owner = THIS_MODULE,
601 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
605 +static int __init of_ralink_eeprom_init(void)
607 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
609 +device_initcall(of_ralink_eeprom_init);