1 From 07f7321c0f79c0b800d28898a480d044f839e813 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 6 Dec 2012 11:59:23 +0100
4 Subject: [PATCH 104/123] MIPS: lantiq: adds 4dword burst length for dma
7 arch/mips/lantiq/xway/dma.c | 4 +++-
8 1 file changed, 3 insertions(+), 1 deletion(-)
10 --- a/arch/mips/lantiq/xway/dma.c
11 +++ b/arch/mips/lantiq/xway/dma.c
13 #define DMA_IRQ_ACK 0x7e /* IRQ status register */
14 #define DMA_POLL BIT(31) /* turn on channel polling */
15 #define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
16 +#define DMA_4W_BURST BIT(2) /* 4 word burst length */
17 #define DMA_2W_BURST BIT(1) /* 2 word burst length */
18 #define DMA_MAX_CHANNEL 20 /* the soc has 20 channels */
19 #define DMA_ETOP_ENDIANESS (0xf << 8) /* endianess swap etop channels */
20 @@ -195,7 +196,8 @@ ltq_dma_init_port(int p)
21 * Tell the DMA engine to swap the endianess of data frames and
22 * drop packets if the channel arbitration fails.
24 - ltq_dma_w32_mask(0, DMA_ETOP_ENDIANESS | DMA_PDEN,
25 + ltq_dma_w32_mask(0, (DMA_4W_BURST << 4) | (DMA_4W_BURST << 2) |
26 + DMA_ETOP_ENDIANESS | DMA_PDEN,