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[lantiq] refresh patches
[openwrt/svn-archive/archive.git] / target / linux / lantiq / patches-3.7 / 0119-owrt-ATM-adds-lantiq-specific-hacks.patch
1 From 8d2a7d1fb561c9cb098c2b13ded34fe0f49dcca5 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 3 Aug 2012 10:27:25 +0200
4 Subject: [PATCH 20/25] owrt atm
5
6 ---
7 arch/mips/lantiq/irq.c | 2 ++
8 arch/mips/mm/cache.c | 2 ++
9 net/atm/common.c | 6 ++++++
10 net/atm/proc.c | 2 +-
11 4 files changed, 11 insertions(+), 1 deletions(-)
12
13 --- a/arch/mips/lantiq/irq.c
14 +++ b/arch/mips/lantiq/irq.c
15 @@ -14,6 +14,7 @@
16 #include <linux/of_platform.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
19 +#include <linux/module.h>
20
21 #include <asm/bootinfo.h>
22 #include <asm/irq_cpu.h>
23 @@ -99,6 +100,7 @@ void ltq_mask_and_ack_irq(struct irq_dat
24 ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
25 ltq_icu_w32(im, BIT(offset), isr);
26 }
27 +EXPORT_SYMBOL(ltq_mask_and_ack_irq);
28
29 static void ltq_ack_irq(struct irq_data *d)
30 {
31 --- a/arch/mips/mm/cache.c
32 +++ b/arch/mips/mm/cache.c
33 @@ -58,6 +58,8 @@ void (*_dma_cache_wback)(unsigned long s
34 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
35
36 EXPORT_SYMBOL(_dma_cache_wback_inv);
37 +EXPORT_SYMBOL(_dma_cache_wback);
38 +EXPORT_SYMBOL(_dma_cache_inv);
39
40 #endif /* CONFIG_DMA_NONCOHERENT */
41
42 --- a/net/atm/common.c
43 +++ b/net/atm/common.c
44 @@ -62,11 +62,17 @@ static void vcc_remove_socket(struct soc
45 write_unlock_irq(&vcc_sklist_lock);
46 }
47
48 +struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL;
49 +EXPORT_SYMBOL(ifx_atm_alloc_tx);
50 +
51 static struct sk_buff *alloc_tx(struct atm_vcc *vcc, unsigned int size)
52 {
53 struct sk_buff *skb;
54 struct sock *sk = sk_atm(vcc);
55
56 + if (ifx_atm_alloc_tx != NULL)
57 + return ifx_atm_alloc_tx(vcc, size);
58 +
59 if (sk_wmem_alloc_get(sk) && !atm_may_send(vcc, size)) {
60 pr_debug("Sorry: wmem_alloc = %d, size = %d, sndbuf = %d\n",
61 sk_wmem_alloc_get(sk), size, sk->sk_sndbuf);
62 --- a/net/atm/proc.c
63 +++ b/net/atm/proc.c
64 @@ -154,7 +154,7 @@ static void *vcc_seq_next(struct seq_fil
65 static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
66 {
67 static const char *const class_name[] = {
68 - "off", "UBR", "CBR", "VBR", "ABR"};
69 + "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
70 static const char *const aal_name[] = {
71 "---", "1", "2", "3/4", /* 0- 3 */
72 "???", "5", "???", "???", /* 4- 7 */
73 --- /dev/null
74 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
75 @@ -0,0 +1,196 @@
76 +/******************************************************************************
77 +**
78 +** FILE NAME : ifx_atm.h
79 +** PROJECT : UEIP
80 +** MODULES : ATM
81 +**
82 +** DATE : 17 Jun 2009
83 +** AUTHOR : Xu Liang
84 +** DESCRIPTION : Global ATM driver header file
85 +** COPYRIGHT : Copyright (c) 2006
86 +** Infineon Technologies AG
87 +** Am Campeon 1-12, 85579 Neubiberg, Germany
88 +**
89 +** This program is free software; you can redistribute it and/or modify
90 +** it under the terms of the GNU General Public License as published by
91 +** the Free Software Foundation; either version 2 of the License, or
92 +** (at your option) any later version.
93 +**
94 +** HISTORY
95 +** $Date $Author $Comment
96 +** 07 JUL 2009 Xu Liang Init Version
97 +*******************************************************************************/
98 +
99 +#ifndef IFX_ATM_H
100 +#define IFX_ATM_H
101 +
102 +
103 +
104 +/*!
105 + \defgroup IFX_ATM UEIP Project - ATM driver module
106 + \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
107 + */
108 +
109 +/*!
110 + \defgroup IFX_ATM_IOCTL IOCTL Commands
111 + \ingroup IFX_ATM
112 + \brief IOCTL Commands used by user application.
113 + */
114 +
115 +/*!
116 + \defgroup IFX_ATM_STRUCT Structures
117 + \ingroup IFX_ATM
118 + \brief Structures used by user application.
119 + */
120 +
121 +/*!
122 + \file ifx_atm.h
123 + \ingroup IFX_ATM
124 + \brief ATM driver header file
125 + */
126 +
127 +
128 +
129 +/*
130 + * ####################################
131 + * Definition
132 + * ####################################
133 + */
134 +
135 +/*!
136 + \addtogroup IFX_ATM_STRUCT
137 + */
138 +/*@{*/
139 +
140 +/*
141 + * ATM MIB
142 + */
143 +
144 +/*!
145 + \struct atm_cell_ifEntry_t
146 + \brief Structure used for Cell Level MIB Counters.
147 +
148 + User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL".
149 + */
150 +typedef struct {
151 + __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */
152 + __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */
153 + __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */
154 + __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */
155 + __u32 ifInErrors; /*!< counter of error ingress cells */
156 + __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */
157 + __u32 ifOutErrors; /*!< counter of error egress cells */
158 +} atm_cell_ifEntry_t;
159 +
160 +/*!
161 + \struct atm_aal5_ifEntry_t
162 + \brief Structure used for AAL5 Frame Level MIB Counters.
163 +
164 + User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5".
165 + */
166 +typedef struct {
167 + __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
168 + __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
169 + __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */
170 + __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */
171 + __u32 ifInUcastPkts; /*!< counter of ingress packets */
172 + __u32 ifOutUcastPkts; /*!< counter of egress packets */
173 + __u32 ifInErrors; /*!< counter of error ingress packets */
174 + __u32 ifInDiscards; /*!< counter of dropped ingress packets */
175 + __u32 ifOutErros; /*!< counter of error egress packets */
176 + __u32 ifOutDiscards; /*!< counter of dropped egress packets */
177 +} atm_aal5_ifEntry_t;
178 +
179 +/*!
180 + \struct atm_aal5_vcc_t
181 + \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
182 +
183 + This structure is a part of structure "atm_aal5_vcc_x_t".
184 + */
185 +typedef struct {
186 + __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */
187 + __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet
188 + __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */
189 +} atm_aal5_vcc_t;
190 +
191 +/*!
192 + \struct atm_aal5_vcc_x_t
193 + \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
194 +
195 + User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC".
196 + */
197 +typedef struct {
198 + int vpi; /*!< VPI of the VCC to get MIB counters */
199 + int vci; /*!< VCI of the VCC to get MIB counters */
200 + atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */
201 +} atm_aal5_vcc_x_t;
202 +
203 +/*@}*/
204 +
205 +
206 +
207 +/*
208 + * ####################################
209 + * IOCTL
210 + * ####################################
211 + */
212 +
213 +/*!
214 + \addtogroup IFX_ATM_IOCTL
215 + */
216 +/*@{*/
217 +
218 +/*
219 + * ioctl Command
220 + */
221 +/*!
222 + \brief ATM IOCTL Magic Number
223 + */
224 +#define PPE_ATM_IOC_MAGIC 'o'
225 +/*!
226 + \brief ATM IOCTL Command - Get Cell Level MIB Counters
227 +
228 + This command is obsolete. User can get cell level MIB from DSL API.
229 + This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
230 + */
231 +#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t)
232 +/*!
233 + \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
234 +
235 + Get AAL5 packet counters.
236 + This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
237 + */
238 +#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t)
239 +/*!
240 + \brief ATM IOCTL Command - Get Per PVC MIB Counters
241 +
242 + Get AAL5 packet counters for each PVC.
243 + This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
244 + */
245 +#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
246 +/*!
247 + \brief Total Number of ATM IOCTL Commands
248 + */
249 +#define PPE_ATM_IOC_MAXNR 3
250 +
251 +/*@}*/
252 +
253 +
254 +
255 +/*
256 + * ####################################
257 + * API
258 + * ####################################
259 + */
260 +
261 +#ifdef __KERNEL__
262 +struct port_cell_info {
263 + unsigned int port_num;
264 + unsigned int tx_link_rate[2];
265 +};
266 +#endif
267 +
268 +
269 +
270 +#endif // IFX_ATM_H
271 +
272 --- /dev/null
273 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
274 @@ -0,0 +1,203 @@
275 +/******************************************************************************
276 +**
277 +** FILE NAME : ifx_ptm.h
278 +** PROJECT : UEIP
279 +** MODULES : PTM
280 +**
281 +** DATE : 17 Jun 2009
282 +** AUTHOR : Xu Liang
283 +** DESCRIPTION : Global PTM driver header file
284 +** COPYRIGHT : Copyright (c) 2006
285 +** Infineon Technologies AG
286 +** Am Campeon 1-12, 85579 Neubiberg, Germany
287 +**
288 +** This program is free software; you can redistribute it and/or modify
289 +** it under the terms of the GNU General Public License as published by
290 +** the Free Software Foundation; either version 2 of the License, or
291 +** (at your option) any later version.
292 +**
293 +** HISTORY
294 +** $Date $Author $Comment
295 +** 07 JUL 2009 Xu Liang Init Version
296 +*******************************************************************************/
297 +
298 +#ifndef IFX_PTM_H
299 +#define IFX_PTM_H
300 +
301 +
302 +
303 +/*!
304 + \defgroup IFX_PTM UEIP Project - PTM driver module
305 + \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9.
306 + */
307 +
308 +/*!
309 + \defgroup IFX_PTM_IOCTL IOCTL Commands
310 + \ingroup IFX_PTM
311 + \brief IOCTL Commands used by user application.
312 + */
313 +
314 +/*!
315 + \defgroup IFX_PTM_STRUCT Structures
316 + \ingroup IFX_PTM
317 + \brief Structures used by user application.
318 + */
319 +
320 +/*!
321 + \file ifx_ptm.h
322 + \ingroup IFX_PTM
323 + \brief PTM driver header file
324 + */
325 +
326 +
327 +
328 +/*
329 + * ####################################
330 + * Definition
331 + * ####################################
332 + */
333 +
334 +
335 +
336 +/*
337 + * ####################################
338 + * IOCTL
339 + * ####################################
340 + */
341 +
342 +/*!
343 + \addtogroup IFX_PTM_IOCTL
344 + */
345 +/*@{*/
346 +
347 +/*
348 + * ioctl Command
349 + */
350 +/*!
351 + \brief PTM IOCTL Command - Get codeword MIB counters.
352 +
353 + This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters.
354 + */
355 +#define IFX_PTM_MIB_CW_GET SIOCDEVPRIVATE + 1
356 +/*!
357 + \brief PTM IOCTL Command - Get packet MIB counters.
358 +
359 + This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters.
360 + */
361 +#define IFX_PTM_MIB_FRAME_GET SIOCDEVPRIVATE + 2
362 +/*!
363 + \brief PTM IOCTL Command - Get firmware configuration (CRC).
364 +
365 + This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC).
366 + */
367 +#define IFX_PTM_CFG_GET SIOCDEVPRIVATE + 3
368 +/*!
369 + \brief PTM IOCTL Command - Set firmware configuration (CRC).
370 +
371 + This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC).
372 + */
373 +#define IFX_PTM_CFG_SET SIOCDEVPRIVATE + 4
374 +/*!
375 + \brief PTM IOCTL Command - Program priority value to TX queue mapping.
376 +
377 + This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping.
378 + */
379 +#define IFX_PTM_MAP_PKT_PRIO_TO_Q SIOCDEVPRIVATE + 14
380 +
381 +/*@}*/
382 +
383 +
384 +/*!
385 + \addtogroup IFX_PTM_STRUCT
386 + */
387 +/*@{*/
388 +
389 +/*
390 + * ioctl Data Type
391 + */
392 +
393 +/*!
394 + \typedef PTM_CW_IF_ENTRY_T
395 + \brief Wrapping of structure "ptm_cw_ifEntry_t".
396 + */
397 +/*!
398 + \struct ptm_cw_ifEntry_t
399 + \brief Structure used for CodeWord level MIB counters.
400 + */
401 +typedef struct ptm_cw_ifEntry_t {
402 + uint32_t ifRxNoIdleCodewords; /*!< output, number of ingress user codeword */
403 + uint32_t ifRxIdleCodewords; /*!< output, number of ingress idle codeword */
404 + uint32_t ifRxCodingViolation; /*!< output, number of error ingress codeword */
405 + uint32_t ifTxNoIdleCodewords; /*!< output, number of egress user codeword */
406 + uint32_t ifTxIdleCodewords; /*!< output, number of egress idle codeword */
407 +} PTM_CW_IF_ENTRY_T;
408 +
409 +/*!
410 + \typedef PTM_FRAME_MIB_T
411 + \brief Wrapping of structure "ptm_frame_mib_t".
412 + */
413 +/*!
414 + \struct ptm_frame_mib_t
415 + \brief Structure used for packet level MIB counters.
416 + */
417 +typedef struct ptm_frame_mib_t {
418 + uint32_t RxCorrect; /*!< output, number of ingress packet */
419 + uint32_t TC_CrcError; /*!< output, number of egress packet with CRC error */
420 + uint32_t RxDropped; /*!< output, number of dropped ingress packet */
421 + uint32_t TxSend; /*!< output, number of egress packet */
422 +} PTM_FRAME_MIB_T;
423 +
424 +/*!
425 + \typedef IFX_PTM_CFG_T
426 + \brief Wrapping of structure "ptm_cfg_t".
427 + */
428 +/*!
429 + \struct ptm_cfg_t
430 + \brief Structure used for ETH/TC CRC configuration.
431 + */
432 +typedef struct ptm_cfg_t {
433 + uint32_t RxEthCrcPresent; /*!< input/output, ingress packet has ETH CRC */
434 + uint32_t RxEthCrcCheck; /*!< input/output, check ETH CRC of ingress packet */
435 + uint32_t RxTcCrcCheck; /*!< input/output, check TC CRC of ingress codeword */
436 + uint32_t RxTcCrcLen; /*!< input/output, length of TC CRC of ingress codeword */
437 + uint32_t TxEthCrcGen; /*!< input/output, generate ETH CRC for egress packet */
438 + uint32_t TxTcCrcGen; /*!< input/output, generate TC CRC for egress codeword */
439 + uint32_t TxTcCrcLen; /*!< input/output, length of TC CRC of egress codeword */
440 +} IFX_PTM_CFG_T;
441 +
442 +/*!
443 + \typedef IFX_PTM_PRIO_Q_MAP_T
444 + \brief Wrapping of structure "ppe_prio_q_map".
445 + */
446 +/*!
447 + \struct ppe_prio_q_map
448 + \brief Structure used for Priority Value to TX Queue mapping.
449 + */
450 +typedef struct ppe_prio_q_map {
451 + int pkt_prio;
452 + int qid;
453 + int vpi; // ignored in eth interface
454 + int vci; // ignored in eth interface
455 +} IFX_PTM_PRIO_Q_MAP_T;
456 +
457 +/*@}*/
458 +
459 +
460 +
461 +/*
462 + * ####################################
463 + * API
464 + * ####################################
465 + */
466 +
467 +#ifdef __KERNEL__
468 +struct port_cell_info {
469 + unsigned int port_num;
470 + unsigned int tx_link_rate[2];
471 +};
472 +#endif
473 +
474 +
475 +
476 +#endif // IFX_PTM_H
477 +
478 --- a/include/uapi/linux/atm.h
479 +++ b/include/uapi/linux/atm.h
480 @@ -130,8 +130,14 @@
481 #define ATM_ABR 4
482 #define ATM_ANYCLASS 5 /* compatible with everything */
483
484 +#define ATM_VBR_NRT ATM_VBR
485 +#define ATM_VBR_RT 6
486 +#define ATM_UBR_PLUS 7
487 +#define ATM_GFR 8
488 +
489 #define ATM_MAX_PCR -1 /* maximum available PCR */
490
491 +
492 struct atm_trafprm {
493 unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
494 int max_pcr; /* maximum PCR in cells per second */
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