1 From 591a9bdde1fa9aa6f1c6132ea04771bb1dcd6180 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 18/22] owrt: lantiq: wifi and ethernet eeprom handling
7 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
8 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
9 arch/mips/lantiq/xway/Makefile | 3 +
10 arch/mips/lantiq/xway/ath_eep.c | 248 ++++++++++++++++++++
11 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
14 arch/mips/pci/pci-lantiq.c | 2 +-
15 8 files changed, 506 insertions(+), 1 deletion(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
22 diff --git a/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
24 index 0000000..095d261
26 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
28 +#ifndef _PCI_ATH_FIXUP
29 +#define _PCI_ATH_FIXUP
31 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
33 +#endif /* _PCI_ATH_FIXUP */
34 diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
35 index 133336b..779715c 100644
36 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
37 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
38 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr);
39 extern void ltq_pmu_enable(unsigned int module);
40 extern void ltq_pmu_disable(unsigned int module);
42 +/* allow the ethernet driver to load a flash mapped mac addr */
43 +const u8* ltq_get_eth_mac(void);
45 #endif /* CONFIG_SOC_TYPE_XWAY */
46 #endif /* _LTQ_XWAY_H__ */
47 diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
48 index 087497d..51f0eba 100644
49 --- a/arch/mips/lantiq/xway/Makefile
50 +++ b/arch/mips/lantiq/xway/Makefile
52 obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
55 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
57 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
58 diff --git a/arch/mips/lantiq/xway/ath_eep.c b/arch/mips/lantiq/xway/ath_eep.c
60 index 0000000..ed55124
62 +++ b/arch/mips/lantiq/xway/ath_eep.c
65 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
66 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
67 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
68 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
69 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
71 + * This program is free software; you can redistribute it and/or modify it
72 + * under the terms of the GNU General Public License version 2 as published
73 + * by the Free Software Foundation.
76 +#include <linux/init.h>
77 +#include <linux/module.h>
78 +#include <linux/platform_device.h>
79 +#include <linux/etherdevice.h>
80 +#include <linux/ath5k_platform.h>
81 +#include <linux/ath9k_platform.h>
82 +#include <linux/pci.h>
83 +#include <linux/err.h>
84 +#include <linux/mtd/mtd.h>
85 +#include <pci-ath-fixup.h>
86 +#include <lantiq_soc.h>
88 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
89 +struct ath5k_platform_data ath5k_pdata;
90 +struct ath9k_platform_data ath9k_pdata = {
93 +static u8 athxk_eeprom_mac[6];
95 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
97 + dev->dev.platform_data = &ath9k_pdata;
101 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
103 + struct device_node *np = pdev->dev.of_node, *mtd_np;
104 + struct resource *eep_res, *mac_res = NULL;
105 + void __iomem *eep, *mac;
107 + u32 mac_inc = 0, pci_slot = 0;
109 + struct mtd_info *the_mtd;
110 + size_t flash_readlen;
111 + const __be32 *list;
115 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
116 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
117 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
118 + of_get_property(mtd_np, "label", NULL)) || (part =
119 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
120 + != ERR_PTR(-ENODEV)) {
121 + i = mtd_read(the_mtd, be32_to_cpup(list),
122 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
123 + (void *) ath9k_pdata.eeprom_data);
124 + put_mtd_device(the_mtd);
125 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
126 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
130 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
131 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
134 + dev_err(&pdev->dev, "failed to load eeprom address\n");
137 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
138 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
142 + eep = ioremap(eep_res->start, resource_size(eep_res));
143 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
144 + ATH9K_PLAT_EEP_MAX_WORDS << 1);
147 + if (of_find_property(np, "ath,eep-swap", NULL))
148 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
149 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
151 + if (of_find_property(np, "ath,eep-endian", NULL)) {
152 + ath9k_pdata.endian_check = true;
154 + dev_info(&pdev->dev, "endian check enabled.\n");
157 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
158 + memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
159 + } else if (mac_res) {
160 + if (resource_size(mac_res) != 6) {
161 + dev_err(&pdev->dev, "mac has an invalid size\n");
164 + mac = ioremap(mac_res->start, resource_size(mac_res));
165 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
166 + } else if (ltq_get_eth_mac())
167 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
169 + dev_warn(&pdev->dev, "using random mac\n");
170 + random_ether_addr(athxk_eeprom_mac);
173 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
174 + athxk_eeprom_mac[5] += mac_inc;
176 + ath9k_pdata.macaddr = athxk_eeprom_mac;
177 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
179 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
180 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
182 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
185 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
190 +static struct of_device_id ath9k_eeprom_ids[] = {
191 + { .compatible = "ath9k,eeprom" },
195 +static struct platform_driver ath9k_eeprom_driver = {
197 + .name = "ath9k,eeprom",
198 + .owner = THIS_MODULE,
199 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
203 +static int __init of_ath9k_eeprom_init(void)
205 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
207 +late_initcall(of_ath9k_eeprom_init);
210 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
212 + dev->dev.platform_data = &ath5k_pdata;
216 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
218 + struct device_node *np = pdev->dev.of_node, *mtd_np;
219 + struct resource *eep_res, *mac_res = NULL;
220 + void __iomem *eep, *mac;
224 + struct mtd_info *the_mtd;
225 + size_t flash_readlen;
226 + const __be32 *list;
230 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
231 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
232 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
233 + of_get_property(mtd_np, "label", NULL)) || (part =
234 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
235 + != ERR_PTR(-ENODEV)) {
236 + i = mtd_read(the_mtd, be32_to_cpup(list),
237 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
238 + (void *) ath5k_pdata.eeprom_data);
239 + put_mtd_device(the_mtd);
240 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
242 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
246 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
247 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
250 + dev_err(&pdev->dev, "failed to load eeprom address\n");
253 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
254 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
258 + eep = ioremap(eep_res->start, resource_size(eep_res));
259 + memcpy_fromio(ath5k_pdata.eeprom_data, eep,
260 + ATH5K_PLAT_EEP_MAX_WORDS << 1);
263 + if (of_find_property(np, "ath,eep-swap", NULL))
264 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
265 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
267 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
268 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
269 + } else if (mac_res) {
270 + if (resource_size(mac_res) != 6) {
271 + dev_err(&pdev->dev, "mac has an invalid size\n");
274 + mac = ioremap(mac_res->start, resource_size(mac_res));
275 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
276 + } else if (ltq_get_eth_mac())
277 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
279 + dev_warn(&pdev->dev, "using random mac\n");
280 + random_ether_addr(athxk_eeprom_mac);
283 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
284 + athxk_eeprom_mac[5] += mac_inc;
286 + ath5k_pdata.macaddr = athxk_eeprom_mac;
287 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
289 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
294 +static struct of_device_id ath5k_eeprom_ids[] = {
295 + { .compatible = "ath5k,eeprom" },
299 +static struct platform_driver ath5k_eeprom_driver = {
301 + .name = "ath5k,eeprom",
302 + .owner = THIS_MODULE,
303 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
307 +static int __init of_ath5k_eeprom_init(void)
309 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
311 +late_initcall(of_ath5k_eeprom_init);
312 diff --git a/arch/mips/lantiq/xway/eth_mac.c b/arch/mips/lantiq/xway/eth_mac.c
314 index 0000000..d288a0e
316 +++ b/arch/mips/lantiq/xway/eth_mac.c
319 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
321 + * This program is free software; you can redistribute it and/or modify it
322 + * under the terms of the GNU General Public License version 2 as published
323 + * by the Free Software Foundation.
326 +#include <linux/init.h>
327 +#include <linux/module.h>
328 +#include <linux/of_platform.h>
329 +#include <linux/if_ether.h>
331 +static u8 eth_mac[6];
332 +static int eth_mac_set;
334 +const u8* ltq_get_eth_mac(void)
339 +static int __init setup_ethaddr(char *str)
341 + eth_mac_set = mac_pton(str, eth_mac);
342 + return !eth_mac_set;
344 +__setup("ethaddr=", setup_ethaddr);
346 +int __init of_eth_mac_probe(struct platform_device *pdev)
348 + struct device_node *np = pdev->dev.of_node;
349 + struct resource *mac_res;
354 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
357 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
360 + dev_err(&pdev->dev, "failed to load mac\n");
363 + if (resource_size(mac_res) != 6) {
364 + dev_err(&pdev->dev, "mac has an invalid size\n");
367 + mac = ioremap(mac_res->start, resource_size(mac_res));
368 + memcpy_fromio(eth_mac, mac, 6);
370 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
371 + eth_mac[5] += mac_inc;
376 +static struct of_device_id eth_mac_ids[] = {
377 + { .compatible = "lantiq,eth-mac" },
381 +static struct platform_driver eth_mac_driver = {
383 + .name = "lantiq,eth-mac",
384 + .owner = THIS_MODULE,
385 + .of_match_table = of_match_ptr(eth_mac_ids),
389 +static int __init of_eth_mac_init(void)
391 + return platform_driver_probe(ð_mac_driver, of_eth_mac_probe);
393 +device_initcall(of_eth_mac_init);
394 diff --git a/arch/mips/lantiq/xway/pci-ath-fixup.c b/arch/mips/lantiq/xway/pci-ath-fixup.c
396 index 0000000..c87ffb2
398 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
401 + * Atheros AP94 reference board PCI initialization
403 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
405 + * This program is free software; you can redistribute it and/or modify it
406 + * under the terms of the GNU General Public License version 2 as published
407 + * by the Free Software Foundation.
410 +#include <linux/pci.h>
411 +#include <linux/init.h>
412 +#include <linux/delay.h>
413 +#include <lantiq_soc.h>
415 +#define LTQ_PCI_MEM_BASE 0x18000000
422 +static int ath_num_fixups;
423 +static struct ath_fixup ath_fixups[2];
425 +static void ath_pci_fixup(struct pci_dev *dev)
428 + u16 *cal_data = NULL;
434 + for (i = 0; i < ath_num_fixups; i++) {
435 + if (ath_fixups[i].cal_data == NULL)
438 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
441 + cal_data = ath_fixups[i].cal_data;
445 + if (cal_data == NULL)
448 + if (*cal_data != 0xa55a) {
449 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
453 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
455 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
457 + pr_err("pci %s: ioremap error\n", pci_name(dev));
461 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
462 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
463 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
464 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
465 + pci_write_config_word(dev, PCI_COMMAND, cmd);
467 + /* set pointer to first reg address */
469 + while (*cal_data != 0xffff) {
473 + val |= (*cal_data++) << 16;
475 + ltq_w32(swab32(val), mem + reg);
479 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
480 + dev->vendor = val & 0xffff;
481 + dev->device = (val >> 16) & 0xffff;
483 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
484 + dev->revision = val & 0xff;
485 + dev->class = val >> 8; /* upper 3 bytes */
487 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
488 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
490 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
491 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
492 + pci_write_config_word(dev, PCI_COMMAND, cmd);
494 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
498 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
500 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
502 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
505 + ath_fixups[ath_num_fixups].slot = slot;
506 + ath_fixups[ath_num_fixups].cal_data = cal_data;
509 diff --git a/arch/mips/lantiq/xway/rt_eep.c b/arch/mips/lantiq/xway/rt_eep.c
511 index 0000000..00f2d4c
513 +++ b/arch/mips/lantiq/xway/rt_eep.c
516 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
518 + * This program is free software; you can redistribute it and/or modify it
519 + * under the terms of the GNU General Public License version 2 as published
520 + * by the Free Software Foundation.
523 +#include <linux/init.h>
524 +#include <linux/module.h>
525 +#include <linux/pci.h>
526 +#include <linux/platform_device.h>
527 +#include <linux/rt2x00_platform.h>
529 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
530 +static struct rt2x00_platform_data rt2x00_pdata;
532 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
534 + dev->dev.platform_data = &rt2x00_pdata;
538 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
540 + struct device_node *np = pdev->dev.of_node;
541 + const char *eeprom;
543 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
544 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
548 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
549 +// rt2x00_pdata.mac_address = mac;
550 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
552 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
557 +static struct of_device_id ralink_eeprom_ids[] = {
558 + { .compatible = "ralink,eeprom" },
562 +static struct platform_driver ralink_eeprom_driver = {
564 + .name = "ralink,eeprom",
565 + .owner = THIS_MODULE,
566 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
570 +static int __init of_ralink_eeprom_init(void)
572 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
574 +device_initcall(of_ralink_eeprom_init);
575 diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
576 index 879077b..ad22c82 100644
577 --- a/arch/mips/pci/pci-lantiq.c
578 +++ b/arch/mips/pci/pci-lantiq.c
579 @@ -260,4 +260,4 @@ int __init pcibios_init(void)
583 -arch_initcall(pcibios_init);
584 +late_initcall(pcibios_init);