1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 10 Sep 2014 22:42:14 +0200
4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
9 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
10 arch/mips/lantiq/xway/Makefile | 3 +
11 arch/mips/lantiq/xway/ath_eep.c | 282 ++++++++++++++++++++
12 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++
13 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 ++++++++
14 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
15 7 files changed, 539 insertions(+)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
25 +#ifndef _PCI_ATH_FIXUP
26 +#define _PCI_ATH_FIXUP
28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
30 +#endif /* _PCI_ATH_FIXUP */
31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
33 @@ -104,5 +104,8 @@ int xrx200_gphy_boot(struct device *dev,
34 extern void ltq_pmu_enable(unsigned int module);
35 extern void ltq_pmu_disable(unsigned int module);
37 +/* allow the ethernet driver to load a flash mapped mac addr */
38 +const u8* ltq_get_eth_mac(void);
40 #endif /* CONFIG_SOC_TYPE_XWAY */
41 #endif /* _LTQ_XWAY_H__ */
42 --- a/arch/mips/lantiq/xway/Makefile
43 +++ b/arch/mips/lantiq/xway/Makefile
44 @@ -2,4 +2,7 @@ obj-y := prom.o sysctrl.o clk.o reset.o
46 obj-y += vmmc.o tffs.o
49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
51 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
53 +++ b/arch/mips/lantiq/xway/ath_eep.c
56 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
57 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
58 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
59 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
60 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
61 + * Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
63 + * This program is free software; you can redistribute it and/or modify it
64 + * under the terms of the GNU General Public License version 2 as published
65 + * by the Free Software Foundation.
68 +#include <linux/init.h>
69 +#include <linux/module.h>
70 +#include <linux/platform_device.h>
71 +#include <linux/etherdevice.h>
72 +#include <linux/ath5k_platform.h>
73 +#include <linux/ath9k_platform.h>
74 +#include <linux/pci.h>
75 +#include <linux/err.h>
76 +#include <linux/mtd/mtd.h>
77 +#include <pci-ath-fixup.h>
78 +#include <lantiq_soc.h>
80 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
81 +struct ath5k_platform_data ath5k_pdata;
82 +struct ath9k_platform_data ath9k_pdata = {
85 +static u8 athxk_eeprom_mac[6];
87 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
89 + dev->dev.platform_data = &ath9k_pdata;
93 +static int ath9k_eep_load;
94 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
96 + struct device_node *np = pdev->dev.of_node, *mtd_np = NULL;
97 + int mac_offset, led_pin;
98 + u32 mac_inc = 0, pci_slot = 0;
100 + struct mtd_info *the_mtd;
101 + size_t flash_readlen;
102 + const __be32 *list;
105 + u16 dev_ids[2] = { 0 };
107 + list = of_get_property(np, "ath,eep-flash", &i);
108 + if (!list || (i != (2 * sizeof(*list))))
111 + phandle = be32_to_cpup(list++);
113 + mtd_np = of_find_node_by_phandle(phandle);
118 + part = of_get_property(mtd_np, "label", NULL);
120 + part = mtd_np->name;
122 + the_mtd = get_mtd_device_nm(part);
123 + if (IS_ERR(the_mtd))
126 + i = mtd_read(the_mtd, be32_to_cpup(list), ATH9K_PLAT_EEP_MAX_WORDS << 1,
127 + &flash_readlen, (void *) ath9k_pdata.eeprom_data);
129 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
130 + size_t mac_readlen;
131 + mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
132 + (void *) athxk_eeprom_mac);
134 + put_mtd_device(the_mtd);
136 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
137 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
141 + if (of_find_property(np, "ath,eep-swap", NULL))
142 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
143 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
145 + if (of_find_property(np, "ath,eep-endian", NULL)) {
146 + ath9k_pdata.endian_check = true;
148 + dev_info(&pdev->dev, "endian check enabled.\n");
151 + if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac())
152 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
154 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
155 + dev_warn(&pdev->dev, "using random mac\n");
156 + random_ether_addr(athxk_eeprom_mac);
159 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
160 + athxk_eeprom_mac[5] += mac_inc;
162 + ath9k_pdata.macaddr = athxk_eeprom_mac;
163 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
165 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
166 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
168 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
169 + if (ath9k_eep_load) {
170 + struct pci_dev *d = NULL;
171 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
172 + PCI_ANY_ID, d)) != NULL)
173 + pci_fixup_device(pci_fixup_early, d);
178 + if (!of_property_read_u16_array(np, "ath,device-id", dev_ids, 2)) {
179 + struct pci_dev *d = NULL;
181 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
182 + dev_ids[0], d)) != NULL)
183 + d->device = dev_ids[1];
186 + if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
187 + ath9k_pdata.led_pin = led_pin;
188 + dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
191 + if (of_property_read_bool(np, "ath,led-active-high")) {
192 + ath9k_pdata.led_active_high = true;
193 + dev_info(&pdev->dev, "inverted LED polarity\n");
196 + if (of_property_read_bool(np, "ath,disable-2ghz")) {
197 + ath9k_pdata.disable_2ghz = true;
198 + dev_info(&pdev->dev, "disabled 2.4 GHz band\n");
201 + if (of_property_read_bool(np, "ath,disable-5ghz")) {
202 + ath9k_pdata.disable_5ghz = true;
203 + dev_info(&pdev->dev, "disabled 5 GHz band\n");
206 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
211 +static struct of_device_id ath9k_eeprom_ids[] = {
212 + { .compatible = "ath9k,eeprom" },
216 +static struct platform_driver ath9k_eeprom_driver = {
218 + .name = "ath9k,eeprom",
219 + .owner = THIS_MODULE,
220 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
224 +static int __init of_ath9k_eeprom_init(void)
226 + int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
229 + ath9k_eep_load = 1;
234 +static int __init of_ath9k_eeprom_init_late(void)
236 + if (!ath9k_eep_load)
238 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
240 +late_initcall(of_ath9k_eeprom_init_late);
241 +subsys_initcall(of_ath9k_eeprom_init);
244 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
246 + dev->dev.platform_data = &ath5k_pdata;
250 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
252 + struct device_node *np = pdev->dev.of_node, *mtd_np = NULL;
256 + struct mtd_info *the_mtd;
257 + size_t flash_readlen;
258 + const __be32 *list;
262 + list = of_get_property(np, "ath,eep-flash", &i);
263 + if (!list || (i != (2 * sizeof(*list))))
266 + phandle = be32_to_cpup(list++);
268 + mtd_np = of_find_node_by_phandle(phandle);
273 + part = of_get_property(mtd_np, "label", NULL);
275 + part = mtd_np->name;
277 + the_mtd = get_mtd_device_nm(part);
278 + if (IS_ERR(the_mtd))
281 + i = mtd_read(the_mtd, be32_to_cpup(list), ATH5K_PLAT_EEP_MAX_WORDS << 1,
282 + &flash_readlen, (void *) ath5k_pdata.eeprom_data);
284 + put_mtd_device(the_mtd);
286 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
288 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
292 + if (of_find_property(np, "ath,eep-swap", NULL))
293 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
294 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
296 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset))
297 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
299 + if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac())
300 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
302 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
303 + dev_warn(&pdev->dev, "using random mac\n");
304 + random_ether_addr(athxk_eeprom_mac);
307 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
308 + athxk_eeprom_mac[5] += mac_inc;
310 + ath5k_pdata.macaddr = athxk_eeprom_mac;
311 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
313 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
318 +static struct of_device_id ath5k_eeprom_ids[] = {
319 + { .compatible = "ath5k,eeprom" },
323 +static struct platform_driver ath5k_eeprom_driver = {
325 + .name = "ath5k,eeprom",
326 + .owner = THIS_MODULE,
327 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
331 +static int __init of_ath5k_eeprom_init(void)
333 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
335 +device_initcall(of_ath5k_eeprom_init);
337 +++ b/arch/mips/lantiq/xway/eth_mac.c
340 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
342 + * This program is free software; you can redistribute it and/or modify it
343 + * under the terms of the GNU General Public License version 2 as published
344 + * by the Free Software Foundation.
347 +#include <linux/init.h>
348 +#include <linux/module.h>
349 +#include <linux/of_platform.h>
350 +#include <linux/if_ether.h>
352 +static u8 eth_mac[6];
353 +static int eth_mac_set;
355 +const u8* ltq_get_eth_mac(void)
360 +static int __init setup_ethaddr(char *str)
362 + eth_mac_set = mac_pton(str, eth_mac);
363 + return !eth_mac_set;
365 +early_param("ethaddr", setup_ethaddr);
367 +int __init of_eth_mac_probe(struct platform_device *pdev)
369 + struct device_node *np = pdev->dev.of_node;
370 + struct resource *mac_res;
375 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
378 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
381 + dev_err(&pdev->dev, "failed to load mac\n");
384 + if (resource_size(mac_res) != 6) {
385 + dev_err(&pdev->dev, "mac has an invalid size\n");
388 + mac = ioremap(mac_res->start, resource_size(mac_res));
389 + memcpy_fromio(eth_mac, mac, 6);
391 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
392 + eth_mac[5] += mac_inc;
397 +static struct of_device_id eth_mac_ids[] = {
398 + { .compatible = "lantiq,eth-mac" },
402 +static struct platform_driver eth_mac_driver = {
404 + .name = "lantiq,eth-mac",
405 + .owner = THIS_MODULE,
406 + .of_match_table = of_match_ptr(eth_mac_ids),
410 +static int __init of_eth_mac_init(void)
412 + return platform_driver_probe(ð_mac_driver, of_eth_mac_probe);
414 +device_initcall(of_eth_mac_init);
416 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
419 + * Atheros AP94 reference board PCI initialization
421 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
423 + * This program is free software; you can redistribute it and/or modify it
424 + * under the terms of the GNU General Public License version 2 as published
425 + * by the Free Software Foundation.
428 +#include <linux/pci.h>
429 +#include <linux/init.h>
430 +#include <linux/delay.h>
431 +#include <lantiq_soc.h>
438 +static int ath_num_fixups;
439 +static struct ath_fixup ath_fixups[2];
441 +static void ath_pci_fixup(struct pci_dev *dev)
444 + struct pci_dev *bridge = pci_upstream_bridge(dev);
445 + u16 *cal_data = NULL;
452 + for (i = 0; i < ath_num_fixups; i++) {
453 + if (ath_fixups[i].cal_data == NULL)
456 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
459 + cal_data = ath_fixups[i].cal_data;
463 + if (cal_data == NULL)
466 + if (*cal_data != 0xa55a) {
467 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
471 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
473 + base = dev->resource[0].start;
474 + mem = ioremap(base, 0x10000);
476 + pr_err("pci %s: ioremap error\n", pci_name(dev));
481 + pci_enable_device(dev);
484 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
485 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base);
486 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
487 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
488 + pci_write_config_word(dev, PCI_COMMAND, cmd);
490 + /* set pointer to first reg address */
492 + while (*cal_data != 0xffff) {
496 + val |= (*cal_data++) << 16;
498 + ltq_w32(swab32(val), mem + reg);
502 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
503 + dev->vendor = val & 0xffff;
504 + dev->device = (val >> 16) & 0xffff;
506 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
507 + dev->revision = val & 0xff;
508 + dev->class = val >> 8; /* upper 3 bytes */
510 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
511 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
513 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
514 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
515 + pci_write_config_word(dev, PCI_COMMAND, cmd);
517 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
520 + pci_disable_device(dev);
525 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
527 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
529 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
532 + ath_fixups[ath_num_fixups].slot = slot;
533 + ath_fixups[ath_num_fixups].cal_data = cal_data;
537 +++ b/arch/mips/lantiq/xway/rt_eep.c
540 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
542 + * This program is free software; you can redistribute it and/or modify it
543 + * under the terms of the GNU General Public License version 2 as published
544 + * by the Free Software Foundation.
547 +#include <linux/init.h>
548 +#include <linux/module.h>
549 +#include <linux/pci.h>
550 +#include <linux/platform_device.h>
551 +#include <linux/rt2x00_platform.h>
553 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
554 +static struct rt2x00_platform_data rt2x00_pdata;
556 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
558 + dev->dev.platform_data = &rt2x00_pdata;
562 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
564 + struct device_node *np = pdev->dev.of_node;
565 + const char *eeprom;
567 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
568 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
572 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
573 +// rt2x00_pdata.mac_address = mac;
574 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
576 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
581 +static struct of_device_id ralink_eeprom_ids[] = {
582 + { .compatible = "ralink,eeprom" },
586 +static struct platform_driver ralink_eeprom_driver = {
588 + .name = "ralink,eeprom",
589 + .owner = THIS_MODULE,
590 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
594 +static int __init of_ralink_eeprom_init(void)
596 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
598 +device_initcall(of_ralink_eeprom_init);
599 --- a/drivers/net/ethernet/lantiq_etop.c
600 +++ b/drivers/net/ethernet/lantiq_etop.c
601 @@ -840,7 +840,11 @@ ltq_etop_init(struct net_device *dev)
605 - memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
606 + memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
608 + if (priv->mac && !is_valid_ether_addr(mac.sa_data))
609 + memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
611 if (!is_valid_ether_addr(mac.sa_data)) {
612 pr_warn("etop: invalid MAC, using random\n");
613 eth_random_addr(mac.sa_data);