lantiq: kernel: xway-nand: Fix setting on-die ECC engines in dts
[openwrt/staging/jow.git] / target / linux / lantiq / patches-5.10 / 0016-mtd-rawnand-xway-Keep-the-driver-compatible-with-on-.patch
1 From ae9a2ac4d283b2925a97523a05ea024499329c16 Mon Sep 17 00:00:00 2001
2 From: Miquel Raynal <miquel.raynal@bootlin.com>
3 Date: Wed, 29 Sep 2021 00:22:58 +0200
4 Subject: [PATCH] mtd: rawnand: xway: Keep the driver compatible with on-die
5 ECC engines
6
7 Following the introduction of the generic ECC engine infrastructure, it
8 was necessary to reorganize the code and move the ECC configuration in
9 the ->attach_chip() hook. Failing to do that properly lead to a first
10 series of fixes supposed to stabilize the situation. Unfortunately, this
11 only fixed the use of software ECC engines, preventing any other kind of
12 engine to be used, including on-die ones.
13
14 It is now time to (finally) fix the situation by ensuring that we still
15 provide a default (eg. software ECC) but will still support different
16 ECC engines such as on-die ECC engines if properly described in the
17 device tree.
18
19 There are no changes needed on the core side in order to do this, but we
20 just need to leverage the logic there which allows:
21 1- a subsystem default (set to Host engines in the raw NAND world)
22 2- a driver specific default (here set to software ECC engines)
23 3- any type of engine requested by the user (ie. described in the DT)
24
25 As the raw NAND subsystem has not yet been fully converted to the ECC
26 engine infrastructure, in order to provide a default ECC engine for this
27 driver we need to set chip->ecc.engine_type *before* calling
28 nand_scan(). During the initialization step, the core will consider this
29 entry as the default engine for this driver. This value may of course
30 be overloaded by the user if the usual DT properties are provided.
31
32 Fixes: d525914b5bd8 ("mtd: rawnand: xway: Move the ECC initialization to ->attach_chip()")
33 Cc: stable@vger.kernel.org
34 Cc: Jan Hoffmann <jan@3e8.eu>
35 Cc: Kestrel seventyfour <kestrelseventyfour@gmail.com>
36 Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
37 ---
38 drivers/mtd/nand/raw/xway_nand.c | 12 +++++++++---
39 1 file changed, 9 insertions(+), 3 deletions(-)
40
41 --- a/drivers/mtd/nand/raw/xway_nand.c
42 +++ b/drivers/mtd/nand/raw/xway_nand.c
43 @@ -148,9 +148,8 @@ static void xway_write_buf(struct nand_c
44
45 static int xway_attach_chip(struct nand_chip *chip)
46 {
47 - chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
48 -
49 - if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
50 + if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
51 + chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
52 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
53
54 return 0;
55 @@ -219,6 +218,13 @@ static int xway_nand_probe(struct platfo
56 | NAND_CON_SE_P | NAND_CON_WP_P | NAND_CON_PRE_P
57 | cs_flag, EBU_NAND_CON);
58
59 + /*
60 + * This driver assumes that the default ECC engine should be TYPE_SOFT.
61 + * Set ->engine_type before registering the NAND devices in order to
62 + * provide a driver specific default value.
63 + */
64 + data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
65 +
66 /* Scan to find existence of the device */
67 err = nand_scan(&data->chip, 1);
68 if (err)