target/linux/lantiq/patches-5.4/0152-lantiq-VPE.patch

   1 --- a/arch/mips/Kconfig
   2 +++ b/arch/mips/Kconfig
   3 @@ -2383,6 +2383,12 @@ config MIPS_VPE_LOADER
   4           Includes a loader for loading an elf relocatable object
   5           onto another VPE and running it.
   6
   7 +config IFX_VPE_EXT
   8 +       bool "IFX APRP Extensions"
   9 +       depends on MIPS_VPE_LOADER
  10 +       help
  11 +         IFX included extensions in APRP
  12 +
  13  config MIPS_VPE_LOADER_CMP
  14         bool
  15         default "y"
  16 --- a/arch/mips/include/asm/vpe.h
  17 +++ b/arch/mips/include/asm/vpe.h
  18 @@ -126,4 +126,13 @@ void cleanup_tc(struct tc *tc);
  19
  20  int __init vpe_module_init(void);
  21  void __exit vpe_module_exit(void);
  22 +
  23 +/* For the explanation of the APIs please refer the section "MT APRP Kernel
  24 + * Programming" in AR9 SW Architecture Specification
  25 + */
  26 +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags);
  27 +int32_t vpe1_sw_stop(uint32_t flags);
  28 +uint32_t vpe1_get_load_addr(uint32_t flags);
  29 +uint32_t vpe1_get_max_mem(uint32_t flags);
  30 +
  31  #endif /* _ASM_VPE_H */
  32 --- a/arch/mips/kernel/vpe-mt.c
  33 +++ b/arch/mips/kernel/vpe-mt.c
  34 @@ -415,6 +415,8 @@ int __init vpe_module_init(void)
  35                         }
  36
  37                         v->ntcs = hw_tcs - aprp_cpu_index();
  38 +                       write_tc_c0_tcbind((read_tc_c0_tcbind() &
  39 +                                               ~TCBIND_CURVPE) | 1);
  40
  41                         /* add the tc to the list of this vpe's tc's. */
  42                         list_add(&t->tc, &v->tc);
  43 @@ -518,3 +520,47 @@ void __exit vpe_module_exit(void)
  44                         release_vpe(v);
  45         }
  46  }
  47 +
  48 +#ifdef CONFIG_IFX_VPE_EXT
  49 +int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags)
  50 +{
  51 +       enum vpe_state state;
  52 +       struct vpe *v = get_vpe(tclimit);
  53 +       struct vpe_notifications *not;
  54 +
  55 +       if (tcmask || flags) {
  56 +               pr_warn("Currently tcmask and flags should be 0. Other values are not supported\n");
  57 +               return -1;
  58 +       }
  59 +
  60 +       state = xchg(&v->state, VPE_STATE_INUSE);
  61 +       if (state != VPE_STATE_UNUSED) {
  62 +               vpe_stop(v);
  63 +
  64 +               list_for_each_entry(not, &v->notify, list) {
  65 +                       not->stop(tclimit);
  66 +               }
  67 +       }
  68 +
  69 +       v->__start = (unsigned long)sw_start_addr;
  70 +
  71 +       if (!vpe_run(v)) {
  72 +               pr_debug("VPE loader: VPE1 running successfully\n");
  73 +               return 0;
  74 +       }
  75 +       return -1;
  76 +}
  77 +EXPORT_SYMBOL(vpe1_sw_start);
  78 +
  79 +int32_t vpe1_sw_stop(uint32_t flags)
  80 +{
  81 +       struct vpe *v = get_vpe(tclimit);
  82 +
  83 +       if (!vpe_free(v)) {
  84 +               pr_debug("RP Stopped\n");
  85 +               return 0;
  86 +       } else
  87 +               return -1;
  88 +}
  89 +EXPORT_SYMBOL(vpe1_sw_stop);
  90 +#endif
  91 --- a/arch/mips/kernel/vpe.c
  92 +++ b/arch/mips/kernel/vpe.c
  93 @@ -49,6 +49,41 @@ struct vpe_control vpecontrol = {
  94         .tc_list        = LIST_HEAD_INIT(vpecontrol.tc_list)
  95  };
  96
  97 +#ifdef CONFIG_IFX_VPE_EXT
  98 +unsigned int vpe1_load_addr;
  99 +
 100 +static int __init load_address(char *str)
 101 +{
 102 +       get_option(&str, &vpe1_load_addr);
 103 +       return 1;
 104 +}
 105 +__setup("vpe1_load_addr=", load_address);
 106 +
 107 +static unsigned int vpe1_mem;
 108 +static int __init vpe1mem(char *str)
 109 +{
 110 +       vpe1_mem = memparse(str, &str);
 111 +       return 1;
 112 +}
 113 +__setup("vpe1_mem=", vpe1mem);
 114 +
 115 +uint32_t vpe1_get_load_addr(uint32_t flags)
 116 +{
 117 +       return vpe1_load_addr;
 118 +}
 119 +EXPORT_SYMBOL(vpe1_get_load_addr);
 120 +
 121 +uint32_t vpe1_get_max_mem(uint32_t flags)
 122 +{
 123 +       if (!vpe1_mem)
 124 +               return P_SIZE;
 125 +       else
 126 +               return vpe1_mem;
 127 +}
 128 +EXPORT_SYMBOL(vpe1_get_max_mem);
 129 +
 130 +#endif
 131 +
 132  /* get the vpe associated with this minor */
 133  struct vpe *get_vpe(int minor)
 134  {
 135 --- a/arch/mips/lantiq/prom.c
 136 +++ b/arch/mips/lantiq/prom.c
 137 @@ -28,10 +28,14 @@ EXPORT_SYMBOL_GPL(ebu_lock);
 138   */
 139  static struct ltq_soc_info soc_info;
 140
 141 +/* for Multithreading (APRP), vpe.c will use it */
 142 +unsigned long cp0_memsize;
 143 +
 144  const char *get_system_type(void)
 145  {
 146         return soc_info.sys_type;
 147  }
 148 +EXPORT_SYMBOL(ltq_soc_type);
 149
 150  int ltq_soc_type(void)
 151  {
 152 --- a/arch/mips/include/asm/mipsmtregs.h
 153 +++ b/arch/mips/include/asm/mipsmtregs.h
 154 @@ -32,6 +32,9 @@
 155  #define read_c0_vpeconf1()             __read_32bit_c0_register($1, 3)
 156  #define write_c0_vpeconf1(val)         __write_32bit_c0_register($1, 3, val)
 157
 158 +#define read_c0_vpeopt()               __read_32bit_c0_register($1, 7)
 159 +#define write_c0_vpeopt(val)           __write_32bit_c0_register($1, 7, val)
 160 +
 161  #define read_c0_tcstatus()             __read_32bit_c0_register($2, 1)
 162  #define write_c0_tcstatus(val)         __write_32bit_c0_register($2, 1, val)
 163
 164 @@ -378,6 +381,8 @@ do {                                                                        \
 165  #define write_vpe_c0_vpeconf0(val)     mttc0(1, 2, val)
 166  #define read_vpe_c0_vpeconf1()         mftc0(1, 3)
 167  #define write_vpe_c0_vpeconf1(val)     mttc0(1, 3, val)
 168 +#define read_vpe_c0_vpeopt()           mftc0(1, 7)
 169 +#define write_vpe_c0_vpeopt(val)       mttc0(1, 7, val)
 170  #define read_vpe_c0_count()            mftc0(9, 0)
 171  #define write_vpe_c0_count(val)                mttc0(9, 0, val)
 172  #define read_vpe_c0_status()           mftc0(12, 0)