1 From 9afadf01b1be371ee88491819aa67364684461f9 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 3 Aug 2012 10:27:25 +0200
4 Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/include/asm/mach-lantiq/lantiq_atm.h | 196 +++++++++++++++++++++++
9 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h | 203 ++++++++++++++++++++++++
10 arch/mips/lantiq/irq.c | 2 +
11 arch/mips/mm/cache.c | 4 +
12 include/uapi/linux/atm.h | 6 +
13 net/atm/common.c | 6 +
15 7 files changed, 416 insertions(+), 1 deletion(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_atm.h
17 create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
20 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
22 +/******************************************************************************
24 +** FILE NAME : ifx_atm.h
28 +** DATE : 17 Jun 2009
30 +** DESCRIPTION : Global ATM driver header file
31 +** COPYRIGHT : Copyright (c) 2006
32 +** Infineon Technologies AG
33 +** Am Campeon 1-12, 85579 Neubiberg, Germany
35 +** This program is free software; you can redistribute it and/or modify
36 +** it under the terms of the GNU General Public License as published by
37 +** the Free Software Foundation; either version 2 of the License, or
38 +** (at your option) any later version.
41 +** $Date $Author $Comment
42 +** 07 JUL 2009 Xu Liang Init Version
43 +*******************************************************************************/
51 + \defgroup IFX_ATM UEIP Project - ATM driver module
52 + \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
56 + \defgroup IFX_ATM_IOCTL IOCTL Commands
58 + \brief IOCTL Commands used by user application.
62 + \defgroup IFX_ATM_STRUCT Structures
64 + \brief Structures used by user application.
70 + \brief ATM driver header file
76 + * ####################################
78 + * ####################################
82 + \addtogroup IFX_ATM_STRUCT
91 + \struct atm_cell_ifEntry_t
92 + \brief Structure used for Cell Level MIB Counters.
94 + User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL".
97 + __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */
98 + __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */
99 + __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */
100 + __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */
101 + __u32 ifInErrors; /*!< counter of error ingress cells */
102 + __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */
103 + __u32 ifOutErrors; /*!< counter of error egress cells */
104 +} atm_cell_ifEntry_t;
107 + \struct atm_aal5_ifEntry_t
108 + \brief Structure used for AAL5 Frame Level MIB Counters.
110 + User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5".
113 + __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
114 + __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
115 + __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */
116 + __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */
117 + __u32 ifInUcastPkts; /*!< counter of ingress packets */
118 + __u32 ifOutUcastPkts; /*!< counter of egress packets */
119 + __u32 ifInErrors; /*!< counter of error ingress packets */
120 + __u32 ifInDiscards; /*!< counter of dropped ingress packets */
121 + __u32 ifOutErros; /*!< counter of error egress packets */
122 + __u32 ifOutDiscards; /*!< counter of dropped egress packets */
123 +} atm_aal5_ifEntry_t;
126 + \struct atm_aal5_vcc_t
127 + \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
129 + This structure is a part of structure "atm_aal5_vcc_x_t".
132 + __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */
133 + __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet
134 + __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */
138 + \struct atm_aal5_vcc_x_t
139 + \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
141 + User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC".
144 + int vpi; /*!< VPI of the VCC to get MIB counters */
145 + int vci; /*!< VCI of the VCC to get MIB counters */
146 + atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */
154 + * ####################################
156 + * ####################################
160 + \addtogroup IFX_ATM_IOCTL
168 + \brief ATM IOCTL Magic Number
170 +#define PPE_ATM_IOC_MAGIC 'o'
172 + \brief ATM IOCTL Command - Get Cell Level MIB Counters
174 + This command is obsolete. User can get cell level MIB from DSL API.
175 + This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
177 +#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t)
179 + \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
181 + Get AAL5 packet counters.
182 + This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
184 +#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t)
186 + \brief ATM IOCTL Command - Get Per PVC MIB Counters
188 + Get AAL5 packet counters for each PVC.
189 + This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
191 +#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
193 + \brief Total Number of ATM IOCTL Commands
195 +#define PPE_ATM_IOC_MAXNR 3
202 + * ####################################
204 + * ####################################
208 +struct port_cell_info {
209 + unsigned int port_num;
210 + unsigned int tx_link_rate[2];
219 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
221 +/******************************************************************************
223 +** FILE NAME : ifx_ptm.h
227 +** DATE : 17 Jun 2009
228 +** AUTHOR : Xu Liang
229 +** DESCRIPTION : Global PTM driver header file
230 +** COPYRIGHT : Copyright (c) 2006
231 +** Infineon Technologies AG
232 +** Am Campeon 1-12, 85579 Neubiberg, Germany
234 +** This program is free software; you can redistribute it and/or modify
235 +** it under the terms of the GNU General Public License as published by
236 +** the Free Software Foundation; either version 2 of the License, or
237 +** (at your option) any later version.
240 +** $Date $Author $Comment
241 +** 07 JUL 2009 Xu Liang Init Version
242 +*******************************************************************************/
250 + \defgroup IFX_PTM UEIP Project - PTM driver module
251 + \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9.
255 + \defgroup IFX_PTM_IOCTL IOCTL Commands
257 + \brief IOCTL Commands used by user application.
261 + \defgroup IFX_PTM_STRUCT Structures
263 + \brief Structures used by user application.
269 + \brief PTM driver header file
275 + * ####################################
277 + * ####################################
283 + * ####################################
285 + * ####################################
289 + \addtogroup IFX_PTM_IOCTL
297 + \brief PTM IOCTL Command - Get codeword MIB counters.
299 + This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters.
301 +#define IFX_PTM_MIB_CW_GET SIOCDEVPRIVATE + 1
303 + \brief PTM IOCTL Command - Get packet MIB counters.
305 + This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters.
307 +#define IFX_PTM_MIB_FRAME_GET SIOCDEVPRIVATE + 2
309 + \brief PTM IOCTL Command - Get firmware configuration (CRC).
311 + This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC).
313 +#define IFX_PTM_CFG_GET SIOCDEVPRIVATE + 3
315 + \brief PTM IOCTL Command - Set firmware configuration (CRC).
317 + This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC).
319 +#define IFX_PTM_CFG_SET SIOCDEVPRIVATE + 4
321 + \brief PTM IOCTL Command - Program priority value to TX queue mapping.
323 + This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping.
325 +#define IFX_PTM_MAP_PKT_PRIO_TO_Q SIOCDEVPRIVATE + 14
331 + \addtogroup IFX_PTM_STRUCT
340 + \typedef PTM_CW_IF_ENTRY_T
341 + \brief Wrapping of structure "ptm_cw_ifEntry_t".
344 + \struct ptm_cw_ifEntry_t
345 + \brief Structure used for CodeWord level MIB counters.
347 +typedef struct ptm_cw_ifEntry_t {
348 + uint32_t ifRxNoIdleCodewords; /*!< output, number of ingress user codeword */
349 + uint32_t ifRxIdleCodewords; /*!< output, number of ingress idle codeword */
350 + uint32_t ifRxCodingViolation; /*!< output, number of error ingress codeword */
351 + uint32_t ifTxNoIdleCodewords; /*!< output, number of egress user codeword */
352 + uint32_t ifTxIdleCodewords; /*!< output, number of egress idle codeword */
353 +} PTM_CW_IF_ENTRY_T;
356 + \typedef PTM_FRAME_MIB_T
357 + \brief Wrapping of structure "ptm_frame_mib_t".
360 + \struct ptm_frame_mib_t
361 + \brief Structure used for packet level MIB counters.
363 +typedef struct ptm_frame_mib_t {
364 + uint32_t RxCorrect; /*!< output, number of ingress packet */
365 + uint32_t TC_CrcError; /*!< output, number of egress packet with CRC error */
366 + uint32_t RxDropped; /*!< output, number of dropped ingress packet */
367 + uint32_t TxSend; /*!< output, number of egress packet */
371 + \typedef IFX_PTM_CFG_T
372 + \brief Wrapping of structure "ptm_cfg_t".
376 + \brief Structure used for ETH/TC CRC configuration.
378 +typedef struct ptm_cfg_t {
379 + uint32_t RxEthCrcPresent; /*!< input/output, ingress packet has ETH CRC */
380 + uint32_t RxEthCrcCheck; /*!< input/output, check ETH CRC of ingress packet */
381 + uint32_t RxTcCrcCheck; /*!< input/output, check TC CRC of ingress codeword */
382 + uint32_t RxTcCrcLen; /*!< input/output, length of TC CRC of ingress codeword */
383 + uint32_t TxEthCrcGen; /*!< input/output, generate ETH CRC for egress packet */
384 + uint32_t TxTcCrcGen; /*!< input/output, generate TC CRC for egress codeword */
385 + uint32_t TxTcCrcLen; /*!< input/output, length of TC CRC of egress codeword */
389 + \typedef IFX_PTM_PRIO_Q_MAP_T
390 + \brief Wrapping of structure "ppe_prio_q_map".
393 + \struct ppe_prio_q_map
394 + \brief Structure used for Priority Value to TX Queue mapping.
396 +typedef struct ppe_prio_q_map {
399 + int vpi; // ignored in eth interface
400 + int vci; // ignored in eth interface
401 +} IFX_PTM_PRIO_Q_MAP_T;
408 + * ####################################
410 + * ####################################
414 +struct port_cell_info {
415 + unsigned int port_num;
416 + unsigned int tx_link_rate[2];
424 --- a/arch/mips/lantiq/irq.c
425 +++ b/arch/mips/lantiq/irq.c
427 #include <linux/of_platform.h>
428 #include <linux/of_address.h>
429 #include <linux/of_irq.h>
430 +#include <linux/module.h>
432 #include <asm/bootinfo.h>
433 #include <asm/irq_cpu.h>
434 @@ -92,6 +93,7 @@ void ltq_disable_irq(struct irq_data *d)
436 raw_spin_unlock_irqrestore(<q_icu_lock, flags);
438 +EXPORT_SYMBOL(ltq_mask_and_ack_irq);
440 void ltq_mask_and_ack_irq(struct irq_data *d)
442 --- a/arch/mips/mm/cache.c
443 +++ b/arch/mips/mm/cache.c
444 @@ -63,6 +63,10 @@ void (*_dma_cache_wback_inv)(unsigned lo
445 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
446 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
448 +EXPORT_SYMBOL(_dma_cache_wback_inv);
449 +EXPORT_SYMBOL(_dma_cache_wback);
450 +EXPORT_SYMBOL(_dma_cache_inv);
452 #endif /* CONFIG_DMA_NONCOHERENT */
455 --- a/include/uapi/linux/atm.h
456 +++ b/include/uapi/linux/atm.h
459 #define ATM_ANYCLASS 5 /* compatible with everything */
461 +#define ATM_VBR_NRT ATM_VBR
462 +#define ATM_VBR_RT 6
463 +#define ATM_UBR_PLUS 7
466 #define ATM_MAX_PCR -1 /* maximum available PCR */
470 unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
471 int max_pcr; /* maximum PCR in cells per second */
474 @@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
475 static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
477 static const char *const class_name[] = {
478 - "off", "UBR", "CBR", "VBR", "ABR"};
479 + "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
480 static const char *const aal_name[] = {
481 "---", "1", "2", "3/4", /* 0- 3 */
482 "???", "5", "???", "???", /* 4- 7 */