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[openwrt/staging/chunkeey.git] / target / linux / layerscape / patches-4.14 / 302-dts-support-layerscape.patch
1 From cc1d1d1b68d18a31aeb8a572ca6b3929b083855c Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:33 +0800
4 Subject: [PATCH] dts: support layerscape
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 This is an integrated patch of dts for layerscape
10
11 Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
12 Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
13 Signed-off-by: Alan Wang <alan.wang@nxp.com>
14 Signed-off-by: Alison Wang <alison.wang@nxp.com>
15 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
16 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
17 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
18 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
19 Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
20 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
21 Signed-off-by: Biwen Li <biwen.li@nxp.com>
22 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
23 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
24 Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
25 Signed-off-by: Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
26 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
27 Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
28 Signed-off-by: Constantin Tudor <constantin.tudor@nxp.com>
29 Signed-off-by: David S. Miller <davem@davemloft.net>
30 Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
31 Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
32 Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com>
33 Signed-off-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
34 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
35 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
36 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
37 Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
38 Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
39 Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
40 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
41 Signed-off-by: Li Yang <leoyang.li@nxp.com>
42 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
43 Signed-off-by: Mathew McBride <matt@traverse.com.au>
44 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
45 Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
46 Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
47 Signed-off-by: Peng Ma <peng.ma@nxp.com>
48 Signed-off-by: Po Liu <po.liu@nxp.com>
49 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
50 Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
51 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
52 Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
53 Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
54 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
55 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
56 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
57 Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com>
58 Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
59 Signed-off-by: Scott Wood <oss@buserror.net>
60 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
61 Signed-off-by: Shawn Guo <shawnguo@kernel.org>
62 Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
63 Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
64 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
65 Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
66 Signed-off-by: Tao Yang <b31903@freescale.com>
67 Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
68 Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
69 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
70 Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
71 Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
72 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
73 Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
74 Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
75 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
76 Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
77 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
78 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
79 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
80 ---
81 arch/arm/boot/dts/Makefile | 3 +-
82 arch/arm/boot/dts/imx25.dtsi | 4 +-
83 arch/arm/boot/dts/imx28.dtsi | 4 +-
84 arch/arm/boot/dts/imx35.dtsi | 4 +-
85 arch/arm/boot/dts/imx53.dtsi | 4 +-
86 arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++
87 arch/arm/boot/dts/ls1021a-qds.dts | 32 +
88 arch/arm/boot/dts/ls1021a-twr.dts | 27 +
89 arch/arm/boot/dts/ls1021a.dtsi | 111 +-
90 arch/arm64/boot/dts/freescale/Makefile | 16 +-
91 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 126 ++
92 .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 97 +-
93 .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 179 +++
94 .../boot/dts/freescale/fsl-ls1012a-qds.dts | 136 +-
95 .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 100 +-
96 .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 210 ++-
97 .../boot/dts/freescale/fsl-ls1043-post.dtsi | 3 +-
98 .../dts/freescale/fsl-ls1043a-qds-sdk.dts | 263 ++++
99 .../boot/dts/freescale/fsl-ls1043a-qds.dts | 206 ++-
100 .../dts/freescale/fsl-ls1043a-rdb-sdk.dts | 262 ++++
101 .../dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 140 ++
102 .../boot/dts/freescale/fsl-ls1043a-rdb.dts | 76 +-
103 .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 382 +++--
104 .../boot/dts/freescale/fsl-ls1046-post.dtsi | 2 +-
105 .../dts/freescale/fsl-ls1046a-qds-sdk.dts | 268 ++++
106 .../boot/dts/freescale/fsl-ls1046a-qds.dts | 194 ++-
107 .../dts/freescale/fsl-ls1046a-rdb-sdk.dts | 307 ++++
108 .../dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 133 ++
109 .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 48 +-
110 .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 386 +++--
111 .../boot/dts/freescale/fsl-ls1088a-qds.dts | 88 +-
112 .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 150 +-
113 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 546 ++++++-
114 .../boot/dts/freescale/fsl-ls2080a-qds.dts | 100 +-
115 .../boot/dts/freescale/fsl-ls2080a-rdb.dts | 118 +-
116 .../boot/dts/freescale/fsl-ls2080a-simu.dts | 38 +-
117 .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 50 +-
118 .../boot/dts/freescale/fsl-ls2081a-rdb.dts | 163 ++
119 .../boot/dts/freescale/fsl-ls2088a-qds.dts | 158 +-
120 .../boot/dts/freescale/fsl-ls2088a-rdb.dts | 118 +-
121 .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 52 +-
122 .../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 43 +-
123 .../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 60 +-
124 .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 299 ++--
125 .../boot/dts/freescale/fsl-lx2160a-qds.dts | 353 +++++
126 .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 241 +++
127 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 1318 +++++++++++++++++
128 .../boot/dts/freescale/fsl-tmu-map1.dtsi | 99 ++
129 .../boot/dts/freescale/fsl-tmu-map2.dtsi | 99 ++
130 .../boot/dts/freescale/fsl-tmu-map3.dtsi | 99 ++
131 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 ++++
132 .../dts/freescale/qoriq-bman-portals-sdk.dtsi | 55 +
133 .../dts/freescale/qoriq-bman-portals.dtsi | 8 +-
134 .../boot/dts/freescale/qoriq-dpaa-eth.dtsi | 97 ++
135 .../dts/freescale/qoriq-fman3-0-10g-0.dtsi | 11 +-
136 .../dts/freescale/qoriq-fman3-0-10g-1.dtsi | 11 +-
137 .../dts/freescale/qoriq-fman3-0-1g-0.dtsi | 7 +-
138 .../dts/freescale/qoriq-fman3-0-1g-1.dtsi | 7 +-
139 .../dts/freescale/qoriq-fman3-0-1g-2.dtsi | 7 +-
140 .../dts/freescale/qoriq-fman3-0-1g-3.dtsi | 7 +-
141 .../dts/freescale/qoriq-fman3-0-1g-4.dtsi | 7 +-
142 .../dts/freescale/qoriq-fman3-0-1g-5.dtsi | 7 +-
143 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 +
144 .../boot/dts/freescale/qoriq-fman3-0.dtsi | 67 +-
145 .../dts/freescale/qoriq-qman-portals-sdk.dtsi | 38 +
146 .../dts/freescale/qoriq-qman-portals.dtsi | 9 +-
147 .../boot/dts/freescale/traverse-ls1043s.dts | 29 +
148 .../boot/dts/freescale/traverse-ls1043v.dts | 29 +
149 68 files changed, 7660 insertions(+), 1211 deletions(-)
150 create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
151 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
152 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
153 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
154 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
155 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
156 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
157 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
158 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
159 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
160 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
161 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
162 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
163 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
164 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
165 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
166 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
167 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
168 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
169 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
170 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
171
172 --- a/arch/arm/boot/dts/Makefile
173 +++ b/arch/arm/boot/dts/Makefile
174 @@ -496,7 +496,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
175 imx7s-warp.dtb
176 dtb-$(CONFIG_SOC_LS1021A) += \
177 ls1021a-qds.dtb \
178 - ls1021a-twr.dtb
179 + ls1021a-twr.dtb \
180 + ls1021a-iot.dtb
181 dtb-$(CONFIG_SOC_VF610) += \
182 vf500-colibri-eval-v3.dtb \
183 vf610-colibri-eval-v3.dtb \
184 --- a/arch/arm/boot/dts/imx25.dtsi
185 +++ b/arch/arm/boot/dts/imx25.dtsi
186 @@ -122,7 +122,7 @@
187 };
188
189 can1: can@43f88000 {
190 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
191 + compatible = "fsl,imx25-flexcan";
192 reg = <0x43f88000 0x4000>;
193 interrupts = <43>;
194 clocks = <&clks 75>, <&clks 75>;
195 @@ -131,7 +131,7 @@
196 };
197
198 can2: can@43f8c000 {
199 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
200 + compatible = "fsl,imx25-flexcan";
201 reg = <0x43f8c000 0x4000>;
202 interrupts = <44>;
203 clocks = <&clks 76>, <&clks 76>;
204 --- a/arch/arm/boot/dts/imx28.dtsi
205 +++ b/arch/arm/boot/dts/imx28.dtsi
206 @@ -1038,7 +1038,7 @@
207 };
208
209 can0: can@80032000 {
210 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
211 + compatible = "fsl,imx28-flexcan";
212 reg = <0x80032000 0x2000>;
213 interrupts = <8>;
214 clocks = <&clks 58>, <&clks 58>;
215 @@ -1047,7 +1047,7 @@
216 };
217
218 can1: can@80034000 {
219 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
220 + compatible = "fsl,imx28-flexcan";
221 reg = <0x80034000 0x2000>;
222 interrupts = <9>;
223 clocks = <&clks 59>, <&clks 59>;
224 --- a/arch/arm/boot/dts/imx35.dtsi
225 +++ b/arch/arm/boot/dts/imx35.dtsi
226 @@ -303,7 +303,7 @@
227 };
228
229 can1: can@53fe4000 {
230 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
231 + compatible = "fsl,imx35-flexcan";
232 reg = <0x53fe4000 0x1000>;
233 clocks = <&clks 33>, <&clks 33>;
234 clock-names = "ipg", "per";
235 @@ -312,7 +312,7 @@
236 };
237
238 can2: can@53fe8000 {
239 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
240 + compatible = "fsl,imx35-flexcan";
241 reg = <0x53fe8000 0x1000>;
242 clocks = <&clks 34>, <&clks 34>;
243 clock-names = "ipg", "per";
244 --- a/arch/arm/boot/dts/imx53.dtsi
245 +++ b/arch/arm/boot/dts/imx53.dtsi
246 @@ -536,7 +536,7 @@
247 };
248
249 can1: can@53fc8000 {
250 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
251 + compatible = "fsl,imx53-flexcan";
252 reg = <0x53fc8000 0x4000>;
253 interrupts = <82>;
254 clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>,
255 @@ -546,7 +546,7 @@
256 };
257
258 can2: can@53fcc000 {
259 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
260 + compatible = "fsl,imx53-flexcan";
261 reg = <0x53fcc000 0x4000>;
262 interrupts = <83>;
263 clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>,
264 --- /dev/null
265 +++ b/arch/arm/boot/dts/ls1021a-iot.dts
266 @@ -0,0 +1,262 @@
267 +/*
268 + * Copyright 2013-2016 Freescale Semiconductor, Inc.
269 + *
270 + * This program is free software; you can redistribute it and/or modify
271 + * it under the terms of the GNU General Public License as published by
272 + * the Free Software Foundation; either version 2 of the License, or
273 + * (at your option) any later version.
274 + */
275 +
276 +/dts-v1/;
277 +#include "ls1021a.dtsi"
278 +
279 +/ {
280 + model = "LS1021A IOT Board";
281 +
282 + sys_mclk: clock-mclk {
283 + compatible = "fixed-clock";
284 + #clock-cells = <0>;
285 + clock-frequency = <24576000>;
286 + };
287 +
288 + regulators {
289 + compatible = "simple-bus";
290 + #address-cells = <1>;
291 + #size-cells = <0>;
292 +
293 + reg_3p3v: regulator@0 {
294 + compatible = "regulator-fixed";
295 + reg = <0>;
296 + regulator-name = "3P3V";
297 + regulator-min-microvolt = <3300000>;
298 + regulator-max-microvolt = <3300000>;
299 + regulator-always-on;
300 + };
301 +
302 + reg_2p5v: regulator@1 {
303 + compatible = "regulator-fixed";
304 + reg = <1>;
305 + regulator-name = "2P5V";
306 + regulator-min-microvolt = <2500000>;
307 + regulator-max-microvolt = <2500000>;
308 + regulator-always-on;
309 + };
310 + };
311 +
312 + sound {
313 + compatible = "simple-audio-card";
314 + simple-audio-card,format = "i2s";
315 + simple-audio-card,widgets =
316 + "Microphone", "Microphone Jack",
317 + "Headphone", "Headphone Jack",
318 + "Speaker", "Speaker Ext",
319 + "Line", "Line In Jack";
320 + simple-audio-card,routing =
321 + "MIC_IN", "Microphone Jack",
322 + "Microphone Jack", "Mic Bias",
323 + "LINE_IN", "Line In Jack",
324 + "Headphone Jack", "HP_OUT",
325 + "Speaker Ext", "LINE_OUT";
326 +
327 + simple-audio-card,cpu {
328 + sound-dai = <&sai2>;
329 + frame-master;
330 + bitclock-master;
331 + };
332 +
333 + simple-audio-card,codec {
334 + sound-dai = <&codec>;
335 + frame-master;
336 + bitclock-master;
337 + };
338 + };
339 +
340 + firmware {
341 + optee {
342 + compatible = "linaro,optee-tz";
343 + method = "smc";
344 + };
345 + };
346 +};
347 +
348 +&enet0 {
349 + tbi-handle = <&tbi1>;
350 + phy-handle = <&phy1>;
351 + phy-connection-type = "sgmii";
352 + status = "okay";
353 +};
354 +
355 +&enet1 {
356 + tbi-handle = <&tbi1>;
357 + phy-handle = <&phy3>;
358 + phy-connection-type = "sgmii";
359 + status = "okay";
360 +};
361 +
362 +&enet2 {
363 + fixed-link = <0 1 1000 0 0>;
364 + phy-connection-type = "rgmii-id";
365 + status = "okay";
366 +};
367 +
368 +&can0{
369 + status = "disabled";
370 +};
371 +
372 +&can1{
373 + status = "disabled";
374 +};
375 +
376 +&can2{
377 + status = "disabled";
378 +};
379 +
380 +&can3{
381 + status = "okay";
382 +};
383 +
384 +&esdhc{
385 + status = "okay";
386 +};
387 +
388 +&i2c0 {
389 + status = "okay";
390 +
391 + max1239@35 {
392 + compatible = "maxim,max1239";
393 + reg = <0x35>;
394 + #io-channel-cells = <1>;
395 + };
396 +
397 + codec: sgtl5000@2a {
398 + #sound-dai-cells=<0x0>;
399 + compatible = "fsl,sgtl5000";
400 + reg = <0x2a>;
401 + VDDA-supply = <&reg_3p3v>;
402 + VDDIO-supply = <&reg_2p5v>;
403 + clocks = <&sys_mclk 1>;
404 + };
405 +
406 + pca9555: pca9555@23 {
407 + compatible = "nxp,pca9555";
408 + /*pinctrl-names = "default";*/
409 + /*interrupt-parent = <&gpio2>;
410 + interrupts = <19 0x2>;*/
411 + gpio-controller;
412 + #gpio-cells = <2>;
413 + interrupt-controller;
414 + #interrupt-cells = <2>;
415 + reg = <0x23>;
416 + };
417 +
418 + ina220@44 {
419 + compatible = "ti,ina220";
420 + reg = <0x44>;
421 + shunt-resistor = <1000>;
422 + };
423 +
424 + ina220@45 {
425 + compatible = "ti,ina220";
426 + reg = <0x45>;
427 + shunt-resistor = <1000>;
428 + };
429 +
430 + lm75b@48 {
431 + compatible = "nxp,lm75a";
432 + reg = <0x48>;
433 + };
434 +
435 + adt7461a@4c {
436 + compatible = "adt7461a";
437 + reg = <0x4c>;
438 + };
439 +
440 + hdmi: sii9022a@39 {
441 + compatible = "fsl,sii902x";
442 + reg = <0x39>;
443 + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
444 + };
445 +};
446 +
447 +&i2c1 {
448 + status = "disabled";
449 +};
450 +
451 +&ifc {
452 + status = "disabled";
453 +};
454 +
455 +&lpuart0 {
456 + status = "okay";
457 +};
458 +
459 +&mdio0 {
460 + phy0: ethernet-phy@0 {
461 + reg = <0x0>;
462 + };
463 + phy1: ethernet-phy@1 {
464 + reg = <0x1>;
465 + };
466 + phy2: ethernet-phy@2 {
467 + reg = <0x2>;
468 + };
469 + phy3: ethernet-phy@3 {
470 + reg = <0x3>;
471 + };
472 + tbi1: tbi-phy@1f {
473 + reg = <0x1f>;
474 + device_type = "tbi-phy";
475 + };
476 +};
477 +
478 +&qspi {
479 + num-cs = <2>;
480 + status = "okay";
481 +
482 + qflash0: s25fl128s@0 {
483 + compatible = "spansion,s25fl129p1";
484 + #address-cells = <1>;
485 + #size-cells = <1>;
486 + spi-max-frequency = <20000000>;
487 + reg = <0>;
488 + };
489 +};
490 +
491 +&sai2 {
492 + status = "okay";
493 +};
494 +
495 +&uart0 {
496 + status = "okay";
497 +};
498 +
499 +&uart1 {
500 + status = "okay";
501 +};
502 +
503 +&dcu {
504 + display = <&display>;
505 + status = "okay";
506 +
507 + display: display@0 {
508 + bits-per-pixel = <24>;
509 +
510 + display-timings {
511 + native-mode = <&timing0>;
512 +
513 + timing0: mode0 {
514 + clock-frequency = <25000000>;
515 + hactive = <640>;
516 + vactive = <480>;
517 + hback-porch = <80>;
518 + hfront-porch = <80>;
519 + vback-porch = <16>;
520 + vfront-porch = <16>;
521 + hsync-len = <12>;
522 + vsync-len = <2>;
523 + hsync-active = <1>;
524 + vsync-active = <1>;
525 + };
526 + };
527 + };
528 +};
529 --- a/arch/arm/boot/dts/ls1021a-qds.dts
530 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
531 @@ -124,6 +124,21 @@
532 };
533 };
534
535 +&qspi {
536 + num-cs = <2>;
537 + status = "okay";
538 +
539 + qflash0: s25fl128s@0 {
540 + compatible = "spansion,m25p80";
541 + #address-cells = <1>;
542 + #size-cells = <1>;
543 + spi-max-frequency = <20000000>;
544 + reg = <0>;
545 + spi-rx-bus-width = <4>;
546 + spi-tx-bus-width = <4>;
547 + };
548 +};
549 +
550 &enet0 {
551 tbi-handle = <&tbi0>;
552 phy-handle = <&sgmii_phy1c>;
553 @@ -239,6 +254,11 @@
554 device-width = <1>;
555 };
556
557 + nand@2,0 {
558 + compatible = "fsl,ifc-nand";
559 + reg = <0x2 0x0 0x10000>;
560 + };
561 +
562 fpga: board-control@3,0 {
563 #address-cells = <1>;
564 #size-cells = <1>;
565 @@ -316,6 +336,10 @@
566 };
567 };
568
569 +&esdhc {
570 + status = "okay";
571 +};
572 +
573 &sai2 {
574 status = "okay";
575 };
576 @@ -331,3 +355,11 @@
577 &uart1 {
578 status = "okay";
579 };
580 +
581 +&can0 {
582 + status = "okay";
583 +};
584 +
585 +&can1 {
586 + status = "okay";
587 +};
588 --- a/arch/arm/boot/dts/ls1021a-twr.dts
589 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
590 @@ -142,6 +142,21 @@
591 };
592 };
593
594 +&qspi {
595 + num-cs = <2>;
596 + status = "okay";
597 +
598 + qflash0: n25q128a13@0 {
599 + compatible = "n25q128a13", "jedec,spi-nor";
600 + #address-cells = <1>;
601 + #size-cells = <1>;
602 + spi-max-frequency = <20000000>;
603 + reg = <0>;
604 + spi-rx-bus-width = <4>;
605 + spi-tx-bus-width = <4>;
606 + };
607 +};
608 +
609 &enet0 {
610 tbi-handle = <&tbi0>;
611 phy-handle = <&sgmii_phy2>;
612 @@ -235,6 +250,10 @@
613 };
614 };
615
616 +&esdhc {
617 + status = "okay";
618 +};
619 +
620 &sai1 {
621 status = "okay";
622 };
623 @@ -250,3 +269,11 @@
624 &uart1 {
625 status = "okay";
626 };
627 +
628 +&can0 {
629 + status = "okay";
630 +};
631 +
632 +&can1 {
633 + status = "okay";
634 +};
635 --- a/arch/arm/boot/dts/ls1021a.dtsi
636 +++ b/arch/arm/boot/dts/ls1021a.dtsi
637 @@ -146,12 +146,13 @@
638 ifc: ifc@1530000 {
639 compatible = "fsl,ifc", "simple-bus";
640 reg = <0x0 0x1530000 0x0 0x10000>;
641 + big-endian;
642 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
643 };
644
645 dcfg: dcfg@1ee0000 {
646 compatible = "fsl,ls1021a-dcfg", "syscon";
647 - reg = <0x0 0x1ee0000 0x0 0x10000>;
648 + reg = <0x0 0x1ee0000 0x0 0x1000>;
649 big-endian;
650 };
651
652 @@ -334,25 +335,44 @@
653 status = "disabled";
654 };
655
656 + qspi: quadspi@1550000 {
657 + compatible = "fsl,ls1021a-qspi";
658 + #address-cells = <1>;
659 + #size-cells = <0>;
660 + reg = <0x0 0x1550000 0x0 0x10000>,
661 + <0x0 0x40000000 0x0 0x4000000>;
662 + reg-names = "QuadSPI", "QuadSPI-memory";
663 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
664 + clock-names = "qspi_en", "qspi";
665 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
666 + big-endian;
667 + status = "disabled";
668 + };
669 +
670 i2c0: i2c@2180000 {
671 - compatible = "fsl,vf610-i2c";
672 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
673 #address-cells = <1>;
674 #size-cells = <0>;
675 reg = <0x0 0x2180000 0x0 0x10000>;
676 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
677 clock-names = "i2c";
678 clocks = <&clockgen 4 1>;
679 + dma-names = "tx", "rx";
680 + dmas = <&edma0 1 39>,
681 + <&edma0 1 38>;
682 + fsl-scl-gpio = <&gpio3 23 0>;
683 status = "disabled";
684 };
685
686 i2c1: i2c@2190000 {
687 - compatible = "fsl,vf610-i2c";
688 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
689 #address-cells = <1>;
690 #size-cells = <0>;
691 reg = <0x0 0x2190000 0x0 0x10000>;
692 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
693 clock-names = "i2c";
694 clocks = <&clockgen 4 1>;
695 + fsl-scl-gpio = <&gpio3 23 0>;
696 status = "disabled";
697 };
698
699 @@ -497,6 +517,17 @@
700 status = "disabled";
701 };
702
703 + ftm0: ftm0@29d0000 {
704 + compatible = "fsl,ls1021a-ftm-alarm";
705 + reg = <0x0 0x29d0000 0x0 0x10000>,
706 + <0x0 0x1ee2144 0x0 0x4>,
707 + <0x0 0x0157051c 0x0 0x4>;
708 + reg-names = "ftm", "pmctrl", "scrachpad";
709 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
710 + big-endian;
711 + status = "okay";
712 + };
713 +
714 wdog0: watchdog@2ad0000 {
715 compatible = "fsl,imx21-wdt";
716 reg = <0x0 0x2ad0000 0x0 0x10000>;
717 @@ -550,6 +581,25 @@
718 <&clockgen 4 1>;
719 };
720
721 + qdma: qdma@8390000 {
722 + compatible = "fsl,ls1021a-qdma";
723 + reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
724 + <0x0 0x8389000 0x0 0x1000>, /* Status regs */
725 + <0x0 0x838a000 0x0 0x2000>; /* Block regs */
726 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
727 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
728 + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
729 + interrupt-names = "qdma-error",
730 + "qdma-queue0", "qdma-queue1";
731 + channels = <8>;
732 + block-number = <2>;
733 + block-offset = <0x1000>;
734 + queues = <2>;
735 + status-sizes = <64>;
736 + queue-sizes = <64 64>;
737 + big-endian;
738 + };
739 +
740 dcu: dcu@2ce0000 {
741 compatible = "fsl,ls1021a-dcu";
742 reg = <0x0 0x2ce0000 0x0 0x10000>;
743 @@ -693,6 +743,11 @@
744 dr_mode = "host";
745 snps,quirk-frame-length-adjustment = <0x20>;
746 snps,dis_rxdet_inp3_quirk;
747 + configure-gfladj;
748 + usb3-lpm-capable;
749 + snps,dis-u1u2-when-u3-quirk;
750 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
751 + snps,host-vbus-glitches;
752 };
753
754 pcie@3400000 {
755 @@ -700,7 +755,9 @@
756 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
757 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
758 reg-names = "regs", "config";
759 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
760 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
761 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
762 + interrupt-names = "pme", "aer";
763 fsl,pcie-scfg = <&scfg 0>;
764 #address-cells = <3>;
765 #size-cells = <2>;
766 @@ -716,6 +773,7 @@
767 <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
768 <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
769 <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
770 + status = "disabled";
771 };
772
773 pcie@3500000 {
774 @@ -723,7 +781,9 @@
775 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
776 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
777 reg-names = "regs", "config";
778 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
779 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
780 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
781 + interrupt-names = "pme", "aer";
782 fsl,pcie-scfg = <&scfg 1>;
783 #address-cells = <3>;
784 #size-cells = <2>;
785 @@ -739,6 +799,47 @@
786 <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
787 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
788 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
789 + status = "disabled";
790 + };
791 +
792 + can0: can@2a70000 {
793 + compatible = "fsl,ls1021ar2-flexcan";
794 + reg = <0x0 0x2a70000 0x0 0x1000>;
795 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
796 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
797 + clock-names = "ipg", "per";
798 + big-endian;
799 + status = "disabled";
800 + };
801 +
802 + can1: can@2a80000 {
803 + compatible = "fsl,ls1021ar2-flexcan";
804 + reg = <0x0 0x2a80000 0x0 0x1000>;
805 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
806 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
807 + clock-names = "ipg", "per";
808 + big-endian;
809 + status = "disabled";
810 + };
811 +
812 + can2: can@2a90000 {
813 + compatible = "fsl,ls1021ar2-flexcan";
814 + reg = <0x0 0x2a90000 0x0 0x1000>;
815 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
816 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
817 + clock-names = "ipg", "per";
818 + big-endian;
819 + status = "disabled";
820 + };
821 +
822 + can3: can@2aa0000 {
823 + compatible = "fsl,ls1021ar2-flexcan";
824 + reg = <0x0 0x2aa0000 0x0 0x1000>;
825 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
826 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
827 + clock-names = "ipg", "per";
828 + big-endian;
829 + status = "disabled";
830 };
831 };
832 };
833 --- a/arch/arm64/boot/dts/freescale/Makefile
834 +++ b/arch/arm64/boot/dts/freescale/Makefile
835 @@ -1,19 +1,33 @@
836 # SPDX-License-Identifier: GPL-2.0
837 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
838 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
839 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
840 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
841 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
842 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
843 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
844 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
845 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
846 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
847 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
848 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
849 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
850 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
851 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
852 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
853 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
854 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
855 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
856 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
857 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
858 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
859 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
860 -
861 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
862 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
863 +
864 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043v.dtb
865 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043s.dtb
866 +
867 always := $(dtb-y)
868 subdir-y := $(dts-dirs)
869 clean-files := *.dtb
870 --- /dev/null
871 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
872 @@ -0,0 +1,126 @@
873 +/*
874 + * Device Tree file for NXP LS1012A 2G5RDB Board.
875 + *
876 + * Copyright 2017 NXP
877 + *
878 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
879 + *
880 + * This file is dual-licensed: you can use it either under the terms
881 + * of the GPLv2 or the X11 license, at your option. Note that this dual
882 + * licensing only applies to this file, and not this project as a
883 + * whole.
884 + *
885 + * a) This library is free software; you can redistribute it and/or
886 + * modify it under the terms of the GNU General Public License as
887 + * published by the Free Software Foundation; either version 2 of the
888 + * License, or (at your option) any later version.
889 + *
890 + * This library is distributed in the hope that it will be useful,
891 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
892 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
893 + * GNU General Public License for more details.
894 + *
895 + * Or, alternatively,
896 + *
897 + * b) Permission is hereby granted, free of charge, to any person
898 + * obtaining a copy of this software and associated documentation
899 + * files (the "Software"), to deal in the Software without
900 + * restriction, including without limitation the rights to use,
901 + * copy, modify, merge, publish, distribute, sublicense, and/or
902 + * sell copies of the Software, and to permit persons to whom the
903 + * Software is furnished to do so, subject to the following
904 + * conditions:
905 + *
906 + * The above copyright notice and this permission notice shall be
907 + * included in all copies or substantial portions of the Software.
908 + *
909 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
910 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
911 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
912 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
913 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
914 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
915 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
916 + * OTHER DEALINGS IN THE SOFTWARE.
917 + */
918 +/dts-v1/;
919 +
920 +#include "fsl-ls1012a.dtsi"
921 +
922 +/ {
923 + model = "LS1012A 2G5RDB Board";
924 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
925 +
926 + aliases {
927 + ethernet0 = &pfe_mac0;
928 + ethernet1 = &pfe_mac1;
929 + };
930 +};
931 +
932 +&duart0 {
933 + status = "okay";
934 +};
935 +
936 +&i2c0 {
937 + status = "okay";
938 +};
939 +
940 +&qspi {
941 + num-cs = <2>;
942 + bus-num = <0>;
943 + status = "okay";
944 +
945 + qflash0: s25fs512s@0 {
946 + compatible = "spansion,m25p80";
947 + #address-cells = <1>;
948 + #size-cells = <1>;
949 + spi-max-frequency = <20000000>;
950 + m25p,fast-read;
951 + reg = <0>;
952 + };
953 +};
954 +
955 +&sata {
956 + status = "okay";
957 +};
958 +
959 +&pfe {
960 + status = "okay";
961 + #address-cells = <1>;
962 + #size-cells = <0>;
963 +
964 + pfe_mac0: ethernet@0 {
965 + compatible = "fsl,pfe-gemac-port";
966 + #address-cells = <1>;
967 + #size-cells = <0>;
968 + reg = <0x0>; /* GEM_ID */
969 + fsl,mdio-mux-val = <0x0>;
970 + phy-mode = "sgmii-2500";
971 + phy-handle = <&sgmii_phy1>;
972 + };
973 +
974 + pfe_mac1: ethernet@1 {
975 + compatible = "fsl,pfe-gemac-port";
976 + #address-cells = <1>;
977 + #size-cells = <0>;
978 + reg = <0x1>; /* GEM_ID */
979 + fsl,mdio-mux-val = <0x0>;
980 + phy-mode = "sgmii-2500";
981 + phy-handle = <&sgmii_phy2>;
982 + };
983 +
984 + mdio@0 {
985 + #address-cells = <1>;
986 + #size-cells = <0>;
987 +
988 + sgmii_phy1: ethernet-phy@1 {
989 + compatible = "ethernet-phy-ieee802.3-c45";
990 + reg = <0x1>;
991 + };
992 +
993 + sgmii_phy2: ethernet-phy@2 {
994 + compatible = "ethernet-phy-ieee802.3-c45";
995 + reg = <0x2>;
996 + };
997 + };
998 +};
999 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1000 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1001 @@ -1,45 +1,9 @@
1002 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1003 /*
1004 * Device Tree file for Freescale LS1012A Freedom Board.
1005 *
1006 * Copyright 2016 Freescale Semiconductor, Inc.
1007 *
1008 - * This file is dual-licensed: you can use it either under the terms
1009 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1010 - * licensing only applies to this file, and not this project as a
1011 - * whole.
1012 - *
1013 - * a) This library is free software; you can redistribute it and/or
1014 - * modify it under the terms of the GNU General Public License as
1015 - * published by the Free Software Foundation; either version 2 of the
1016 - * License, or (at your option) any later version.
1017 - *
1018 - * This library is distributed in the hope that it will be useful,
1019 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1020 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1021 - * GNU General Public License for more details.
1022 - *
1023 - * Or, alternatively,
1024 - *
1025 - * b) Permission is hereby granted, free of charge, to any person
1026 - * obtaining a copy of this software and associated documentation
1027 - * files (the "Software"), to deal in the Software without
1028 - * restriction, including without limitation the rights to use,
1029 - * copy, modify, merge, publish, distribute, sublicense, and/or
1030 - * sell copies of the Software, and to permit persons to whom the
1031 - * Software is furnished to do so, subject to the following
1032 - * conditions:
1033 - *
1034 - * The above copyright notice and this permission notice shall be
1035 - * included in all copies or substantial portions of the Software.
1036 - *
1037 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1038 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1039 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1040 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1041 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1042 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1043 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1044 - * OTHER DEALINGS IN THE SOFTWARE.
1045 */
1046 /dts-v1/;
1047
1048 @@ -49,6 +13,11 @@
1049 model = "LS1012A Freedom Board";
1050 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1051
1052 + aliases {
1053 + ethernet0 = &pfe_mac0;
1054 + ethernet1 = &pfe_mac1;
1055 + };
1056 +
1057 sys_mclk: clock-mclk {
1058 compatible = "fixed-clock";
1059 #clock-cells = <0>;
1060 @@ -110,6 +79,45 @@
1061 };
1062 };
1063
1064 +&pfe {
1065 + status = "okay";
1066 + #address-cells = <1>;
1067 + #size-cells = <0>;
1068 +
1069 + pfe_mac0: ethernet@0 {
1070 + compatible = "fsl,pfe-gemac-port";
1071 + #address-cells = <1>;
1072 + #size-cells = <0>;
1073 + reg = <0x0>; /* GEM_ID */
1074 + fsl,mdio-mux-val = <0x0>;
1075 + phy-mode = "sgmii";
1076 + phy-handle = <&sgmii_phy1>;
1077 + };
1078 +
1079 + pfe_mac1: ethernet@1 {
1080 + compatible = "fsl,pfe-gemac-port";
1081 + #address-cells = <1>;
1082 + #size-cells = <0>;
1083 + reg = <0x1>; /* GEM_ID */
1084 + fsl,mdio-mux-val = <0x0>;
1085 + phy-mode = "sgmii";
1086 + phy-handle = <&sgmii_phy2>;
1087 + };
1088 +
1089 + mdio@0 {
1090 + #address-cells = <1>;
1091 + #size-cells = <0>;
1092 +
1093 + sgmii_phy1: ethernet-phy@2 {
1094 + reg = <0x2>;
1095 + };
1096 +
1097 + sgmii_phy2: ethernet-phy@1 {
1098 + reg = <0x1>;
1099 + };
1100 + };
1101 +};
1102 +
1103 &sai2 {
1104 status = "okay";
1105 };
1106 @@ -117,3 +125,18 @@
1107 &sata {
1108 status = "okay";
1109 };
1110 +
1111 +&qspi {
1112 + status = "okay";
1113 + qflash0: s25fs512s@0 {
1114 + compatible = "spansion,m25p80";
1115 + #address-cells = <1>;
1116 + #size-cells = <1>;
1117 + spi-max-frequency = <20000000>;
1118 + m25p,fast-read;
1119 + reg = <0>;
1120 + spi-rx-bus-width = <2>;
1121 + spi-tx-bus-width = <2>;
1122 + };
1123 +
1124 +};
1125 --- /dev/null
1126 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
1127 @@ -0,0 +1,179 @@
1128 +/*
1129 + * Device Tree file for NXP LS1012A FRWY Board.
1130 + *
1131 + * Copyright 2018 NXP
1132 + *
1133 + * This file is dual-licensed: you can use it either under the terms
1134 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1135 + * licensing only applies to this file, and not this project as a
1136 + * whole.
1137 + *
1138 + * a) This library is free software; you can redistribute it and/or
1139 + * modify it under the terms of the GNU General Public License as
1140 + * published by the Free Software Foundation; either version 2 of the
1141 + * License, or (at your option) any later version.
1142 + *
1143 + * This library is distributed in the hope that it will be useful,
1144 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1145 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1146 + * GNU General Public License for more details.
1147 + *
1148 + * Or, alternatively,
1149 + *
1150 + * b) Permission is hereby granted, free of charge, to any person
1151 + * obtaining a copy of this software and associated documentation
1152 + * files (the "Software"), to deal in the Software without
1153 + * restriction, including without limitation the rights to use,
1154 + * copy, modify, merge, publish, distribute, sublicense, and/or
1155 + * sell copies of the Software, and to permit persons to whom the
1156 + * Software is furnished to do so, subject to the following
1157 + * conditions:
1158 + *
1159 + * The above copyright notice and this permission notice shall be
1160 + * included in all copies or substantial portions of the Software.
1161 + *
1162 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1163 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1164 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1165 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1166 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1167 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1168 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1169 + * OTHER DEALINGS IN THE SOFTWARE.
1170 + */
1171 +/dts-v1/;
1172 +
1173 +#include "fsl-ls1012a.dtsi"
1174 +
1175 +/ {
1176 + model = "LS1012A FRWY Board";
1177 + compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
1178 +
1179 + aliases {
1180 + ethernet0 = &pfe_mac0;
1181 + ethernet1 = &pfe_mac1;
1182 + };
1183 +
1184 + sys_mclk: clock-mclk {
1185 + compatible = "fixed-clock";
1186 + #clock-cells = <0>;
1187 + clock-frequency = <25000000>;
1188 + };
1189 +
1190 + reg_1p8v: regulator-1p8v {
1191 + compatible = "regulator-fixed";
1192 + regulator-name = "1P8V";
1193 + regulator-min-microvolt = <1800000>;
1194 + regulator-max-microvolt = <1800000>;
1195 + regulator-always-on;
1196 + };
1197 +
1198 + sound {
1199 + compatible = "simple-audio-card";
1200 + simple-audio-card,format = "i2s";
1201 + simple-audio-card,widgets =
1202 + "Microphone", "Microphone Jack",
1203 + "Headphone", "Headphone Jack",
1204 + "Speaker", "Speaker Ext",
1205 + "Line", "Line In Jack";
1206 + simple-audio-card,routing =
1207 + "MIC_IN", "Microphone Jack",
1208 + "Microphone Jack", "Mic Bias",
1209 + "LINE_IN", "Line In Jack",
1210 + "Headphone Jack", "HP_OUT",
1211 + "Speaker Ext", "LINE_OUT";
1212 +
1213 + simple-audio-card,cpu {
1214 + sound-dai = <&sai2>;
1215 + frame-master;
1216 + bitclock-master;
1217 + };
1218 +
1219 + simple-audio-card,codec {
1220 + sound-dai = <&codec>;
1221 + frame-master;
1222 + bitclock-master;
1223 + system-clock-frequency = <25000000>;
1224 + };
1225 + };
1226 +};
1227 +
1228 +&pcie {
1229 + status = "okay";
1230 +};
1231 +
1232 +&duart0 {
1233 + status = "okay";
1234 +};
1235 +
1236 +&i2c0 {
1237 + status = "okay";
1238 +
1239 + codec: sgtl5000@a {
1240 + compatible = "fsl,sgtl5000";
1241 + #sound-dai-cells = <0>;
1242 + reg = <0xa>;
1243 + VDDA-supply = <&reg_1p8v>;
1244 + VDDIO-supply = <&reg_1p8v>;
1245 + clocks = <&sys_mclk>;
1246 + };
1247 +};
1248 +
1249 +&qspi {
1250 + num-cs = <1>;
1251 + bus-num = <0>;
1252 + status = "okay";
1253 +
1254 + qflash0: w25q16dw@0 {
1255 + compatible = "spansion,m25p80";
1256 + #address-cells = <1>;
1257 + #size-cells = <1>;
1258 + m25p,fast-read;
1259 + spi-max-frequency = <20000000>;
1260 + reg = <0>;
1261 + };
1262 +};
1263 +
1264 +&pfe {
1265 + status = "okay";
1266 + #address-cells = <1>;
1267 + #size-cells = <0>;
1268 +
1269 + pfe_mac0: ethernet@0 {
1270 + compatible = "fsl,pfe-gemac-port";
1271 + #address-cells = <1>;
1272 + #size-cells = <0>;
1273 + reg = <0x0>; /* GEM_ID */
1274 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1275 + fsl,mdio-mux-val = <0x0>;
1276 + phy-mode = "sgmii";
1277 + phy-handle = <&sgmii_phy1>;
1278 + };
1279 +
1280 + pfe_mac1: ethernet@1 {
1281 + compatible = "fsl,pfe-gemac-port";
1282 + #address-cells = <1>;
1283 + #size-cells = <0>;
1284 + reg = <0x1>; /* GEM_ID */
1285 + fsl,mdio-mux-val = <0x0>;
1286 + phy-mode = "sgmii";
1287 + phy-handle = <&sgmii_phy2>;
1288 + };
1289 +
1290 + mdio@0 {
1291 + #address-cells = <1>;
1292 + #size-cells = <0>;
1293 +
1294 + sgmii_phy1: ethernet-phy@2 {
1295 + reg = <0x2>;
1296 + };
1297 +
1298 + sgmii_phy2: ethernet-phy@1 {
1299 + reg = <0x1>;
1300 + };
1301 + };
1302 +};
1303 +
1304 +&sai2 {
1305 + status = "okay";
1306 +};
1307 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1308 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1309 @@ -1,45 +1,9 @@
1310 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1311 /*
1312 * Device Tree file for Freescale LS1012A QDS Board.
1313 *
1314 * Copyright 2016 Freescale Semiconductor, Inc.
1315 *
1316 - * This file is dual-licensed: you can use it either under the terms
1317 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1318 - * licensing only applies to this file, and not this project as a
1319 - * whole.
1320 - *
1321 - * a) This library is free software; you can redistribute it and/or
1322 - * modify it under the terms of the GNU General Public License as
1323 - * published by the Free Software Foundation; either version 2 of the
1324 - * License, or (at your option) any later version.
1325 - *
1326 - * This library is distributed in the hope that it will be useful,
1327 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1328 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1329 - * GNU General Public License for more details.
1330 - *
1331 - * Or, alternatively,
1332 - *
1333 - * b) Permission is hereby granted, free of charge, to any person
1334 - * obtaining a copy of this software and associated documentation
1335 - * files (the "Software"), to deal in the Software without
1336 - * restriction, including without limitation the rights to use,
1337 - * copy, modify, merge, publish, distribute, sublicense, and/or
1338 - * sell copies of the Software, and to permit persons to whom the
1339 - * Software is furnished to do so, subject to the following
1340 - * conditions:
1341 - *
1342 - * The above copyright notice and this permission notice shall be
1343 - * included in all copies or substantial portions of the Software.
1344 - *
1345 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1346 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1347 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1348 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1349 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1350 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1351 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1352 - * OTHER DEALINGS IN THE SOFTWARE.
1353 */
1354 /dts-v1/;
1355
1356 @@ -49,6 +13,11 @@
1357 model = "LS1012A QDS Board";
1358 compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1359
1360 + aliases {
1361 + ethernet0 = &pfe_mac0;
1362 + ethernet1 = &pfe_mac1;
1363 + };
1364 +
1365 sys_mclk: clock-mclk {
1366 compatible = "fixed-clock";
1367 #clock-cells = <0>;
1368 @@ -93,6 +62,43 @@
1369 };
1370 };
1371
1372 +&pcie {
1373 + status = "okay";
1374 +};
1375 +
1376 +&dspi {
1377 + bus-num = <0>;
1378 + status = "okay";
1379 +
1380 + flash@0 {
1381 + #address-cells = <1>;
1382 + #size-cells = <1>;
1383 + compatible = "n25q128a11", "jedec,spi-nor";
1384 + reg = <0>;
1385 + spi-max-frequency = <10000000>;
1386 + };
1387 +
1388 + flash@1 {
1389 + #address-cells = <1>;
1390 + #size-cells = <1>;
1391 + compatible = "sst25wf040b", "jedec,spi-nor";
1392 + spi-cpol;
1393 + spi-cpha;
1394 + reg = <1>;
1395 + spi-max-frequency = <10000000>;
1396 + };
1397 +
1398 + flash@2 {
1399 + #address-cells = <1>;
1400 + #size-cells = <1>;
1401 + compatible = "en25s64", "jedec,spi-nor";
1402 + spi-cpol;
1403 + spi-cpha;
1404 + reg = <2>;
1405 + spi-max-frequency = <10000000>;
1406 + };
1407 +};
1408 +
1409 &duart0 {
1410 status = "okay";
1411 };
1412 @@ -131,6 +137,47 @@
1413 };
1414 };
1415
1416 +&pfe {
1417 + status = "okay";
1418 + #address-cells = <1>;
1419 + #size-cells = <0>;
1420 +
1421 + pfe_mac0: ethernet@0 {
1422 + compatible = "fsl,pfe-gemac-port";
1423 + #address-cells = <1>;
1424 + #size-cells = <0>;
1425 + reg = <0x0>; /* GEM_ID */
1426 + fsl,mdio-mux-val = <0x2>;
1427 + phy-mode = "sgmii-2500";
1428 + phy-handle = <&sgmii_phy1>;
1429 + };
1430 +
1431 + pfe_mac1: ethernet@1 {
1432 + compatible = "fsl,pfe-gemac-port";
1433 + #address-cells = <1>;
1434 + #size-cells = <0>;
1435 + reg = <0x1>; /* GEM_ID */
1436 + fsl,mdio-mux-val = <0x3>;
1437 + phy-mode = "sgmii-2500";
1438 + phy-handle = <&sgmii_phy2>;
1439 + };
1440 +
1441 + mdio@0 {
1442 + #address-cells = <1>;
1443 + #size-cells = <0>;
1444 +
1445 + sgmii_phy1: ethernet-phy@1 {
1446 + compatible = "ethernet-phy-ieee802.3-c45";
1447 + reg = <0x1>;
1448 + };
1449 +
1450 + sgmii_phy2: ethernet-phy@2 {
1451 + compatible = "ethernet-phy-ieee802.3-c45";
1452 + reg = <0x2>;
1453 + };
1454 + };
1455 +};
1456 +
1457 &sai2 {
1458 status = "okay";
1459 };
1460 @@ -138,3 +185,18 @@
1461 &sata {
1462 status = "okay";
1463 };
1464 +
1465 +&qspi {
1466 + status = "okay";
1467 + qflash0: s25fs512s@0 {
1468 + compatible = "spansion,m25p80";
1469 + #address-cells = <1>;
1470 + #size-cells = <1>;
1471 + spi-max-frequency = <20000000>;
1472 + m25p,fast-read;
1473 + reg = <0>;
1474 + spi-rx-bus-width = <2>;
1475 + spi-tx-bus-width = <2>;
1476 + };
1477 +
1478 +};
1479 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1480 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1481 @@ -1,45 +1,9 @@
1482 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1483 /*
1484 * Device Tree file for Freescale LS1012A RDB Board.
1485 *
1486 * Copyright 2016 Freescale Semiconductor, Inc.
1487 *
1488 - * This file is dual-licensed: you can use it either under the terms
1489 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1490 - * licensing only applies to this file, and not this project as a
1491 - * whole.
1492 - *
1493 - * a) This library is free software; you can redistribute it and/or
1494 - * modify it under the terms of the GNU General Public License as
1495 - * published by the Free Software Foundation; either version 2 of the
1496 - * License, or (at your option) any later version.
1497 - *
1498 - * This library is distributed in the hope that it will be useful,
1499 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1500 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1501 - * GNU General Public License for more details.
1502 - *
1503 - * Or, alternatively,
1504 - *
1505 - * b) Permission is hereby granted, free of charge, to any person
1506 - * obtaining a copy of this software and associated documentation
1507 - * files (the "Software"), to deal in the Software without
1508 - * restriction, including without limitation the rights to use,
1509 - * copy, modify, merge, publish, distribute, sublicense, and/or
1510 - * sell copies of the Software, and to permit persons to whom the
1511 - * Software is furnished to do so, subject to the following
1512 - * conditions:
1513 - *
1514 - * The above copyright notice and this permission notice shall be
1515 - * included in all copies or substantial portions of the Software.
1516 - *
1517 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1518 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1519 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1520 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1521 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1522 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1523 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1524 - * OTHER DEALINGS IN THE SOFTWARE.
1525 */
1526 /dts-v1/;
1527
1528 @@ -48,6 +12,15 @@
1529 / {
1530 model = "LS1012A RDB Board";
1531 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1532 +
1533 + aliases {
1534 + ethernet0 = &pfe_mac0;
1535 + ethernet1 = &pfe_mac1;
1536 + };
1537 +};
1538 +
1539 +&pcie {
1540 + status = "okay";
1541 };
1542
1543 &duart0 {
1544 @@ -74,3 +47,56 @@
1545 &sata {
1546 status = "okay";
1547 };
1548 +
1549 +&pfe {
1550 + status = "okay";
1551 + #address-cells = <1>;
1552 + #size-cells = <0>;
1553 +
1554 + pfe_mac0: ethernet@0 {
1555 + compatible = "fsl,pfe-gemac-port";
1556 + #address-cells = <1>;
1557 + #size-cells = <0>;
1558 + reg = <0x0>; /* GEM_ID */
1559 + fsl,mdio-mux-val = <0x0>;
1560 + phy-mode = "sgmii";
1561 + phy-handle = <&sgmii_phy>;
1562 + };
1563 +
1564 + pfe_mac1: ethernet@1 {
1565 + compatible = "fsl,pfe-gemac-port";
1566 + #address-cells = <1>;
1567 + #size-cells = <0>;
1568 + reg = <0x1>; /* GEM_ID */
1569 + fsl,mdio-mux-val = <0x0>;
1570 + phy-mode = "rgmii-txid";
1571 + phy-handle = <&rgmii_phy>;
1572 + };
1573 + mdio@0 {
1574 + #address-cells = <1>;
1575 + #size-cells = <0>;
1576 +
1577 + sgmii_phy: ethernet-phy@2 {
1578 + reg = <0x2>;
1579 + };
1580 +
1581 + rgmii_phy: ethernet-phy@1 {
1582 + reg = <0x1>;
1583 + };
1584 + };
1585 +};
1586 +
1587 +&qspi {
1588 + status = "okay";
1589 + qflash0: s25fs512s@0 {
1590 + compatible = "spansion,m25p80";
1591 + #address-cells = <1>;
1592 + #size-cells = <1>;
1593 + spi-max-frequency = <20000000>;
1594 + m25p,fast-read;
1595 + reg = <0>;
1596 + spi-rx-bus-width = <2>;
1597 + spi-tx-bus-width = <2>;
1598 + };
1599 +
1600 +};
1601 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1602 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1603 @@ -1,45 +1,9 @@
1604 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1605 /*
1606 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1607 *
1608 * Copyright 2016 Freescale Semiconductor, Inc.
1609 *
1610 - * This file is dual-licensed: you can use it either under the terms
1611 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1612 - * licensing only applies to this file, and not this project as a
1613 - * whole.
1614 - *
1615 - * a) This library is free software; you can redistribute it and/or
1616 - * modify it under the terms of the GNU General Public License as
1617 - * published by the Free Software Foundation; either version 2 of the
1618 - * License, or (at your option) any later version.
1619 - *
1620 - * This library is distributed in the hope that it will be useful,
1621 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1622 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1623 - * GNU General Public License for more details.
1624 - *
1625 - * Or, alternatively,
1626 - *
1627 - * b) Permission is hereby granted, free of charge, to any person
1628 - * obtaining a copy of this software and associated documentation
1629 - * files (the "Software"), to deal in the Software without
1630 - * restriction, including without limitation the rights to use,
1631 - * copy, modify, merge, publish, distribute, sublicense, and/or
1632 - * sell copies of the Software, and to permit persons to whom the
1633 - * Software is furnished to do so, subject to the following
1634 - * conditions:
1635 - *
1636 - * The above copyright notice and this permission notice shall be
1637 - * included in all copies or substantial portions of the Software.
1638 - *
1639 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1640 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1641 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1642 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1643 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1644 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1645 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1646 - * OTHER DEALINGS IN THE SOFTWARE.
1647 */
1648
1649 #include <dt-bindings/interrupt-controller/arm-gic.h>
1650 @@ -64,12 +28,30 @@
1651 #address-cells = <1>;
1652 #size-cells = <0>;
1653
1654 - cpu0: cpu@0 {
1655 + cooling_map0: cpu0: cpu@0 {
1656 device_type = "cpu";
1657 compatible = "arm,cortex-a53";
1658 reg = <0x0>;
1659 clocks = <&clockgen 1 0>;
1660 #cooling-cells = <2>;
1661 + cpu-idle-states = <&CPU_PH20>;
1662 + };
1663 + };
1664 +
1665 + idle-states {
1666 + /*
1667 + * PSCI node is not added default, U-boot will add missing
1668 + * parts if it determines to use PSCI.
1669 + */
1670 + entry-method = "arm,psci";
1671 +
1672 + CPU_PH20: cpu-ph20 {
1673 + compatible = "arm,idle-state";
1674 + idle-state-name = "PH20";
1675 + arm,psci-suspend-param = <0x0>;
1676 + entry-latency-us = <1000>;
1677 + exit-latency-us = <1000>;
1678 + min-residency-us = <3000>;
1679 };
1680 };
1681
1682 @@ -248,7 +230,7 @@
1683 dcfg: dcfg@1ee0000 {
1684 compatible = "fsl,ls1012a-dcfg",
1685 "syscon";
1686 - reg = <0x0 0x1ee0000 0x0 0x10000>;
1687 + reg = <0x0 0x1ee0000 0x0 0x1000>;
1688 big-endian;
1689 };
1690
1691 @@ -305,44 +287,25 @@
1692 #thermal-sensor-cells = <1>;
1693 };
1694
1695 - thermal-zones {
1696 - cpu_thermal: cpu-thermal {
1697 - polling-delay-passive = <1000>;
1698 - polling-delay = <5000>;
1699 - thermal-sensors = <&tmu 0>;
1700 -
1701 - trips {
1702 - cpu_alert: cpu-alert {
1703 - temperature = <85000>;
1704 - hysteresis = <2000>;
1705 - type = "passive";
1706 - };
1707 -
1708 - cpu_crit: cpu-crit {
1709 - temperature = <95000>;
1710 - hysteresis = <2000>;
1711 - type = "critical";
1712 - };
1713 - };
1714 + #include "fsl-tmu.dtsi"
1715
1716 - cooling-maps {
1717 - map0 {
1718 - trip = <&cpu_alert>;
1719 - cooling-device =
1720 - <&cpu0 THERMAL_NO_LIMIT
1721 - THERMAL_NO_LIMIT>;
1722 - };
1723 - };
1724 - };
1725 + ftm0: ftm0@29d0000 {
1726 + compatible = "fsl,ls1012a-ftm-alarm";
1727 + reg = <0x0 0x29d0000 0x0 0x10000>,
1728 + <0x0 0x1ee2140 0x0 0x4>;
1729 + reg-names = "ftm", "pmctrl";
1730 + interrupts = <0 86 0x4>;
1731 + big-endian;
1732 };
1733
1734 i2c0: i2c@2180000 {
1735 - compatible = "fsl,vf610-i2c";
1736 + compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
1737 #address-cells = <1>;
1738 #size-cells = <0>;
1739 reg = <0x0 0x2180000 0x0 0x10000>;
1740 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1741 - clocks = <&clockgen 4 0>;
1742 + clocks = <&clockgen 4 3>;
1743 + scl-gpios = <&gpio0 13 0>;
1744 status = "disabled";
1745 };
1746
1747 @@ -352,7 +315,20 @@
1748 #size-cells = <0>;
1749 reg = <0x0 0x2190000 0x0 0x10000>;
1750 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1751 + clocks = <&clockgen 4 3>;
1752 + status = "disabled";
1753 + };
1754 +
1755 + dspi: dspi@2100000 {
1756 + compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
1757 + #address-cells = <1>;
1758 + #size-cells = <0>;
1759 + reg = <0x0 0x2100000 0x0 0x10000>;
1760 + interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
1761 + clock-names = "dspi";
1762 clocks = <&clockgen 4 0>;
1763 + spi-num-chipselects = <5>;
1764 + big-endian;
1765 status = "disabled";
1766 };
1767
1768 @@ -401,6 +377,20 @@
1769 big-endian;
1770 };
1771
1772 + qspi: quadspi@1550000 {
1773 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1774 + #address-cells = <1>;
1775 + #size-cells = <0>;
1776 + reg = <0x0 0x1550000 0x0 0x10000>,
1777 + <0x0 0x40000000 0x0 0x10000000>;
1778 + reg-names = "QuadSPI", "QuadSPI-memory";
1779 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1780 + clock-names = "qspi_en", "qspi";
1781 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1782 + big-endian;
1783 + status = "disabled";
1784 + };
1785 +
1786 sai1: sai@2b50000 {
1787 #sound-dai-cells = <0>;
1788 compatible = "fsl,vf610-sai";
1789 @@ -452,6 +442,8 @@
1790 dr_mode = "host";
1791 snps,quirk-frame-length-adjustment = <0x20>;
1792 snps,dis_rxdet_inp3_quirk;
1793 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1794 + snps,host-vbus-glitches;
1795 };
1796
1797 sata: sata@3200000 {
1798 @@ -472,5 +464,85 @@
1799 dr_mode = "host";
1800 phy_type = "ulpi";
1801 };
1802 +
1803 + msi: msi-controller1@1572000 {
1804 + compatible = "fsl,ls1012a-msi";
1805 + reg = <0x0 0x1572000 0x0 0x8>;
1806 + msi-controller;
1807 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
1808 + };
1809 +
1810 + pcie: pcie@3400000 {
1811 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
1812 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
1813 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
1814 + reg-names = "regs", "config";
1815 + interrupts = <0 118 0x4>, /* AER interrupt */
1816 + <0 117 0x4>; /* PME interrupt */
1817 + interrupt-names = "aer", "pme";
1818 + #address-cells = <3>;
1819 + #size-cells = <2>;
1820 + device_type = "pci";
1821 + num-lanes = <4>;
1822 + bus-range = <0x0 0xff>;
1823 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
1824 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1825 + msi-parent = <&msi>;
1826 + #interrupt-cells = <1>;
1827 + interrupt-map-mask = <0 0 0 7>;
1828 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
1829 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
1830 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
1831 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
1832 + status = "disabled";
1833 + };
1834 +
1835 + rcpm: rcpm@1ee2000 {
1836 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1837 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1838 + fsl,#rcpm-wakeup-cells = <1>;
1839 + };
1840 + };
1841 +
1842 + reserved-memory {
1843 + #address-cells = <2>;
1844 + #size-cells = <2>;
1845 + ranges;
1846 +
1847 + pfe_reserved: packetbuffer@83400000 {
1848 + reg = <0 0x83400000 0 0xc00000>;
1849 + };
1850 + };
1851 +
1852 + pfe: pfe@04000000 {
1853 + compatible = "fsl,pfe";
1854 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
1855 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
1856 + reg-names = "pfe", "pfe-ddr";
1857 + fsl,pfe-num-interfaces = <0x2>;
1858 + interrupts = <0 172 0x4>, /* HIF interrupt */
1859 + <0 173 0x4>, /*HIF_NOCPY interrupt */
1860 + <0 174 0x4>; /* WoL interrupt */
1861 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
1862 + memory-region = <&pfe_reserved>;
1863 + fsl,pfe-scfg = <&scfg 0>;
1864 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
1865 + clocks = <&clockgen 4 0>;
1866 + clock-names = "pfe";
1867 +
1868 + status = "okay";
1869 + };
1870 +
1871 + firmware {
1872 + optee {
1873 + compatible = "linaro,optee-tz";
1874 + method = "smc";
1875 + };
1876 + };
1877 +};
1878 +
1879 +&thermal_zones {
1880 + thermal-zone0 {
1881 + status = "okay";
1882 };
1883 };
1884 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1885 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1886 @@ -1,9 +1,8 @@
1887 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1888 /*
1889 * QorIQ FMan v3 device tree nodes for ls1043
1890 *
1891 * Copyright 2015-2016 Freescale Semiconductor Inc.
1892 - *
1893 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1894 */
1895
1896 &soc {
1897 --- /dev/null
1898 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
1899 @@ -0,0 +1,263 @@
1900 +/*
1901 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
1902 + *
1903 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
1904 + *
1905 + * Mingkai Hu <Mingkai.hu@freescale.com>
1906 + *
1907 + * This file is dual-licensed: you can use it either under the terms
1908 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1909 + * licensing only applies to this file, and not this project as a
1910 + * whole.
1911 + *
1912 + * a) This library is free software; you can redistribute it and/or
1913 + * modify it under the terms of the GNU General Public License as
1914 + * published by the Free Software Foundation; either version 2 of the
1915 + * License, or (at your option) any later version.
1916 + *
1917 + * This library is distributed in the hope that it will be useful,
1918 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1919 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1920 + * GNU General Public License for more details.
1921 + *
1922 + * Or, alternatively,
1923 + *
1924 + * b) Permission is hereby granted, free of charge, to any person
1925 + * obtaining a copy of this software and associated documentation
1926 + * files (the "Software"), to deal in the Software without
1927 + * restriction, including without limitation the rights to use,
1928 + * copy, modify, merge, publish, distribute, sublicense, and/or
1929 + * sell copies of the Software, and to permit persons to whom the
1930 + * Software is furnished to do so, subject to the following
1931 + * conditions:
1932 + *
1933 + * The above copyright notice and this permission notice shall be
1934 + * included in all copies or substantial portions of the Software.
1935 + *
1936 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1937 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1938 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1939 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1940 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1941 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1942 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1943 + * OTHER DEALINGS IN THE SOFTWARE.
1944 + */
1945 +
1946 +#include "fsl-ls1043a-qds.dts"
1947 +#include "qoriq-qman-portals-sdk.dtsi"
1948 +#include "qoriq-bman-portals-sdk.dtsi"
1949 +
1950 +&bman_fbpr {
1951 + compatible = "fsl,bman-fbpr";
1952 + alloc-ranges = <0 0 0x10000 0>;
1953 +};
1954 +&qman_fqd {
1955 + compatible = "fsl,qman-fqd";
1956 + alloc-ranges = <0 0 0x10000 0>;
1957 +};
1958 +&qman_pfdr {
1959 + compatible = "fsl,qman-pfdr";
1960 + alloc-ranges = <0 0 0x10000 0>;
1961 +};
1962 +
1963 +&soc {
1964 +/delete-property/ dma-coherent;
1965 +
1966 +#include "qoriq-dpaa-eth.dtsi"
1967 +#include "qoriq-fman3-0-6oh.dtsi"
1968 +
1969 +pcie@3400000 {
1970 + /delete-property/ iommu-map;
1971 + dma-coherent;
1972 +};
1973 +
1974 +pcie@3500000 {
1975 + /delete-property/ iommu-map;
1976 + dma-coherent;
1977 +};
1978 +
1979 +pcie@3600000 {
1980 + /delete-property/ iommu-map;
1981 + dma-coherent;
1982 +};
1983 +
1984 +/delete-node/ iommu@9000000;
1985 +};
1986 +
1987 +&fman0 {
1988 + compatible = "fsl,fman", "simple-bus";
1989 + dma-coherent;
1990 +};
1991 +
1992 +&clockgen {
1993 + dma-coherent;
1994 +};
1995 +
1996 +&scfg {
1997 + dma-coherent;
1998 +};
1999 +
2000 +&crypto {
2001 + dma-coherent;
2002 +};
2003 +
2004 +&dcfg {
2005 + dma-coherent;
2006 +};
2007 +
2008 +&ifc {
2009 + dma-coherent;
2010 +};
2011 +
2012 +&qspi {
2013 + dma-coherent;
2014 +};
2015 +
2016 +&esdhc {
2017 + dma-coherent;
2018 +};
2019 +
2020 +&ddr {
2021 + dma-coherent;
2022 +};
2023 +
2024 +&tmu {
2025 + dma-coherent;
2026 +};
2027 +
2028 +&qman {
2029 + dma-coherent;
2030 +};
2031 +
2032 +&bman {
2033 + dma-coherent;
2034 +};
2035 +
2036 +&bportals {
2037 + dma-coherent;
2038 +};
2039 +
2040 +&qportals {
2041 + dma-coherent;
2042 +};
2043 +
2044 +&dspi0 {
2045 + dma-coherent;
2046 +};
2047 +
2048 +&dspi1 {
2049 + dma-coherent;
2050 +};
2051 +
2052 +&i2c0 {
2053 + dma-coherent;
2054 +};
2055 +
2056 +&i2c1 {
2057 + dma-coherent;
2058 +};
2059 +
2060 +&i2c2 {
2061 + dma-coherent;
2062 +};
2063 +
2064 +&i2c3 {
2065 + dma-coherent;
2066 +};
2067 +
2068 +&duart0 {
2069 + dma-coherent;
2070 +};
2071 +
2072 +&duart1 {
2073 + dma-coherent;
2074 +};
2075 +
2076 +&duart2 {
2077 + dma-coherent;
2078 +};
2079 +
2080 +&duart3 {
2081 + dma-coherent;
2082 +};
2083 +
2084 +&gpio1 {
2085 + dma-coherent;
2086 +};
2087 +
2088 +&gpio2 {
2089 + dma-coherent;
2090 +};
2091 +
2092 +&gpio3 {
2093 + dma-coherent;
2094 +};
2095 +
2096 +&gpio4 {
2097 + dma-coherent;
2098 +};
2099 +
2100 +&uqe {
2101 + dma-coherent;
2102 +};
2103 +
2104 +&lpuart0 {
2105 + dma-coherent;
2106 +};
2107 +
2108 +&lpuart1 {
2109 + dma-coherent;
2110 +};
2111 +
2112 +&lpuart2 {
2113 + dma-coherent;
2114 +};
2115 +
2116 +&lpuart3 {
2117 + dma-coherent;
2118 +};
2119 +
2120 +&lpuart4 {
2121 + dma-coherent;
2122 +};
2123 +
2124 +&lpuart5 {
2125 + dma-coherent;
2126 +};
2127 +
2128 +&ftm0 {
2129 + dma-coherent;
2130 +};
2131 +
2132 +&wdog0 {
2133 + dma-coherent;
2134 +};
2135 +
2136 +&edma0 {
2137 + dma-coherent;
2138 +};
2139 +
2140 +&qdma {
2141 + dma-coherent;
2142 +};
2143 +
2144 +&msi1 {
2145 + dma-coherent;
2146 +};
2147 +
2148 +&msi2 {
2149 + dma-coherent;
2150 +};
2151 +
2152 +&msi3 {
2153 + dma-coherent;
2154 +};
2155 +
2156 +&ptp_timer0 {
2157 + dma-coherent;
2158 +};
2159 +
2160 +&fsldpaa {
2161 + dma-coherent;
2162 +};
2163 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2164 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2165 @@ -1,47 +1,10 @@
2166 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2167 /*
2168 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2169 *
2170 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2171 *
2172 * Mingkai Hu <Mingkai.hu@freescale.com>
2173 - *
2174 - * This file is dual-licensed: you can use it either under the terms
2175 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2176 - * licensing only applies to this file, and not this project as a
2177 - * whole.
2178 - *
2179 - * a) This library is free software; you can redistribute it and/or
2180 - * modify it under the terms of the GNU General Public License as
2181 - * published by the Free Software Foundation; either version 2 of the
2182 - * License, or (at your option) any later version.
2183 - *
2184 - * This library is distributed in the hope that it will be useful,
2185 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2186 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2187 - * GNU General Public License for more details.
2188 - *
2189 - * Or, alternatively,
2190 - *
2191 - * b) Permission is hereby granted, free of charge, to any person
2192 - * obtaining a copy of this software and associated documentation
2193 - * files (the "Software"), to deal in the Software without
2194 - * restriction, including without limitation the rights to use,
2195 - * copy, modify, merge, publish, distribute, sublicense, and/or
2196 - * sell copies of the Software, and to permit persons to whom the
2197 - * Software is furnished to do so, subject to the following
2198 - * conditions:
2199 - *
2200 - * The above copyright notice and this permission notice shall be
2201 - * included in all copies or substantial portions of the Software.
2202 - *
2203 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2204 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2205 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2206 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2207 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2208 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2209 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2210 - * OTHER DEALINGS IN THE SOFTWARE.
2211 */
2212
2213 /dts-v1/;
2214 @@ -60,6 +23,22 @@
2215 serial1 = &duart1;
2216 serial2 = &duart2;
2217 serial3 = &duart3;
2218 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2219 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2220 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2221 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2222 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2223 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2224 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2225 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2226 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2227 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2228 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2229 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2230 + emi1_slot1 = &ls1043mdio_s1;
2231 + emi1_slot2 = &ls1043mdio_s2;
2232 + emi1_slot3 = &ls1043mdio_s3;
2233 + emi1_slot4 = &ls1043mdio_s4;
2234 };
2235
2236 chosen {
2237 @@ -97,8 +76,11 @@
2238 };
2239
2240 fpga: board-control@2,0 {
2241 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2242 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2243 reg = <0x2 0x0 0x0000100>;
2244 + #address-cells = <1>;
2245 + #size-cells = <1>;
2246 + ranges = <0 2 0 0x100>;
2247 };
2248 };
2249
2250 @@ -179,7 +161,153 @@
2251 #size-cells = <1>;
2252 spi-max-frequency = <20000000>;
2253 reg = <0>;
2254 + spi-rx-bus-width = <4>;
2255 + spi-tx-bus-width = <4>;
2256 };
2257 };
2258
2259 #include "fsl-ls1043-post.dtsi"
2260 +
2261 +&fman0 {
2262 + ethernet@e0000 {
2263 + phy-handle = <&qsgmii_phy_s2_p1>;
2264 + phy-connection-type = "sgmii";
2265 + };
2266 +
2267 + ethernet@e2000 {
2268 + phy-handle = <&qsgmii_phy_s2_p2>;
2269 + phy-connection-type = "sgmii";
2270 + };
2271 +
2272 + ethernet@e4000 {
2273 + phy-handle = <&rgmii_phy1>;
2274 + phy-connection-type = "rgmii";
2275 + };
2276 +
2277 + ethernet@e6000 {
2278 + phy-handle = <&rgmii_phy2>;
2279 + phy-connection-type = "rgmii";
2280 + };
2281 +
2282 + ethernet@e8000 {
2283 + phy-handle = <&qsgmii_phy_s2_p3>;
2284 + phy-connection-type = "sgmii";
2285 + };
2286 +
2287 + ethernet@ea000 {
2288 + phy-handle = <&qsgmii_phy_s2_p4>;
2289 + phy-connection-type = "sgmii";
2290 + };
2291 +
2292 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2293 + fixed-link = <1 1 10000 0 0>;
2294 + phy-connection-type = "xgmii";
2295 + };
2296 +};
2297 +
2298 +&fpga {
2299 + mdio-mux-emi1 {
2300 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2301 + mdio-parent-bus = <&mdio0>;
2302 + #address-cells = <1>;
2303 + #size-cells = <0>;
2304 + reg = <0x54 1>; /* BRDCFG4 */
2305 + mux-mask = <0xe0>; /* EMI1 */
2306 +
2307 + /* On-board RGMII1 PHY */
2308 + ls1043mdio0: mdio@0 {
2309 + reg = <0>;
2310 + #address-cells = <1>;
2311 + #size-cells = <0>;
2312 +
2313 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2314 + reg = <0x1>;
2315 + };
2316 + };
2317 +
2318 + /* On-board RGMII2 PHY */
2319 + ls1043mdio1: mdio@1 {
2320 + reg = <0x20>;
2321 + #address-cells = <1>;
2322 + #size-cells = <0>;
2323 +
2324 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2325 + reg = <0x2>;
2326 + };
2327 + };
2328 +
2329 + /* Slot 1 */
2330 + ls1043mdio_s1: mdio@2 {
2331 + reg = <0x40>;
2332 + #address-cells = <1>;
2333 + #size-cells = <0>;
2334 + status = "disabled";
2335 +
2336 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2337 + reg = <0x4>;
2338 + };
2339 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2340 + reg = <0x5>;
2341 + };
2342 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2343 + reg = <0x6>;
2344 + };
2345 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2346 + reg = <0x7>;
2347 + };
2348 +
2349 + sgmii_phy_s1_p1: ethernet-phy@1c {
2350 + reg = <0x1c>;
2351 + };
2352 + };
2353 +
2354 + /* Slot 2 */
2355 + ls1043mdio_s2: mdio@3 {
2356 + reg = <0x60>;
2357 + #address-cells = <1>;
2358 + #size-cells = <0>;
2359 + status = "disabled";
2360 +
2361 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2362 + reg = <0x8>;
2363 + };
2364 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2365 + reg = <0x9>;
2366 + };
2367 + qsgmii_phy_s2_p3: ethernet-phy@a {
2368 + reg = <0xa>;
2369 + };
2370 + qsgmii_phy_s2_p4: ethernet-phy@b {
2371 + reg = <0xb>;
2372 + };
2373 +
2374 + sgmii_phy_s2_p1: ethernet-phy@1c {
2375 + reg = <0x1c>;
2376 + };
2377 + };
2378 +
2379 + /* Slot 3 */
2380 + ls1043mdio_s3: mdio@4 {
2381 + reg = <0x80>;
2382 + #address-cells = <1>;
2383 + #size-cells = <0>;
2384 + status = "disabled";
2385 +
2386 + sgmii_phy_s3_p1: ethernet-phy@1c {
2387 + reg = <0x1c>;
2388 + };
2389 + };
2390 +
2391 + /* Slot 4 */
2392 + ls1043mdio_s4: mdio@5 {
2393 + reg = <0xa0>;
2394 + #address-cells = <1>;
2395 + #size-cells = <0>;
2396 + status = "disabled";
2397 +
2398 + sgmii_phy_s4_p1: ethernet-phy@1c {
2399 + reg = <0x1c>;
2400 + };
2401 + };
2402 + };
2403 +};
2404 --- /dev/null
2405 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2406 @@ -0,0 +1,262 @@
2407 +/*
2408 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2409 + *
2410 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2411 + *
2412 + * Mingkai Hu <Mingkai.hu@freescale.com>
2413 + *
2414 + * This file is dual-licensed: you can use it either under the terms
2415 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2416 + * licensing only applies to this file, and not this project as a
2417 + * whole.
2418 + *
2419 + * a) This library is free software; you can redistribute it and/or
2420 + * modify it under the terms of the GNU General Public License as
2421 + * published by the Free Software Foundation; either version 2 of the
2422 + * License, or (at your option) any later version.
2423 + *
2424 + * This library is distributed in the hope that it will be useful,
2425 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2426 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2427 + * GNU General Public License for more details.
2428 + *
2429 + * Or, alternatively,
2430 + *
2431 + * b) Permission is hereby granted, free of charge, to any person
2432 + * obtaining a copy of this software and associated documentation
2433 + * files (the "Software"), to deal in the Software without
2434 + * restriction, including without limitation the rights to use,
2435 + * copy, modify, merge, publish, distribute, sublicense, and/or
2436 + * sell copies of the Software, and to permit persons to whom the
2437 + * Software is furnished to do so, subject to the following
2438 + * conditions:
2439 + *
2440 + * The above copyright notice and this permission notice shall be
2441 + * included in all copies or substantial portions of the Software.
2442 + *
2443 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2444 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2445 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2446 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2447 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2448 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2449 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2450 + * OTHER DEALINGS IN THE SOFTWARE.
2451 + */
2452 +
2453 +#include "fsl-ls1043a-rdb.dts"
2454 +#include "qoriq-qman-portals-sdk.dtsi"
2455 +#include "qoriq-bman-portals-sdk.dtsi"
2456 +
2457 +&bman_fbpr {
2458 + compatible = "fsl,bman-fbpr";
2459 + alloc-ranges = <0 0 0x10000 0>;
2460 +};
2461 +&qman_fqd {
2462 + compatible = "fsl,qman-fqd";
2463 + alloc-ranges = <0 0 0x10000 0>;
2464 +};
2465 +&qman_pfdr {
2466 + compatible = "fsl,qman-pfdr";
2467 + alloc-ranges = <0 0 0x10000 0>;
2468 +};
2469 +
2470 +&soc {
2471 +/delete-property/ dma-coherent;
2472 +
2473 +#include "qoriq-dpaa-eth.dtsi"
2474 +#include "qoriq-fman3-0-6oh.dtsi"
2475 +
2476 +pcie@3400000 {
2477 + /delete-property/ iommu-map;
2478 + dma-coherent;
2479 +};
2480 +
2481 +pcie@3500000 {
2482 + /delete-property/ iommu-map;
2483 + dma-coherent;
2484 +};
2485 +
2486 +pcie@3600000 {
2487 + /delete-property/ iommu-map;
2488 + dma-coherent;
2489 +};
2490 +
2491 +/delete-node/ iommu@9000000;
2492 +};
2493 +
2494 +&fman0 {
2495 + compatible = "fsl,fman", "simple-bus";
2496 +};
2497 +
2498 +&clockgen {
2499 + dma-coherent;
2500 +};
2501 +
2502 +&scfg {
2503 + dma-coherent;
2504 +};
2505 +
2506 +&crypto {
2507 + dma-coherent;
2508 +};
2509 +
2510 +&dcfg {
2511 + dma-coherent;
2512 +};
2513 +
2514 +&ifc {
2515 + dma-coherent;
2516 +};
2517 +
2518 +&qspi {
2519 + dma-coherent;
2520 +};
2521 +
2522 +&esdhc {
2523 + dma-coherent;
2524 +};
2525 +
2526 +&ddr {
2527 + dma-coherent;
2528 +};
2529 +
2530 +&tmu {
2531 + dma-coherent;
2532 +};
2533 +
2534 +&qman {
2535 + dma-coherent;
2536 +};
2537 +
2538 +&bman {
2539 + dma-coherent;
2540 +};
2541 +
2542 +&bportals {
2543 + dma-coherent;
2544 +};
2545 +
2546 +&qportals {
2547 + dma-coherent;
2548 +};
2549 +
2550 +&dspi0 {
2551 + dma-coherent;
2552 +};
2553 +
2554 +&dspi1 {
2555 + dma-coherent;
2556 +};
2557 +
2558 +&i2c0 {
2559 + dma-coherent;
2560 +};
2561 +
2562 +&i2c1 {
2563 + dma-coherent;
2564 +};
2565 +
2566 +&i2c2 {
2567 + dma-coherent;
2568 +};
2569 +
2570 +&i2c3 {
2571 + dma-coherent;
2572 +};
2573 +
2574 +&duart0 {
2575 + dma-coherent;
2576 +};
2577 +
2578 +&duart1 {
2579 + dma-coherent;
2580 +};
2581 +
2582 +&duart2 {
2583 + dma-coherent;
2584 +};
2585 +
2586 +&duart3 {
2587 + dma-coherent;
2588 +};
2589 +
2590 +&gpio1 {
2591 + dma-coherent;
2592 +};
2593 +
2594 +&gpio2 {
2595 + dma-coherent;
2596 +};
2597 +
2598 +&gpio3 {
2599 + dma-coherent;
2600 +};
2601 +
2602 +&gpio4 {
2603 + dma-coherent;
2604 +};
2605 +
2606 +&lpuart0 {
2607 + dma-coherent;
2608 +};
2609 +
2610 +&lpuart1 {
2611 + dma-coherent;
2612 +};
2613 +
2614 +&lpuart2 {
2615 + dma-coherent;
2616 +};
2617 +
2618 +&lpuart3 {
2619 + dma-coherent;
2620 +};
2621 +
2622 +&lpuart4 {
2623 + dma-coherent;
2624 +};
2625 +
2626 +&lpuart5 {
2627 + dma-coherent;
2628 +};
2629 +
2630 +&ftm0 {
2631 + dma-coherent;
2632 +};
2633 +
2634 +&wdog0 {
2635 + dma-coherent;
2636 +};
2637 +
2638 +&edma0 {
2639 + dma-coherent;
2640 +};
2641 +
2642 +&qdma {
2643 + dma-coherent;
2644 +};
2645 +
2646 +&msi1 {
2647 + dma-coherent;
2648 +};
2649 +
2650 +&msi2 {
2651 + dma-coherent;
2652 +};
2653 +
2654 +&msi3 {
2655 + dma-coherent;
2656 +};
2657 +
2658 +&fman0 {
2659 + dma-coherent;
2660 +};
2661 +
2662 +&ptp_timer0 {
2663 + dma-coherent;
2664 +};
2665 +
2666 +&fsldpaa {
2667 + dma-coherent;
2668 +};
2669 --- /dev/null
2670 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2671 @@ -0,0 +1,140 @@
2672 +/*
2673 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2674 + *
2675 + * Copyright (C) 2014-2015, Freescale Semiconductor
2676 + *
2677 + * This file is licensed under the terms of the GNU General Public
2678 + * License version 2. This program is licensed "as is" without any
2679 + * warranty of any kind, whether express or implied.
2680 + */
2681 +
2682 +#include "fsl-ls1043a-rdb-sdk.dts"
2683 +
2684 +&soc {
2685 + bp7: buffer-pool@7 {
2686 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2687 + fsl,bpid = <7>;
2688 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2689 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2690 + dma-coherent;
2691 + };
2692 +
2693 + bp8: buffer-pool@8 {
2694 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2695 + fsl,bpid = <8>;
2696 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2697 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2698 + dma-coherent;
2699 + };
2700 +
2701 + bp9: buffer-pool@9 {
2702 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2703 + fsl,bpid = <9>;
2704 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2705 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2706 + dma-coherent;
2707 + };
2708 +
2709 + fsl,dpaa {
2710 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2711 + dma-coherent;
2712 +
2713 + ethernet@0 {
2714 + compatible = "fsl,dpa-ethernet-init";
2715 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2716 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2717 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2718 + };
2719 +
2720 + ethernet@1 {
2721 + compatible = "fsl,dpa-ethernet-init";
2722 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2723 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2724 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2725 + };
2726 +
2727 + ethernet@2 {
2728 + compatible = "fsl,dpa-ethernet-init";
2729 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2730 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2731 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2732 + };
2733 +
2734 + ethernet@3 {
2735 + compatible = "fsl,dpa-ethernet-init";
2736 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2737 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2738 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2739 + };
2740 +
2741 + ethernet@4 {
2742 + compatible = "fsl,dpa-ethernet-init";
2743 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2744 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2745 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2746 + };
2747 +
2748 + ethernet@5 {
2749 + compatible = "fsl,dpa-ethernet-init";
2750 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2751 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2752 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2753 + };
2754 +
2755 + ethernet@8 {
2756 + compatible = "fsl,dpa-ethernet-init";
2757 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2758 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2759 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2760 +
2761 + };
2762 + dpa-fman0-oh@2 {
2763 + compatible = "fsl,dpa-oh";
2764 + /* Define frame queues for the OH port*/
2765 + /* <OH Rx error, OH Rx default> */
2766 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2767 + fsl,fman-oh-port = <&fman0_oh2>;
2768 + };
2769 + };
2770 +
2771 + pcie@3400000 {
2772 + /delete-property/ iommu-map;
2773 + };
2774 +
2775 + pcie@3500000 {
2776 + /delete-property/ iommu-map;
2777 + };
2778 +
2779 + pcie@3600000 {
2780 + /delete-property/ iommu-map;
2781 + };
2782 +
2783 + /delete-node/ iommu@9000000;
2784 +};
2785 +/ {
2786 + reserved-memory {
2787 + #address-cells = <2>;
2788 + #size-cells = <2>;
2789 + ranges;
2790 +
2791 + /* For legacy usdpaa based use-cases, update the size and
2792 + alignment parameters. e.g. to allocate 256 MB memory:
2793 + size = <0 0x10000000>;
2794 + alignment = <0 0x10000000>;
2795 + */
2796 + usdpaa_mem: usdpaa_mem {
2797 + compatible = "fsl,usdpaa-mem";
2798 + alloc-ranges = <0 0 0x10000 0>;
2799 + size = <0 0x1000>;
2800 + alignment = <0 0x1000>;
2801 + };
2802 + };
2803 +};
2804 +
2805 +&fman0 {
2806 + fman0_oh2: port@83000 {
2807 + cell-index = <1>;
2808 + compatible = "fsl,fman-port-oh";
2809 + reg = <0x83000 0x1000>;
2810 + };
2811 +};
2812 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2813 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2814 @@ -1,47 +1,10 @@
2815 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2816 /*
2817 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2818 *
2819 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2820 *
2821 * Mingkai Hu <Mingkai.hu@freescale.com>
2822 - *
2823 - * This file is dual-licensed: you can use it either under the terms
2824 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2825 - * licensing only applies to this file, and not this project as a
2826 - * whole.
2827 - *
2828 - * a) This library is free software; you can redistribute it and/or
2829 - * modify it under the terms of the GNU General Public License as
2830 - * published by the Free Software Foundation; either version 2 of the
2831 - * License, or (at your option) any later version.
2832 - *
2833 - * This library is distributed in the hope that it will be useful,
2834 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2835 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2836 - * GNU General Public License for more details.
2837 - *
2838 - * Or, alternatively,
2839 - *
2840 - * b) Permission is hereby granted, free of charge, to any person
2841 - * obtaining a copy of this software and associated documentation
2842 - * files (the "Software"), to deal in the Software without
2843 - * restriction, including without limitation the rights to use,
2844 - * copy, modify, merge, publish, distribute, sublicense, and/or
2845 - * sell copies of the Software, and to permit persons to whom the
2846 - * Software is furnished to do so, subject to the following
2847 - * conditions:
2848 - *
2849 - * The above copyright notice and this permission notice shall be
2850 - * included in all copies or substantial portions of the Software.
2851 - *
2852 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2853 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2854 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2855 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2856 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2857 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2858 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2859 - * OTHER DEALINGS IN THE SOFTWARE.
2860 */
2861
2862 /dts-v1/;
2863 @@ -51,7 +14,6 @@
2864 model = "LS1043A RDB Board";
2865
2866 aliases {
2867 - crypto = &crypto;
2868 serial0 = &duart0;
2869 serial1 = &duart1;
2870 serial2 = &duart2;
2871 @@ -86,6 +48,10 @@
2872 compatible = "pericom,pt7c4338";
2873 reg = <0x68>;
2874 };
2875 + rtc@51 {
2876 + compatible = "nxp,pcf85263";
2877 + reg = <0x51>;
2878 + };
2879 };
2880
2881 &ifc {
2882 @@ -130,6 +96,38 @@
2883 reg = <0>;
2884 spi-max-frequency = <1000000>; /* input clock */
2885 };
2886 +
2887 + slic@2 {
2888 + compatible = "maxim,ds26522";
2889 + reg = <2>;
2890 + spi-max-frequency = <2000000>;
2891 + fsl,spi-cs-sck-delay = <100>;
2892 + fsl,spi-sck-cs-delay = <50>;
2893 + };
2894 +
2895 + slic@3 {
2896 + compatible = "maxim,ds26522";
2897 + reg = <3>;
2898 + spi-max-frequency = <2000000>;
2899 + fsl,spi-cs-sck-delay = <100>;
2900 + fsl,spi-sck-cs-delay = <50>;
2901 + };
2902 +};
2903 +
2904 +&uqe {
2905 + ucc_hdlc: ucc@2000 {
2906 + compatible = "fsl,ucc-hdlc";
2907 + rx-clock-name = "clk8";
2908 + tx-clock-name = "clk9";
2909 + fsl,rx-sync-clock = "rsync_pin";
2910 + fsl,tx-sync-clock = "tsync_pin";
2911 + fsl,tx-timeslot-mask = <0xfffffffe>;
2912 + fsl,rx-timeslot-mask = <0xfffffffe>;
2913 + fsl,tdm-framer-type = "e1";
2914 + fsl,tdm-id = <0>;
2915 + fsl,siram-entry-id = <0>;
2916 + fsl,tdm-interface;
2917 + };
2918 };
2919
2920 &duart0 {
2921 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2922 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2923 @@ -1,47 +1,10 @@
2924 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2925 /*
2926 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2927 *
2928 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2929 *
2930 * Mingkai Hu <Mingkai.hu@freescale.com>
2931 - *
2932 - * This file is dual-licensed: you can use it either under the terms
2933 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2934 - * licensing only applies to this file, and not this project as a
2935 - * whole.
2936 - *
2937 - * a) This library is free software; you can redistribute it and/or
2938 - * modify it under the terms of the GNU General Public License as
2939 - * published by the Free Software Foundation; either version 2 of the
2940 - * License, or (at your option) any later version.
2941 - *
2942 - * This library is distributed in the hope that it will be useful,
2943 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2944 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2945 - * GNU General Public License for more details.
2946 - *
2947 - * Or, alternatively,
2948 - *
2949 - * b) Permission is hereby granted, free of charge, to any person
2950 - * obtaining a copy of this software and associated documentation
2951 - * files (the "Software"), to deal in the Software without
2952 - * restriction, including without limitation the rights to use,
2953 - * copy, modify, merge, publish, distribute, sublicense, and/or
2954 - * sell copies of the Software, and to permit persons to whom the
2955 - * Software is furnished to do so, subject to the following
2956 - * conditions:
2957 - *
2958 - * The above copyright notice and this permission notice shall be
2959 - * included in all copies or substantial portions of the Software.
2960 - *
2961 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2962 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2963 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2964 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2965 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2966 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2967 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2968 - * OTHER DEALINGS IN THE SOFTWARE.
2969 */
2970
2971 #include <dt-bindings/thermal/thermal.h>
2972 @@ -54,6 +17,7 @@
2973 #size-cells = <2>;
2974
2975 aliases {
2976 + crypto = &crypto;
2977 fman0 = &fman0;
2978 ethernet0 = &enet0;
2979 ethernet1 = &enet1;
2980 @@ -74,13 +38,14 @@
2981 *
2982 * Currently supported enable-method is psci v0.2
2983 */
2984 - cpu0: cpu@0 {
2985 + cooling_map0: cpu0: cpu@0 {
2986 device_type = "cpu";
2987 compatible = "arm,cortex-a53";
2988 reg = <0x0>;
2989 clocks = <&clockgen 1 0>;
2990 next-level-cache = <&l2>;
2991 #cooling-cells = <2>;
2992 + cpu-idle-states = <&CPU_PH20>;
2993 };
2994
2995 cpu1: cpu@1 {
2996 @@ -89,6 +54,7 @@
2997 reg = <0x1>;
2998 clocks = <&clockgen 1 0>;
2999 next-level-cache = <&l2>;
3000 + cpu-idle-states = <&CPU_PH20>;
3001 };
3002
3003 cpu2: cpu@2 {
3004 @@ -97,6 +63,7 @@
3005 reg = <0x2>;
3006 clocks = <&clockgen 1 0>;
3007 next-level-cache = <&l2>;
3008 + cpu-idle-states = <&CPU_PH20>;
3009 };
3010
3011 cpu3: cpu@3 {
3012 @@ -105,6 +72,7 @@
3013 reg = <0x3>;
3014 clocks = <&clockgen 1 0>;
3015 next-level-cache = <&l2>;
3016 + cpu-idle-states = <&CPU_PH20>;
3017 };
3018
3019 l2: l2-cache {
3020 @@ -112,6 +80,23 @@
3021 };
3022 };
3023
3024 + idle-states {
3025 + /*
3026 + * PSCI node is not added default, U-boot will add missing
3027 + * parts if it determines to use PSCI.
3028 + */
3029 + entry-method = "arm,psci";
3030 +
3031 + CPU_PH20: cpu-ph20 {
3032 + compatible = "arm,idle-state";
3033 + idle-state-name = "PH20";
3034 + arm,psci-suspend-param = <0x0>;
3035 + entry-latency-us = <1000>;
3036 + exit-latency-us = <1000>;
3037 + min-residency-us = <3000>;
3038 + };
3039 + };
3040 +
3041 memory@80000000 {
3042 device_type = "memory";
3043 reg = <0x0 0x80000000 0 0x80000000>;
3044 @@ -196,6 +181,8 @@
3045 #address-cells = <2>;
3046 #size-cells = <2>;
3047 ranges;
3048 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
3049 + dma-coherent;
3050
3051 clockgen: clocking@1ee1000 {
3052 compatible = "fsl,ls1043a-clockgen";
3053 @@ -204,6 +191,49 @@
3054 clocks = <&sysclk>;
3055 };
3056
3057 + smmu: iommu@9000000 {
3058 + compatible = "arm,mmu-500";
3059 + reg = <0 0x9000000 0 0x400000>;
3060 + dma-coherent;
3061 + stream-match-mask = <0x7f00>;
3062 + #global-interrupts = <2>;
3063 + #iommu-cells = <1>;
3064 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3065 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
3066 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3067 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3068 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3069 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3070 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3071 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3072 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3073 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3074 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3075 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3076 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3077 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3078 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3079 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3080 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3081 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3082 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3083 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3084 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3085 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3086 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3087 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3088 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3089 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3090 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3091 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3092 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3093 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3094 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3095 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3096 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3097 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
3098 + };
3099 +
3100 scfg: scfg@1570000 {
3101 compatible = "fsl,ls1043a-scfg", "syscon";
3102 reg = <0x0 0x1570000 0x0 0x10000>;
3103 @@ -256,7 +286,7 @@
3104
3105 dcfg: dcfg@1ee0000 {
3106 compatible = "fsl,ls1043a-dcfg", "syscon";
3107 - reg = <0x0 0x1ee0000 0x0 0x10000>;
3108 + reg = <0x0 0x1ee0000 0x0 0x1000>;
3109 big-endian;
3110 };
3111
3112 @@ -343,36 +373,7 @@
3113 #thermal-sensor-cells = <1>;
3114 };
3115
3116 - thermal-zones {
3117 - cpu_thermal: cpu-thermal {
3118 - polling-delay-passive = <1000>;
3119 - polling-delay = <5000>;
3120 -
3121 - thermal-sensors = <&tmu 3>;
3122 -
3123 - trips {
3124 - cpu_alert: cpu-alert {
3125 - temperature = <85000>;
3126 - hysteresis = <2000>;
3127 - type = "passive";
3128 - };
3129 - cpu_crit: cpu-crit {
3130 - temperature = <95000>;
3131 - hysteresis = <2000>;
3132 - type = "critical";
3133 - };
3134 - };
3135 -
3136 - cooling-maps {
3137 - map0 {
3138 - trip = <&cpu_alert>;
3139 - cooling-device =
3140 - <&cpu0 THERMAL_NO_LIMIT
3141 - THERMAL_NO_LIMIT>;
3142 - };
3143 - };
3144 - };
3145 - };
3146 + #include "fsl-tmu.dtsi"
3147
3148 qman: qman@1880000 {
3149 compatible = "fsl,qman";
3150 @@ -423,7 +424,7 @@
3151 };
3152
3153 i2c0: i2c@2180000 {
3154 - compatible = "fsl,vf610-i2c";
3155 + compatible = "fsl,vf610-i2c", "fsl,ls1043a-vf610-i2c";
3156 #address-cells = <1>;
3157 #size-cells = <0>;
3158 reg = <0x0 0x2180000 0x0 0x10000>;
3159 @@ -433,6 +434,7 @@
3160 dmas = <&edma0 1 39>,
3161 <&edma0 1 38>;
3162 dma-names = "tx", "rx";
3163 + scl-gpios = <&gpio4 12 0>;
3164 status = "disabled";
3165 };
3166
3167 @@ -537,6 +539,72 @@
3168 #interrupt-cells = <2>;
3169 };
3170
3171 + uqe: uqe@2400000 {
3172 + #address-cells = <1>;
3173 + #size-cells = <1>;
3174 + device_type = "qe";
3175 + compatible = "fsl,qe", "simple-bus";
3176 + ranges = <0x0 0x0 0x2400000 0x40000>;
3177 + reg = <0x0 0x2400000 0x0 0x480>;
3178 + brg-frequency = <100000000>;
3179 + bus-frequency = <200000000>;
3180 +
3181 + fsl,qe-num-riscs = <1>;
3182 + fsl,qe-num-snums = <28>;
3183 +
3184 + qeic: qeic@80 {
3185 + compatible = "fsl,qe-ic";
3186 + reg = <0x80 0x80>;
3187 + #address-cells = <0>;
3188 + interrupt-controller;
3189 + #interrupt-cells = <1>;
3190 + interrupts = <0 77 0x04 0 77 0x04>;
3191 + };
3192 +
3193 + si1: si@700 {
3194 + #address-cells = <1>;
3195 + #size-cells = <0>;
3196 + compatible = "fsl,ls1043-qe-si",
3197 + "fsl,t1040-qe-si";
3198 + reg = <0x700 0x80>;
3199 + };
3200 +
3201 + siram1: siram@1000 {
3202 + #address-cells = <1>;
3203 + #size-cells = <1>;
3204 + compatible = "fsl,ls1043-qe-siram",
3205 + "fsl,t1040-qe-siram";
3206 + reg = <0x1000 0x800>;
3207 + };
3208 +
3209 + ucc@2000 {
3210 + cell-index = <1>;
3211 + reg = <0x2000 0x200>;
3212 + interrupts = <32>;
3213 + interrupt-parent = <&qeic>;
3214 + };
3215 +
3216 + ucc@2200 {
3217 + cell-index = <3>;
3218 + reg = <0x2200 0x200>;
3219 + interrupts = <34>;
3220 + interrupt-parent = <&qeic>;
3221 + };
3222 +
3223 + muram@10000 {
3224 + #address-cells = <1>;
3225 + #size-cells = <1>;
3226 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3227 + ranges = <0x0 0x10000 0x6000>;
3228 +
3229 + data-only@0 {
3230 + compatible = "fsl,qe-muram-data",
3231 + "fsl,cpm-muram-data";
3232 + reg = <0x0 0x6000>;
3233 + };
3234 + };
3235 + };
3236 +
3237 lpuart0: serial@2950000 {
3238 compatible = "fsl,ls1021a-lpuart";
3239 reg = <0x0 0x2950000 0x0 0x1000>;
3240 @@ -591,6 +659,16 @@
3241 status = "disabled";
3242 };
3243
3244 + ftm0: ftm0@29d0000 {
3245 + compatible = "fsl,ls1043a-ftm-alarm";
3246 + reg = <0x0 0x29d0000 0x0 0x10000>,
3247 + <0x0 0x1ee2140 0x0 0x4>;
3248 + reg-names = "ftm", "pmctrl";
3249 + interrupts = <0 86 0x4>;
3250 + big-endian;
3251 + status = "okay";
3252 + };
3253 +
3254 wdog0: wdog@2ad0000 {
3255 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3256 reg = <0x0 0x2ad0000 0x0 0x10000>;
3257 @@ -616,41 +694,81 @@
3258 <&clockgen 4 0>;
3259 };
3260
3261 - usb0: usb3@2f00000 {
3262 - compatible = "snps,dwc3";
3263 - reg = <0x0 0x2f00000 0x0 0x10000>;
3264 - interrupts = <0 60 0x4>;
3265 - dr_mode = "host";
3266 - snps,quirk-frame-length-adjustment = <0x20>;
3267 - snps,dis_rxdet_inp3_quirk;
3268 - };
3269 -
3270 - usb1: usb3@3000000 {
3271 - compatible = "snps,dwc3";
3272 - reg = <0x0 0x3000000 0x0 0x10000>;
3273 - interrupts = <0 61 0x4>;
3274 - dr_mode = "host";
3275 - snps,quirk-frame-length-adjustment = <0x20>;
3276 - snps,dis_rxdet_inp3_quirk;
3277 - };
3278 -
3279 - usb2: usb3@3100000 {
3280 - compatible = "snps,dwc3";
3281 - reg = <0x0 0x3100000 0x0 0x10000>;
3282 - interrupts = <0 63 0x4>;
3283 - dr_mode = "host";
3284 - snps,quirk-frame-length-adjustment = <0x20>;
3285 - snps,dis_rxdet_inp3_quirk;
3286 - };
3287 -
3288 - sata: sata@3200000 {
3289 - compatible = "fsl,ls1043a-ahci";
3290 - reg = <0x0 0x3200000 0x0 0x10000>,
3291 - <0x0 0x20140520 0x0 0x4>;
3292 - reg-names = "ahci", "sata-ecc";
3293 - interrupts = <0 69 0x4>;
3294 - clocks = <&clockgen 4 0>;
3295 - dma-coherent;
3296 + aux_bus: aux_bus {
3297 + #address-cells = <2>;
3298 + #size-cells = <2>;
3299 + compatible = "simple-bus";
3300 + ranges;
3301 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
3302 +
3303 + usb0: usb3@2f00000 {
3304 + compatible = "snps,dwc3";
3305 + reg = <0x0 0x2f00000 0x0 0x10000>;
3306 + interrupts = <0 60 0x4>;
3307 + dr_mode = "host";
3308 + snps,quirk-frame-length-adjustment = <0x20>;
3309 + snps,dis_rxdet_inp3_quirk;
3310 + usb3-lpm-capable;
3311 + snps,dis-u1u2-when-u3-quirk;
3312 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3313 + snps,host-vbus-glitches;
3314 + };
3315 +
3316 + usb1: usb3@3000000 {
3317 + compatible = "snps,dwc3";
3318 + reg = <0x0 0x3000000 0x0 0x10000>;
3319 + interrupts = <0 61 0x4>;
3320 + dr_mode = "host";
3321 + snps,quirk-frame-length-adjustment = <0x20>;
3322 + snps,dis_rxdet_inp3_quirk;
3323 + usb3-lpm-capable;
3324 + snps,dis-u1u2-when-u3-quirk;
3325 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3326 + snps,host-vbus-glitches;
3327 + };
3328 +
3329 + usb2: usb3@3100000 {
3330 + compatible = "snps,dwc3";
3331 + reg = <0x0 0x3100000 0x0 0x10000>;
3332 + interrupts = <0 63 0x4>;
3333 + dr_mode = "host";
3334 + snps,quirk-frame-length-adjustment = <0x20>;
3335 + snps,dis_rxdet_inp3_quirk;
3336 + usb3-lpm-capable;
3337 + snps,dis-u1u2-when-u3-quirk;
3338 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3339 + snps,host-vbus-glitches;
3340 + };
3341 +
3342 + sata: sata@3200000 {
3343 + compatible = "fsl,ls1043a-ahci";
3344 + reg = <0x0 0x3200000 0x0 0x10000>,
3345 + <0x0 0x20140520 0x0 0x4>;
3346 + reg-names = "ahci", "sata-ecc";
3347 + interrupts = <0 69 0x4>;
3348 + clocks = <&clockgen 4 0>;
3349 + };
3350 + };
3351 +
3352 + qdma: qdma@8380000 {
3353 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3354 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3355 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3356 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3357 + interrupts = <0 152 0x4>,
3358 + <0 39 0x4>,
3359 + <0 40 0x4>,
3360 + <0 41 0x4>,
3361 + <0 42 0x4>;
3362 + interrupt-names = "qdma-error", "qdma-queue0",
3363 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
3364 + channels = <8>;
3365 + block-number = <1>;
3366 + block-offset = <0x10000>;
3367 + queues = <2>;
3368 + status-sizes = <64>;
3369 + queue-sizes = <64 64>;
3370 + big-endian;
3371 };
3372
3373 msi1: msi-controller1@1571000 {
3374 @@ -679,13 +797,13 @@
3375 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3376 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3377 reg-names = "regs", "config";
3378 - interrupts = <0 118 0x4>, /* controller interrupt */
3379 - <0 117 0x4>; /* PME interrupt */
3380 - interrupt-names = "intr", "pme";
3381 + interrupts = <0 117 0x4>, /* PME interrupt */
3382 + <0 118 0x4>; /* aer interrupt */
3383 + interrupt-names = "pme", "aer";
3384 #address-cells = <3>;
3385 #size-cells = <2>;
3386 device_type = "pci";
3387 - dma-coherent;
3388 + iommu-map = <0 &smmu 0 1>;
3389 num-lanes = <4>;
3390 bus-range = <0x0 0xff>;
3391 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3392 @@ -697,6 +815,7 @@
3393 <0000 0 0 2 &gic 0 111 0x4>,
3394 <0000 0 0 3 &gic 0 112 0x4>,
3395 <0000 0 0 4 &gic 0 113 0x4>;
3396 + status = "disabled";
3397 };
3398
3399 pcie@3500000 {
3400 @@ -704,13 +823,13 @@
3401 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3402 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3403 reg-names = "regs", "config";
3404 - interrupts = <0 128 0x4>,
3405 - <0 127 0x4>;
3406 - interrupt-names = "intr", "pme";
3407 + interrupts = <0 127 0x4>,
3408 + <0 128 0x4>;
3409 + interrupt-names = "pme", "aer";
3410 #address-cells = <3>;
3411 #size-cells = <2>;
3412 device_type = "pci";
3413 - dma-coherent;
3414 + iommu-map = <0 &smmu 0 1>;
3415 num-lanes = <2>;
3416 bus-range = <0x0 0xff>;
3417 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3418 @@ -722,6 +841,7 @@
3419 <0000 0 0 2 &gic 0 121 0x4>,
3420 <0000 0 0 3 &gic 0 122 0x4>,
3421 <0000 0 0 4 &gic 0 123 0x4>;
3422 + status = "disabled";
3423 };
3424
3425 pcie@3600000 {
3426 @@ -729,13 +849,13 @@
3427 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3428 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3429 reg-names = "regs", "config";
3430 - interrupts = <0 162 0x4>,
3431 - <0 161 0x4>;
3432 - interrupt-names = "intr", "pme";
3433 + interrupts = <0 161 0x4>,
3434 + <0 162 0x4>;
3435 + interrupt-names = "pme", "aer";
3436 #address-cells = <3>;
3437 #size-cells = <2>;
3438 device_type = "pci";
3439 - dma-coherent;
3440 + iommu-map = <0 &smmu 0 1>;
3441 num-lanes = <2>;
3442 bus-range = <0x0 0xff>;
3443 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3444 @@ -747,6 +867,14 @@
3445 <0000 0 0 2 &gic 0 155 0x4>,
3446 <0000 0 0 3 &gic 0 156 0x4>,
3447 <0000 0 0 4 &gic 0 157 0x4>;
3448 + status = "disabled";
3449 + };
3450 + };
3451 +
3452 + firmware {
3453 + optee {
3454 + compatible = "linaro,optee-tz";
3455 + method = "smc";
3456 };
3457 };
3458
3459 @@ -754,3 +882,29 @@
3460
3461 #include "qoriq-qman-portals.dtsi"
3462 #include "qoriq-bman-portals.dtsi"
3463 +
3464 +&thermal_zones {
3465 + thermal-zone0 {
3466 + status = "okay";
3467 + };
3468 +
3469 + thermal-zone1 {
3470 + status = "okay";
3471 + };
3472 +
3473 + thermal-zone2 {
3474 + status = "okay";
3475 + };
3476 +
3477 + thermal-zone3 {
3478 + status = "okay";
3479 + };
3480 +
3481 + thermal-zone4 {
3482 + status = "okay";
3483 + };
3484 +
3485 + thermal-zone5 {
3486 + status = "okay";
3487 + };
3488 +};
3489 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3490 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3491 @@ -1,9 +1,9 @@
3492 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3493 /*
3494 * QorIQ FMan v3 device tree nodes for ls1046
3495 *
3496 * Copyright 2015-2016 Freescale Semiconductor Inc.
3497 *
3498 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3499 */
3500
3501 &soc {
3502 --- /dev/null
3503 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
3504 @@ -0,0 +1,268 @@
3505 +/*
3506 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3507 + *
3508 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3509 + *
3510 + * Mingkai Hu <Mingkai.hu@freescale.com>
3511 + *
3512 + * This file is dual-licensed: you can use it either under the terms
3513 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3514 + * licensing only applies to this file, and not this project as a
3515 + * whole.
3516 + *
3517 + * a) This library is free software; you can redistribute it and/or
3518 + * modify it under the terms of the GNU General Public License as
3519 + * published by the Free Software Foundation; either version 2 of the
3520 + * License, or (at your option) any later version.
3521 + *
3522 + * This library is distributed in the hope that it will be useful,
3523 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3524 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3525 + * GNU General Public License for more details.
3526 + *
3527 + * Or, alternatively,
3528 + *
3529 + * b) Permission is hereby granted, free of charge, to any person
3530 + * obtaining a copy of this software and associated documentation
3531 + * files (the "Software"), to deal in the Software without
3532 + * restriction, including without limitation the rights to use,
3533 + * copy, modify, merge, publish, distribute, sublicense, and/or
3534 + * sell copies of the Software, and to permit persons to whom the
3535 + * Software is furnished to do so, subject to the following
3536 + * conditions:
3537 + *
3538 + * The above copyright notice and this permission notice shall be
3539 + * included in all copies or substantial portions of the Software.
3540 + *
3541 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3542 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3543 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3544 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3545 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3546 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3547 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3548 + * OTHER DEALINGS IN THE SOFTWARE.
3549 + */
3550 +
3551 +#include "fsl-ls1046a-qds.dts"
3552 +#include "qoriq-qman-portals-sdk.dtsi"
3553 +#include "qoriq-bman-portals-sdk.dtsi"
3554 +
3555 +&bman_fbpr {
3556 + compatible = "fsl,bman-fbpr";
3557 + alloc-ranges = <0 0 0x10000 0>;
3558 +};
3559 +&qman_fqd {
3560 + compatible = "fsl,qman-fqd";
3561 + alloc-ranges = <0 0 0x10000 0>;
3562 +};
3563 +&qman_pfdr {
3564 + compatible = "fsl,qman-pfdr";
3565 + alloc-ranges = <0 0 0x10000 0>;
3566 +};
3567 +
3568 +&soc {
3569 +/delete-property/ dma-coherent;
3570 +
3571 +#include "qoriq-dpaa-eth.dtsi"
3572 +#include "qoriq-fman3-0-6oh.dtsi"
3573 +
3574 +pcie@3400000 {
3575 + /delete-property/ iommu-map;
3576 +};
3577 +
3578 +pcie@3500000 {
3579 + /delete-property/ iommu-map;
3580 +};
3581 +
3582 +pcie@3600000 {
3583 + /delete-property/ iommu-map;
3584 +};
3585 +
3586 +/delete-node/ iommu@9000000;
3587 +};
3588 +
3589 +&fsldpaa {
3590 + ethernet@9 {
3591 + compatible = "fsl,dpa-ethernet";
3592 + fsl,fman-mac = <&enet7>;
3593 + dma-coherent;
3594 + };
3595 +};
3596 +
3597 +&fman0 {
3598 + compatible = "fsl,fman", "simple-bus";
3599 + dma-coherent;
3600 +};
3601 +
3602 +&clockgen {
3603 + dma-coherent;
3604 +};
3605 +
3606 +&scfg {
3607 + dma-coherent;
3608 +};
3609 +
3610 +&crypto {
3611 + dma-coherent;
3612 +};
3613 +
3614 +&dcfg {
3615 + dma-coherent;
3616 +};
3617 +
3618 +&ifc {
3619 + dma-coherent;
3620 +};
3621 +
3622 +&qspi {
3623 + dma-coherent;
3624 +};
3625 +
3626 +&esdhc {
3627 + dma-coherent;
3628 +};
3629 +
3630 +&ddr {
3631 + dma-coherent;
3632 +};
3633 +
3634 +&tmu {
3635 + dma-coherent;
3636 +};
3637 +
3638 +&qman {
3639 + dma-coherent;
3640 +};
3641 +
3642 +&bman {
3643 + dma-coherent;
3644 +};
3645 +
3646 +&bportals {
3647 + dma-coherent;
3648 +};
3649 +
3650 +&qportals {
3651 + dma-coherent;
3652 +};
3653 +
3654 +&dspi {
3655 + dma-coherent;
3656 +};
3657 +
3658 +&i2c0 {
3659 + dma-coherent;
3660 +};
3661 +
3662 +&i2c1 {
3663 + dma-coherent;
3664 +};
3665 +
3666 +&i2c2 {
3667 + dma-coherent;
3668 +};
3669 +
3670 +&i2c3 {
3671 + dma-coherent;
3672 +};
3673 +
3674 +&duart0 {
3675 + dma-coherent;
3676 +};
3677 +
3678 +&duart1 {
3679 + dma-coherent;
3680 +};
3681 +
3682 +&duart2 {
3683 + dma-coherent;
3684 +};
3685 +
3686 +&duart3 {
3687 + dma-coherent;
3688 +};
3689 +
3690 +&gpio0 {
3691 + dma-coherent;
3692 +};
3693 +
3694 +&gpio1 {
3695 + dma-coherent;
3696 +};
3697 +
3698 +&gpio2 {
3699 + dma-coherent;
3700 +};
3701 +
3702 +&gpio3 {
3703 + dma-coherent;
3704 +};
3705 +
3706 +&lpuart0 {
3707 + dma-coherent;
3708 +};
3709 +
3710 +&lpuart1 {
3711 + dma-coherent;
3712 +};
3713 +
3714 +&lpuart2 {
3715 + dma-coherent;
3716 +};
3717 +
3718 +&lpuart3 {
3719 + dma-coherent;
3720 +};
3721 +
3722 +&lpuart4 {
3723 + dma-coherent;
3724 +};
3725 +
3726 +&lpuart5 {
3727 + dma-coherent;
3728 +};
3729 +
3730 +&ftm0 {
3731 + dma-coherent;
3732 +};
3733 +
3734 +&wdog0 {
3735 + dma-coherent;
3736 +};
3737 +
3738 +&edma0 {
3739 + dma-coherent;
3740 +};
3741 +
3742 +&sata {
3743 + dma-coherent;
3744 +};
3745 +
3746 +&qdma {
3747 + dma-coherent;
3748 +};
3749 +
3750 +&msi1 {
3751 + dma-coherent;
3752 +};
3753 +
3754 +&msi2 {
3755 + dma-coherent;
3756 +};
3757 +
3758 +&msi3 {
3759 + dma-coherent;
3760 +};
3761 +
3762 +&ptp_timer0 {
3763 + dma-coherent;
3764 +};
3765 +
3766 +&serdes1 {
3767 + dma-coherent;
3768 +};
3769 +
3770 +&fsldpaa {
3771 + dma-coherent;
3772 +};
3773 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3774 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3775 @@ -1,47 +1,10 @@
3776 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3777 /*
3778 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3779 *
3780 * Copyright 2016 Freescale Semiconductor, Inc.
3781 *
3782 * Shaohui Xie <Shaohui.Xie@nxp.com>
3783 - *
3784 - * This file is dual-licensed: you can use it either under the terms
3785 - * of the GPLv2 or the X11 license, at your option. Note that this dual
3786 - * licensing only applies to this file, and not this project as a
3787 - * whole.
3788 - *
3789 - * a) This library is free software; you can redistribute it and/or
3790 - * modify it under the terms of the GNU General Public License as
3791 - * published by the Free Software Foundation; either version 2 of the
3792 - * License, or (at your option) any later version.
3793 - *
3794 - * This library is distributed in the hope that it will be useful,
3795 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
3796 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3797 - * GNU General Public License for more details.
3798 - *
3799 - * Or, alternatively,
3800 - *
3801 - * b) Permission is hereby granted, free of charge, to any person
3802 - * obtaining a copy of this software and associated documentation
3803 - * files (the "Software"), to deal in the Software without
3804 - * restriction, including without limitation the rights to use,
3805 - * copy, modify, merge, publish, distribute, sublicense, and/or
3806 - * sell copies of the Software, and to permit persons to whom the
3807 - * Software is furnished to do so, subject to the following
3808 - * conditions:
3809 - *
3810 - * The above copyright notice and this permission notice shall be
3811 - * included in all copies or substantial portions of the Software.
3812 - *
3813 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3814 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3815 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3816 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3817 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3818 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3819 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3820 - * OTHER DEALINGS IN THE SOFTWARE.
3821 */
3822
3823 /dts-v1/;
3824 @@ -61,6 +24,20 @@
3825 serial1 = &duart1;
3826 serial2 = &duart2;
3827 serial3 = &duart3;
3828 +
3829 + emi1_slot1 = &ls1046mdio_s1;
3830 + emi1_slot2 = &ls1046mdio_s2;
3831 + emi1_slot4 = &ls1046mdio_s4;
3832 +
3833 + sgmii_s1_p1 = &sgmii_phy_s1_p1;
3834 + sgmii_s1_p2 = &sgmii_phy_s1_p2;
3835 + sgmii_s1_p3 = &sgmii_phy_s1_p3;
3836 + sgmii_s1_p4 = &sgmii_phy_s1_p4;
3837 + sgmii_s4_p1 = &sgmii_phy_s4_p1;
3838 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
3839 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
3840 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
3841 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
3842 };
3843
3844 chosen {
3845 @@ -188,8 +165,9 @@
3846 };
3847
3848 fpga: board-control@2,0 {
3849 - compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
3850 + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-bus";
3851 reg = <0x2 0x0 0x0000100>;
3852 + ranges = <0 2 0 0x100>;
3853 };
3854 };
3855
3856 @@ -206,9 +184,145 @@
3857 compatible = "spansion,m25p80";
3858 #address-cells = <1>;
3859 #size-cells = <1>;
3860 - spi-max-frequency = <20000000>;
3861 + spi-max-frequency = <50000000>;
3862 reg = <0>;
3863 + spi-rx-bus-width = <4>;
3864 + spi-tx-bus-width = <4>;
3865 };
3866 };
3867
3868 #include "fsl-ls1046-post.dtsi"
3869 +
3870 +&fman0 {
3871 + ethernet@e0000 {
3872 + phy-handle = <&qsgmii_phy_s2_p1>;
3873 + phy-connection-type = "sgmii";
3874 + };
3875 +
3876 + ethernet@e2000 {
3877 + phy-handle = <&sgmii_phy_s4_p1>;
3878 + phy-connection-type = "sgmii";
3879 + };
3880 +
3881 + ethernet@e4000 {
3882 + phy-handle = <&rgmii_phy1>;
3883 + phy-connection-type = "rgmii";
3884 + };
3885 +
3886 + ethernet@e6000 {
3887 + phy-handle = <&rgmii_phy2>;
3888 + phy-connection-type = "rgmii";
3889 + };
3890 +
3891 + ethernet@e8000 {
3892 + phy-handle = <&sgmii_phy_s1_p3>;
3893 + phy-connection-type = "sgmii";
3894 + };
3895 +
3896 + ethernet@ea000 {
3897 + phy-handle = <&sgmii_phy_s1_p4>;
3898 + phy-connection-type = "sgmii";
3899 + };
3900 +
3901 + ethernet@f0000 { /* DTSEC9/10GEC1 */
3902 + phy-handle = <&sgmii_phy_s1_p1>;
3903 + phy-connection-type = "xgmii";
3904 + };
3905 +
3906 + ethernet@f2000 { /* DTSEC10/10GEC2 */
3907 + phy-handle = <&sgmii_phy_s1_p2>;
3908 + phy-connection-type = "xgmii";
3909 + };
3910 +};
3911 +
3912 +&fpga {
3913 + #address-cells = <1>;
3914 + #size-cells = <1>;
3915 + mdio-mux-emi1 {
3916 + compatible = "mdio-mux-mmioreg", "mdio-mux";
3917 + mdio-parent-bus = <&mdio0>;
3918 + #address-cells = <1>;
3919 + #size-cells = <0>;
3920 + reg = <0x54 1>; /* BRDCFG4 */
3921 + mux-mask = <0xe0>; /* EMI1 */
3922 +
3923 + /* On-board RGMII1 PHY */
3924 + ls1046mdio0: mdio@0 {
3925 + reg = <0>;
3926 + #address-cells = <1>;
3927 + #size-cells = <0>;
3928 +
3929 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
3930 + reg = <0x1>;
3931 + };
3932 + };
3933 +
3934 + /* On-board RGMII2 PHY */
3935 + ls1046mdio1: mdio@1 {
3936 + reg = <0x20>;
3937 + #address-cells = <1>;
3938 + #size-cells = <0>;
3939 +
3940 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
3941 + reg = <0x2>;
3942 + };
3943 + };
3944 +
3945 + /* Slot 1 */
3946 + ls1046mdio_s1: mdio@2 {
3947 + reg = <0x40>;
3948 + #address-cells = <1>;
3949 + #size-cells = <0>;
3950 + status = "disabled";
3951 +
3952 + sgmii_phy_s1_p1: ethernet-phy@1c {
3953 + reg = <0x1c>;
3954 + };
3955 +
3956 + sgmii_phy_s1_p2: ethernet-phy@1d {
3957 + reg = <0x1d>;
3958 + };
3959 +
3960 + sgmii_phy_s1_p3: ethernet-phy@1e {
3961 + reg = <0x1e>;
3962 + };
3963 +
3964 + sgmii_phy_s1_p4: ethernet-phy@1f {
3965 + reg = <0x1f>;
3966 + };
3967 + };
3968 +
3969 + /* Slot 2 */
3970 + ls1046mdio_s2: mdio@3 {
3971 + reg = <0x60>;
3972 + #address-cells = <1>;
3973 + #size-cells = <0>;
3974 + status = "disabled";
3975 +
3976 + qsgmii_phy_s2_p1: ethernet-phy@8 {
3977 + reg = <0x8>;
3978 + };
3979 + qsgmii_phy_s2_p2: ethernet-phy@9 {
3980 + reg = <0x9>;
3981 + };
3982 + qsgmii_phy_s2_p3: ethernet-phy@a {
3983 + reg = <0xa>;
3984 + };
3985 + qsgmii_phy_s2_p4: ethernet-phy@b {
3986 + reg = <0xb>;
3987 + };
3988 + };
3989 +
3990 + /* Slot 4 */
3991 + ls1046mdio_s4: mdio@5 {
3992 + reg = <0x80>;
3993 + #address-cells = <1>;
3994 + #size-cells = <0>;
3995 + status = "disabled";
3996 +
3997 + sgmii_phy_s4_p1: ethernet-phy@1c {
3998 + reg = <0x1c>;
3999 + };
4000 + };
4001 + };
4002 +};
4003 --- /dev/null
4004 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
4005 @@ -0,0 +1,307 @@
4006 +/*
4007 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4008 + *
4009 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
4010 + *
4011 + * Mingkai Hu <Mingkai.hu@freescale.com>
4012 + *
4013 + * This file is dual-licensed: you can use it either under the terms
4014 + * of the GPLv2 or the X11 license, at your option. Note that this dual
4015 + * licensing only applies to this file, and not this project as a
4016 + * whole.
4017 + *
4018 + * a) This library is free software; you can redistribute it and/or
4019 + * modify it under the terms of the GNU General Public License as
4020 + * published by the Free Software Foundation; either version 2 of the
4021 + * License, or (at your option) any later version.
4022 + *
4023 + * This library is distributed in the hope that it will be useful,
4024 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4025 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4026 + * GNU General Public License for more details.
4027 + *
4028 + * Or, alternatively,
4029 + *
4030 + * b) Permission is hereby granted, free of charge, to any person
4031 + * obtaining a copy of this software and associated documentation
4032 + * files (the "Software"), to deal in the Software without
4033 + * restriction, including without limitation the rights to use,
4034 + * copy, modify, merge, publish, distribute, sublicense, and/or
4035 + * sell copies of the Software, and to permit persons to whom the
4036 + * Software is furnished to do so, subject to the following
4037 + * conditions:
4038 + *
4039 + * The above copyright notice and this permission notice shall be
4040 + * included in all copies or substantial portions of the Software.
4041 + *
4042 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4043 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4044 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4045 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4046 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4047 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4048 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4049 + * OTHER DEALINGS IN THE SOFTWARE.
4050 + */
4051 +
4052 +#include "fsl-ls1046a-rdb.dts"
4053 +#include "qoriq-qman-portals-sdk.dtsi"
4054 +#include "qoriq-bman-portals-sdk.dtsi"
4055 +
4056 +&bman_fbpr {
4057 + compatible = "fsl,bman-fbpr";
4058 + alloc-ranges = <0 0 0x10000 0>;
4059 +};
4060 +&qman_fqd {
4061 + compatible = "fsl,qman-fqd";
4062 + alloc-ranges = <0 0 0x10000 0>;
4063 +};
4064 +&qman_pfdr {
4065 + compatible = "fsl,qman-pfdr";
4066 + alloc-ranges = <0 0 0x10000 0>;
4067 +};
4068 +
4069 +&soc {
4070 +/delete-property/ dma-coherent;
4071 +
4072 +#include "qoriq-dpaa-eth.dtsi"
4073 +#include "qoriq-fman3-0-6oh.dtsi"
4074 +
4075 +pcie@3400000 {
4076 + /delete-property/ iommu-map;
4077 +};
4078 +
4079 +pcie@3500000 {
4080 + /delete-property/ iommu-map;
4081 +};
4082 +
4083 +pcie@3600000 {
4084 + /delete-property/ iommu-map;
4085 +};
4086 +
4087 +/delete-node/ iommu@9000000;
4088 +};
4089 +
4090 +&fsldpaa {
4091 + ethernet@0 {
4092 + status = "disabled";
4093 + };
4094 + ethernet@1 {
4095 + status = "disabled";
4096 + };
4097 + ethernet@9 {
4098 + compatible = "fsl,dpa-ethernet";
4099 + fsl,fman-mac = <&enet7>;
4100 + dma-coherent;
4101 + };
4102 +};
4103 +
4104 +&fman0 {
4105 + compatible = "fsl,fman", "simple-bus";
4106 +};
4107 +
4108 +&mdio9 {
4109 + pcsphy6: ethernet-phy@0 {
4110 + backplane-mode = "10gbase-kr";
4111 + compatible = "ethernet-phy-ieee802.3-c45";
4112 + reg = <0x0>;
4113 + fsl,lane-handle = <&serdes1>;
4114 + fsl,lane-reg = <0x8C0 0x40>; /* lane D */
4115 + };
4116 +};
4117 +
4118 +&mdio10 {
4119 + pcsphy7: ethernet-phy@0 {
4120 + backplane-mode = "10gbase-kr";
4121 + compatible = "ethernet-phy-ieee802.3-c45";
4122 + reg = <0x0>;
4123 + fsl,lane-handle = <&serdes1>;
4124 + fsl,lane-reg = <0x880 0x40>; /* lane C */
4125 + };
4126 +};
4127 +
4128 +/* Update MAC connections to backplane PHYs
4129 + * &mac9 {
4130 + * phy-handle = <&pcsphy6>;
4131 + *};
4132 + *
4133 + *&mac10 {
4134 + * phy-handle = <&pcsphy7>;
4135 + *};
4136 +*/
4137 +
4138 +&clockgen {
4139 + dma-coherent;
4140 +};
4141 +
4142 +&scfg {
4143 + dma-coherent;
4144 +};
4145 +
4146 +&crypto {
4147 + dma-coherent;
4148 +};
4149 +
4150 +&dcfg {
4151 + dma-coherent;
4152 +};
4153 +
4154 +&ifc {
4155 + dma-coherent;
4156 +};
4157 +
4158 +&qspi {
4159 + dma-coherent;
4160 +};
4161 +
4162 +&esdhc {
4163 + dma-coherent;
4164 +};
4165 +
4166 +&ddr {
4167 + dma-coherent;
4168 +};
4169 +
4170 +&tmu {
4171 + dma-coherent;
4172 +};
4173 +
4174 +&qman {
4175 + dma-coherent;
4176 +};
4177 +
4178 +&bman {
4179 + dma-coherent;
4180 +};
4181 +
4182 +&bportals {
4183 + dma-coherent;
4184 +};
4185 +
4186 +&qportals {
4187 + dma-coherent;
4188 +};
4189 +
4190 +&dspi {
4191 + dma-coherent;
4192 +};
4193 +
4194 +&i2c0 {
4195 + dma-coherent;
4196 +};
4197 +
4198 +&i2c1 {
4199 + dma-coherent;
4200 +};
4201 +
4202 +&i2c2 {
4203 + dma-coherent;
4204 +};
4205 +
4206 +&i2c3 {
4207 + dma-coherent;
4208 +};
4209 +
4210 +&duart0 {
4211 + dma-coherent;
4212 +};
4213 +
4214 +&duart1 {
4215 + dma-coherent;
4216 +};
4217 +
4218 +&duart2 {
4219 + dma-coherent;
4220 +};
4221 +
4222 +&duart3 {
4223 + dma-coherent;
4224 +};
4225 +
4226 +&gpio0 {
4227 + dma-coherent;
4228 +};
4229 +
4230 +&gpio1 {
4231 + dma-coherent;
4232 +};
4233 +
4234 +&gpio2 {
4235 + dma-coherent;
4236 +};
4237 +
4238 +&gpio3 {
4239 + dma-coherent;
4240 +};
4241 +
4242 +&lpuart0 {
4243 + dma-coherent;
4244 +};
4245 +
4246 +&lpuart1 {
4247 + dma-coherent;
4248 +};
4249 +
4250 +&lpuart2 {
4251 + dma-coherent;
4252 +};
4253 +
4254 +&lpuart3 {
4255 + dma-coherent;
4256 +};
4257 +
4258 +&lpuart4 {
4259 + dma-coherent;
4260 +};
4261 +
4262 +&lpuart5 {
4263 + dma-coherent;
4264 +};
4265 +
4266 +&ftm0 {
4267 + dma-coherent;
4268 +};
4269 +
4270 +&wdog0 {
4271 + dma-coherent;
4272 +};
4273 +
4274 +&edma0 {
4275 + dma-coherent;
4276 +};
4277 +
4278 +&sata {
4279 + dma-coherent;
4280 +};
4281 +
4282 +&qdma {
4283 + dma-coherent;
4284 +};
4285 +
4286 +&msi1 {
4287 + dma-coherent;
4288 +};
4289 +
4290 +&msi2 {
4291 + dma-coherent;
4292 +};
4293 +
4294 +&msi3 {
4295 + dma-coherent;
4296 +};
4297 +
4298 +&fman0 {
4299 + dma-coherent;
4300 +};
4301 +
4302 +&ptp_timer0 {
4303 + dma-coherent;
4304 +};
4305 +
4306 +&serdes1 {
4307 + dma-coherent;
4308 +};
4309 +
4310 +&fsldpaa {
4311 + dma-coherent;
4312 +};
4313 --- /dev/null
4314 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
4315 @@ -0,0 +1,133 @@
4316 +/*
4317 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4318 + *
4319 + * Copyright (C) 2016, Freescale Semiconductor
4320 + *
4321 + * This file is licensed under the terms of the GNU General Public
4322 + * License version 2. This program is licensed "as is" without any
4323 + * warranty of any kind, whether express or implied.
4324 + */
4325 +
4326 +#include "fsl-ls1046a-rdb-sdk.dts"
4327 +
4328 +&soc {
4329 + bp7: buffer-pool@7 {
4330 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4331 + fsl,bpid = <7>;
4332 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
4333 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
4334 + dma-coherent;
4335 + };
4336 +
4337 + bp8: buffer-pool@8 {
4338 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4339 + fsl,bpid = <8>;
4340 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
4341 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
4342 + dma-coherent;
4343 + };
4344 +
4345 + bp9: buffer-pool@9 {
4346 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4347 + fsl,bpid = <9>;
4348 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
4349 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
4350 + dma-coherent;
4351 + };
4352 +
4353 + fsl,dpaa {
4354 + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
4355 + dma-coherent;
4356 +
4357 + ethernet@2 {
4358 + compatible = "fsl,dpa-ethernet-init";
4359 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4360 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
4361 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
4362 + };
4363 +
4364 + ethernet@3 {
4365 + compatible = "fsl,dpa-ethernet-init";
4366 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4367 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
4368 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
4369 + };
4370 +
4371 + ethernet@4 {
4372 + compatible = "fsl,dpa-ethernet-init";
4373 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4374 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
4375 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
4376 + };
4377 +
4378 + ethernet@5 {
4379 + compatible = "fsl,dpa-ethernet-init";
4380 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4381 + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
4382 + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
4383 + };
4384 +
4385 + ethernet@8 {
4386 + compatible = "fsl,dpa-ethernet-init";
4387 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4388 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
4389 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
4390 + };
4391 +
4392 + ethernet@9 {
4393 + compatible = "fsl,dpa-ethernet-init";
4394 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4395 + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
4396 + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
4397 + };
4398 +
4399 + dpa-fman0-oh@2 {
4400 + compatible = "fsl,dpa-oh";
4401 + /* Define frame queues for the OH port*/
4402 + /* <OH Rx error, OH Rx default> */
4403 + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
4404 + fsl,fman-oh-port = <&fman0_oh2>;
4405 + };
4406 + };
4407 +
4408 + pcie@3400000 {
4409 + /delete-property/ iommu-map;
4410 + };
4411 +
4412 + pcie@3500000 {
4413 + /delete-property/ iommu-map;
4414 + };
4415 +
4416 + pcie@3600000 {
4417 + /delete-property/ iommu-map;
4418 + };
4419 +
4420 + /delete-node/ iommu@9000000;
4421 +};
4422 +/ {
4423 + reserved-memory {
4424 + #address-cells = <2>;
4425 + #size-cells = <2>;
4426 + ranges;
4427 +
4428 + /* For legacy usdpaa based use-cases, update the size and
4429 + alignment parameters. e.g. to allocate 256 MB memory:
4430 + size = <0 0x10000000>;
4431 + alignment = <0 0x10000000>;
4432 + */
4433 + usdpaa_mem: usdpaa_mem {
4434 + compatible = "fsl,usdpaa-mem";
4435 + alloc-ranges = <0 0 0x10000 0>;
4436 + size = <0 0x1000>;
4437 + alignment = <0 0x1000>;
4438 + };
4439 + };
4440 +};
4441 +
4442 +&fman0 {
4443 + fman0_oh2: port@83000 {
4444 + cell-index = <1>;
4445 + compatible = "fsl,fman-port-oh";
4446 + reg = <0x83000 0x1000>;
4447 + };
4448 +};
4449 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
4450 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
4451 @@ -1,47 +1,10 @@
4452 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4453 /*
4454 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4455 *
4456 * Copyright 2016 Freescale Semiconductor, Inc.
4457 *
4458 * Mingkai Hu <mingkai.hu@nxp.com>
4459 - *
4460 - * This file is dual-licensed: you can use it either under the terms
4461 - * of the GPLv2 or the X11 license, at your option. Note that this dual
4462 - * licensing only applies to this file, and not this project as a
4463 - * whole.
4464 - *
4465 - * a) This library is free software; you can redistribute it and/or
4466 - * modify it under the terms of the GNU General Public License as
4467 - * published by the Free Software Foundation; either version 2 of the
4468 - * License, or (at your option) any later version.
4469 - *
4470 - * This library is distributed in the hope that it will be useful,
4471 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
4472 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4473 - * GNU General Public License for more details.
4474 - *
4475 - * Or, alternatively,
4476 - *
4477 - * b) Permission is hereby granted, free of charge, to any person
4478 - * obtaining a copy of this software and associated documentation
4479 - * files (the "Software"), to deal in the Software without
4480 - * restriction, including without limitation the rights to use,
4481 - * copy, modify, merge, publish, distribute, sublicense, and/or
4482 - * sell copies of the Software, and to permit persons to whom the
4483 - * Software is furnished to do so, subject to the following
4484 - * conditions:
4485 - *
4486 - * The above copyright notice and this permission notice shall be
4487 - * included in all copies or substantial portions of the Software.
4488 - *
4489 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4490 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4491 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4492 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4493 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4494 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4495 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4496 - * OTHER DEALINGS IN THE SOFTWARE.
4497 */
4498
4499 /dts-v1/;
4500 @@ -139,21 +102,26 @@
4501 num-cs = <2>;
4502 bus-num = <0>;
4503 status = "okay";
4504 + fsl,qspi-has-second-chip;
4505
4506 qflash0: s25fs512s@0 {
4507 compatible = "spansion,m25p80";
4508 #address-cells = <1>;
4509 #size-cells = <1>;
4510 - spi-max-frequency = <20000000>;
4511 + spi-max-frequency = <50000000>;
4512 reg = <0>;
4513 + spi-rx-bus-width = <4>;
4514 + spi-tx-bus-width = <4>;
4515 };
4516
4517 qflash1: s25fs512s@1 {
4518 compatible = "spansion,m25p80";
4519 #address-cells = <1>;
4520 #size-cells = <1>;
4521 - spi-max-frequency = <20000000>;
4522 + spi-max-frequency = <50000000>;
4523 reg = <1>;
4524 + spi-rx-bus-width = <4>;
4525 + spi-tx-bus-width = <4>;
4526 };
4527 };
4528
4529 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4530 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4531 @@ -1,47 +1,10 @@
4532 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4533 /*
4534 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4535 *
4536 * Copyright 2016 Freescale Semiconductor, Inc.
4537 *
4538 * Mingkai Hu <mingkai.hu@nxp.com>
4539 - *
4540 - * This file is dual-licensed: you can use it either under the terms
4541 - * of the GPLv2 or the X11 license, at your option. Note that this dual
4542 - * licensing only applies to this file, and not this project as a
4543 - * whole.
4544 - *
4545 - * a) This library is free software; you can redistribute it and/or
4546 - * modify it under the terms of the GNU General Public License as
4547 - * published by the Free Software Foundation; either version 2 of the
4548 - * License, or (at your option) any later version.
4549 - *
4550 - * This library is distributed in the hope that it will be useful,
4551 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
4552 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4553 - * GNU General Public License for more details.
4554 - *
4555 - * Or, alternatively,
4556 - *
4557 - * b) Permission is hereby granted, free of charge, to any person
4558 - * obtaining a copy of this software and associated documentation
4559 - * files (the "Software"), to deal in the Software without
4560 - * restriction, including without limitation the rights to use,
4561 - * copy, modify, merge, publish, distribute, sublicense, and/or
4562 - * sell copies of the Software, and to permit persons to whom the
4563 - * Software is furnished to do so, subject to the following
4564 - * conditions:
4565 - *
4566 - * The above copyright notice and this permission notice shall be
4567 - * included in all copies or substantial portions of the Software.
4568 - *
4569 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4570 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4571 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4572 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4573 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4574 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4575 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4576 - * OTHER DEALINGS IN THE SOFTWARE.
4577 */
4578
4579 #include <dt-bindings/interrupt-controller/arm-gic.h>
4580 @@ -70,7 +33,7 @@
4581 #address-cells = <1>;
4582 #size-cells = <0>;
4583
4584 - cpu0: cpu@0 {
4585 + cooling_map0: cpu0: cpu@0 {
4586 device_type = "cpu";
4587 compatible = "arm,cortex-a72";
4588 reg = <0x0>;
4589 @@ -122,7 +85,7 @@
4590 CPU_PH20: cpu-ph20 {
4591 compatible = "arm,idle-state";
4592 idle-state-name = "PH20";
4593 - arm,psci-suspend-param = <0x00010000>;
4594 + arm,psci-suspend-param = <0x0>;
4595 entry-latency-us = <1000>;
4596 exit-latency-us = <1000>;
4597 min-residency-us = <3000>;
4598 @@ -188,6 +151,8 @@
4599 #address-cells = <2>;
4600 #size-cells = <2>;
4601 ranges;
4602 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
4603 + dma-coherent;
4604
4605 ddr: memory-controller@1080000 {
4606 compatible = "fsl,qoriq-memory-controller";
4607 @@ -214,7 +179,6 @@
4608 clock-names = "qspi_en", "qspi";
4609 clocks = <&clockgen 4 1>, <&clockgen 4 1>;
4610 big-endian;
4611 - fsl,qspi-has-second-chip;
4612 status = "disabled";
4613 };
4614
4615 @@ -229,6 +193,49 @@
4616 bus-width = <4>;
4617 };
4618
4619 + smmu: iommu@9000000 {
4620 + compatible = "arm,mmu-500";
4621 + reg = <0 0x9000000 0 0x400000>;
4622 + dma-coherent;
4623 + stream-match-mask = <0x7f00>;
4624 + #global-interrupts = <2>;
4625 + #iommu-cells = <1>;
4626 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4627 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
4628 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4629 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4630 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4631 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4632 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4633 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4634 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4635 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4636 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4637 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4638 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4639 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4640 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4641 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4642 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4643 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4644 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4645 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4646 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4647 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4648 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4649 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4650 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4651 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4652 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4653 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4654 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4655 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4656 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4657 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4658 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4659 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
4660 + };
4661 +
4662 scfg: scfg@1570000 {
4663 compatible = "fsl,ls1046a-scfg", "syscon";
4664 reg = <0x0 0x1570000 0x0 0x10000>;
4665 @@ -363,36 +370,7 @@
4666 #thermal-sensor-cells = <1>;
4667 };
4668
4669 - thermal-zones {
4670 - cpu_thermal: cpu-thermal {
4671 - polling-delay-passive = <1000>;
4672 - polling-delay = <5000>;
4673 - thermal-sensors = <&tmu 3>;
4674 -
4675 - trips {
4676 - cpu_alert: cpu-alert {
4677 - temperature = <85000>;
4678 - hysteresis = <2000>;
4679 - type = "passive";
4680 - };
4681 -
4682 - cpu_crit: cpu-crit {
4683 - temperature = <95000>;
4684 - hysteresis = <2000>;
4685 - type = "critical";
4686 - };
4687 - };
4688 -
4689 - cooling-maps {
4690 - map0 {
4691 - trip = <&cpu_alert>;
4692 - cooling-device =
4693 - <&cpu0 THERMAL_NO_LIMIT
4694 - THERMAL_NO_LIMIT>;
4695 - };
4696 - };
4697 - };
4698 - };
4699 + #include "fsl-tmu.dtsi"
4700
4701 dspi: dspi@2100000 {
4702 compatible = "fsl,ls1021a-v1.0-dspi";
4703 @@ -408,7 +386,7 @@
4704 };
4705
4706 i2c0: i2c@2180000 {
4707 - compatible = "fsl,vf610-i2c";
4708 + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c";
4709 #address-cells = <1>;
4710 #size-cells = <0>;
4711 reg = <0x0 0x2180000 0x0 0x10000>;
4712 @@ -417,6 +395,7 @@
4713 dmas = <&edma0 1 39>,
4714 <&edma0 1 38>;
4715 dma-names = "tx", "rx";
4716 + scl-gpios = <&gpio3 12 0>;
4717 status = "disabled";
4718 };
4719
4720 @@ -441,12 +420,13 @@
4721 };
4722
4723 i2c3: i2c@21b0000 {
4724 - compatible = "fsl,vf610-i2c";
4725 + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c";
4726 #address-cells = <1>;
4727 #size-cells = <0>;
4728 reg = <0x0 0x21b0000 0x0 0x10000>;
4729 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
4730 clocks = <&clockgen 4 1>;
4731 + scl-gpios = <&gpio3 12 0>;
4732 status = "disabled";
4733 };
4734
4735 @@ -572,6 +552,15 @@
4736 status = "disabled";
4737 };
4738
4739 + ftm0: ftm0@29d0000 {
4740 + compatible = "fsl,ls1046a-ftm-alarm";
4741 + reg = <0x0 0x29d0000 0x0 0x10000>,
4742 + <0x0 0x1ee2140 0x0 0x4>;
4743 + reg-names = "ftm", "pmctrl";
4744 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
4745 + big-endian;
4746 + };
4747 +
4748 wdog0: watchdog@2ad0000 {
4749 compatible = "fsl,imx21-wdt";
4750 reg = <0x0 0x2ad0000 0x0 0x10000>;
4751 @@ -596,40 +585,81 @@
4752 <&clockgen 4 1>;
4753 };
4754
4755 - usb0: usb@2f00000 {
4756 - compatible = "snps,dwc3";
4757 - reg = <0x0 0x2f00000 0x0 0x10000>;
4758 - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4759 - dr_mode = "host";
4760 - snps,quirk-frame-length-adjustment = <0x20>;
4761 - snps,dis_rxdet_inp3_quirk;
4762 - };
4763 -
4764 - usb1: usb@3000000 {
4765 - compatible = "snps,dwc3";
4766 - reg = <0x0 0x3000000 0x0 0x10000>;
4767 - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4768 - dr_mode = "host";
4769 - snps,quirk-frame-length-adjustment = <0x20>;
4770 - snps,dis_rxdet_inp3_quirk;
4771 - };
4772 -
4773 - usb2: usb@3100000 {
4774 - compatible = "snps,dwc3";
4775 - reg = <0x0 0x3100000 0x0 0x10000>;
4776 - interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4777 - dr_mode = "host";
4778 - snps,quirk-frame-length-adjustment = <0x20>;
4779 - snps,dis_rxdet_inp3_quirk;
4780 - };
4781 -
4782 - sata: sata@3200000 {
4783 - compatible = "fsl,ls1046a-ahci";
4784 - reg = <0x0 0x3200000 0x0 0x10000>,
4785 - <0x0 0x20140520 0x0 0x4>;
4786 - reg-names = "ahci", "sata-ecc";
4787 - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4788 - clocks = <&clockgen 4 1>;
4789 + aux_bus: aux_bus {
4790 + #address-cells = <2>;
4791 + #size-cells = <2>;
4792 + compatible = "simple-bus";
4793 + ranges;
4794 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
4795 +
4796 + usb0: usb@2f00000 {
4797 + compatible = "snps,dwc3";
4798 + reg = <0x0 0x2f00000 0x0 0x10000>;
4799 + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4800 + dr_mode = "host";
4801 + snps,quirk-frame-length-adjustment = <0x20>;
4802 + snps,dis_rxdet_inp3_quirk;
4803 + usb3-lpm-capable;
4804 + snps,dis-u1u2-when-u3-quirk;
4805 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4806 + snps,host-vbus-glitches;
4807 + };
4808 +
4809 + usb1: usb@3000000 {
4810 + compatible = "snps,dwc3";
4811 + reg = <0x0 0x3000000 0x0 0x10000>;
4812 + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4813 + dr_mode = "host";
4814 + snps,quirk-frame-length-adjustment = <0x20>;
4815 + snps,dis_rxdet_inp3_quirk;
4816 + usb3-lpm-capable;
4817 + snps,dis-u1u2-when-u3-quirk;
4818 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4819 + snps,host-vbus-glitches;
4820 + };
4821 +
4822 + usb2: usb@3100000 {
4823 + compatible = "snps,dwc3";
4824 + reg = <0x0 0x3100000 0x0 0x10000>;
4825 + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4826 + dr_mode = "host";
4827 + snps,quirk-frame-length-adjustment = <0x20>;
4828 + snps,dis_rxdet_inp3_quirk;
4829 + usb3-lpm-capable;
4830 + snps,dis-u1u2-when-u3-quirk;
4831 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4832 + snps,host-vbus-glitches;
4833 + };
4834 +
4835 + sata: sata@3200000 {
4836 + compatible = "fsl,ls1046a-ahci";
4837 + reg = <0x0 0x3200000 0x0 0x10000>,
4838 + <0x0 0x20140520 0x0 0x4>;
4839 + reg-names = "ahci", "sata-ecc";
4840 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4841 + clocks = <&clockgen 4 1>;
4842 + };
4843 + };
4844 +
4845 + qdma: qdma@8380000 {
4846 + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
4847 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
4848 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
4849 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
4850 + interrupts = <0 153 0x4>,
4851 + <0 39 0x4>,
4852 + <0 40 0x4>,
4853 + <0 41 0x4>,
4854 + <0 42 0x4>;
4855 + interrupt-names = "qdma-error", "qdma-queue0",
4856 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
4857 + channels = <8>;
4858 + block-number = <1>;
4859 + block-offset = <0x10000>;
4860 + queues = <2>;
4861 + status-sizes = <64>;
4862 + queue-sizes = <64 64>;
4863 + big-endian;
4864 };
4865
4866 msi1: msi-controller@1580000 {
4867 @@ -662,6 +692,125 @@
4868 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
4869 };
4870
4871 + pcie@3400000 {
4872 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4873 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
4874 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
4875 + reg-names = "regs", "config";
4876 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
4877 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
4878 + interrupt-names = "pme", "aer";
4879 + #address-cells = <3>;
4880 + #size-cells = <2>;
4881 + device_type = "pci";
4882 + dma-coherent;
4883 + iommu-map = <0 &smmu 0 1>;
4884 + num-lanes = <4>;
4885 + bus-range = <0x0 0xff>;
4886 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
4887 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4888 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4889 + #interrupt-cells = <1>;
4890 + interrupt-map-mask = <0 0 0 7>;
4891 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4892 + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4893 + <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4894 + <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
4895 + status = "disabled";
4896 + };
4897 +
4898 + pcie_ep@3400000 {
4899 + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
4900 + reg = <0x00 0x03400000 0x0 0x00100000
4901 + 0x40 0x00000000 0x8 0x00000000>;
4902 + reg-names = "regs", "addr_space";
4903 + num-ib-windows = <6>;
4904 + num-ob-windows = <8>;
4905 + num-lanes = <2>;
4906 + status = "disabled";
4907 + };
4908 +
4909 + pcie@3500000 {
4910 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4911 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
4912 + 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
4913 + reg-names = "regs", "config";
4914 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
4915 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
4916 + interrupt-names = "pme", "aer";
4917 + #address-cells = <3>;
4918 + #size-cells = <2>;
4919 + device_type = "pci";
4920 + dma-coherent;
4921 + iommu-map = <0 &smmu 0 1>;
4922 + num-lanes = <2>;
4923 + bus-range = <0x0 0xff>;
4924 + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
4925 + 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4926 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4927 + #interrupt-cells = <1>;
4928 + interrupt-map-mask = <0 0 0 7>;
4929 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4930 + <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4931 + <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4932 + <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
4933 + status = "disabled";
4934 + };
4935 +
4936 + pcie_ep@3500000 {
4937 + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
4938 + reg = <0x00 0x03500000 0x0 0x00100000
4939 + 0x48 0x00000000 0x8 0x00000000>;
4940 + reg-names = "regs", "addr_space";
4941 + num-ib-windows = <6>;
4942 + num-ob-windows = <8>;
4943 + num-lanes = <2>;
4944 + status = "disabled";
4945 + };
4946 +
4947 + pcie@3600000 {
4948 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4949 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
4950 + 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
4951 + reg-names = "regs", "config";
4952 + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
4953 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
4954 + interrupt-names = "pme", "aer";
4955 + #address-cells = <3>;
4956 + #size-cells = <2>;
4957 + device_type = "pci";
4958 + dma-coherent;
4959 + iommu-map = <0 &smmu 0 1>;
4960 + num-lanes = <2>;
4961 + bus-range = <0x0 0xff>;
4962 + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
4963 + 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4964 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4965 + #interrupt-cells = <1>;
4966 + interrupt-map-mask = <0 0 0 7>;
4967 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4968 + <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4969 + <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4970 + <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
4971 + status = "disabled";
4972 + };
4973 +
4974 + pcie_ep@3600000 {
4975 + compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
4976 + reg = <0x00 0x03600000 0x0 0x00100000
4977 + 0x50 0x00000000 0x8 0x00000000>;
4978 + reg-names = "regs", "addr_space";
4979 + num-ib-windows = <6>;
4980 + num-ob-windows = <8>;
4981 + num-lanes = <2>;
4982 + status = "disabled";
4983 + };
4984 +
4985 + serdes1: serdes@1ea0000 {
4986 + reg = <0x0 0x1ea0000 0 0x00002000>;
4987 + compatible = "fsl,serdes-10g";
4988 + };
4989 +
4990 };
4991
4992 reserved-memory {
4993 @@ -690,7 +839,36 @@
4994 no-map;
4995 };
4996 };
4997 +
4998 + firmware {
4999 + optee {
5000 + compatible = "linaro,optee-tz";
5001 + method = "smc";
5002 + };
5003 + };
5004 };
5005
5006 #include "qoriq-qman-portals.dtsi"
5007 #include "qoriq-bman-portals.dtsi"
5008 +
5009 +&thermal_zones {
5010 + thermal-zone0 {
5011 + status = "okay";
5012 + };
5013 +
5014 + thermal-zone1 {
5015 + status = "okay";
5016 + };
5017 +
5018 + thermal-zone2 {
5019 + status = "okay";
5020 + };
5021 +
5022 + thermal-zone3 {
5023 + status = "okay";
5024 + };
5025 +
5026 + thermal-zone4 {
5027 + status = "okay";
5028 + };
5029 +};
5030 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5031 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5032 @@ -1,3 +1,4 @@
5033 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5034 /*
5035 * Device Tree file for NXP LS1088A QDS Board.
5036 *
5037 @@ -5,43 +6,6 @@
5038 *
5039 * Harninder Rai <harninder.rai@nxp.com>
5040 *
5041 - * This file is dual-licensed: you can use it either under the terms
5042 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5043 - * licensing only applies to this file, and not this project as a
5044 - * whole.
5045 - *
5046 - * a) This library is free software; you can redistribute it and/or
5047 - * modify it under the terms of the GNU General Public License as
5048 - * published by the Free Software Foundation; either version 2 of the
5049 - * License, or (at your option) any later version.
5050 - *
5051 - * This library is distributed in the hope that it will be useful,
5052 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5053 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5054 - * GNU General Public License for more details.
5055 - *
5056 - * Or, alternatively,
5057 - *
5058 - * b) Permission is hereby granted, free of charge, to any person
5059 - * obtaining a copy of this software and associated documentation
5060 - * files (the "Software"), to deal in the Software without
5061 - * restriction, including without limitation the rights to use,
5062 - * copy, modify, merge, publish, distribute, sublicense, and/or
5063 - * sell copies of the Software, and to permit persons to whom the
5064 - * Software is furnished to do so, subject to the following
5065 - * conditions:
5066 - *
5067 - * The above copyright notice and this permission notice shall be
5068 - * included in all copies or substantial portions of the Software.
5069 - *
5070 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5071 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5072 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5073 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5074 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5075 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5076 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5077 - * OTHER DEALINGS IN THE SOFTWARE.
5078 */
5079
5080 /dts-v1/;
5081 @@ -134,6 +98,30 @@
5082 };
5083 };
5084
5085 +&qspi {
5086 + status = "okay";
5087 + fsl,qspi-has-second-chip;
5088 + qflash0: s25fs512s@0 {
5089 + compatible = "spansion,m25p80";
5090 + #address-cells = <1>;
5091 + #size-cells = <1>;
5092 + spi-max-frequency = <20000000>;
5093 + reg = <0>;
5094 + spi-rx-bus-width = <4>;
5095 + spi-tx-bus-width = <4>;
5096 + };
5097 +
5098 + qflash1: s25fs512s@1 {
5099 + compatible = "spansion,m25p80";
5100 + #address-cells = <1>;
5101 + #size-cells = <1>;
5102 + spi-max-frequency = <20000000>;
5103 + reg = <1>;
5104 + spi-rx-bus-width = <4>;
5105 + spi-tx-bus-width = <4>;
5106 + };
5107 +};
5108 +
5109 &duart0 {
5110 status = "okay";
5111 };
5112 @@ -149,3 +137,29 @@
5113 &sata {
5114 status = "okay";
5115 };
5116 +
5117 +&pcs_mdio1 {
5118 + pcs_phy1: ethernet-phy@0 {
5119 + backplane-mode = "10gbase-kr";
5120 + compatible = "ethernet-phy-ieee802.3-c45";
5121 + reg = <0x0>;
5122 + fsl,lane-handle = <&serdes1>;
5123 + fsl,lane-reg = <0x840 0x40>;/* lane B */
5124 + };
5125 +};
5126 +
5127 +&pcs_mdio2 {
5128 + pcs_phy2: ethernet-phy@0 {
5129 + backplane-mode = "10gbase-kr";
5130 + compatible = "ethernet-phy-ieee802.3-c45";
5131 + reg = <0x0>;
5132 + fsl,lane-handle = <&serdes1>;
5133 + fsl,lane-reg = <0x800 0x40>;/* lane A */
5134 + };
5135 +};
5136 +
5137 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
5138 + * &dpmac1 {
5139 + * phy-handle = <&pcs_phy1>;
5140 + * };
5141 + */
5142 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5143 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5144 @@ -1,3 +1,4 @@
5145 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5146 /*
5147 * Device Tree file for NXP LS1088A RDB Board.
5148 *
5149 @@ -5,43 +6,6 @@
5150 *
5151 * Harninder Rai <harninder.rai@nxp.com>
5152 *
5153 - * This file is dual-licensed: you can use it either under the terms
5154 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5155 - * licensing only applies to this file, and not this project as a
5156 - * whole.
5157 - *
5158 - * a) This library is free software; you can redistribute it and/or
5159 - * modify it under the terms of the GNU General Public License as
5160 - * published by the Free Software Foundation; either version 2 of the
5161 - * License, or (at your option) any later version.
5162 - *
5163 - * This library is distributed in the hope that it will be useful,
5164 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5165 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5166 - * GNU General Public License for more details.
5167 - *
5168 - * Or, alternatively,
5169 - *
5170 - * b) Permission is hereby granted, free of charge, to any person
5171 - * obtaining a copy of this software and associated documentation
5172 - * files (the "Software"), to deal in the Software without
5173 - * restriction, including without limitation the rights to use,
5174 - * copy, modify, merge, publish, distribute, sublicense, and/or
5175 - * sell copies of the Software, and to permit persons to whom the
5176 - * Software is furnished to do so, subject to the following
5177 - * conditions:
5178 - *
5179 - * The above copyright notice and this permission notice shall be
5180 - * included in all copies or substantial portions of the Software.
5181 - *
5182 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5183 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5184 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5185 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5186 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5187 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5188 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5189 - * OTHER DEALINGS IN THE SOFTWARE.
5190 */
5191
5192 /dts-v1/;
5193 @@ -110,6 +74,31 @@
5194 };
5195 };
5196
5197 +&qspi {
5198 + status = "okay";
5199 + fsl,qspi-has-second-chip;
5200 + qflash0: s25fs512s@0 {
5201 + compatible = "spansion,m25p80";
5202 + #address-cells = <1>;
5203 + #size-cells = <1>;
5204 + spi-max-frequency = <20000000>;
5205 + reg = <0>;
5206 + spi-rx-bus-width = <4>;
5207 + spi-tx-bus-width = <4>;
5208 + };
5209 +
5210 + qflash1: s25fs512s@1 {
5211 + compatible = "spansion,m25p80";
5212 + #address-cells = <1>;
5213 + #size-cells = <1>;
5214 + spi-max-frequency = <20000000>;
5215 + reg = <1>;
5216 + spi-rx-bus-width = <4>;
5217 + spi-tx-bus-width = <4>;
5218 + };
5219 +
5220 +};
5221 +
5222 &duart0 {
5223 status = "okay";
5224 };
5225 @@ -118,6 +107,14 @@
5226 status = "okay";
5227 };
5228
5229 +&usb0 {
5230 + status = "okay";
5231 +};
5232 +
5233 +&usb1 {
5234 + status = "okay";
5235 +};
5236 +
5237 &esdhc {
5238 status = "okay";
5239 };
5240 @@ -125,3 +122,82 @@
5241 &sata {
5242 status = "okay";
5243 };
5244 +
5245 +&emdio1 {
5246 + /* Freescale F104 PHY1 */
5247 + mdio1_phy1: emdio1_phy@1 {
5248 + reg = <0x1c>;
5249 + phy-connection-type = "qsgmii";
5250 + };
5251 + mdio1_phy2: emdio1_phy@2 {
5252 + reg = <0x1d>;
5253 + phy-connection-type = "qsgmii";
5254 + };
5255 + mdio1_phy3: emdio1_phy@3 {
5256 + reg = <0x1e>;
5257 + phy-connection-type = "qsgmii";
5258 + };
5259 + mdio1_phy4: emdio1_phy@4 {
5260 + reg = <0x1f>;
5261 + phy-connection-type = "qsgmii";
5262 + };
5263 + /* F104 PHY2 */
5264 + mdio1_phy5: emdio1_phy@5 {
5265 + reg = <0x0c>;
5266 + phy-connection-type = "qsgmii";
5267 + };
5268 + mdio1_phy6: emdio1_phy@6 {
5269 + reg = <0x0d>;
5270 + phy-connection-type = "qsgmii";
5271 + };
5272 + mdio1_phy7: emdio1_phy@7 {
5273 + reg = <0x0e>;
5274 + phy-connection-type = "qsgmii";
5275 + };
5276 + mdio1_phy8: emdio1_phy@8 {
5277 + reg = <0x0f>;
5278 + phy-connection-type = "qsgmii";
5279 + };
5280 +};
5281 +
5282 +&emdio2 {
5283 + /* Aquantia AQR105 10G PHY */
5284 + mdio2_phy1: emdio2_phy@1 {
5285 + compatible = "ethernet-phy-ieee802.3-c45";
5286 + interrupts = <0 2 0x4>;
5287 + reg = <0x0>;
5288 + phy-connection-type = "xfi";
5289 + };
5290 +};
5291 +
5292 +/* DPMAC connections to external PHYs
5293 + * based on LS1088A RM RevC - $24.1.2 SerDes Options
5294 + */
5295 +/* DPMAC1 is 10G SFP+, fixed link */
5296 +&dpmac2 {
5297 + phy-handle = <&mdio2_phy1>;
5298 +};
5299 +&dpmac3 {
5300 + phy-handle = <&mdio1_phy5>;
5301 +};
5302 +&dpmac4 {
5303 + phy-handle = <&mdio1_phy6>;
5304 +};
5305 +&dpmac5 {
5306 + phy-handle = <&mdio1_phy7>;
5307 +};
5308 +&dpmac6 {
5309 + phy-handle = <&mdio1_phy8>;
5310 +};
5311 +&dpmac7 {
5312 + phy-handle = <&mdio1_phy1>;
5313 +};
5314 +&dpmac8 {
5315 + phy-handle = <&mdio1_phy2>;
5316 +};
5317 +&dpmac9 {
5318 + phy-handle = <&mdio1_phy3>;
5319 +};
5320 +&dpmac10 {
5321 + phy-handle = <&mdio1_phy4>;
5322 +};
5323 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5324 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5325 @@ -1,3 +1,4 @@
5326 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5327 /*
5328 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5329 *
5330 @@ -5,43 +6,6 @@
5331 *
5332 * Harninder Rai <harninder.rai@nxp.com>
5333 *
5334 - * This file is dual-licensed: you can use it either under the terms
5335 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5336 - * licensing only applies to this file, and not this project as a
5337 - * whole.
5338 - *
5339 - * a) This library is free software; you can redistribute it and/or
5340 - * modify it under the terms of the GNU General Public License as
5341 - * published by the Free Software Foundation; either version 2 of the
5342 - * License, or (at your option) any later version.
5343 - *
5344 - * This library is distributed in the hope that it will be useful,
5345 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5346 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5347 - * GNU General Public License for more details.
5348 - *
5349 - * Or, alternatively,
5350 - *
5351 - * b) Permission is hereby granted, free of charge, to any person
5352 - * obtaining a copy of this software and associated documentation
5353 - * files (the "Software"), to deal in the Software without
5354 - * restriction, including without limitation the rights to use,
5355 - * copy, modify, merge, publish, distribute, sublicense, and/or
5356 - * sell copies of the Software, and to permit persons to whom the
5357 - * Software is furnished to do so, subject to the following
5358 - * conditions:
5359 - *
5360 - * The above copyright notice and this permission notice shall be
5361 - * included in all copies or substantial portions of the Software.
5362 - *
5363 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5364 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5365 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5366 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5367 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5368 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5369 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5370 - * OTHER DEALINGS IN THE SOFTWARE.
5371 */
5372 #include <dt-bindings/interrupt-controller/arm-gic.h>
5373 #include <dt-bindings/thermal/thermal.h>
5374 @@ -61,7 +25,7 @@
5375 #size-cells = <0>;
5376
5377 /* We have 2 clusters having 4 Cortex-A53 cores each */
5378 - cpu0: cpu@0 {
5379 + cooling_map0: cpu0: cpu@0 {
5380 device_type = "cpu";
5381 compatible = "arm,cortex-a53";
5382 reg = <0x0>;
5383 @@ -94,7 +58,7 @@
5384 cpu-idle-states = <&CPU_PH20>;
5385 };
5386
5387 - cpu4: cpu@100 {
5388 + cooling_map1: cpu4: cpu@100 {
5389 device_type = "cpu";
5390 compatible = "arm,cortex-a53";
5391 reg = <0x100>;
5392 @@ -130,7 +94,7 @@
5393 CPU_PH20: cpu-ph20 {
5394 compatible = "arm,idle-state";
5395 idle-state-name = "PH20";
5396 - arm,psci-suspend-param = <0x00010000>;
5397 + arm,psci-suspend-param = <0x0>;
5398 entry-latency-us = <1000>;
5399 exit-latency-us = <1000>;
5400 min-residency-us = <3000>;
5401 @@ -147,6 +111,15 @@
5402 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
5403 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
5404 interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>;
5405 + #address-cells = <2>;
5406 + #size-cells = <2>;
5407 + ranges;
5408 +
5409 + its: gic-its@6020000 {
5410 + compatible = "arm,gic-v3-its";
5411 + msi-controller;
5412 + reg = <0x0 0x6020000 0 0x20000>;
5413 + };
5414 };
5415
5416 timer {
5417 @@ -169,11 +142,31 @@
5418 clock-output-names = "sysclk";
5419 };
5420
5421 + dcfg: dcfg@1e00000 {
5422 + compatible = "fsl,ls1088a-dcfg", "syscon";
5423 + reg = <0x0 0x1e00000 0x0 0x10000>;
5424 + little-endian;
5425 + };
5426 +
5427 + rstcr: syscon@1e60000 {
5428 + compatible = "fsl,ls1088a-rstcr", "syscon";
5429 + reg = <0x0 0x1e60000 0x0 0x4>;
5430 + };
5431 +
5432 + reboot {
5433 + compatible = "syscon-reboot";
5434 + regmap = <&rstcr>;
5435 + offset = <0x0>;
5436 + mask = <0x02>;
5437 + };
5438 +
5439 +
5440 soc {
5441 compatible = "simple-bus";
5442 #address-cells = <2>;
5443 #size-cells = <2>;
5444 ranges;
5445 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
5446
5447 clockgen: clocking@1300000 {
5448 compatible = "fsl,ls1088a-clockgen";
5449 @@ -229,43 +222,7 @@
5450 #thermal-sensor-cells = <1>;
5451 };
5452
5453 - thermal-zones {
5454 - cpu_thermal: cpu-thermal {
5455 - polling-delay-passive = <1000>;
5456 - polling-delay = <5000>;
5457 - thermal-sensors = <&tmu 0>;
5458 -
5459 - trips {
5460 - cpu_alert: cpu-alert {
5461 - temperature = <85000>;
5462 - hysteresis = <2000>;
5463 - type = "passive";
5464 - };
5465 -
5466 - cpu_crit: cpu-crit {
5467 - temperature = <95000>;
5468 - hysteresis = <2000>;
5469 - type = "critical";
5470 - };
5471 - };
5472 -
5473 - cooling-maps {
5474 - map0 {
5475 - trip = <&cpu_alert>;
5476 - cooling-device =
5477 - <&cpu0 THERMAL_NO_LIMIT
5478 - THERMAL_NO_LIMIT>;
5479 - };
5480 -
5481 - map1 {
5482 - trip = <&cpu_alert>;
5483 - cooling-device =
5484 - <&cpu4 THERMAL_NO_LIMIT
5485 - THERMAL_NO_LIMIT>;
5486 - };
5487 - };
5488 - };
5489 - };
5490 + #include "fsl-tmu.dtsi"
5491
5492 duart0: serial@21c0500 {
5493 compatible = "fsl,ns16550", "ns16550a";
5494 @@ -283,6 +240,62 @@
5495 status = "disabled";
5496 };
5497
5498 + cluster1_core0_watchdog: wdt@c000000 {
5499 + compatible = "arm,sp805-wdt", "arm,primecell";
5500 + reg = <0x0 0xc000000 0x0 0x1000>;
5501 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5502 + clock-names = "apb_pclk", "wdog_clk";
5503 + };
5504 +
5505 + cluster1_core1_watchdog: wdt@c010000 {
5506 + compatible = "arm,sp805-wdt", "arm,primecell";
5507 + reg = <0x0 0xc010000 0x0 0x1000>;
5508 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5509 + clock-names = "apb_pclk", "wdog_clk";
5510 + };
5511 +
5512 + cluster1_core2_watchdog: wdt@c020000 {
5513 + compatible = "arm,sp805-wdt", "arm,primecell";
5514 + reg = <0x0 0xc020000 0x0 0x1000>;
5515 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5516 + clock-names = "apb_pclk", "wdog_clk";
5517 + };
5518 +
5519 + cluster1_core3_watchdog: wdt@c030000 {
5520 + compatible = "arm,sp805-wdt", "arm,primecell";
5521 + reg = <0x0 0xc030000 0x0 0x1000>;
5522 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5523 + clock-names = "apb_pclk", "wdog_clk";
5524 + };
5525 +
5526 + cluster2_core0_watchdog: wdt@c100000 {
5527 + compatible = "arm,sp805-wdt", "arm,primecell";
5528 + reg = <0x0 0xc100000 0x0 0x1000>;
5529 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5530 + clock-names = "apb_pclk", "wdog_clk";
5531 + };
5532 +
5533 + cluster2_core1_watchdog: wdt@c110000 {
5534 + compatible = "arm,sp805-wdt", "arm,primecell";
5535 + reg = <0x0 0xc110000 0x0 0x1000>;
5536 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5537 + clock-names = "apb_pclk", "wdog_clk";
5538 + };
5539 +
5540 + cluster2_core2_watchdog: wdt@c120000 {
5541 + compatible = "arm,sp805-wdt", "arm,primecell";
5542 + reg = <0x0 0xc120000 0x0 0x1000>;
5543 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5544 + clock-names = "apb_pclk", "wdog_clk";
5545 + };
5546 +
5547 + cluster2_core3_watchdog: wdt@c130000 {
5548 + compatible = "arm,sp805-wdt", "arm,primecell";
5549 + reg = <0x0 0xc130000 0x0 0x1000>;
5550 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5551 + clock-names = "apb_pclk", "wdog_clk";
5552 + };
5553 +
5554 gpio0: gpio@2300000 {
5555 compatible = "fsl,qoriq-gpio";
5556 reg = <0x0 0x2300000 0x0 0x10000>;
5557 @@ -323,6 +336,72 @@
5558 #interrupt-cells = <2>;
5559 };
5560
5561 + /* TODO: WRIOP (CCSR?) */
5562 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
5563 + * E-MDIO1: 0x1_6000
5564 + */
5565 + compatible = "fsl,fman-memac-mdio";
5566 + reg = <0x0 0x8B96000 0x0 0x1000>;
5567 + device_type = "mdio";
5568 + little-endian; /* force the driver in LE mode */
5569 +
5570 + /* Not necessary on the QDS, but needed on the RDB */
5571 + #address-cells = <1>;
5572 + #size-cells = <0>;
5573 + };
5574 +
5575 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
5576 + * E-MDIO2: 0x1_7000
5577 + */
5578 + compatible = "fsl,fman-memac-mdio";
5579 + reg = <0x0 0x8B97000 0x0 0x1000>;
5580 + device_type = "mdio";
5581 + little-endian; /* force the driver in LE mode */
5582 +
5583 + #address-cells = <1>;
5584 + #size-cells = <0>;
5585 + };
5586 +
5587 + pcs_mdio1: mdio@0x8c07000 {
5588 + compatible = "fsl,fman-memac-mdio";
5589 + reg = <0x0 0x8c07000 0x0 0x1000>;
5590 + device_type = "mdio";
5591 + little-endian;
5592 +
5593 + #address-cells = <1>;
5594 + #size-cells = <0>;
5595 + };
5596 +
5597 + pcs_mdio2: mdio@0x8c0b000 {
5598 + compatible = "fsl,fman-memac-mdio";
5599 + reg = <0x0 0x8c0b000 0x0 0x1000>;
5600 + device_type = "mdio";
5601 + little-endian;
5602 +
5603 + #address-cells = <1>;
5604 + #size-cells = <0>;
5605 + };
5606 +
5607 + pcs_mdio3: mdio@0x8c0f000 {
5608 + compatible = "fsl,fman-memac-mdio";
5609 + reg = <0x0 0x8c0f000 0x0 0x1000>;
5610 + device_type = "mdio";
5611 + little-endian;
5612 +
5613 + #address-cells = <1>;
5614 + #size-cells = <0>;
5615 + };
5616 +
5617 + pcs_mdio4: mdio@0x8c13000 {
5618 + compatible = "fsl,fman-memac-mdio";
5619 + reg = <0x0 0x8c13000 0x0 0x1000>;
5620 + device_type = "mdio";
5621 + little-endian;
5622 +
5623 + #address-cells = <1>;
5624 + #size-cells = <0>;
5625 + };
5626 +
5627 ifc: ifc@2240000 {
5628 compatible = "fsl,ifc", "simple-bus";
5629 reg = <0x0 0x2240000 0x0 0x20000>;
5630 @@ -333,13 +412,22 @@
5631 status = "disabled";
5632 };
5633
5634 + ftm0: ftm0@2800000 {
5635 + compatible = "fsl,ls1088a-ftm-alarm";
5636 + reg = <0x0 0x2800000 0x0 0x10000>,
5637 + <0x0 0x1e34050 0x0 0x4>;
5638 + reg-names = "ftm", "pmctrl";
5639 + interrupts = <0 44 4>;
5640 + };
5641 +
5642 i2c0: i2c@2000000 {
5643 - compatible = "fsl,vf610-i2c";
5644 + compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c";
5645 #address-cells = <1>;
5646 #size-cells = <0>;
5647 reg = <0x0 0x2000000 0x0 0x10000>;
5648 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5649 - clocks = <&clockgen 4 3>;
5650 + clocks = <&clockgen 4 7>;
5651 + scl-gpios = <&gpio3 30 0>;
5652 status = "disabled";
5653 };
5654
5655 @@ -349,7 +437,7 @@
5656 #size-cells = <0>;
5657 reg = <0x0 0x2010000 0x0 0x10000>;
5658 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5659 - clocks = <&clockgen 4 3>;
5660 + clocks = <&clockgen 4 7>;
5661 status = "disabled";
5662 };
5663
5664 @@ -359,7 +447,7 @@
5665 #size-cells = <0>;
5666 reg = <0x0 0x2020000 0x0 0x10000>;
5667 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5668 - clocks = <&clockgen 4 3>;
5669 + clocks = <&clockgen 4 7>;
5670 status = "disabled";
5671 };
5672
5673 @@ -369,7 +457,7 @@
5674 #size-cells = <0>;
5675 reg = <0x0 0x2030000 0x0 0x10000>;
5676 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5677 - clocks = <&clockgen 4 3>;
5678 + clocks = <&clockgen 4 7>;
5679 status = "disabled";
5680 };
5681
5682 @@ -385,6 +473,28 @@
5683 status = "disabled";
5684 };
5685
5686 + usb0: usb3@3100000 {
5687 + compatible = "snps,dwc3";
5688 + reg = <0x0 0x3100000 0x0 0x10000>;
5689 + interrupts = <0 80 0x4>; /* Level high type */
5690 + dr_mode = "host";
5691 + configure-gfladj;
5692 + snps,dis_rxdet_inp3_quirk;
5693 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
5694 + snps,host-vbus-glitches;
5695 + };
5696 +
5697 + usb1: usb3@3110000 {
5698 + compatible = "snps,dwc3";
5699 + reg = <0x0 0x3110000 0x0 0x10000>;
5700 + interrupts = <0 81 0x4>; /* Level high type */
5701 + dr_mode = "host";
5702 + configure-gfladj;
5703 + snps,dis_rxdet_inp3_quirk;
5704 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
5705 + snps,host-vbus-glitches;
5706 + };
5707 +
5708 sata: sata@3200000 {
5709 compatible = "fsl,ls1088a-ahci";
5710 reg = <0x0 0x3200000 0x0 0x10000>,
5711 @@ -395,6 +505,17 @@
5712 dma-coherent;
5713 status = "disabled";
5714 };
5715 + qspi: quadspi@20c0000 {
5716 + compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
5717 + #address-cells = <1>;
5718 + #size-cells = <0>;
5719 + reg = <0x0 0x20c0000 0x0 0x10000>,
5720 + <0x0 0x20000000 0x0 0x10000000>;
5721 + reg-names = "QuadSPI", "QuadSPI-memory";
5722 + interrupts = <0 25 0x4>; /* Level high type */
5723 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5724 + clock-names = "qspi_en", "qspi";
5725 + };
5726
5727 crypto: crypto@8000000 {
5728 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
5729 @@ -434,6 +555,267 @@
5730 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
5731 };
5732 };
5733 +
5734 + pcie@3400000 {
5735 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5736 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
5737 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
5738 + reg-names = "regs", "config";
5739 + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5740 + interrupt-names = "aer";
5741 + #address-cells = <3>;
5742 + #size-cells = <2>;
5743 + device_type = "pci";
5744 + dma-coherent;
5745 + num-lanes = <4>;
5746 + bus-range = <0x0 0xff>;
5747 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
5748 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5749 + msi-parent = <&its>;
5750 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5751 + #interrupt-cells = <1>;
5752 + interrupt-map-mask = <0 0 0 7>;
5753 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
5754 + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
5755 + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
5756 + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
5757 + status = "disabled";
5758 + };
5759 +
5760 + pcie@3500000 {
5761 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5762 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
5763 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
5764 + reg-names = "regs", "config";
5765 + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5766 + interrupt-names = "aer";
5767 + #address-cells = <3>;
5768 + #size-cells = <2>;
5769 + device_type = "pci";
5770 + dma-coherent;
5771 + num-lanes = <4>;
5772 + bus-range = <0x0 0xff>;
5773 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
5774 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5775 + msi-parent = <&its>;
5776 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5777 + #interrupt-cells = <1>;
5778 + interrupt-map-mask = <0 0 0 7>;
5779 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
5780 + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
5781 + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
5782 + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
5783 + status = "disabled";
5784 + };
5785 +
5786 + pcie@3600000 {
5787 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5788 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
5789 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
5790 + reg-names = "regs", "config";
5791 + interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5792 + interrupt-names = "aer";
5793 + #address-cells = <3>;
5794 + #size-cells = <2>;
5795 + device_type = "pci";
5796 + dma-coherent;
5797 + num-lanes = <8>;
5798 + bus-range = <0x0 0xff>;
5799 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
5800 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5801 + msi-parent = <&its>;
5802 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5803 + #interrupt-cells = <1>;
5804 + interrupt-map-mask = <0 0 0 7>;
5805 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
5806 + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
5807 + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
5808 + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
5809 + status = "disabled";
5810 + };
5811 +
5812 + fsl_mc: fsl-mc@80c000000 {
5813 + compatible = "fsl,qoriq-mc";
5814 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
5815 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
5816 + msi-parent = <&its>;
5817 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
5818 + dma-coherent;
5819 + #address-cells = <3>;
5820 + #size-cells = <1>;
5821 +
5822 + /*
5823 + * Region type 0x0 - MC portals
5824 + * Region type 0x1 - QBMAN portals
5825 + */
5826 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
5827 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
5828 +
5829 + dpmacs {
5830 + #address-cells = <1>;
5831 + #size-cells = <0>;
5832 +
5833 + dpmac1: dpmac@1 {
5834 + compatible = "fsl,qoriq-mc-dpmac";
5835 + reg = <1>;
5836 + };
5837 +
5838 + dpmac2: dpmac@2 {
5839 + compatible = "fsl,qoriq-mc-dpmac";
5840 + reg = <2>;
5841 + };
5842 +
5843 + dpmac3: dpmac@3 {
5844 + compatible = "fsl,qoriq-mc-dpmac";
5845 + reg = <3>;
5846 + };
5847 +
5848 + dpmac4: dpmac@4 {
5849 + compatible = "fsl,qoriq-mc-dpmac";
5850 + reg = <4>;
5851 + };
5852 +
5853 + dpmac5: dpmac@5 {
5854 + compatible = "fsl,qoriq-mc-dpmac";
5855 + reg = <5>;
5856 + };
5857 +
5858 + dpmac6: dpmac@6 {
5859 + compatible = "fsl,qoriq-mc-dpmac";
5860 + reg = <6>;
5861 + };
5862 +
5863 + dpmac7: dpmac@7 {
5864 + compatible = "fsl,qoriq-mc-dpmac";
5865 + reg = <7>;
5866 + };
5867 +
5868 + dpmac8: dpmac@8 {
5869 + compatible = "fsl,qoriq-mc-dpmac";
5870 + reg = <8>;
5871 + };
5872 +
5873 + dpmac9: dpmac@9 {
5874 + compatible = "fsl,qoriq-mc-dpmac";
5875 + reg = <9>;
5876 + };
5877 +
5878 + dpmac10: dpmac@a {
5879 + compatible = "fsl,qoriq-mc-dpmac";
5880 + reg = <0xa>;
5881 + };
5882 + };
5883 + };
5884 +
5885 + smmu: iommu@5000000 {
5886 + compatible = "arm,mmu-500";
5887 + reg = <0 0x5000000 0 0x800000>;
5888 + #global-interrupts = <12>;
5889 + #iommu-cells = <1>;
5890 + stream-match-mask = <0x7C00>;
5891 + interrupts = <0 13 4>, /* global secure fault */
5892 + <0 14 4>, /* combined secure interrupt */
5893 + <0 15 4>, /* global non-secure fault */
5894 + <0 16 4>, /* combined non-secure interrupt */
5895 + /* performance counter interrupts 0-7 */
5896 + <0 211 4>,
5897 + <0 212 4>,
5898 + <0 213 4>,
5899 + <0 214 4>,
5900 + <0 215 4>,
5901 + <0 216 4>,
5902 + <0 217 4>,
5903 + <0 218 4>,
5904 + /* per context interrupt, 64 interrupts */
5905 + <0 146 4>,
5906 + <0 147 4>,
5907 + <0 148 4>,
5908 + <0 149 4>,
5909 + <0 150 4>,
5910 + <0 151 4>,
5911 + <0 152 4>,
5912 + <0 153 4>,
5913 + <0 154 4>,
5914 + <0 155 4>,
5915 + <0 156 4>,
5916 + <0 157 4>,
5917 + <0 158 4>,
5918 + <0 159 4>,
5919 + <0 160 4>,
5920 + <0 161 4>,
5921 + <0 162 4>,
5922 + <0 163 4>,
5923 + <0 164 4>,
5924 + <0 165 4>,
5925 + <0 166 4>,
5926 + <0 167 4>,
5927 + <0 168 4>,
5928 + <0 169 4>,
5929 + <0 170 4>,
5930 + <0 171 4>,
5931 + <0 172 4>,
5932 + <0 173 4>,
5933 + <0 174 4>,
5934 + <0 175 4>,
5935 + <0 176 4>,
5936 + <0 177 4>,
5937 + <0 178 4>,
5938 + <0 179 4>,
5939 + <0 180 4>,
5940 + <0 181 4>,
5941 + <0 182 4>,
5942 + <0 183 4>,
5943 + <0 184 4>,
5944 + <0 185 4>,
5945 + <0 186 4>,
5946 + <0 187 4>,
5947 + <0 188 4>,
5948 + <0 189 4>,
5949 + <0 190 4>,
5950 + <0 191 4>,
5951 + <0 192 4>,
5952 + <0 193 4>,
5953 + <0 194 4>,
5954 + <0 195 4>,
5955 + <0 196 4>,
5956 + <0 197 4>,
5957 + <0 198 4>,
5958 + <0 199 4>,
5959 + <0 200 4>,
5960 + <0 201 4>,
5961 + <0 202 4>,
5962 + <0 203 4>,
5963 + <0 204 4>,
5964 + <0 205 4>,
5965 + <0 206 4>,
5966 + <0 207 4>,
5967 + <0 208 4>,
5968 + <0 209 4>;
5969 + };
5970 +
5971 + serdes1: serdes@1ea0000 {
5972 + compatible = "fsl,serdes-10g";
5973 + reg = <0x0 0x1ea0000 0 0x00002000>;
5974 + little-endian;
5975 + };
5976 };
5977
5978 + firmware {
5979 + optee {
5980 + compatible = "linaro,optee-tz";
5981 + method = "smc";
5982 + };
5983 + };
5984 +};
5985 +
5986 +#include "fsl-tmu-map1.dtsi"
5987 +
5988 +&thermal_zones {
5989 + thermal-zone0 {
5990 + status = "okay";
5991 + };
5992 +
5993 + thermal-zone1 {
5994 + status = "okay";
5995 + };
5996 };
5997 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
5998 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
5999 @@ -1,3 +1,4 @@
6000 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6001 /*
6002 * Device Tree file for Freescale LS2080a QDS Board.
6003 *
6004 @@ -7,43 +8,6 @@
6005 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6006 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6007 *
6008 - * This file is dual-licensed: you can use it either under the terms
6009 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6010 - * licensing only applies to this file, and not this project as a
6011 - * whole.
6012 - *
6013 - * a) This library is free software; you can redistribute it and/or
6014 - * modify it under the terms of the GNU General Public License as
6015 - * published by the Free Software Foundation; either version 2 of the
6016 - * License, or (at your option) any later version.
6017 - *
6018 - * This library is distributed in the hope that it will be useful,
6019 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6020 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6021 - * GNU General Public License for more details.
6022 - *
6023 - * Or, alternatively,
6024 - *
6025 - * b) Permission is hereby granted, free of charge, to any person
6026 - * obtaining a copy of this software and associated documentation
6027 - * files (the "Software"), to deal in the Software without
6028 - * restriction, including without limitation the rights to use,
6029 - * copy, modify, merge, publish, distribute, sublicense, and/or
6030 - * sell copies of the Software, and to permit persons to whom the
6031 - * Software is furnished to do so, subject to the following
6032 - * conditions:
6033 - *
6034 - * The above copyright notice and this permission notice shall be
6035 - * included in all copies or substantial portions of the Software.
6036 - *
6037 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6038 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6039 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6040 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6041 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6042 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6043 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6044 - * OTHER DEALINGS IN THE SOFTWARE.
6045 */
6046
6047 /dts-v1/;
6048 @@ -59,3 +23,65 @@
6049 stdout-path = "serial0:115200n8";
6050 };
6051 };
6052 +
6053 +&ifc {
6054 + boardctrl: board-control@3,0 {
6055 + #address-cells = <1>;
6056 + #size-cells = <1>;
6057 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6058 + reg = <3 0 0x300>; /* TODO check address */
6059 + ranges = <0 3 0 0x300>;
6060 +
6061 + mdio_mux_emi1 {
6062 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6063 + mdio-parent-bus = <&emdio1>;
6064 + reg = <0x54 1>; /* BRDCFG4 */
6065 + mux-mask = <0xe0>; /* EMI1_MDIO */
6066 +
6067 + #address-cells=<1>;
6068 + #size-cells = <0>;
6069 +
6070 + /* Child MDIO buses, one for each riser card:
6071 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6072 + * VSC8234 PHYs on the riser cards.
6073 + */
6074 +
6075 + mdio_mux3: mdio@60 {
6076 + reg = <0x60>;
6077 + #address-cells = <1>;
6078 + #size-cells = <0>;
6079 +
6080 + mdio0_phy12: mdio_phy0@1c {
6081 + reg = <0x1c>;
6082 + phy-connection-type = "sgmii";
6083 + };
6084 + mdio0_phy13: mdio_phy1@1d {
6085 + reg = <0x1d>;
6086 + phy-connection-type = "sgmii";
6087 + };
6088 + mdio0_phy14: mdio_phy2@1e {
6089 + reg = <0x1e>;
6090 + phy-connection-type = "sgmii";
6091 + };
6092 + mdio0_phy15: mdio_phy3@1f {
6093 + reg = <0x1f>;
6094 + phy-connection-type = "sgmii";
6095 + };
6096 + };
6097 + };
6098 + };
6099 +};
6100 +
6101 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6102 +&dpmac9 {
6103 + phy-handle = <&mdio0_phy12>;
6104 +};
6105 +&dpmac10 {
6106 + phy-handle = <&mdio0_phy13>;
6107 +};
6108 +&dpmac11 {
6109 + phy-handle = <&mdio0_phy14>;
6110 +};
6111 +&dpmac12 {
6112 + phy-handle = <&mdio0_phy15>;
6113 +};
6114 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6115 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6116 @@ -1,3 +1,4 @@
6117 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6118 /*
6119 * Device Tree file for Freescale LS2080a RDB Board.
6120 *
6121 @@ -7,43 +8,6 @@
6122 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6123 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6124 *
6125 - * This file is dual-licensed: you can use it either under the terms
6126 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6127 - * licensing only applies to this file, and not this project as a
6128 - * whole.
6129 - *
6130 - * a) This library is free software; you can redistribute it and/or
6131 - * modify it under the terms of the GNU General Public License as
6132 - * published by the Free Software Foundation; either version 2 of the
6133 - * License, or (at your option) any later version.
6134 - *
6135 - * This library is distributed in the hope that it will be useful,
6136 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6137 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6138 - * GNU General Public License for more details.
6139 - *
6140 - * Or, alternatively,
6141 - *
6142 - * b) Permission is hereby granted, free of charge, to any person
6143 - * obtaining a copy of this software and associated documentation
6144 - * files (the "Software"), to deal in the Software without
6145 - * restriction, including without limitation the rights to use,
6146 - * copy, modify, merge, publish, distribute, sublicense, and/or
6147 - * sell copies of the Software, and to permit persons to whom the
6148 - * Software is furnished to do so, subject to the following
6149 - * conditions:
6150 - *
6151 - * The above copyright notice and this permission notice shall be
6152 - * included in all copies or substantial portions of the Software.
6153 - *
6154 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6155 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6156 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6157 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6158 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6159 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6160 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6161 - * OTHER DEALINGS IN THE SOFTWARE.
6162 */
6163
6164 /dts-v1/;
6165 @@ -59,3 +23,83 @@
6166 stdout-path = "serial1:115200n8";
6167 };
6168 };
6169 +
6170 +&emdio1 {
6171 + status = "disabled";
6172 + /* CS4340 PHYs */
6173 + mdio1_phy1: emdio1_phy@1 {
6174 + reg = <0x10>;
6175 + phy-connection-type = "xfi";
6176 + };
6177 + mdio1_phy2: emdio1_phy@2 {
6178 + reg = <0x11>;
6179 + phy-connection-type = "xfi";
6180 + };
6181 + mdio1_phy3: emdio1_phy@3 {
6182 + reg = <0x12>;
6183 + phy-connection-type = "xfi";
6184 + };
6185 + mdio1_phy4: emdio1_phy@4 {
6186 + reg = <0x13>;
6187 + phy-connection-type = "xfi";
6188 + };
6189 +};
6190 +
6191 +&emdio2 {
6192 + /* AQR405 PHYs */
6193 + mdio2_phy1: emdio2_phy@1 {
6194 + compatible = "ethernet-phy-ieee802.3-c45";
6195 + interrupts = <0 1 0x4>; /* Level high type */
6196 + reg = <0x0>;
6197 + phy-connection-type = "xfi";
6198 + };
6199 + mdio2_phy2: emdio2_phy@2 {
6200 + compatible = "ethernet-phy-ieee802.3-c45";
6201 + interrupts = <0 2 0x4>; /* Level high type */
6202 + reg = <0x1>;
6203 + phy-connection-type = "xfi";
6204 + };
6205 + mdio2_phy3: emdio2_phy@3 {
6206 + compatible = "ethernet-phy-ieee802.3-c45";
6207 + interrupts = <0 4 0x4>; /* Level high type */
6208 + reg = <0x2>;
6209 + phy-connection-type = "xfi";
6210 + };
6211 + mdio2_phy4: emdio2_phy@4 {
6212 + compatible = "ethernet-phy-ieee802.3-c45";
6213 + interrupts = <0 5 0x4>; /* Level high type */
6214 + reg = <0x3>;
6215 + phy-connection-type = "xfi";
6216 + };
6217 +};
6218 +
6219 +/* Update DPMAC connections to external PHYs, under the assumption of
6220 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6221 + */
6222 +/* Leave Cortina nodes commented out until driver is integrated
6223 + *&dpmac1 {
6224 + * phy-handle = <&mdio1_phy1>;
6225 + *};
6226 + *&dpmac2 {
6227 + * phy-handle = <&mdio1_phy2>;
6228 + *};
6229 + *&dpmac3 {
6230 + * phy-handle = <&mdio1_phy3>;
6231 + *};
6232 + *&dpmac4 {
6233 + * phy-handle = <&mdio1_phy4>;
6234 + *};
6235 + */
6236 +
6237 +&dpmac5 {
6238 + phy-handle = <&mdio2_phy1>;
6239 +};
6240 +&dpmac6 {
6241 + phy-handle = <&mdio2_phy2>;
6242 +};
6243 +&dpmac7 {
6244 + phy-handle = <&mdio2_phy3>;
6245 +};
6246 +&dpmac8 {
6247 + phy-handle = <&mdio2_phy4>;
6248 +};
6249 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6250 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6251 @@ -1,3 +1,4 @@
6252 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6253 /*
6254 * Device Tree file for Freescale LS2080a software Simulator model
6255 *
6256 @@ -5,43 +6,6 @@
6257 *
6258 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6259 *
6260 - * This file is dual-licensed: you can use it either under the terms
6261 - * of the GPL or the X11 license, at your option. Note that this dual
6262 - * licensing only applies to this file, and not this project as a
6263 - * whole.
6264 - *
6265 - * a) This library is free software; you can redistribute it and/or
6266 - * modify it under the terms of the GNU General Public License as
6267 - * published by the Free Software Foundation; either version 2 of the
6268 - * License, or (at your option) any later version.
6269 - *
6270 - * This library is distributed in the hope that it will be useful,
6271 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6272 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6273 - * GNU General Public License for more details.
6274 - *
6275 - * Or, alternatively,
6276 - *
6277 - * b) Permission is hereby granted, free of charge, to any person
6278 - * obtaining a copy of this software and associated documentation
6279 - * files (the "Software"), to deal in the Software without
6280 - * restriction, including without limitation the rights to use,
6281 - * copy, modify, merge, publish, distribute, sublicense, and/or
6282 - * sell copies of the Software, and to permit persons to whom the
6283 - * Software is furnished to do so, subject to the following
6284 - * conditions:
6285 - *
6286 - * The above copyright notice and this permission notice shall be
6287 - * included in all copies or substantial portions of the Software.
6288 - *
6289 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6290 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6291 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6292 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6293 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6294 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6295 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6296 - * OTHER DEALINGS IN THE SOFTWARE.
6297 */
6298
6299 /dts-v1/;
6300 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6301 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6302 @@ -1,3 +1,4 @@
6303 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6304 /*
6305 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6306 *
6307 @@ -6,49 +7,12 @@
6308 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6309 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6310 *
6311 - * This file is dual-licensed: you can use it either under the terms
6312 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6313 - * licensing only applies to this file, and not this project as a
6314 - * whole.
6315 - *
6316 - * a) This library is free software; you can redistribute it and/or
6317 - * modify it under the terms of the GNU General Public License as
6318 - * published by the Free Software Foundation; either version 2 of the
6319 - * License, or (at your option) any later version.
6320 - *
6321 - * This library is distributed in the hope that it will be useful,
6322 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6323 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6324 - * GNU General Public License for more details.
6325 - *
6326 - * Or, alternatively,
6327 - *
6328 - * b) Permission is hereby granted, free of charge, to any person
6329 - * obtaining a copy of this software and associated documentation
6330 - * files (the "Software"), to deal in the Software without
6331 - * restriction, including without limitation the rights to use,
6332 - * copy, modify, merge, publish, distribute, sublicense, and/or
6333 - * sell copies of the Software, and to permit persons to whom the
6334 - * Software is furnished to do so, subject to the following
6335 - * conditions:
6336 - *
6337 - * The above copyright notice and this permission notice shall be
6338 - * included in all copies or substantial portions of the Software.
6339 - *
6340 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6341 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6342 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6343 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6344 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6345 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6346 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6347 - * OTHER DEALINGS IN THE SOFTWARE.
6348 */
6349
6350 #include "fsl-ls208xa.dtsi"
6351
6352 &cpu {
6353 - cpu0: cpu@0 {
6354 + cooling_map0: cpu0: cpu@0 {
6355 device_type = "cpu";
6356 compatible = "arm,cortex-a57";
6357 reg = <0x0>;
6358 @@ -67,7 +31,7 @@
6359 next-level-cache = <&cluster0_l2>;
6360 };
6361
6362 - cpu2: cpu@100 {
6363 + cooling_map1: cpu2: cpu@100 {
6364 device_type = "cpu";
6365 compatible = "arm,cortex-a57";
6366 reg = <0x100>;
6367 @@ -86,7 +50,7 @@
6368 next-level-cache = <&cluster1_l2>;
6369 };
6370
6371 - cpu4: cpu@200 {
6372 + cooling_map2: cpu4: cpu@200 {
6373 device_type = "cpu";
6374 compatible = "arm,cortex-a57";
6375 reg = <0x200>;
6376 @@ -105,7 +69,7 @@
6377 next-level-cache = <&cluster2_l2>;
6378 };
6379
6380 - cpu6: cpu@300 {
6381 + cooling_map3: cpu6: cpu@300 {
6382 device_type = "cpu";
6383 compatible = "arm,cortex-a57";
6384 reg = <0x300>;
6385 @@ -150,6 +114,10 @@
6386 };
6387 };
6388
6389 +&timer {
6390 + fsl,erratum-a008585;
6391 +};
6392 +
6393 &pcie1 {
6394 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6395 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
6396 --- /dev/null
6397 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
6398 @@ -0,0 +1,163 @@
6399 +/*
6400 + * Device Tree file for NXP LS2081A RDB Board.
6401 + *
6402 + * Copyright 2017 NXP
6403 + *
6404 + * Priyanka Jain <priyanka.jain@nxp.com>
6405 + *
6406 + * This file is dual-licensed: you can use it either under the terms
6407 + * of the GPLv2 or the X11 license, at your option. Note that this dual
6408 + * licensing only applies to this file, and not this project as a
6409 + * whole.
6410 + *
6411 + * a) This library is free software; you can redistribute it and/or
6412 + * modify it under the terms of the GNU General Public License as
6413 + * published by the Free Software Foundation; either version 2 of the
6414 + * License, or (at your option) any later version.
6415 + *
6416 + * This library is distributed in the hope that it will be useful,
6417 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6418 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6419 + * GNU General Public License for more details.
6420 + *
6421 + * Or, alternatively,
6422 + *
6423 + * b) Permission is hereby granted, free of charge, to any person
6424 + * obtaining a copy of this software and associated documentation
6425 + * files (the "Software"), to deal in the Software without
6426 + * restriction, including without limitation the rights to use,
6427 + * copy, modify, merge, publish, distribute, sublicense, and/or
6428 + * sell copies of the Software, and to permit persons to whom the
6429 + * Software is furnished to do so, subject to the following
6430 + * conditions:
6431 + *
6432 + * The above copyright notice and this permission notice shall be
6433 + * included in all copies or substantial portions of the Software.
6434 + *
6435 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6436 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6437 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6438 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6439 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6440 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6441 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6442 + * OTHER DEALINGS IN THE SOFTWARE.
6443 + */
6444 +
6445 +/dts-v1/;
6446 +
6447 +#include "fsl-ls2088a.dtsi"
6448 +
6449 +/ {
6450 + model = "NXP Layerscape 2081A RDB Board";
6451 + compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
6452 +
6453 + aliases {
6454 + serial0 = &serial0;
6455 + serial1 = &serial1;
6456 + };
6457 +
6458 + chosen {
6459 + stdout-path = "serial1:115200n8";
6460 + };
6461 +};
6462 +
6463 +&esdhc {
6464 + status = "okay";
6465 +};
6466 +
6467 +&ifc {
6468 + status = "disabled";
6469 +};
6470 +
6471 +&i2c0 {
6472 + status = "okay";
6473 + pca9547@75 {
6474 + compatible = "nxp,pca9547";
6475 + reg = <0x75>;
6476 + #address-cells = <1>;
6477 + #size-cells = <0>;
6478 + i2c@1 {
6479 + #address-cells = <1>;
6480 + #size-cells = <0>;
6481 + reg = <0x01>;
6482 + rtc@51 {
6483 + compatible = "nxp,pcf2129";
6484 + reg = <0x51>;
6485 + };
6486 + };
6487 +
6488 + i2c@2 {
6489 + #address-cells = <1>;
6490 + #size-cells = <0>;
6491 + reg = <0x02>;
6492 +
6493 + ina220@40 {
6494 + compatible = "ti,ina220";
6495 + reg = <0x40>;
6496 + shunt-resistor = <500>;
6497 + };
6498 + };
6499 +
6500 + i2c@3 {
6501 + #address-cells = <1>;
6502 + #size-cells = <0>;
6503 + reg = <0x3>;
6504 +
6505 + adt7481@4c {
6506 + compatible = "adi,adt7461";
6507 + reg = <0x4c>;
6508 + };
6509 + };
6510 + };
6511 +};
6512 +
6513 +&dspi {
6514 + status = "okay";
6515 + dflash0: n25q512a {
6516 + #address-cells = <1>;
6517 + #size-cells = <1>;
6518 + compatible = "st,m25p80";
6519 + spi-max-frequency = <3000000>;
6520 + reg = <0>;
6521 + };
6522 +};
6523 +
6524 +&qspi {
6525 + status = "okay";
6526 + fsl,qspi-has-second-chip;
6527 + flash0: s25fs512s@0 {
6528 + #address-cells = <1>;
6529 + #size-cells = <1>;
6530 + compatible = "spansion,m25p80";
6531 + spi-rx-bus-width = <4>;
6532 + spi-tx-bus-width = <4>;
6533 + spi-max-frequency = <20000000>;
6534 + reg = <0>;
6535 + };
6536 + flash1: s25fs512s@1 {
6537 + #address-cells = <1>;
6538 + #size-cells = <1>;
6539 + spi-rx-bus-width = <4>;
6540 + spi-tx-bus-width = <4>;
6541 + compatible = "spansion,m25p80";
6542 + spi-max-frequency = <20000000>;
6543 + reg = <1>;
6544 + };
6545 +};
6546 +
6547 +&sata0 {
6548 + status = "okay";
6549 +};
6550 +
6551 +&sata1 {
6552 + status = "okay";
6553 +};
6554 +
6555 +&usb0 {
6556 + status = "okay";
6557 +};
6558 +
6559 +&usb1 {
6560 + status = "okay";
6561 +};
6562 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
6563 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
6564 @@ -1,3 +1,4 @@
6565 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6566 /*
6567 * Device Tree file for Freescale LS2088A QDS Board.
6568 *
6569 @@ -6,43 +7,6 @@
6570 *
6571 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6572 *
6573 - * This file is dual-licensed: you can use it either under the terms
6574 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6575 - * licensing only applies to this file, and not this project as a
6576 - * whole.
6577 - *
6578 - * a) This library is free software; you can redistribute it and/or
6579 - * modify it under the terms of the GNU General Public License as
6580 - * published by the Free Software Foundation; either version 2 of the
6581 - * License, or (at your option) any later version.
6582 - *
6583 - * This library is distributed in the hope that it will be useful,
6584 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6585 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6586 - * GNU General Public License for more details.
6587 - *
6588 - * Or, alternatively,
6589 - *
6590 - * b) Permission is hereby granted, free of charge, to any person
6591 - * obtaining a copy of this software and associated documentation
6592 - * files (the "Software"), to deal in the Software without
6593 - * restriction, including without limitation the rights to use,
6594 - * copy, modify, merge, publish, distribute, sublicense, and/or
6595 - * sell copies of the Software, and to permit persons to whom the
6596 - * Software is furnished to do so, subject to the following
6597 - * conditions:
6598 - *
6599 - * The above copyright notice and this permission notice shall be
6600 - * included in all copies or substantial portions of the Software.
6601 - *
6602 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6603 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6604 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6605 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6606 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6607 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6608 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6609 - * OTHER DEALINGS IN THE SOFTWARE.
6610 */
6611
6612 /dts-v1/;
6613 @@ -58,3 +22,123 @@
6614 stdout-path = "serial0:115200n8";
6615 };
6616 };
6617 +
6618 +&ifc {
6619 + boardctrl: board-control@3,0 {
6620 + #address-cells = <1>;
6621 + #size-cells = <1>;
6622 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6623 + reg = <3 0 0x300>; /* TODO check address */
6624 + ranges = <0 3 0 0x300>;
6625 +
6626 + mdio_mux_emi1 {
6627 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6628 + mdio-parent-bus = <&emdio1>;
6629 + reg = <0x54 1>; /* BRDCFG4 */
6630 + mux-mask = <0xe0>; /* EMI1_MDIO */
6631 +
6632 + #address-cells=<1>;
6633 + #size-cells = <0>;
6634 +
6635 + /* Child MDIO buses, one for each riser card:
6636 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6637 + * VSC8234 PHYs on the riser cards.
6638 + */
6639 +
6640 + mdio_mux3: mdio@60 {
6641 + reg = <0x60>;
6642 + #address-cells = <1>;
6643 + #size-cells = <0>;
6644 +
6645 + mdio0_phy12: mdio_phy0@1c {
6646 + reg = <0x1c>;
6647 + phy-connection-type = "sgmii";
6648 + };
6649 + mdio0_phy13: mdio_phy1@1d {
6650 + reg = <0x1d>;
6651 + phy-connection-type = "sgmii";
6652 + };
6653 + mdio0_phy14: mdio_phy2@1e {
6654 + reg = <0x1e>;
6655 + phy-connection-type = "sgmii";
6656 + };
6657 + mdio0_phy15: mdio_phy3@1f {
6658 + reg = <0x1f>;
6659 + phy-connection-type = "sgmii";
6660 + };
6661 + };
6662 + };
6663 + };
6664 +};
6665 +
6666 +&pcs_mdio1 {
6667 + pcs_phy1: ethernet-phy@0 {
6668 + backplane-mode = "10gbase-kr";
6669 + compatible = "ethernet-phy-ieee802.3-c45";
6670 + reg = <0x0>;
6671 + fsl,lane-handle = <&serdes1>;
6672 + fsl,lane-reg = <0x9C0 0x40>;/* lane H */
6673 + };
6674 +};
6675 +
6676 +&pcs_mdio2 {
6677 + pcs_phy2: ethernet-phy@0 {
6678 + backplane-mode = "10gbase-kr";
6679 + compatible = "ethernet-phy-ieee802.3-c45";
6680 + reg = <0x0>;
6681 + fsl,lane-handle = <&serdes1>;
6682 + fsl,lane-reg = <0x980 0x40>;/* lane G */
6683 + };
6684 +};
6685 +
6686 +&pcs_mdio3 {
6687 + pcs_phy3: ethernet-phy@0 {
6688 + backplane-mode = "10gbase-kr";
6689 + compatible = "ethernet-phy-ieee802.3-c45";
6690 + reg = <0x0>;
6691 + fsl,lane-handle = <&serdes1>;
6692 + fsl,lane-reg = <0x940 0x40>;/* lane F */
6693 + };
6694 +};
6695 +
6696 +&pcs_mdio4 {
6697 + pcs_phy4: ethernet-phy@0 {
6698 + backplane-mode = "10gbase-kr";
6699 + compatible = "ethernet-phy-ieee802.3-c45";
6700 + reg = <0x0>;
6701 + fsl,lane-handle = <&serdes1>;
6702 + fsl,lane-reg = <0x900 0x40>;/* lane E */
6703 + };
6704 +};
6705 +
6706 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x2a_0xXX.
6707 + * &dpmac1 {
6708 + * phy-handle = <&pcs_phy1>;
6709 + * };
6710 + *
6711 + * &dpmac2 {
6712 + * phy-handle = <&pcs_phy2>;
6713 + * };
6714 + *
6715 + * &dpmac3 {
6716 + * phy-handle = <&pcs_phy3>;
6717 + * };
6718 + *
6719 + * &dpmac4 {
6720 + * phy-handle = <&pcs_phy4>;
6721 + * };
6722 + */
6723 +
6724 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6725 +&dpmac9 {
6726 + phy-handle = <&mdio0_phy12>;
6727 +};
6728 +&dpmac10 {
6729 + phy-handle = <&mdio0_phy13>;
6730 +};
6731 +&dpmac11 {
6732 + phy-handle = <&mdio0_phy14>;
6733 +};
6734 +&dpmac12 {
6735 + phy-handle = <&mdio0_phy15>;
6736 +};
6737 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
6738 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
6739 @@ -1,3 +1,4 @@
6740 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6741 /*
6742 * Device Tree file for Freescale LS2088A RDB Board.
6743 *
6744 @@ -6,43 +7,6 @@
6745 *
6746 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6747 *
6748 - * This file is dual-licensed: you can use it either under the terms
6749 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6750 - * licensing only applies to this file, and not this project as a
6751 - * whole.
6752 - *
6753 - * a) This library is free software; you can redistribute it and/or
6754 - * modify it under the terms of the GNU General Public License as
6755 - * published by the Free Software Foundation; either version 2 of the
6756 - * License, or (at your option) any later version.
6757 - *
6758 - * This library is distributed in the hope that it will be useful,
6759 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6760 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6761 - * GNU General Public License for more details.
6762 - *
6763 - * Or, alternatively,
6764 - *
6765 - * b) Permission is hereby granted, free of charge, to any person
6766 - * obtaining a copy of this software and associated documentation
6767 - * files (the "Software"), to deal in the Software without
6768 - * restriction, including without limitation the rights to use,
6769 - * copy, modify, merge, publish, distribute, sublicense, and/or
6770 - * sell copies of the Software, and to permit persons to whom the
6771 - * Software is furnished to do so, subject to the following
6772 - * conditions:
6773 - *
6774 - * The above copyright notice and this permission notice shall be
6775 - * included in all copies or substantial portions of the Software.
6776 - *
6777 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6778 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6779 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6780 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6781 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6782 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6783 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6784 - * OTHER DEALINGS IN THE SOFTWARE.
6785 */
6786
6787 /dts-v1/;
6788 @@ -58,3 +22,83 @@
6789 stdout-path = "serial1:115200n8";
6790 };
6791 };
6792 +
6793 +&emdio1 {
6794 + status = "disabled";
6795 + /* CS4340 PHYs */
6796 + mdio1_phy1: emdio1_phy@1 {
6797 + reg = <0x10>;
6798 + phy-connection-type = "xfi";
6799 + };
6800 + mdio1_phy2: emdio1_phy@2 {
6801 + reg = <0x11>;
6802 + phy-connection-type = "xfi";
6803 + };
6804 + mdio1_phy3: emdio1_phy@3 {
6805 + reg = <0x12>;
6806 + phy-connection-type = "xfi";
6807 + };
6808 + mdio1_phy4: emdio1_phy@4 {
6809 + reg = <0x13>;
6810 + phy-connection-type = "xfi";
6811 + };
6812 +};
6813 +
6814 +&emdio2 {
6815 + /* AQR405 PHYs */
6816 + mdio2_phy1: emdio2_phy@1 {
6817 + compatible = "ethernet-phy-ieee802.3-c45";
6818 + interrupts = <0 1 0x4>; /* Level high type */
6819 + reg = <0x0>;
6820 + phy-connection-type = "xfi";
6821 + };
6822 + mdio2_phy2: emdio2_phy@2 {
6823 + compatible = "ethernet-phy-ieee802.3-c45";
6824 + interrupts = <0 2 0x4>; /* Level high type */
6825 + reg = <0x1>;
6826 + phy-connection-type = "xfi";
6827 + };
6828 + mdio2_phy3: emdio2_phy@3 {
6829 + compatible = "ethernet-phy-ieee802.3-c45";
6830 + interrupts = <0 4 0x4>; /* Level high type */
6831 + reg = <0x2>;
6832 + phy-connection-type = "xfi";
6833 + };
6834 + mdio2_phy4: emdio2_phy@4 {
6835 + compatible = "ethernet-phy-ieee802.3-c45";
6836 + interrupts = <0 5 0x4>; /* Level high type */
6837 + reg = <0x3>;
6838 + phy-connection-type = "xfi";
6839 + };
6840 +};
6841 +
6842 +/* Update DPMAC connections to external PHYs, under the assumption of
6843 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6844 + */
6845 +/* Leave Cortina PHYs commented out until proper driver is integrated
6846 + *&dpmac1 {
6847 + * phy-handle = <&mdio1_phy1>;
6848 + *};
6849 + *&dpmac2 {
6850 + * phy-handle = <&mdio1_phy2>;
6851 + *};
6852 + *&dpmac3 {
6853 + * phy-handle = <&mdio1_phy3>;
6854 + *};
6855 + *&dpmac4 {
6856 + * phy-handle = <&mdio1_phy4>;
6857 + *};
6858 + */
6859 +
6860 +&dpmac5 {
6861 + phy-handle = <&mdio2_phy1>;
6862 +};
6863 +&dpmac6 {
6864 + phy-handle = <&mdio2_phy2>;
6865 +};
6866 +&dpmac7 {
6867 + phy-handle = <&mdio2_phy3>;
6868 +};
6869 +&dpmac8 {
6870 + phy-handle = <&mdio2_phy4>;
6871 +};
6872 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
6873 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
6874 @@ -1,3 +1,4 @@
6875 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6876 /*
6877 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
6878 *
6879 @@ -6,49 +7,12 @@
6880 *
6881 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6882 *
6883 - * This file is dual-licensed: you can use it either under the terms
6884 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6885 - * licensing only applies to this file, and not this project as a
6886 - * whole.
6887 - *
6888 - * a) This library is free software; you can redistribute it and/or
6889 - * modify it under the terms of the GNU General Public License as
6890 - * published by the Free Software Foundation; either version 2 of the
6891 - * License, or (at your option) any later version.
6892 - *
6893 - * This library is distributed in the hope that it will be useful,
6894 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6895 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6896 - * GNU General Public License for more details.
6897 - *
6898 - * Or, alternatively,
6899 - *
6900 - * b) Permission is hereby granted, free of charge, to any person
6901 - * obtaining a copy of this software and associated documentation
6902 - * files (the "Software"), to deal in the Software without
6903 - * restriction, including without limitation the rights to use,
6904 - * copy, modify, merge, publish, distribute, sublicense, and/or
6905 - * sell copies of the Software, and to permit persons to whom the
6906 - * Software is furnished to do so, subject to the following
6907 - * conditions:
6908 - *
6909 - * The above copyright notice and this permission notice shall be
6910 - * included in all copies or substantial portions of the Software.
6911 - *
6912 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6913 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6914 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6915 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6916 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6917 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6918 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6919 - * OTHER DEALINGS IN THE SOFTWARE.
6920 */
6921
6922 #include "fsl-ls208xa.dtsi"
6923
6924 &cpu {
6925 - cpu0: cpu@0 {
6926 + cooling_map0: cpu0: cpu@0 {
6927 device_type = "cpu";
6928 compatible = "arm,cortex-a72";
6929 reg = <0x0>;
6930 @@ -67,7 +31,7 @@
6931 next-level-cache = <&cluster0_l2>;
6932 };
6933
6934 - cpu2: cpu@100 {
6935 + cooling_map1: cpu2: cpu@100 {
6936 device_type = "cpu";
6937 compatible = "arm,cortex-a72";
6938 reg = <0x100>;
6939 @@ -86,7 +50,7 @@
6940 next-level-cache = <&cluster1_l2>;
6941 };
6942
6943 - cpu4: cpu@200 {
6944 + cooling_map2: cpu4: cpu@200 {
6945 device_type = "cpu";
6946 compatible = "arm,cortex-a72";
6947 reg = <0x200>;
6948 @@ -105,7 +69,7 @@
6949 next-level-cache = <&cluster2_l2>;
6950 };
6951
6952 - cpu6: cpu@300 {
6953 + cooling_map3: cpu6: cpu@300 {
6954 device_type = "cpu";
6955 compatible = "arm,cortex-a72";
6956 reg = <0x300>;
6957 @@ -143,7 +107,7 @@
6958 CPU_PW20: cpu-pw20 {
6959 compatible = "arm,idle-state";
6960 idle-state-name = "PW20";
6961 - arm,psci-suspend-param = <0x00010000>;
6962 + arm,psci-suspend-param = <0x0>;
6963 entry-latency-us = <2000>;
6964 exit-latency-us = <2000>;
6965 min-residency-us = <6000>;
6966 @@ -151,6 +115,7 @@
6967 };
6968
6969 &pcie1 {
6970 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6971 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6972 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
6973
6974 @@ -159,6 +124,7 @@
6975 };
6976
6977 &pcie2 {
6978 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6979 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
6980 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
6981
6982 @@ -167,6 +133,7 @@
6983 };
6984
6985 &pcie3 {
6986 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6987 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
6988 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
6989
6990 @@ -175,6 +142,7 @@
6991 };
6992
6993 &pcie4 {
6994 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6995 reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
6996 0x38 0x00000000 0x0 0x00002000>; /* configuration space */
6997
6998 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
6999 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
7000 @@ -1,3 +1,4 @@
7001 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7002 /*
7003 * Device Tree file for Freescale LS2080A QDS Board.
7004 *
7005 @@ -6,43 +7,6 @@
7006 *
7007 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7008 *
7009 - * This file is dual-licensed: you can use it either under the terms
7010 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7011 - * licensing only applies to this file, and not this project as a
7012 - * whole.
7013 - *
7014 - * a) This library is free software; you can redistribute it and/or
7015 - * modify it under the terms of the GNU General Public License as
7016 - * published by the Free Software Foundation; either version 2 of the
7017 - * License, or (at your option) any later version.
7018 - *
7019 - * This library is distributed in the hope that it will be useful,
7020 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7021 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7022 - * GNU General Public License for more details.
7023 - *
7024 - * Or, alternatively,
7025 - *
7026 - * b) Permission is hereby granted, free of charge, to any person
7027 - * obtaining a copy of this software and associated documentation
7028 - * files (the "Software"), to deal in the Software without
7029 - * restriction, including without limitation the rights to use,
7030 - * copy, modify, merge, publish, distribute, sublicense, and/or
7031 - * sell copies of the Software, and to permit persons to whom the
7032 - * Software is furnished to do so, subject to the following
7033 - * conditions:
7034 - *
7035 - * The above copyright notice and this permission notice shall be
7036 - * included in all copies or substantial portions of the Software.
7037 - *
7038 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7039 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7040 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7041 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7042 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7043 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7044 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7045 - * OTHER DEALINGS IN THE SOFTWARE.
7046 */
7047
7048 &esdhc {
7049 @@ -165,16 +129,21 @@
7050
7051 &qspi {
7052 status = "okay";
7053 + fsl,qspi-has-second-chip;
7054 flash0: s25fl256s1@0 {
7055 #address-cells = <1>;
7056 #size-cells = <1>;
7057 compatible = "st,m25p80";
7058 + spi-rx-bus-width = <4>;
7059 + spi-tx-bus-width = <4>;
7060 spi-max-frequency = <20000000>;
7061 reg = <0>;
7062 };
7063 flash2: s25fl256s1@2 {
7064 #address-cells = <1>;
7065 #size-cells = <1>;
7066 + spi-rx-bus-width = <4>;
7067 + spi-tx-bus-width = <4>;
7068 compatible = "st,m25p80";
7069 spi-max-frequency = <20000000>;
7070 reg = <0>;
7071 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
7072 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
7073 @@ -1,3 +1,4 @@
7074 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7075 /*
7076 * Device Tree file for Freescale LS2080A RDB Board.
7077 *
7078 @@ -6,43 +7,6 @@
7079 *
7080 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7081 *
7082 - * This file is dual-licensed: you can use it either under the terms
7083 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7084 - * licensing only applies to this file, and not this project as a
7085 - * whole.
7086 - *
7087 - * a) This library is free software; you can redistribute it and/or
7088 - * modify it under the terms of the GNU General Public License as
7089 - * published by the Free Software Foundation; either version 2 of the
7090 - * License, or (at your option) any later version.
7091 - *
7092 - * This library is distributed in the hope that it will be useful,
7093 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7094 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7095 - * GNU General Public License for more details.
7096 - *
7097 - * Or, alternatively,
7098 - *
7099 - * b) Permission is hereby granted, free of charge, to any person
7100 - * obtaining a copy of this software and associated documentation
7101 - * files (the "Software"), to deal in the Software without
7102 - * restriction, including without limitation the rights to use,
7103 - * copy, modify, merge, publish, distribute, sublicense, and/or
7104 - * sell copies of the Software, and to permit persons to whom the
7105 - * Software is furnished to do so, subject to the following
7106 - * conditions:
7107 - *
7108 - * The above copyright notice and this permission notice shall be
7109 - * included in all copies or substantial portions of the Software.
7110 - *
7111 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7112 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7113 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7114 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7115 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7116 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7117 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7118 - * OTHER DEALINGS IN THE SOFTWARE.
7119 */
7120
7121 &esdhc {
7122 @@ -85,6 +49,7 @@
7123 reg = <0x75>;
7124 #address-cells = <1>;
7125 #size-cells = <0>;
7126 + i2c-mux-never-disable;
7127 i2c@1 {
7128 #address-cells = <1>;
7129 #size-cells = <0>;
7130 @@ -95,6 +60,17 @@
7131 };
7132 };
7133
7134 + i2c@2 {
7135 + #address-cells = <1>;
7136 + #size-cells = <0>;
7137 + reg = <0x02>;
7138 + ina220@40 {
7139 + compatible = "ti,ina220";
7140 + reg = <0x40>;
7141 + shunt-resistor = <500>;
7142 + };
7143 + };
7144 +
7145 i2c@3 {
7146 #address-cells = <1>;
7147 #size-cells = <0>;
7148 @@ -132,7 +108,15 @@
7149 };
7150
7151 &qspi {
7152 - status = "disabled";
7153 + status = "okay";
7154 + flash0: s25fs512s@0 {
7155 + #address-cells = <1>;
7156 + #size-cells = <1>;
7157 + compatible = "spansion,m25p80";
7158 + m25p,fast-read;
7159 + spi-max-frequency = <20000000>;
7160 + reg = <0>;
7161 + };
7162 };
7163
7164 &sata0 {
7165 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
7166 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
7167 @@ -1,3 +1,4 @@
7168 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7169 /*
7170 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
7171 *
7172 @@ -6,43 +7,6 @@
7173 *
7174 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7175 *
7176 - * This file is dual-licensed: you can use it either under the terms
7177 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7178 - * licensing only applies to this file, and not this project as a
7179 - * whole.
7180 - *
7181 - * a) This library is free software; you can redistribute it and/or
7182 - * modify it under the terms of the GNU General Public License as
7183 - * published by the Free Software Foundation; either version 2 of the
7184 - * License, or (at your option) any later version.
7185 - *
7186 - * This library is distributed in the hope that it will be useful,
7187 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7188 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7189 - * GNU General Public License for more details.
7190 - *
7191 - * Or, alternatively,
7192 - *
7193 - * b) Permission is hereby granted, free of charge, to any person
7194 - * obtaining a copy of this software and associated documentation
7195 - * files (the "Software"), to deal in the Software without
7196 - * restriction, including without limitation the rights to use,
7197 - * copy, modify, merge, publish, distribute, sublicense, and/or
7198 - * sell copies of the Software, and to permit persons to whom the
7199 - * Software is furnished to do so, subject to the following
7200 - * conditions:
7201 - *
7202 - * The above copyright notice and this permission notice shall be
7203 - * included in all copies or substantial portions of the Software.
7204 - *
7205 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7206 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7207 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7208 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7209 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7210 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7211 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7212 - * OTHER DEALINGS IN THE SOFTWARE.
7213 */
7214
7215 #include <dt-bindings/thermal/thermal.h>
7216 @@ -111,13 +75,12 @@
7217 mask = <0x2>;
7218 };
7219
7220 - timer {
7221 + timer: timer {
7222 compatible = "arm,armv8-timer";
7223 interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
7224 <1 14 4>, /* Physical Non-Secure PPI, active-low */
7225 <1 11 4>, /* Virtual PPI, active-low */
7226 <1 10 4>; /* Hypervisor PPI, active-low */
7227 - fsl,erratum-a008585;
7228 };
7229
7230 pmu {
7231 @@ -135,6 +98,7 @@
7232 #address-cells = <2>;
7233 #size-cells = <2>;
7234 ranges;
7235 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
7236
7237 clockgen: clocking@1300000 {
7238 compatible = "fsl,ls2080a-clockgen";
7239 @@ -194,54 +158,7 @@
7240 #thermal-sensor-cells = <1>;
7241 };
7242
7243 - thermal-zones {
7244 - cpu_thermal: cpu-thermal {
7245 - polling-delay-passive = <1000>;
7246 - polling-delay = <5000>;
7247 -
7248 - thermal-sensors = <&tmu 4>;
7249 -
7250 - trips {
7251 - cpu_alert: cpu-alert {
7252 - temperature = <75000>;
7253 - hysteresis = <2000>;
7254 - type = "passive";
7255 - };
7256 - cpu_crit: cpu-crit {
7257 - temperature = <85000>;
7258 - hysteresis = <2000>;
7259 - type = "critical";
7260 - };
7261 - };
7262 -
7263 - cooling-maps {
7264 - map0 {
7265 - trip = <&cpu_alert>;
7266 - cooling-device =
7267 - <&cpu0 THERMAL_NO_LIMIT
7268 - THERMAL_NO_LIMIT>;
7269 - };
7270 - map1 {
7271 - trip = <&cpu_alert>;
7272 - cooling-device =
7273 - <&cpu2 THERMAL_NO_LIMIT
7274 - THERMAL_NO_LIMIT>;
7275 - };
7276 - map2 {
7277 - trip = <&cpu_alert>;
7278 - cooling-device =
7279 - <&cpu4 THERMAL_NO_LIMIT
7280 - THERMAL_NO_LIMIT>;
7281 - };
7282 - map3 {
7283 - trip = <&cpu_alert>;
7284 - cooling-device =
7285 - <&cpu6 THERMAL_NO_LIMIT
7286 - THERMAL_NO_LIMIT>;
7287 - };
7288 - };
7289 - };
7290 - };
7291 + #include "fsl-tmu.dtsi"
7292
7293 serial0: serial@21c0500 {
7294 compatible = "fsl,ns16550", "ns16550a";
7295 @@ -357,6 +274,8 @@
7296 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
7297 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
7298 msi-parent = <&its>;
7299 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
7300 + dma-coherent;
7301 #address-cells = <3>;
7302 #size-cells = <1>;
7303
7304 @@ -460,6 +379,8 @@
7305 compatible = "arm,mmu-500";
7306 reg = <0 0x5000000 0 0x800000>;
7307 #global-interrupts = <12>;
7308 + #iommu-cells = <1>;
7309 + stream-match-mask = <0x7C00>;
7310 interrupts = <0 13 4>, /* global secure fault */
7311 <0 14 4>, /* combined secure interrupt */
7312 <0 15 4>, /* global non-secure fault */
7313 @@ -502,7 +423,6 @@
7314 <0 204 4>, <0 205 4>,
7315 <0 206 4>, <0 207 4>,
7316 <0 208 4>, <0 209 4>;
7317 - mmu-masters = <&fsl_mc 0x300 0>;
7318 };
7319
7320 dspi: dspi@2100000 {
7321 @@ -574,15 +494,126 @@
7322 #interrupt-cells = <2>;
7323 };
7324
7325 + /* TODO: WRIOP (CCSR?) */
7326 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
7327 + * E-MDIO1: 0x1_6000
7328 + */
7329 + compatible = "fsl,fman-memac-mdio";
7330 + reg = <0x0 0x8B96000 0x0 0x1000>;
7331 + device_type = "mdio"; /* TODO: is this necessary? */
7332 + little-endian; /* force the driver in LE mode */
7333 +
7334 + /* Not necessary on the QDS, but needed on the RDB */
7335 + #address-cells = <1>;
7336 + #size-cells = <0>;
7337 + };
7338 +
7339 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
7340 + * E-MDIO2: 0x1_7000
7341 + */
7342 + compatible = "fsl,fman-memac-mdio";
7343 + reg = <0x0 0x8B97000 0x0 0x1000>;
7344 + device_type = "mdio"; /* TODO: is this necessary? */
7345 + little-endian; /* force the driver in LE mode */
7346 +
7347 + #address-cells = <1>;
7348 + #size-cells = <0>;
7349 + };
7350 +
7351 + pcs_mdio1: mdio@0x8c07000 {
7352 + compatible = "fsl,fman-memac-mdio";
7353 + reg = <0x0 0x8c07000 0x0 0x1000>;
7354 + device_type = "mdio";
7355 + little-endian;
7356 +
7357 + #address-cells = <1>;
7358 + #size-cells = <0>;
7359 + };
7360 +
7361 + pcs_mdio2: mdio@0x8c0b000 {
7362 + compatible = "fsl,fman-memac-mdio";
7363 + reg = <0x0 0x8c0b000 0x0 0x1000>;
7364 + device_type = "mdio";
7365 + little-endian;
7366 +
7367 + #address-cells = <1>;
7368 + #size-cells = <0>;
7369 + };
7370 +
7371 + pcs_mdio3: mdio@0x8c0f000 {
7372 + compatible = "fsl,fman-memac-mdio";
7373 + reg = <0x0 0x8c0f000 0x0 0x1000>;
7374 + device_type = "mdio";
7375 + little-endian;
7376 +
7377 + #address-cells = <1>;
7378 + #size-cells = <0>;
7379 + };
7380 +
7381 + pcs_mdio4: mdio@0x8c13000 {
7382 + compatible = "fsl,fman-memac-mdio";
7383 + reg = <0x0 0x8c13000 0x0 0x1000>;
7384 + device_type = "mdio";
7385 + little-endian;
7386 +
7387 + #address-cells = <1>;
7388 + #size-cells = <0>;
7389 + };
7390 +
7391 + pcs_mdio5: mdio@0x8c17000 {
7392 + status = "disabled";
7393 + compatible = "fsl,fman-memac-mdio";
7394 + reg = <0x0 0x8c17000 0x0 0x1000>;
7395 + device_type = "mdio";
7396 + little-endian;
7397 +
7398 + #address-cells = <1>;
7399 + #size-cells = <0>;
7400 + };
7401 +
7402 + pcs_mdio6: mdio@0x8c1b000 {
7403 + status = "disabled";
7404 + compatible = "fsl,fman-memac-mdio";
7405 + reg = <0x0 0x8c1b000 0x0 0x1000>;
7406 + device_type = "mdio";
7407 + little-endian;
7408 +
7409 + #address-cells = <1>;
7410 + #size-cells = <0>;
7411 + };
7412 +
7413 + pcs_mdio7: mdio@0x8c1f000 {
7414 + status = "disabled";
7415 + compatible = "fsl,fman-memac-mdio";
7416 + reg = <0x0 0x8c1f000 0x0 0x1000>;
7417 + device_type = "mdio";
7418 + little-endian;
7419 +
7420 + #address-cells = <1>;
7421 + #size-cells = <0>;
7422 + };
7423 +
7424 + pcs_mdio8: mdio@0x8c23000 {
7425 + status = "disabled";
7426 + compatible = "fsl,fman-memac-mdio";
7427 + reg = <0x0 0x8c23000 0x0 0x1000>;
7428 + device_type = "mdio";
7429 + little-endian;
7430 +
7431 + #address-cells = <1>;
7432 + #size-cells = <0>;
7433 + };
7434 +
7435 i2c0: i2c@2000000 {
7436 status = "disabled";
7437 - compatible = "fsl,vf610-i2c";
7438 + compatible = "fsl,vf610-i2c", "fsl,ls208xa-vf610-i2c";
7439 #address-cells = <1>;
7440 #size-cells = <0>;
7441 reg = <0x0 0x2000000 0x0 0x10000>;
7442 interrupts = <0 34 0x4>; /* Level high type */
7443 clock-names = "i2c";
7444 - clocks = <&clockgen 4 3>;
7445 + clocks = <&clockgen 4 1>;
7446 + scl-gpios = <&gpio3 10 0>;
7447 };
7448
7449 i2c1: i2c@2010000 {
7450 @@ -593,7 +624,7 @@
7451 reg = <0x0 0x2010000 0x0 0x10000>;
7452 interrupts = <0 34 0x4>; /* Level high type */
7453 clock-names = "i2c";
7454 - clocks = <&clockgen 4 3>;
7455 + clocks = <&clockgen 4 1>;
7456 };
7457
7458 i2c2: i2c@2020000 {
7459 @@ -604,7 +635,7 @@
7460 reg = <0x0 0x2020000 0x0 0x10000>;
7461 interrupts = <0 35 0x4>; /* Level high type */
7462 clock-names = "i2c";
7463 - clocks = <&clockgen 4 3>;
7464 + clocks = <&clockgen 4 1>;
7465 };
7466
7467 i2c3: i2c@2030000 {
7468 @@ -615,7 +646,7 @@
7469 reg = <0x0 0x2030000 0x0 0x10000>;
7470 interrupts = <0 35 0x4>; /* Level high type */
7471 clock-names = "i2c";
7472 - clocks = <&clockgen 4 3>;
7473 + clocks = <&clockgen 4 1>;
7474 };
7475
7476 ifc: ifc@2240000 {
7477 @@ -648,8 +679,8 @@
7478 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7479 "snps,dw-pcie";
7480 reg-names = "regs", "config";
7481 - interrupts = <0 108 0x4>; /* Level high type */
7482 - interrupt-names = "intr";
7483 + interrupts = <0 108 0x4>; /* aer interrupt */
7484 + interrupt-names = "aer";
7485 #address-cells = <3>;
7486 #size-cells = <2>;
7487 device_type = "pci";
7488 @@ -657,20 +688,22 @@
7489 num-lanes = <4>;
7490 bus-range = <0x0 0xff>;
7491 msi-parent = <&its>;
7492 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7493 #interrupt-cells = <1>;
7494 interrupt-map-mask = <0 0 0 7>;
7495 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
7496 <0000 0 0 2 &gic 0 0 0 110 4>,
7497 <0000 0 0 3 &gic 0 0 0 111 4>,
7498 <0000 0 0 4 &gic 0 0 0 112 4>;
7499 + status = "disabled";
7500 };
7501
7502 pcie2: pcie@3500000 {
7503 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7504 "snps,dw-pcie";
7505 reg-names = "regs", "config";
7506 - interrupts = <0 113 0x4>; /* Level high type */
7507 - interrupt-names = "intr";
7508 + interrupts = <0 113 0x4>; /* aer interrupt */
7509 + interrupt-names = "aer";
7510 #address-cells = <3>;
7511 #size-cells = <2>;
7512 device_type = "pci";
7513 @@ -678,20 +711,22 @@
7514 num-lanes = <4>;
7515 bus-range = <0x0 0xff>;
7516 msi-parent = <&its>;
7517 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7518 #interrupt-cells = <1>;
7519 interrupt-map-mask = <0 0 0 7>;
7520 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
7521 <0000 0 0 2 &gic 0 0 0 115 4>,
7522 <0000 0 0 3 &gic 0 0 0 116 4>,
7523 <0000 0 0 4 &gic 0 0 0 117 4>;
7524 + status = "disabled";
7525 };
7526
7527 pcie3: pcie@3600000 {
7528 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7529 "snps,dw-pcie";
7530 reg-names = "regs", "config";
7531 - interrupts = <0 118 0x4>; /* Level high type */
7532 - interrupt-names = "intr";
7533 + interrupts = <0 118 0x4>; /* aer interrupt */
7534 + interrupt-names = "aer";
7535 #address-cells = <3>;
7536 #size-cells = <2>;
7537 device_type = "pci";
7538 @@ -699,20 +734,22 @@
7539 num-lanes = <8>;
7540 bus-range = <0x0 0xff>;
7541 msi-parent = <&its>;
7542 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7543 #interrupt-cells = <1>;
7544 interrupt-map-mask = <0 0 0 7>;
7545 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
7546 <0000 0 0 2 &gic 0 0 0 120 4>,
7547 <0000 0 0 3 &gic 0 0 0 121 4>,
7548 <0000 0 0 4 &gic 0 0 0 122 4>;
7549 + status = "disabled";
7550 };
7551
7552 pcie4: pcie@3700000 {
7553 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7554 "snps,dw-pcie";
7555 reg-names = "regs", "config";
7556 - interrupts = <0 123 0x4>; /* Level high type */
7557 - interrupt-names = "intr";
7558 + interrupts = <0 123 0x4>; /* aer interrupt */
7559 + interrupt-names = "aer";
7560 #address-cells = <3>;
7561 #size-cells = <2>;
7562 device_type = "pci";
7563 @@ -720,12 +757,14 @@
7564 num-lanes = <4>;
7565 bus-range = <0x0 0xff>;
7566 msi-parent = <&its>;
7567 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7568 #interrupt-cells = <1>;
7569 interrupt-map-mask = <0 0 0 7>;
7570 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
7571 <0000 0 0 2 &gic 0 0 0 125 4>,
7572 <0000 0 0 3 &gic 0 0 0 126 4>,
7573 <0000 0 0 4 &gic 0 0 0 127 4>;
7574 + status = "disabled";
7575 };
7576
7577 sata0: sata@3200000 {
7578 @@ -754,6 +793,8 @@
7579 dr_mode = "host";
7580 snps,quirk-frame-length-adjustment = <0x20>;
7581 snps,dis_rxdet_inp3_quirk;
7582 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7583 + snps,host-vbus-glitches;
7584 };
7585
7586 usb1: usb3@3110000 {
7587 @@ -764,6 +805,14 @@
7588 dr_mode = "host";
7589 snps,quirk-frame-length-adjustment = <0x20>;
7590 snps,dis_rxdet_inp3_quirk;
7591 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7592 + snps,host-vbus-glitches;
7593 + };
7594 +
7595 + serdes1: serdes@1ea0000 {
7596 + compatible = "fsl,serdes-10g";
7597 + reg = <0x0 0x1ea0000 0 0x00002000>;
7598 + little-endian;
7599 };
7600
7601 ccn@4000000 {
7602 @@ -771,6 +820,14 @@
7603 reg = <0x0 0x04000000 0x0 0x01000000>;
7604 interrupts = <0 12 4>;
7605 };
7606 +
7607 + ftm0: ftm0@2800000 {
7608 + compatible = "fsl,ls208xa-ftm-alarm";
7609 + reg = <0x0 0x2800000 0x0 0x10000>,
7610 + <0x0 0x1e34050 0x0 0x4>;
7611 + reg-names = "ftm", "pmctrl";
7612 + interrupts = <0 44 4>;
7613 + };
7614 };
7615
7616 ddr1: memory-controller@1080000 {
7617 @@ -786,4 +843,44 @@
7618 interrupts = <0 18 0x4>;
7619 little-endian;
7620 };
7621 +
7622 + firmware {
7623 + optee {
7624 + compatible = "linaro,optee-tz";
7625 + method = "smc";
7626 + };
7627 + };
7628 +};
7629 +
7630 +#include "fsl-tmu-map1.dtsi"
7631 +#include "fsl-tmu-map2.dtsi"
7632 +#include "fsl-tmu-map3.dtsi"
7633 +&thermal_zones {
7634 + thermal-zone1 {
7635 + status = "okay";
7636 + };
7637 +
7638 + thermal-zone2{
7639 + status = "okay";
7640 + };
7641 +
7642 + thermal-zone3{
7643 + status = "okay";
7644 + };
7645 +
7646 + thermal-zone4{
7647 + status = "okay";
7648 + };
7649 +
7650 + thermal-zone5{
7651 + status = "okay";
7652 + };
7653 +
7654 + thermal-zone6{
7655 + status = "okay";
7656 + };
7657 +
7658 + thermal-zone7 {
7659 + status = "okay";
7660 + };
7661 };
7662 --- /dev/null
7663 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
7664 @@ -0,0 +1,353 @@
7665 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
7666 +//
7667 +// Device Tree file for LX2160AQDS
7668 +//
7669 +// Copyright 2018 NXP
7670 +
7671 +/dts-v1/;
7672 +
7673 +#include "fsl-lx2160a.dtsi"
7674 +
7675 +/ {
7676 + model = "NXP Layerscape LX2160AQDS";
7677 + compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
7678 +
7679 + aliases {
7680 + crypto = &crypto;
7681 + serial0 = &uart0;
7682 + };
7683 +
7684 + chosen {
7685 + stdout-path = "serial0:115200n8";
7686 + };
7687 +
7688 + sb_3v3: regulator-sb3v3 {
7689 + compatible = "regulator-fixed";
7690 + regulator-name = "MC34717-3.3VSB";
7691 + regulator-min-microvolt = <3300000>;
7692 + regulator-max-microvolt = <3300000>;
7693 + regulator-boot-on;
7694 + regulator-always-on;
7695 + };
7696 +
7697 + mdio-mux-1 {
7698 + compatible = "mdio-mux-multiplexer";
7699 + mux-controls = <&mux 0>;
7700 + mdio-parent-bus = <&emdio1>;
7701 + #address-cells=<1>;
7702 + #size-cells = <0>;
7703 +
7704 + mdio@0 { /* On-board PHY #1 RGMI1*/
7705 + reg = <0x00>;
7706 + #address-cells = <1>;
7707 + #size-cells = <0>;
7708 + };
7709 +
7710 + mdio@8 { /* On-board PHY #2 RGMI2*/
7711 + reg = <0x8>;
7712 + #address-cells = <1>;
7713 + #size-cells = <0>;
7714 + };
7715 +
7716 + mdio@18 { /* Slot #1 */
7717 + reg = <0x18>;
7718 + #address-cells = <1>;
7719 + #size-cells = <0>;
7720 + };
7721 +
7722 + mdio@19 { /* Slot #2 */
7723 + reg = <0x19>;
7724 + #address-cells = <1>;
7725 + #size-cells = <0>;
7726 + };
7727 +
7728 + mdio@1a { /* Slot #3 */
7729 + reg = <0x1a>;
7730 + #address-cells = <1>;
7731 + #size-cells = <0>;
7732 + };
7733 +
7734 + mdio@1b { /* Slot #4 */
7735 + reg = <0x1b>;
7736 + #address-cells = <1>;
7737 + #size-cells = <0>;
7738 + };
7739 +
7740 + mdio@1c { /* Slot #5 */
7741 + reg = <0x1c>;
7742 + #address-cells = <1>;
7743 + #size-cells = <0>;
7744 + };
7745 +
7746 + mdio@1d { /* Slot #6 */
7747 + reg = <0x1d>;
7748 + #address-cells = <1>;
7749 + #size-cells = <0>;
7750 + };
7751 +
7752 + mdio@1e { /* Slot #7 */
7753 + reg = <0x1e>;
7754 + #address-cells = <1>;
7755 + #size-cells = <0>;
7756 + };
7757 +
7758 + mdio@1f { /* Slot #8 */
7759 + reg = <0x1f>;
7760 + #address-cells = <1>;
7761 + #size-cells = <0>;
7762 + };
7763 + };
7764 +
7765 + mdio-mux-2 {
7766 + compatible = "mdio-mux-multiplexer";
7767 + mux-controls = <&mux 1>;
7768 + mdio-parent-bus = <&emdio2>;
7769 + #address-cells=<1>;
7770 + #size-cells = <0>;
7771 +
7772 + mdio@0 { /* Slot #1 (secondary EMI) */
7773 + reg = <0x00>;
7774 + #address-cells = <1>;
7775 + #size-cells = <0>;
7776 + };
7777 +
7778 + mdio@1 { /* Slot #2 (secondary EMI) */
7779 + reg = <0x01>;
7780 + #address-cells = <1>;
7781 + #size-cells = <0>;
7782 + };
7783 +
7784 + mdio@2 { /* Slot #3 (secondary EMI) */
7785 + reg = <0x02>;
7786 + #address-cells = <1>;
7787 + #size-cells = <0>;
7788 + };
7789 +
7790 + mdio@3 { /* Slot #4 (secondary EMI) */
7791 + reg = <0x03>;
7792 + #address-cells = <1>;
7793 + #size-cells = <0>;
7794 + };
7795 +
7796 + mdio@4 { /* Slot #5 (secondary EMI) */
7797 + reg = <0x04>;
7798 + #address-cells = <1>;
7799 + #size-cells = <0>;
7800 + };
7801 +
7802 + mdio@5 { /* Slot #6 (secondary EMI) */
7803 + reg = <0x05>;
7804 + #address-cells = <1>;
7805 + #size-cells = <0>;
7806 + };
7807 +
7808 + mdio@6 { /* Slot #7 (secondary EMI) */
7809 + reg = <0x06>;
7810 + #address-cells = <1>;
7811 + #size-cells = <0>;
7812 + };
7813 +
7814 + mdio@7 { /* Slot #8 (secondary EMI) */
7815 + reg = <0x07>;
7816 + #address-cells = <1>;
7817 + #size-cells = <0>;
7818 + };
7819 + };
7820 +};
7821 +
7822 +&crypto {
7823 + status = "okay";
7824 +};
7825 +
7826 +&dspi0 {
7827 + status = "okay";
7828 +
7829 + dflash0: flash@0 {
7830 + #address-cells = <1>;
7831 + #size-cells = <1>;
7832 + compatible = "jedec,spi-nor";
7833 + reg = <0>;
7834 + spi-max-frequency = <1000000>;
7835 + };
7836 +};
7837 +
7838 +&dspi1 {
7839 + status = "okay";
7840 +
7841 + dflash1: flash@0 {
7842 + #address-cells = <1>;
7843 + #size-cells = <1>;
7844 + compatible = "jedec,spi-nor";
7845 + reg = <0>;
7846 + spi-max-frequency = <1000000>;
7847 + };
7848 +};
7849 +
7850 +&dspi2 {
7851 + status = "okay";
7852 +
7853 + dflash2: flash@0 {
7854 + #address-cells = <1>;
7855 + #size-cells = <1>;
7856 + compatible = "jedec,spi-nor";
7857 + reg = <0>;
7858 + spi-max-frequency = <1000000>;
7859 + };
7860 +};
7861 +
7862 +&emdio1 {
7863 + status = "okay";
7864 +};
7865 +
7866 +&emdio2 {
7867 + status = "okay";
7868 +};
7869 +
7870 +&esdhc0 {
7871 + status = "okay";
7872 +};
7873 +
7874 +&esdhc1 {
7875 + status = "okay";
7876 +};
7877 +
7878 +&i2c0 {
7879 + status = "okay";
7880 +
7881 + fpga@66 {
7882 + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
7883 + "simple-mfd";
7884 + reg = <0x66>;
7885 +
7886 + mux: mux-controller {
7887 + compatible = "reg-mux";
7888 + #mux-control-cells = <1>;
7889 + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
7890 + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
7891 + };
7892 + };
7893 +
7894 + i2c-mux@77 {
7895 + compatible = "nxp,pca9547";
7896 + reg = <0x77>;
7897 + #address-cells = <1>;
7898 + #size-cells = <0>;
7899 +
7900 + i2c@2 {
7901 + #address-cells = <1>;
7902 + #size-cells = <0>;
7903 + reg = <0x2>;
7904 +
7905 + power-monitor@40 {
7906 + compatible = "ti,ina220";
7907 + reg = <0x40>;
7908 + shunt-resistor = <500>;
7909 + };
7910 +
7911 + power-monitor@41 {
7912 + compatible = "ti,ina220";
7913 + reg = <0x41>;
7914 + shunt-resistor = <1000>;
7915 + };
7916 + };
7917 +
7918 + i2c@3 {
7919 + #address-cells = <1>;
7920 + #size-cells = <0>;
7921 + reg = <0x3>;
7922 +
7923 + temperature-sensor@4c {
7924 + compatible = "nxp,sa56004";
7925 + reg = <0x4c>;
7926 + vcc-supply = <&sb_3v3>;
7927 + };
7928 +
7929 + temperature-sensor@4d {
7930 + compatible = "nxp,sa56004";
7931 + reg = <0x4d>;
7932 + vcc-supply = <&sb_3v3>;
7933 + };
7934 +
7935 + rtc@51 {
7936 + compatible = "nxp,pcf2129";
7937 + reg = <0x51>;
7938 + };
7939 + };
7940 + };
7941 +};
7942 +
7943 +&uart0 {
7944 + status = "okay";
7945 +};
7946 +
7947 +&uart1 {
7948 + status = "okay";
7949 +};
7950 +
7951 +&usb0 {
7952 + status = "okay";
7953 +};
7954 +
7955 +&usb1 {
7956 + status = "okay";
7957 +};
7958 +
7959 +&pcs_mdio1 {
7960 + pcs_phy1: ethernet-phy@0 {
7961 + compatible = "ethernet-phy-ieee802.3-c45";
7962 + backplane-mode = "40gbase-kr";
7963 + reg = <0x0>;
7964 + fsl,lane-handle = <&serdes1>;
7965 + fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */
7966 + };
7967 +};
7968 +
7969 +&pcs_mdio2 {
7970 + pcs_phy2: ethernet-phy@0 {
7971 + compatible = "ethernet-phy-ieee802.3-c45";
7972 + backplane-mode = "40gbase-kr";
7973 + reg = <0x0>;
7974 + fsl,lane-handle = <&serdes1>;
7975 + fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */
7976 + };
7977 +};
7978 +
7979 +&pcs_mdio3 {
7980 + pcs_phy3: ethernet-phy@0 {
7981 + compatible = "ethernet-phy-ieee802.3-c45";
7982 + backplane-mode = "10gbase-kr";
7983 + reg = <0x0>;
7984 + fsl,lane-handle = <&serdes1>;
7985 + fsl,lane-reg = <0xF00 0x100>; /* lane H */
7986 + };
7987 +};
7988 +
7989 +&pcs_mdio4 {
7990 + pcs_phy4: ethernet-phy@0 {
7991 + compatible = "ethernet-phy-ieee802.3-c45";
7992 + backplane-mode = "10gbase-kr";
7993 + reg = <0x0>;
7994 + fsl,lane-handle = <&serdes1>;
7995 + fsl,lane-reg = <0xE00 0x100>; /* lane G */
7996 + };
7997 +};
7998 +
7999 +/* Update DPMAC connections to 40G backplane PHYs
8000 + * &dpmac1 {
8001 + * phy-handle = <&pcs_phy1>;
8002 + * };
8003 + *
8004 + * &dpmac2 {
8005 + * phy-handle = <&pcs_phy2>;
8006 + * };
8007 + */
8008 +
8009 +/* Update DPMAC connections to 10G backplane PHYs
8010 + * &dpmac3 {
8011 + * phy-handle = <&pcs_phy3>;
8012 + * };
8013 + *
8014 + * &dpmac4 {
8015 + * phy-handle = <&pcs_phy4>;
8016 + * };
8017 + */
8018 --- /dev/null
8019 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
8020 @@ -0,0 +1,233 @@
8021 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
8022 +//
8023 +// Device Tree file for LX2160ARDB
8024 +//
8025 +// Copyright 2018 NXP
8026 +
8027 +/dts-v1/;
8028 +
8029 +#include "fsl-lx2160a.dtsi"
8030 +
8031 +/ {
8032 + model = "NXP Layerscape LX2160ARDB";
8033 + compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
8034 +
8035 + aliases {
8036 + crypto = &crypto;
8037 + serial0 = &uart0;
8038 + };
8039 +
8040 + chosen {
8041 + stdout-path = "serial0:115200n8";
8042 + };
8043 +
8044 + sb_3v3: regulator-sb3v3 {
8045 + compatible = "regulator-fixed";
8046 + regulator-name = "MC34717-3.3VSB";
8047 + regulator-min-microvolt = <3300000>;
8048 + regulator-max-microvolt = <3300000>;
8049 + regulator-boot-on;
8050 + regulator-always-on;
8051 + };
8052 +};
8053 +
8054 +&crypto {
8055 + status = "okay";
8056 +};
8057 +
8058 +&emdio1 {
8059 + status = "okay";
8060 +};
8061 +
8062 +&emdio2 {
8063 + status = "okay";
8064 +};
8065 +
8066 +&esdhc0 {
8067 + sd-uhs-sdr104;
8068 + sd-uhs-sdr50;
8069 + sd-uhs-sdr25;
8070 + sd-uhs-sdr12;
8071 + status = "okay";
8072 +};
8073 +
8074 +&esdhc1 {
8075 + mmc-hs200-1_8v;
8076 + mmc-hs400-1_8v;
8077 + bus-width = <8>;
8078 + status = "okay";
8079 +};
8080 +
8081 +&i2c0 {
8082 + status = "okay";
8083 +
8084 + i2c-mux@77 {
8085 + compatible = "nxp,pca9547";
8086 + reg = <0x77>;
8087 + #address-cells = <1>;
8088 + #size-cells = <0>;
8089 +
8090 + i2c@2 {
8091 + #address-cells = <1>;
8092 + #size-cells = <0>;
8093 + reg = <0x2>;
8094 +
8095 + power-monitor@40 {
8096 + compatible = "ti,ina220";
8097 + reg = <0x40>;
8098 + shunt-resistor = <1000>;
8099 + };
8100 + };
8101 +
8102 + i2c@3 {
8103 + #address-cells = <1>;
8104 + #size-cells = <0>;
8105 + reg = <0x3>;
8106 +
8107 + temperature-sensor@4c {
8108 + compatible = "nxp,sa56004";
8109 + reg = <0x4c>;
8110 + vcc-supply = <&sb_3v3>;
8111 + };
8112 +
8113 + temperature-sensor@4d {
8114 + compatible = "nxp,sa56004";
8115 + reg = <0x4d>;
8116 + vcc-supply = <&sb_3v3>;
8117 + };
8118 + };
8119 + };
8120 +};
8121 +
8122 +&i2c4 {
8123 + status = "okay";
8124 +
8125 + rtc@51 {
8126 + compatible = "nxp,pcf2129";
8127 + reg = <0x51>;
8128 + // IRQ10_B
8129 + interrupts = <0 150 0x4>;
8130 + };
8131 +};
8132 +
8133 +&fspi {
8134 + status = "okay";
8135 + nxp,fspi-has-second-chip;
8136 + flash0: mt35xu512aba@0 {
8137 + #address-cells = <1>;
8138 + #size-cells = <1>;
8139 + compatible = "micron,m25p80";
8140 + m25p,fast-read;
8141 + spi-max-frequency = <50000000>;
8142 + reg = <0>;
8143 + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
8144 + spi-rx-bus-width = <8>;
8145 + spi-tx-bus-width = <1>;
8146 + };
8147 +
8148 + flash1: mt35xu512aba@1 {
8149 + #address-cells = <1>;
8150 + #size-cells = <1>;
8151 + compatible = "micron,m25p80";
8152 + m25p,fast-read;
8153 + spi-max-frequency = <50000000>;
8154 + reg = <1>;
8155 + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
8156 + spi-rx-bus-width = <8>;
8157 + spi-tx-bus-width = <1>;
8158 + };
8159 +};
8160 +
8161 +&uart0 {
8162 + status = "okay";
8163 +};
8164 +
8165 +&uart1 {
8166 + status = "okay";
8167 +};
8168 +
8169 +&usb0 {
8170 + status = "okay";
8171 +};
8172 +
8173 +&usb1 {
8174 + status = "okay";
8175 +};
8176 +
8177 +&emdio1 {
8178 + rgmii_phy1: ethernet-phy@1 {
8179 + /* AR8035 PHY - "compatible" property not strictly needed */
8180 + compatible = "ethernet-phy-id004d.d072";
8181 + reg = <0x1>;
8182 + /* Poll mode - no "interrupts" property defined */
8183 + };
8184 + rgmii_phy2: ethernet-phy@2 {
8185 + /* AR8035 PHY - "compatible" property not strictly needed */
8186 + compatible = "ethernet-phy-id004d.d072";
8187 + reg = <0x2>;
8188 + /* Poll mode - no "interrupts" property defined */
8189 + };
8190 + aquantia_phy1: ethernet-phy@4 {
8191 + /* AQR107 PHY - "compatible" property not strictly needed */
8192 + compatible = "ethernet-phy-ieee802.3-c45";
8193 + reg = <0x4>;
8194 + /* Poll mode - no "interrupts" property defined */
8195 + };
8196 + aquantia_phy2: ethernet-phy@5 {
8197 + /* AQR107 PHY - "compatible" property not strictly needed */
8198 + compatible = "ethernet-phy-ieee802.3-c45";
8199 + reg = <0x5>;
8200 + /* Poll mode - no "interrupts" property defined */
8201 + };
8202 +};
8203 +
8204 +&emdio2 {
8205 + inphi_phy: ethernet-phy@0 {
8206 + compatible = "ethernet-phy-id0210.7440";
8207 + reg = <0x0>;
8208 + };
8209 +};
8210 +
8211 +&dpmac3 {
8212 + phy-handle = <&aquantia_phy1>;
8213 + phy-connection-type = "xgmii";
8214 +};
8215 +
8216 +&dpmac4 {
8217 + phy-handle = <&aquantia_phy2>;
8218 + phy-connection-type = "xgmii";
8219 +};
8220 +
8221 +&dpmac5 {
8222 + phy-handle = <&inphi_phy>;
8223 +};
8224 +
8225 +&dpmac6 {
8226 + phy-handle = <&inphi_phy>;
8227 +};
8228 +
8229 +&dpmac17 {
8230 + phy-handle = <&rgmii_phy1>;
8231 + phy-connection-type = "rgmii-id";
8232 +};
8233 +
8234 +&dpmac18 {
8235 + phy-handle = <&rgmii_phy2>;
8236 + phy-connection-type = "rgmii-id";
8237 +};
8238 +
8239 +&sata0 {
8240 + status = "okay";
8241 +};
8242 +
8243 +&sata1 {
8244 + status = "okay";
8245 +};
8246 +
8247 +&sata2 {
8248 + status = "okay";
8249 +};
8250 +
8251 +&sata3 {
8252 + status = "okay";
8253 +};
8254 --- /dev/null
8255 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
8256 @@ -0,0 +1,1318 @@
8257 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
8258 +//
8259 +// Device Tree Include file for Layerscape-LX2160A family SoC.
8260 +//
8261 +// Copyright 2018 NXP
8262 +
8263 +#include <dt-bindings/gpio/gpio.h>
8264 +#include <dt-bindings/interrupt-controller/arm-gic.h>
8265 +
8266 +/memreserve/ 0x80000000 0x00010000;
8267 +
8268 +/ {
8269 + compatible = "fsl,lx2160a";
8270 + interrupt-parent = <&gic>;
8271 + #address-cells = <2>;
8272 + #size-cells = <2>;
8273 +
8274 + cpus {
8275 + #address-cells = <1>;
8276 + #size-cells = <0>;
8277 +
8278 + // 8 clusters having 2 Cortex-A72 cores each
8279 + cpu@0 {
8280 + device_type = "cpu";
8281 + compatible = "arm,cortex-a72";
8282 + enable-method = "psci";
8283 + reg = <0x0>;
8284 + clocks = <&clockgen 1 0>;
8285 + d-cache-size = <0x8000>;
8286 + d-cache-line-size = <64>;
8287 + d-cache-sets = <128>;
8288 + i-cache-size = <0xC000>;
8289 + i-cache-line-size = <64>;
8290 + i-cache-sets = <192>;
8291 + next-level-cache = <&cluster0_l2>;
8292 + };
8293 +
8294 + cpu@1 {
8295 + device_type = "cpu";
8296 + compatible = "arm,cortex-a72";
8297 + enable-method = "psci";
8298 + reg = <0x1>;
8299 + clocks = <&clockgen 1 0>;
8300 + d-cache-size = <0x8000>;
8301 + d-cache-line-size = <64>;
8302 + d-cache-sets = <128>;
8303 + i-cache-size = <0xC000>;
8304 + i-cache-line-size = <64>;
8305 + i-cache-sets = <192>;
8306 + next-level-cache = <&cluster0_l2>;
8307 + };
8308 +
8309 + cpu@100 {
8310 + device_type = "cpu";
8311 + compatible = "arm,cortex-a72";
8312 + enable-method = "psci";
8313 + reg = <0x100>;
8314 + clocks = <&clockgen 1 1>;
8315 + d-cache-size = <0x8000>;
8316 + d-cache-line-size = <64>;
8317 + d-cache-sets = <128>;
8318 + i-cache-size = <0xC000>;
8319 + i-cache-line-size = <64>;
8320 + i-cache-sets = <192>;
8321 + next-level-cache = <&cluster1_l2>;
8322 + };
8323 +
8324 + cpu@101 {
8325 + device_type = "cpu";
8326 + compatible = "arm,cortex-a72";
8327 + enable-method = "psci";
8328 + reg = <0x101>;
8329 + clocks = <&clockgen 1 1>;
8330 + d-cache-size = <0x8000>;
8331 + d-cache-line-size = <64>;
8332 + d-cache-sets = <128>;
8333 + i-cache-size = <0xC000>;
8334 + i-cache-line-size = <64>;
8335 + i-cache-sets = <192>;
8336 + next-level-cache = <&cluster1_l2>;
8337 + };
8338 +
8339 + cpu@200 {
8340 + device_type = "cpu";
8341 + compatible = "arm,cortex-a72";
8342 + enable-method = "psci";
8343 + reg = <0x200>;
8344 + clocks = <&clockgen 1 2>;
8345 + d-cache-size = <0x8000>;
8346 + d-cache-line-size = <64>;
8347 + d-cache-sets = <128>;
8348 + i-cache-size = <0xC000>;
8349 + i-cache-line-size = <64>;
8350 + i-cache-sets = <192>;
8351 + next-level-cache = <&cluster2_l2>;
8352 + };
8353 +
8354 + cpu@201 {
8355 + device_type = "cpu";
8356 + compatible = "arm,cortex-a72";
8357 + enable-method = "psci";
8358 + reg = <0x201>;
8359 + clocks = <&clockgen 1 2>;
8360 + d-cache-size = <0x8000>;
8361 + d-cache-line-size = <64>;
8362 + d-cache-sets = <128>;
8363 + i-cache-size = <0xC000>;
8364 + i-cache-line-size = <64>;
8365 + i-cache-sets = <192>;
8366 + next-level-cache = <&cluster2_l2>;
8367 + };
8368 +
8369 + cpu@300 {
8370 + device_type = "cpu";
8371 + compatible = "arm,cortex-a72";
8372 + enable-method = "psci";
8373 + reg = <0x300>;
8374 + clocks = <&clockgen 1 3>;
8375 + d-cache-size = <0x8000>;
8376 + d-cache-line-size = <64>;
8377 + d-cache-sets = <128>;
8378 + i-cache-size = <0xC000>;
8379 + i-cache-line-size = <64>;
8380 + i-cache-sets = <192>;
8381 + next-level-cache = <&cluster3_l2>;
8382 + };
8383 +
8384 + cpu@301 {
8385 + device_type = "cpu";
8386 + compatible = "arm,cortex-a72";
8387 + enable-method = "psci";
8388 + reg = <0x301>;
8389 + clocks = <&clockgen 1 3>;
8390 + d-cache-size = <0x8000>;
8391 + d-cache-line-size = <64>;
8392 + d-cache-sets = <128>;
8393 + i-cache-size = <0xC000>;
8394 + i-cache-line-size = <64>;
8395 + i-cache-sets = <192>;
8396 + next-level-cache = <&cluster3_l2>;
8397 + };
8398 +
8399 + cpu@400 {
8400 + device_type = "cpu";
8401 + compatible = "arm,cortex-a72";
8402 + enable-method = "psci";
8403 + reg = <0x400>;
8404 + clocks = <&clockgen 1 4>;
8405 + d-cache-size = <0x8000>;
8406 + d-cache-line-size = <64>;
8407 + d-cache-sets = <128>;
8408 + i-cache-size = <0xC000>;
8409 + i-cache-line-size = <64>;
8410 + i-cache-sets = <192>;
8411 + next-level-cache = <&cluster4_l2>;
8412 + };
8413 +
8414 + cpu@401 {
8415 + device_type = "cpu";
8416 + compatible = "arm,cortex-a72";
8417 + enable-method = "psci";
8418 + reg = <0x401>;
8419 + clocks = <&clockgen 1 4>;
8420 + d-cache-size = <0x8000>;
8421 + d-cache-line-size = <64>;
8422 + d-cache-sets = <128>;
8423 + i-cache-size = <0xC000>;
8424 + i-cache-line-size = <64>;
8425 + i-cache-sets = <192>;
8426 + next-level-cache = <&cluster4_l2>;
8427 + };
8428 +
8429 + cpu@500 {
8430 + device_type = "cpu";
8431 + compatible = "arm,cortex-a72";
8432 + enable-method = "psci";
8433 + reg = <0x500>;
8434 + clocks = <&clockgen 1 5>;
8435 + d-cache-size = <0x8000>;
8436 + d-cache-line-size = <64>;
8437 + d-cache-sets = <128>;
8438 + i-cache-size = <0xC000>;
8439 + i-cache-line-size = <64>;
8440 + i-cache-sets = <192>;
8441 + next-level-cache = <&cluster5_l2>;
8442 + };
8443 +
8444 + cpu@501 {
8445 + device_type = "cpu";
8446 + compatible = "arm,cortex-a72";
8447 + enable-method = "psci";
8448 + reg = <0x501>;
8449 + clocks = <&clockgen 1 5>;
8450 + d-cache-size = <0x8000>;
8451 + d-cache-line-size = <64>;
8452 + d-cache-sets = <128>;
8453 + i-cache-size = <0xC000>;
8454 + i-cache-line-size = <64>;
8455 + i-cache-sets = <192>;
8456 + next-level-cache = <&cluster5_l2>;
8457 + };
8458 +
8459 + cpu@600 {
8460 + device_type = "cpu";
8461 + compatible = "arm,cortex-a72";
8462 + enable-method = "psci";
8463 + reg = <0x600>;
8464 + clocks = <&clockgen 1 6>;
8465 + d-cache-size = <0x8000>;
8466 + d-cache-line-size = <64>;
8467 + d-cache-sets = <128>;
8468 + i-cache-size = <0xC000>;
8469 + i-cache-line-size = <64>;
8470 + i-cache-sets = <192>;
8471 + next-level-cache = <&cluster6_l2>;
8472 + };
8473 +
8474 + cpu@601 {
8475 + device_type = "cpu";
8476 + compatible = "arm,cortex-a72";
8477 + enable-method = "psci";
8478 + reg = <0x601>;
8479 + clocks = <&clockgen 1 6>;
8480 + d-cache-size = <0x8000>;
8481 + d-cache-line-size = <64>;
8482 + d-cache-sets = <128>;
8483 + i-cache-size = <0xC000>;
8484 + i-cache-line-size = <64>;
8485 + i-cache-sets = <192>;
8486 + next-level-cache = <&cluster6_l2>;
8487 + };
8488 +
8489 + cpu@700 {
8490 + device_type = "cpu";
8491 + compatible = "arm,cortex-a72";
8492 + enable-method = "psci";
8493 + reg = <0x700>;
8494 + clocks = <&clockgen 1 7>;
8495 + d-cache-size = <0x8000>;
8496 + d-cache-line-size = <64>;
8497 + d-cache-sets = <128>;
8498 + i-cache-size = <0xC000>;
8499 + i-cache-line-size = <64>;
8500 + i-cache-sets = <192>;
8501 + next-level-cache = <&cluster7_l2>;
8502 + };
8503 +
8504 + cpu@701 {
8505 + device_type = "cpu";
8506 + compatible = "arm,cortex-a72";
8507 + enable-method = "psci";
8508 + reg = <0x701>;
8509 + clocks = <&clockgen 1 7>;
8510 + d-cache-size = <0x8000>;
8511 + d-cache-line-size = <64>;
8512 + d-cache-sets = <128>;
8513 + i-cache-size = <0xC000>;
8514 + i-cache-line-size = <64>;
8515 + i-cache-sets = <192>;
8516 + next-level-cache = <&cluster7_l2>;
8517 + };
8518 +
8519 + cluster0_l2: l2-cache0 {
8520 + compatible = "cache";
8521 + cache-size = <0x100000>;
8522 + cache-line-size = <64>;
8523 + cache-sets = <1024>;
8524 + cache-level = <2>;
8525 + };
8526 +
8527 + cluster1_l2: l2-cache1 {
8528 + compatible = "cache";
8529 + cache-size = <0x100000>;
8530 + cache-line-size = <64>;
8531 + cache-sets = <1024>;
8532 + cache-level = <2>;
8533 + };
8534 +
8535 + cluster2_l2: l2-cache2 {
8536 + compatible = "cache";
8537 + cache-size = <0x100000>;
8538 + cache-line-size = <64>;
8539 + cache-sets = <1024>;
8540 + cache-level = <2>;
8541 + };
8542 +
8543 + cluster3_l2: l2-cache3 {
8544 + compatible = "cache";
8545 + cache-size = <0x100000>;
8546 + cache-line-size = <64>;
8547 + cache-sets = <1024>;
8548 + cache-level = <2>;
8549 + };
8550 +
8551 + cluster4_l2: l2-cache4 {
8552 + compatible = "cache";
8553 + cache-size = <0x100000>;
8554 + cache-line-size = <64>;
8555 + cache-sets = <1024>;
8556 + cache-level = <2>;
8557 + };
8558 +
8559 + cluster5_l2: l2-cache5 {
8560 + compatible = "cache";
8561 + cache-size = <0x100000>;
8562 + cache-line-size = <64>;
8563 + cache-sets = <1024>;
8564 + cache-level = <2>;
8565 + };
8566 +
8567 + cluster6_l2: l2-cache6 {
8568 + compatible = "cache";
8569 + cache-size = <0x100000>;
8570 + cache-line-size = <64>;
8571 + cache-sets = <1024>;
8572 + cache-level = <2>;
8573 + };
8574 +
8575 + cluster7_l2: l2-cache7 {
8576 + compatible = "cache";
8577 + cache-size = <0x100000>;
8578 + cache-line-size = <64>;
8579 + cache-sets = <1024>;
8580 + cache-level = <2>;
8581 + };
8582 + };
8583 +
8584 + gic: interrupt-controller@6000000 {
8585 + compatible = "arm,gic-v3";
8586 + reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
8587 + <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
8588 + // SGI_base)
8589 + <0x0 0x0c0c0000 0 0x2000>, // GICC
8590 + <0x0 0x0c0d0000 0 0x1000>, // GICH
8591 + <0x0 0x0c0e0000 0 0x20000>; // GICV
8592 + #interrupt-cells = <3>;
8593 + #address-cells = <2>;
8594 + #size-cells = <2>;
8595 + ranges;
8596 + interrupt-controller;
8597 + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
8598 +
8599 + its: gic-its@6020000 {
8600 + compatible = "arm,gic-v3-its";
8601 + msi-controller;
8602 + reg = <0x0 0x6020000 0 0x20000>;
8603 + };
8604 + };
8605 +
8606 + timer {
8607 + compatible = "arm,armv8-timer";
8608 + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
8609 + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
8610 + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
8611 + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
8612 + };
8613 +
8614 + pmu {
8615 + compatible = "arm,cortex-a72-pmu";
8616 + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
8617 + };
8618 +
8619 + psci {
8620 + compatible = "arm,psci-0.2";
8621 + method = "smc";
8622 + };
8623 +
8624 + memory@80000000 {
8625 + // DRAM space - 1, size : 2 GB DRAM
8626 + device_type = "memory";
8627 + reg = <0x00000000 0x80000000 0 0x80000000>;
8628 + };
8629 +
8630 + ddr1: memory-controller@1080000 {
8631 + compatible = "fsl,qoriq-memory-controller";
8632 + reg = <0x0 0x1080000 0x0 0x1000>;
8633 + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
8634 + little-endian;
8635 + };
8636 +
8637 + ddr2: memory-controller@1090000 {
8638 + compatible = "fsl,qoriq-memory-controller";
8639 + reg = <0x0 0x1090000 0x0 0x1000>;
8640 + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
8641 + little-endian;
8642 + };
8643 +
8644 + sysclk: sysclk {
8645 + compatible = "fixed-clock";
8646 + #clock-cells = <0>;
8647 + clock-frequency = <100000000>;
8648 + clock-output-names = "sysclk";
8649 + };
8650 +
8651 + soc {
8652 + compatible = "simple-bus";
8653 + #address-cells = <2>;
8654 + #size-cells = <2>;
8655 + ranges;
8656 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
8657 +
8658 + crypto: crypto@8000000 {
8659 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
8660 + fsl,sec-era = <10>;
8661 + #address-cells = <1>;
8662 + #size-cells = <1>;
8663 + ranges = <0x0 0x00 0x8000000 0x100000>;
8664 + reg = <0x00 0x8000000 0x0 0x100000>;
8665 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
8666 + dma-coherent;
8667 + status = "disabled";
8668 +
8669 + sec_jr0: jr@10000 {
8670 + compatible = "fsl,sec-v5.0-job-ring",
8671 + "fsl,sec-v4.0-job-ring";
8672 + reg = <0x10000 0x10000>;
8673 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
8674 + };
8675 +
8676 + sec_jr1: jr@20000 {
8677 + compatible = "fsl,sec-v5.0-job-ring",
8678 + "fsl,sec-v4.0-job-ring";
8679 + reg = <0x20000 0x10000>;
8680 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
8681 + };
8682 +
8683 + sec_jr2: jr@30000 {
8684 + compatible = "fsl,sec-v5.0-job-ring",
8685 + "fsl,sec-v4.0-job-ring";
8686 + reg = <0x30000 0x10000>;
8687 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
8688 + };
8689 +
8690 + sec_jr3: jr@40000 {
8691 + compatible = "fsl,sec-v5.0-job-ring",
8692 + "fsl,sec-v4.0-job-ring";
8693 + reg = <0x40000 0x10000>;
8694 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
8695 + };
8696 + };
8697 +
8698 + clockgen: clock-controller@1300000 {
8699 + compatible = "fsl,lx2160a-clockgen";
8700 + reg = <0 0x1300000 0 0xa0000>;
8701 + #clock-cells = <2>;
8702 + clocks = <&sysclk>;
8703 + };
8704 +
8705 + dcfg: syscon@1e00000 {
8706 + compatible = "fsl,lx2160a-dcfg", "syscon";
8707 + reg = <0x0 0x1e00000 0x0 0x10000>;
8708 + little-endian;
8709 + };
8710 +
8711 + /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
8712 + emdio1: mdio@8b96000 {
8713 + compatible = "fsl,fman-memac-mdio";
8714 + reg = <0x0 0x8b96000 0x0 0x1000>;
8715 + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
8716 + #address-cells = <1>;
8717 + #size-cells = <0>;
8718 + little-endian; /* force the driver in LE mode */
8719 + status = "disabled";
8720 + };
8721 +
8722 + /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */
8723 + emdio2: mdio@8b97000 {
8724 + compatible = "fsl,fman-memac-mdio";
8725 + reg = <0x0 0x8b97000 0x0 0x1000>;
8726 + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
8727 + #address-cells = <1>;
8728 + #size-cells = <0>;
8729 + little-endian; /* force the driver in LE mode */
8730 + status = "disabled";
8731 + };
8732 +
8733 + pcs_mdio1: mdio@0x8c07000 {
8734 + compatible = "fsl,fman-memac-mdio";
8735 + reg = <0x0 0x8c07000 0x0 0x1000>;
8736 + device_type = "mdio";
8737 + little-endian;
8738 +
8739 + #address-cells = <1>;
8740 + #size-cells = <0>;
8741 + };
8742 +
8743 + pcs_mdio2: mdio@0x8c0b000 {
8744 + compatible = "fsl,fman-memac-mdio";
8745 + reg = <0x0 0x8c0b000 0x0 0x1000>;
8746 + device_type = "mdio";
8747 + little-endian;
8748 +
8749 + #address-cells = <1>;
8750 + #size-cells = <0>;
8751 + };
8752 +
8753 + pcs_mdio3: mdio@0x8c0f000 {
8754 + compatible = "fsl,fman-memac-mdio";
8755 + reg = <0x0 0x8c0f000 0x0 0x1000>;
8756 + device_type = "mdio";
8757 + little-endian;
8758 +
8759 + #address-cells = <1>;
8760 + #size-cells = <0>;
8761 + };
8762 +
8763 + pcs_mdio4: mdio@0x8c13000 {
8764 + compatible = "fsl,fman-memac-mdio";
8765 + reg = <0x0 0x8c13000 0x0 0x1000>;
8766 + device_type = "mdio";
8767 + little-endian;
8768 +
8769 + #address-cells = <1>;
8770 + #size-cells = <0>;
8771 + };
8772 +
8773 + pcs_mdio5: mdio@0x8c17000 {
8774 + compatible = "fsl,fman-memac-mdio";
8775 + reg = <0x0 0x8c17000 0x0 0x1000>;
8776 + device_type = "mdio";
8777 + little-endian;
8778 +
8779 + #address-cells = <1>;
8780 + #size-cells = <0>;
8781 + };
8782 +
8783 + pcs_mdio6: mdio@0x8c1b000 {
8784 + compatible = "fsl,fman-memac-mdio";
8785 + reg = <0x0 0x8c1b000 0x0 0x1000>;
8786 + device_type = "mdio";
8787 + little-endian;
8788 +
8789 + #address-cells = <1>;
8790 + #size-cells = <0>;
8791 + };
8792 +
8793 + pcs_mdio7: mdio@0x8c1f000 {
8794 + compatible = "fsl,fman-memac-mdio";
8795 + reg = <0x0 0x8c1f000 0x0 0x1000>;
8796 + device_type = "mdio";
8797 + little-endian;
8798 +
8799 + #address-cells = <1>;
8800 + #size-cells = <0>;
8801 + };
8802 +
8803 + pcs_mdio8: mdio@0x8c23000 {
8804 + compatible = "fsl,fman-memac-mdio";
8805 + reg = <0x0 0x8c23000 0x0 0x1000>;
8806 + device_type = "mdio";
8807 + little-endian;
8808 +
8809 + #address-cells = <1>;
8810 + #size-cells = <0>;
8811 + };
8812 +
8813 + serdes1: serdes@1ea0000 {
8814 + compatible = "fsl,serdes-28g";
8815 + reg = <0x0 0x1ea0000 0 0x00002000>;
8816 + little-endian;
8817 + };
8818 +
8819 + i2c0: i2c@2000000 {
8820 + compatible = "fsl,vf610-i2c";
8821 + #address-cells = <1>;
8822 + #size-cells = <0>;
8823 + reg = <0x0 0x2000000 0x0 0x10000>;
8824 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
8825 + clock-names = "i2c";
8826 + clocks = <&clockgen 4 7>;
8827 + scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
8828 + status = "disabled";
8829 + };
8830 +
8831 + i2c1: i2c@2010000 {
8832 + compatible = "fsl,vf610-i2c";
8833 + #address-cells = <1>;
8834 + #size-cells = <0>;
8835 + reg = <0x0 0x2010000 0x0 0x10000>;
8836 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
8837 + clock-names = "i2c";
8838 + clocks = <&clockgen 4 7>;
8839 + status = "disabled";
8840 + };
8841 +
8842 + i2c2: i2c@2020000 {
8843 + compatible = "fsl,vf610-i2c";
8844 + #address-cells = <1>;
8845 + #size-cells = <0>;
8846 + reg = <0x0 0x2020000 0x0 0x10000>;
8847 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
8848 + clock-names = "i2c";
8849 + clocks = <&clockgen 4 7>;
8850 + status = "disabled";
8851 + };
8852 +
8853 + i2c3: i2c@2030000 {
8854 + compatible = "fsl,vf610-i2c";
8855 + #address-cells = <1>;
8856 + #size-cells = <0>;
8857 + reg = <0x0 0x2030000 0x0 0x10000>;
8858 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
8859 + clock-names = "i2c";
8860 + clocks = <&clockgen 4 7>;
8861 + status = "disabled";
8862 + };
8863 +
8864 + i2c4: i2c@2040000 {
8865 + compatible = "fsl,vf610-i2c";
8866 + #address-cells = <1>;
8867 + #size-cells = <0>;
8868 + reg = <0x0 0x2040000 0x0 0x10000>;
8869 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8870 + clock-names = "i2c";
8871 + clocks = <&clockgen 4 7>;
8872 + scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
8873 + status = "disabled";
8874 + };
8875 +
8876 + i2c5: i2c@2050000 {
8877 + compatible = "fsl,vf610-i2c";
8878 + #address-cells = <1>;
8879 + #size-cells = <0>;
8880 + reg = <0x0 0x2050000 0x0 0x10000>;
8881 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8882 + clock-names = "i2c";
8883 + clocks = <&clockgen 4 7>;
8884 + status = "disabled";
8885 + };
8886 +
8887 + i2c6: i2c@2060000 {
8888 + compatible = "fsl,vf610-i2c";
8889 + #address-cells = <1>;
8890 + #size-cells = <0>;
8891 + reg = <0x0 0x2060000 0x0 0x10000>;
8892 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
8893 + clock-names = "i2c";
8894 + clocks = <&clockgen 4 7>;
8895 + status = "disabled";
8896 + };
8897 +
8898 + i2c7: i2c@2070000 {
8899 + compatible = "fsl,vf610-i2c";
8900 + #address-cells = <1>;
8901 + #size-cells = <0>;
8902 + reg = <0x0 0x2070000 0x0 0x10000>;
8903 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
8904 + clock-names = "i2c";
8905 + clocks = <&clockgen 4 7>;
8906 + status = "disabled";
8907 + };
8908 +
8909 + dspi0: spi@2100000 {
8910 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8911 + #address-cells = <1>;
8912 + #size-cells = <0>;
8913 + reg = <0x0 0x2100000 0x0 0x10000>;
8914 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
8915 + clocks = <&clockgen 4 7>;
8916 + clock-names = "dspi";
8917 + spi-num-chipselects = <5>;
8918 + bus-num = <0>;
8919 + status = "disabled";
8920 + };
8921 +
8922 + dspi1: spi@2110000 {
8923 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8924 + #address-cells = <1>;
8925 + #size-cells = <0>;
8926 + reg = <0x0 0x2110000 0x0 0x10000>;
8927 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
8928 + clocks = <&clockgen 4 7>;
8929 + clock-names = "dspi";
8930 + spi-num-chipselects = <5>;
8931 + bus-num = <1>;
8932 + status = "disabled";
8933 + };
8934 +
8935 + dspi2: spi@2120000 {
8936 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8937 + #address-cells = <1>;
8938 + #size-cells = <0>;
8939 + reg = <0x0 0x2120000 0x0 0x10000>;
8940 + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
8941 + clocks = <&clockgen 4 7>;
8942 + clock-names = "dspi";
8943 + spi-num-chipselects = <5>;
8944 + bus-num = <2>;
8945 + status = "disabled";
8946 + };
8947 +
8948 + esdhc0: esdhc@2140000 {
8949 + compatible = "fsl,esdhc";
8950 + reg = <0x0 0x2140000 0x0 0x10000>;
8951 + interrupts = <0 28 0x4>; /* Level high type */
8952 + clocks = <&clockgen 4 1>;
8953 + voltage-ranges = <1800 1800 3300 3300>;
8954 + sdhci,auto-cmd12;
8955 + little-endian;
8956 + bus-width = <4>;
8957 + status = "disabled";
8958 + };
8959 +
8960 + esdhc1: esdhc@2150000 {
8961 + compatible = "fsl,esdhc";
8962 + reg = <0x0 0x2150000 0x0 0x10000>;
8963 + interrupts = <0 63 0x4>; /* Level high type */
8964 + clocks = <&clockgen 4 1>;
8965 + voltage-ranges = <1800 1800 3300 3300>;
8966 + sdhci,auto-cmd12;
8967 + broken-cd;
8968 + little-endian;
8969 + bus-width = <4>;
8970 + status = "disabled";
8971 + };
8972 +
8973 + uart0: serial@21c0000 {
8974 + compatible = "arm,sbsa-uart","arm,pl011";
8975 + reg = <0x0 0x21c0000 0x0 0x1000>;
8976 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
8977 + current-speed = <115200>;
8978 + status = "disabled";
8979 + };
8980 +
8981 + uart1: serial@21d0000 {
8982 + compatible = "arm,sbsa-uart","arm,pl011";
8983 + reg = <0x0 0x21d0000 0x0 0x1000>;
8984 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
8985 + current-speed = <115200>;
8986 + status = "disabled";
8987 + };
8988 +
8989 + uart2: serial@21e0000 {
8990 + compatible = "arm,sbsa-uart","arm,pl011";
8991 + reg = <0x0 0x21e0000 0x0 0x1000>;
8992 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
8993 + current-speed = <115200>;
8994 + status = "disabled";
8995 + };
8996 +
8997 + uart3: serial@21f0000 {
8998 + compatible = "arm,sbsa-uart","arm,pl011";
8999 + reg = <0x0 0x21f0000 0x0 0x1000>;
9000 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
9001 + current-speed = <115200>;
9002 + status = "disabled";
9003 + };
9004 +
9005 + gpio0: gpio@2300000 {
9006 + compatible = "fsl,qoriq-gpio";
9007 + reg = <0x0 0x2300000 0x0 0x10000>;
9008 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
9009 + gpio-controller;
9010 + little-endian;
9011 + #gpio-cells = <2>;
9012 + interrupt-controller;
9013 + #interrupt-cells = <2>;
9014 + };
9015 +
9016 + gpio1: gpio@2310000 {
9017 + compatible = "fsl,qoriq-gpio";
9018 + reg = <0x0 0x2310000 0x0 0x10000>;
9019 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
9020 + gpio-controller;
9021 + little-endian;
9022 + #gpio-cells = <2>;
9023 + interrupt-controller;
9024 + #interrupt-cells = <2>;
9025 + };
9026 +
9027 + gpio2: gpio@2320000 {
9028 + compatible = "fsl,qoriq-gpio";
9029 + reg = <0x0 0x2320000 0x0 0x10000>;
9030 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
9031 + gpio-controller;
9032 + little-endian;
9033 + #gpio-cells = <2>;
9034 + interrupt-controller;
9035 + #interrupt-cells = <2>;
9036 + };
9037 +
9038 + gpio3: gpio@2330000 {
9039 + compatible = "fsl,qoriq-gpio";
9040 + reg = <0x0 0x2330000 0x0 0x10000>;
9041 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
9042 + gpio-controller;
9043 + little-endian;
9044 + #gpio-cells = <2>;
9045 + interrupt-controller;
9046 + #interrupt-cells = <2>;
9047 + };
9048 +
9049 + watchdog@23a0000 {
9050 + compatible = "arm,sbsa-gwdt";
9051 + reg = <0x0 0x23a0000 0 0x1000>,
9052 + <0x0 0x2390000 0 0x1000>;
9053 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
9054 + timeout-sec = <30>;
9055 + };
9056 +
9057 + ftm0: ftm0@2800000 {
9058 + compatible = "fsl,ftm-alarm", "fsl,lx2160a-ftm-alarm";
9059 + reg = <0x0 0x2800000 0x0 0x10000>,
9060 + <0x0 0x1e34050 0x0 0x4>;
9061 + reg-names = "ftm", "FlexTimer1";
9062 + interrupts = <0 44 0x4>;
9063 + status = "okay";
9064 + };
9065 +
9066 + usb0: usb@3100000 {
9067 + compatible = "snps,dwc3";
9068 + reg = <0x0 0x3100000 0x0 0x10000>;
9069 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
9070 + dr_mode = "host";
9071 + snps,quirk-frame-length-adjustment = <0x20>;
9072 + snps,dis_rxdet_inp3_quirk;
9073 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
9074 + snps,host-vbus-glitches;
9075 + status = "disabled";
9076 + };
9077 +
9078 + usb1: usb@3110000 {
9079 + compatible = "snps,dwc3";
9080 + reg = <0x0 0x3110000 0x0 0x10000>;
9081 + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
9082 + dr_mode = "host";
9083 + snps,quirk-frame-length-adjustment = <0x20>;
9084 + snps,dis_rxdet_inp3_quirk;
9085 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
9086 + snps,host-vbus-glitches;
9087 + status = "disabled";
9088 + };
9089 +
9090 + smmu: iommu@5000000 {
9091 + compatible = "arm,mmu-500";
9092 + reg = <0 0x5000000 0 0x800000>;
9093 + #iommu-cells = <1>;
9094 + #global-interrupts = <14>;
9095 + // global secure fault
9096 + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
9097 + // combined secure
9098 + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
9099 + // global non-secure fault
9100 + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
9101 + // combined non-secure
9102 + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
9103 + // performance counter interrupts 0-9
9104 + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
9105 + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
9106 + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
9107 + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
9108 + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
9109 + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
9110 + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
9111 + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
9112 + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
9113 + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
9114 + // per context interrupt, 64 interrupts
9115 + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
9116 + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
9117 + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
9118 + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
9119 + <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
9120 + <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
9121 + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
9122 + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
9123 + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
9124 + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
9125 + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
9126 + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
9127 + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
9128 + <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
9129 + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
9130 + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
9131 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
9132 + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
9133 + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
9134 + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
9135 + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
9136 + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
9137 + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
9138 + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
9139 + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
9140 + <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
9141 + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
9142 + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
9143 + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
9144 + <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
9145 + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
9146 + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
9147 + <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
9148 + <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
9149 + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
9150 + <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
9151 + <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
9152 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
9153 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
9154 + <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
9155 + <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
9156 + <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
9157 + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
9158 + <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
9159 + <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
9160 + <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
9161 + <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
9162 + <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
9163 + <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
9164 + <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
9165 + <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
9166 + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
9167 + <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
9168 + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
9169 + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
9170 + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
9171 + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
9172 + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
9173 + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
9174 + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
9175 + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
9176 + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
9177 + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
9178 + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
9179 + dma-coherent;
9180 + };
9181 +
9182 + fsl_mc: fsl-mc@80c000000 {
9183 + compatible = "fsl,qoriq-mc";
9184 + reg = <0x00000008 0x0c000000 0 0x40>,
9185 + <0x00000000 0x08340000 0 0x40000>;
9186 + msi-parent = <&its>;
9187 + /* iommu-map property is fixed up by u-boot */
9188 + iommu-map = <0 &smmu 0 0>;
9189 + dma-coherent;
9190 + #address-cells = <3>;
9191 + #size-cells = <1>;
9192 +
9193 + /*
9194 + * Region type 0x0 - MC portals
9195 + * Region type 0x1 - QBMAN portals
9196 + */
9197 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
9198 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
9199 +
9200 + /*
9201 + * Define the maximum number of MACs present on the SoC.
9202 + */
9203 + dpmacs {
9204 + #address-cells = <1>;
9205 + #size-cells = <0>;
9206 +
9207 + dpmac1: dpmac@1 {
9208 + compatible = "fsl,qoriq-mc-dpmac";
9209 + reg = <0x1>;
9210 + };
9211 +
9212 + dpmac2: dpmac@2 {
9213 + compatible = "fsl,qoriq-mc-dpmac";
9214 + reg = <0x2>;
9215 + };
9216 +
9217 + dpmac3: dpmac@3 {
9218 + compatible = "fsl,qoriq-mc-dpmac";
9219 + reg = <0x3>;
9220 + };
9221 +
9222 + dpmac4: dpmac@4 {
9223 + compatible = "fsl,qoriq-mc-dpmac";
9224 + reg = <0x4>;
9225 + };
9226 +
9227 + dpmac5: dpmac@5 {
9228 + compatible = "fsl,qoriq-mc-dpmac";
9229 + reg = <0x5>;
9230 + };
9231 +
9232 + dpmac6: dpmac@6 {
9233 + compatible = "fsl,qoriq-mc-dpmac";
9234 + reg = <0x6>;
9235 + };
9236 +
9237 + dpmac7: dpmac@7 {
9238 + compatible = "fsl,qoriq-mc-dpmac";
9239 + reg = <0x7>;
9240 + };
9241 +
9242 + dpmac8: dpmac@8 {
9243 + compatible = "fsl,qoriq-mc-dpmac";
9244 + reg = <0x8>;
9245 + };
9246 +
9247 + dpmac9: dpmac@9 {
9248 + compatible = "fsl,qoriq-mc-dpmac";
9249 + reg = <0x9>;
9250 + };
9251 +
9252 + dpmac10: dpmac@a {
9253 + compatible = "fsl,qoriq-mc-dpmac";
9254 + reg = <0xa>;
9255 + };
9256 +
9257 + dpmac11: dpmac@b {
9258 + compatible = "fsl,qoriq-mc-dpmac";
9259 + reg = <0xb>;
9260 + };
9261 +
9262 + dpmac12: dpmac@c {
9263 + compatible = "fsl,qoriq-mc-dpmac";
9264 + reg = <0xc>;
9265 + };
9266 +
9267 + dpmac13: dpmac@d {
9268 + compatible = "fsl,qoriq-mc-dpmac";
9269 + reg = <0xd>;
9270 + };
9271 +
9272 + dpmac14: dpmac@e {
9273 + compatible = "fsl,qoriq-mc-dpmac";
9274 + reg = <0xe>;
9275 + };
9276 +
9277 + dpmac15: dpmac@f {
9278 + compatible = "fsl,qoriq-mc-dpmac";
9279 + reg = <0xf>;
9280 + };
9281 +
9282 + dpmac16: dpmac@10 {
9283 + compatible = "fsl,qoriq-mc-dpmac";
9284 + reg = <0x10>;
9285 + };
9286 +
9287 + dpmac17: dpmac@11 {
9288 + compatible = "fsl,qoriq-mc-dpmac";
9289 + reg = <0x11>;
9290 + };
9291 +
9292 + dpmac18: dpmac@12 {
9293 + compatible = "fsl,qoriq-mc-dpmac";
9294 + reg = <0x12>;
9295 + };
9296 + };
9297 + };
9298 +
9299 + fspi: flexspi@20c0000 {
9300 + status = "disabled";
9301 + compatible = "nxp,lx2160a-fspi";
9302 + #address-cells = <1>;
9303 + #size-cells = <0>;
9304 + reg = <0x0 0x20c0000 0x0 0x10000>,
9305 + <0x0 0x20000000 0x0 0x10000000>;
9306 + reg-names = "FSPI", "FSPI-memory";
9307 + interrupts = <0 25 0x4>; /* Level high type */
9308 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
9309 + clock-names = "fspi_en", "fspi";
9310 + };
9311 +
9312 + sata0: sata@3200000 {
9313 + status = "disabled";
9314 + compatible = "fsl,lx2160a-ahci";
9315 + reg = <0x0 0x3200000 0x0 0x10000>;
9316 + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
9317 + clocks = <&clockgen 4 3>;
9318 + dma-coherent;
9319 + };
9320 +
9321 + sata1: sata@3210000 {
9322 + status = "disabled";
9323 + compatible = "fsl,lx2160a-ahci";
9324 + reg = <0x0 0x3210000 0x0 0x10000>;
9325 + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
9326 + clocks = <&clockgen 4 3>;
9327 + dma-coherent;
9328 + };
9329 +
9330 + sata2: sata@3220000 {
9331 + status = "disabled";
9332 + compatible = "fsl,lx2160a-ahci";
9333 + reg = <0x0 0x3220000 0x0 0x10000>;
9334 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
9335 + clocks = <&clockgen 4 3>;
9336 + dma-coherent;
9337 + };
9338 +
9339 + sata3: sata@3230000 {
9340 + status = "disabled";
9341 + compatible = "fsl,lx2160a-ahci";
9342 + reg = <0x0 0x3230000 0x0 0x10000>;
9343 + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
9344 + clocks = <&clockgen 4 3>;
9345 + dma-coherent;
9346 + };
9347 +
9348 + pcie@3400000 {
9349 + compatible = "fsl,lx2160a-pcie";
9350 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
9351 + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */
9352 + reg-names = "csr_axi_slave", "config_axi_slave";
9353 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9354 + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9355 + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9356 + interrupt-names = "aer", "pme", "intr";
9357 + #address-cells = <3>;
9358 + #size-cells = <2>;
9359 + device_type = "pci";
9360 + dma-coherent;
9361 + apio-wins = <8>;
9362 + ppio-wins = <8>;
9363 + bus-range = <0x0 0xff>;
9364 + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9365 + msi-parent = <&its>;
9366 + #interrupt-cells = <1>;
9367 + interrupt-map-mask = <0 0 0 7>;
9368 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
9369 + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
9370 + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
9371 + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
9372 + status = "disabled";
9373 + };
9374 +
9375 + pcie_ep@3400000 {
9376 + compatible = "fsl,lx2160a-pcie-ep";
9377 + reg = <0x00 0x03400000 0x0 0x00100000
9378 + 0x80 0x00000000 0x8 0x00000000>;
9379 + reg-names = "regs", "addr_space";
9380 + num-ob-windows = <256>;
9381 + status = "disabled";
9382 + };
9383 +
9384 + pcie@3500000 {
9385 + compatible = "fsl,lx2160a-pcie";
9386 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
9387 + 0x88 0x00000000 0x0 0x00001000>; /* configuration space */
9388 + reg-names = "csr_axi_slave", "config_axi_slave";
9389 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9390 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9391 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9392 + interrupt-names = "aer", "pme", "intr";
9393 + #address-cells = <3>;
9394 + #size-cells = <2>;
9395 + device_type = "pci";
9396 + dma-coherent;
9397 + apio-wins = <8>;
9398 + ppio-wins = <8>;
9399 + bus-range = <0x0 0xff>;
9400 + ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9401 + msi-parent = <&its>;
9402 + #interrupt-cells = <1>;
9403 + interrupt-map-mask = <0 0 0 7>;
9404 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
9405 + <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
9406 + <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
9407 + <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
9408 + status = "disabled";
9409 + };
9410 +
9411 + pcie_ep@3500000 {
9412 + compatible = "fsl,lx2160a-pcie-ep";
9413 + reg = <0x00 0x03500000 0x0 0x00100000
9414 + 0x88 0x00000000 0x8 0x00000000>;
9415 + reg-names = "regs", "addr_space";
9416 + num-ob-windows = <256>;
9417 + status = "disabled";
9418 + };
9419 +
9420 + pcie@3600000 {
9421 + compatible = "fsl,lx2160a-pcie";
9422 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
9423 + 0x90 0x00000000 0x0 0x00001000>; /* configuration space */
9424 + reg-names = "csr_axi_slave", "config_axi_slave";
9425 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9426 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9427 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9428 + interrupt-names = "aer", "pme", "intr";
9429 + #address-cells = <3>;
9430 + #size-cells = <2>;
9431 + device_type = "pci";
9432 + dma-coherent;
9433 + apio-wins = <8>;
9434 + ppio-wins = <8>;
9435 + bus-range = <0x0 0xff>;
9436 + ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9437 + msi-parent = <&its>;
9438 + #interrupt-cells = <1>;
9439 + interrupt-map-mask = <0 0 0 7>;
9440 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
9441 + <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
9442 + <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
9443 + <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
9444 + status = "disabled";
9445 + };
9446 +
9447 + pcie_ep@3600000 {
9448 + compatible = "fsl,lx2160a-pcie-ep";
9449 + reg = <0x00 0x03600000 0x0 0x00100000
9450 + 0x90 0x00000000 0x8 0x00000000>;
9451 + reg-names = "regs", "addr_space";
9452 + num-ob-windows = <256>;
9453 + max-functions = <2>;
9454 + status = "disabled";
9455 + };
9456 +
9457 + pcie@3700000 {
9458 + compatible = "fsl,lx2160a-pcie";
9459 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
9460 + 0x98 0x00000000 0x0 0x00001000>; /* configuration space */
9461 + reg-names = "csr_axi_slave", "config_axi_slave";
9462 + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9463 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9464 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9465 + interrupt-names = "aer", "pme", "intr";
9466 + #address-cells = <3>;
9467 + #size-cells = <2>;
9468 + device_type = "pci";
9469 + dma-coherent;
9470 + apio-wins = <8>;
9471 + ppio-wins = <8>;
9472 + bus-range = <0x0 0xff>;
9473 + ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9474 + msi-parent = <&its>;
9475 + #interrupt-cells = <1>;
9476 + interrupt-map-mask = <0 0 0 7>;
9477 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
9478 + <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
9479 + <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
9480 + <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
9481 + status = "disabled";
9482 + };
9483 +
9484 + pcie_ep@3700000 {
9485 + compatible = "fsl,lx2160a-pcie-ep";
9486 + reg = <0x00 0x03700000 0x0 0x00100000
9487 + 0x98 0x00000000 0x8 0x00000000>;
9488 + reg-names = "regs", "addr_space";
9489 + num-ob-windows = <256>;
9490 + status = "disabled";
9491 + };
9492 +
9493 + pcie@3800000 {
9494 + compatible = "fsl,lx2160a-pcie";
9495 + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */
9496 + 0xa0 0x00000000 0x0 0x00001000>; /* configuration space */
9497 + reg-names = "csr_axi_slave", "config_axi_slave";
9498 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9499 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9500 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9501 + interrupt-names = "aer", "pme", "intr";
9502 + #address-cells = <3>;
9503 + #size-cells = <2>;
9504 + device_type = "pci";
9505 + dma-coherent;
9506 + apio-wins = <8>;
9507 + ppio-wins = <8>;
9508 + bus-range = <0x0 0xff>;
9509 + ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9510 + msi-parent = <&its>;
9511 + #interrupt-cells = <1>;
9512 + interrupt-map-mask = <0 0 0 7>;
9513 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
9514 + <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
9515 + <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
9516 + <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
9517 + status = "disabled";
9518 + };
9519 +
9520 + pcie_ep@3800000 {
9521 + compatible = "fsl,lx2160a-pcie-ep";
9522 + reg = <0x00 0x03800000 0x0 0x00100000
9523 + 0xa0 0x00000000 0x8 0x00000000>;
9524 + reg-names = "regs", "addr_space";
9525 + num-ob-windows = <256>;
9526 + max-functions = <2>;
9527 + status = "disabled";
9528 + };
9529 +
9530 + pcie@3900000 {
9531 + compatible = "fsl,lx2160a-pcie";
9532 + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */
9533 + 0xa8 0x00000000 0x0 0x00001000>; /* configuration space */
9534 + reg-names = "csr_axi_slave", "config_axi_slave";
9535 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9536 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9537 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9538 + interrupt-names = "aer", "pme", "intr";
9539 + #address-cells = <3>;
9540 + #size-cells = <2>;
9541 + device_type = "pci";
9542 + dma-coherent;
9543 + apio-wins = <8>;
9544 + ppio-wins = <8>;
9545 + bus-range = <0x0 0xff>;
9546 + ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9547 + msi-parent = <&its>;
9548 + #interrupt-cells = <1>;
9549 + interrupt-map-mask = <0 0 0 7>;
9550 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
9551 + <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
9552 + <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
9553 + <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
9554 + status = "disabled";
9555 + };
9556 +
9557 + pcie_ep@3900000 {
9558 + compatible = "fsl,lx2160a-pcie-ep";
9559 + reg = <0x00 0x03900000 0x0 0x00100000
9560 + 0xa8 0x00000000 0x8 0x00000000>;
9561 + reg-names = "regs", "addr_space";
9562 + num-ob-windows = <256>;
9563 + status = "disabled";
9564 + };
9565 +
9566 + };
9567 +
9568 + firmware {
9569 + optee {
9570 + compatible = "linaro,optee-tz";
9571 + method = "smc";
9572 + };
9573 + };
9574 +};
9575 --- /dev/null
9576 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
9577 @@ -0,0 +1,99 @@
9578 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9579 +/*
9580 + * Device Tree Include file for Thermal Monitor Unit.
9581 + *
9582 + * Copyright 2018 NXP
9583 + *
9584 + * Tang Yuantian <andy.tang@nxp.com>
9585 + *
9586 + */
9587 +
9588 +&thermal_zones {
9589 + thermal-zone0 {
9590 + cooling-maps {
9591 + map1 {
9592 + trip = <&alert0>;
9593 + cooling-device =
9594 + <&cooling_map1 THERMAL_NO_LIMIT
9595 + THERMAL_NO_LIMIT>;
9596 + };
9597 + };
9598 + };
9599 +
9600 + thermal-zone1 {
9601 + cooling-maps {
9602 + map1 {
9603 + trip = <&alert1>;
9604 + cooling-device =
9605 + <&cooling_map1 THERMAL_NO_LIMIT
9606 + THERMAL_NO_LIMIT>;
9607 + };
9608 + };
9609 + };
9610 +
9611 + thermal-zone2 {
9612 + cooling-maps {
9613 + map1 {
9614 + trip = <&alert2>;
9615 + cooling-device =
9616 + <&cooling_map1 THERMAL_NO_LIMIT
9617 + THERMAL_NO_LIMIT>;
9618 + };
9619 + };
9620 + };
9621 +
9622 + thermal-zone3 {
9623 + cooling-maps {
9624 + map1 {
9625 + trip = <&alert3>;
9626 + cooling-device =
9627 + <&cooling_map1 THERMAL_NO_LIMIT
9628 + THERMAL_NO_LIMIT>;
9629 + };
9630 + };
9631 + };
9632 +
9633 + thermal-zone4 {
9634 + cooling-maps {
9635 + map1 {
9636 + trip = <&alert4>;
9637 + cooling-device =
9638 + <&cooling_map1 THERMAL_NO_LIMIT
9639 + THERMAL_NO_LIMIT>;
9640 + };
9641 + };
9642 + };
9643 +
9644 + thermal-zone5 {
9645 + cooling-maps {
9646 + map1 {
9647 + trip = <&alert5>;
9648 + cooling-device =
9649 + <&cooling_map1 THERMAL_NO_LIMIT
9650 + THERMAL_NO_LIMIT>;
9651 + };
9652 + };
9653 + };
9654 +
9655 + thermal-zone6 {
9656 + cooling-maps {
9657 + map1 {
9658 + trip = <&alert6>;
9659 + cooling-device =
9660 + <&cooling_map1 THERMAL_NO_LIMIT
9661 + THERMAL_NO_LIMIT>;
9662 + };
9663 + };
9664 + };
9665 +
9666 + thermal-zone7 {
9667 + cooling-maps {
9668 + map1 {
9669 + trip = <&alert7>;
9670 + cooling-device =
9671 + <&cooling_map1 THERMAL_NO_LIMIT
9672 + THERMAL_NO_LIMIT>;
9673 + };
9674 + };
9675 + };
9676 +};
9677 --- /dev/null
9678 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
9679 @@ -0,0 +1,99 @@
9680 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9681 +/*
9682 + * Device Tree Include file for Thermal Monitor Unit.
9683 + *
9684 + * Copyright 2018 NXP
9685 + *
9686 + * Tang Yuantian <andy.tang@nxp.com>
9687 + *
9688 + */
9689 +
9690 +&thermal_zones {
9691 + thermal-zone0 {
9692 + cooling-maps {
9693 + map2 {
9694 + trip = <&alert0>;
9695 + cooling-device =
9696 + <&cooling_map2 THERMAL_NO_LIMIT
9697 + THERMAL_NO_LIMIT>;
9698 + };
9699 + };
9700 + };
9701 +
9702 + thermal-zone1 {
9703 + cooling-maps {
9704 + map2 {
9705 + trip = <&alert1>;
9706 + cooling-device =
9707 + <&cooling_map2 THERMAL_NO_LIMIT
9708 + THERMAL_NO_LIMIT>;
9709 + };
9710 + };
9711 + };
9712 +
9713 + thermal-zone2 {
9714 + cooling-maps {
9715 + map2 {
9716 + trip = <&alert2>;
9717 + cooling-device =
9718 + <&cooling_map2 THERMAL_NO_LIMIT
9719 + THERMAL_NO_LIMIT>;
9720 + };
9721 + };
9722 + };
9723 +
9724 + thermal-zone3 {
9725 + cooling-maps {
9726 + map2 {
9727 + trip = <&alert3>;
9728 + cooling-device =
9729 + <&cooling_map2 THERMAL_NO_LIMIT
9730 + THERMAL_NO_LIMIT>;
9731 + };
9732 + };
9733 + };
9734 +
9735 + thermal-zone4 {
9736 + cooling-maps {
9737 + map2 {
9738 + trip = <&alert4>;
9739 + cooling-device =
9740 + <&cooling_map2 THERMAL_NO_LIMIT
9741 + THERMAL_NO_LIMIT>;
9742 + };
9743 + };
9744 + };
9745 +
9746 + thermal-zone5 {
9747 + cooling-maps {
9748 + map2 {
9749 + trip = <&alert5>;
9750 + cooling-device =
9751 + <&cooling_map2 THERMAL_NO_LIMIT
9752 + THERMAL_NO_LIMIT>;
9753 + };
9754 + };
9755 + };
9756 +
9757 + thermal-zone6 {
9758 + cooling-maps {
9759 + map2 {
9760 + trip = <&alert6>;
9761 + cooling-device =
9762 + <&cooling_map2 THERMAL_NO_LIMIT
9763 + THERMAL_NO_LIMIT>;
9764 + };
9765 + };
9766 + };
9767 +
9768 + thermal-zone7 {
9769 + cooling-maps {
9770 + map2 {
9771 + trip = <&alert7>;
9772 + cooling-device =
9773 + <&cooling_map2 THERMAL_NO_LIMIT
9774 + THERMAL_NO_LIMIT>;
9775 + };
9776 + };
9777 + };
9778 +};
9779 --- /dev/null
9780 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
9781 @@ -0,0 +1,99 @@
9782 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9783 +/*
9784 + * Device Tree Include file for Thermal Monitor Unit.
9785 + *
9786 + * Copyright 2018 NXP
9787 + *
9788 + * Tang Yuantian <andy.tang@nxp.com>
9789 + *
9790 + */
9791 +
9792 +&thermal_zones {
9793 + thermal-zone0 {
9794 + cooling-maps {
9795 + map3 {
9796 + trip = <&alert0>;
9797 + cooling-device =
9798 + <&cooling_map3 THERMAL_NO_LIMIT
9799 + THERMAL_NO_LIMIT>;
9800 + };
9801 + };
9802 + };
9803 +
9804 + thermal-zone1 {
9805 + cooling-maps {
9806 + map3 {
9807 + trip = <&alert1>;
9808 + cooling-device =
9809 + <&cooling_map3 THERMAL_NO_LIMIT
9810 + THERMAL_NO_LIMIT>;
9811 + };
9812 + };
9813 + };
9814 +
9815 + thermal-zone2 {
9816 + cooling-maps {
9817 + map3 {
9818 + trip = <&alert2>;
9819 + cooling-device =
9820 + <&cooling_map3 THERMAL_NO_LIMIT
9821 + THERMAL_NO_LIMIT>;
9822 + };
9823 + };
9824 + };
9825 +
9826 + thermal-zone3 {
9827 + cooling-maps {
9828 + map3 {
9829 + trip = <&alert3>;
9830 + cooling-device =
9831 + <&cooling_map3 THERMAL_NO_LIMIT
9832 + THERMAL_NO_LIMIT>;
9833 + };
9834 + };
9835 + };
9836 +
9837 + thermal-zone4 {
9838 + cooling-maps {
9839 + map3 {
9840 + trip = <&alert4>;
9841 + cooling-device =
9842 + <&cooling_map3 THERMAL_NO_LIMIT
9843 + THERMAL_NO_LIMIT>;
9844 + };
9845 + };
9846 + };
9847 +
9848 + thermal-zone5 {
9849 + cooling-maps {
9850 + map3 {
9851 + trip = <&alert5>;
9852 + cooling-device =
9853 + <&cooling_map3 THERMAL_NO_LIMIT
9854 + THERMAL_NO_LIMIT>;
9855 + };
9856 + };
9857 + };
9858 +
9859 + thermal-zone6 {
9860 + cooling-maps {
9861 + map3 {
9862 + trip = <&alert6>;
9863 + cooling-device =
9864 + <&cooling_map3 THERMAL_NO_LIMIT
9865 + THERMAL_NO_LIMIT>;
9866 + };
9867 + };
9868 + };
9869 +
9870 + thermal-zone7 {
9871 + cooling-maps {
9872 + map3 {
9873 + trip = <&alert7>;
9874 + cooling-device =
9875 + <&cooling_map3 THERMAL_NO_LIMIT
9876 + THERMAL_NO_LIMIT>;
9877 + };
9878 + };
9879 + };
9880 +};
9881 --- /dev/null
9882 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
9883 @@ -0,0 +1,251 @@
9884 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9885 +/*
9886 + * Device Tree Include file for Thermal Monitor Unit.
9887 + *
9888 + * Copyright 2018 NXP
9889 + *
9890 + * Tang Yuantian <andy.tang@nxp.com>
9891 + *
9892 + */
9893 +
9894 +thermal_zones: thermal-zones {
9895 + thermal_zone0: thermal-zone0 {
9896 + polling-delay-passive = <1000>;
9897 + polling-delay = <5000>;
9898 + thermal-sensors = <&tmu 0>;
9899 + status = "disabled";
9900 +
9901 + trips {
9902 + alert0: alert0 {
9903 + temperature = <75000>;
9904 + hysteresis = <2000>;
9905 + type = "passive";
9906 + };
9907 +
9908 + crit0: crit0 {
9909 + temperature = <85000>;
9910 + hysteresis = <2000>;
9911 + type = "critical";
9912 + };
9913 + };
9914 +
9915 + cooling-maps {
9916 + map0 {
9917 + trip = <&alert0>;
9918 + cooling-device =
9919 + <&cooling_map0 THERMAL_NO_LIMIT
9920 + THERMAL_NO_LIMIT>;
9921 + };
9922 + };
9923 + };
9924 +
9925 + thermal-zone1 {
9926 + polling-delay-passive = <1000>;
9927 + polling-delay = <5000>;
9928 + thermal-sensors = <&tmu 1>;
9929 + status = "disabled";
9930 +
9931 + trips {
9932 + alert1: alert1 {
9933 + temperature = <75000>;
9934 + hysteresis = <2000>;
9935 + type = "passive";
9936 + };
9937 +
9938 + crit1: crit1 {
9939 + temperature = <85000>;
9940 + hysteresis = <2000>;
9941 + type = "critical";
9942 + };
9943 + };
9944 +
9945 + cooling-maps {
9946 + map0 {
9947 + trip = <&alert1>;
9948 + cooling-device =
9949 + <&cooling_map0 THERMAL_NO_LIMIT
9950 + THERMAL_NO_LIMIT>;
9951 + };
9952 + };
9953 + };
9954 +
9955 + thermal-zone2 {
9956 + polling-delay-passive = <1000>;
9957 + polling-delay = <5000>;
9958 + thermal-sensors = <&tmu 2>;
9959 + status = "disabled";
9960 +
9961 + trips {
9962 + alert2: alert2 {
9963 + temperature = <75000>;
9964 + hysteresis = <2000>;
9965 + type = "passive";
9966 + };
9967 +
9968 + crit2: crit2 {
9969 + temperature = <85000>;
9970 + hysteresis = <2000>;
9971 + type = "critical";
9972 + };
9973 + };
9974 +
9975 + cooling-maps {
9976 + map0 {
9977 + trip = <&alert2>;
9978 + cooling-device =
9979 + <&cooling_map0 THERMAL_NO_LIMIT
9980 + THERMAL_NO_LIMIT>;
9981 + };
9982 + };
9983 + };
9984 +
9985 + thermal-zone3 {
9986 + polling-delay-passive = <1000>;
9987 + polling-delay = <5000>;
9988 + thermal-sensors = <&tmu 3>;
9989 + status = "disabled";
9990 +
9991 + trips {
9992 + alert3: alert3 {
9993 + temperature = <75000>;
9994 + hysteresis = <2000>;
9995 + type = "passive";
9996 + };
9997 +
9998 + crit3: crit3 {
9999 + temperature = <85000>;
10000 + hysteresis = <2000>;
10001 + type = "critical";
10002 + };
10003 + };
10004 +
10005 + cooling-maps {
10006 + map0 {
10007 + trip = <&alert3>;
10008 + cooling-device =
10009 + <&cooling_map0 THERMAL_NO_LIMIT
10010 + THERMAL_NO_LIMIT>;
10011 + };
10012 + };
10013 + };
10014 +
10015 + thermal-zone4 {
10016 + polling-delay-passive = <1000>;
10017 + polling-delay = <5000>;
10018 + thermal-sensors = <&tmu 4>;
10019 + status = "disabled";
10020 +
10021 + trips {
10022 + alert4: alert4 {
10023 + temperature = <75000>;
10024 + hysteresis = <2000>;
10025 + type = "passive";
10026 + };
10027 +
10028 + crit4: crit4 {
10029 + temperature = <85000>;
10030 + hysteresis = <2000>;
10031 + type = "critical";
10032 + };
10033 + };
10034 +
10035 + cooling-maps {
10036 + map0 {
10037 + trip = <&alert4>;
10038 + cooling-device =
10039 + <&cooling_map0 THERMAL_NO_LIMIT
10040 + THERMAL_NO_LIMIT>;
10041 + };
10042 + };
10043 + };
10044 +
10045 + thermal-zone5 {
10046 + polling-delay-passive = <1000>;
10047 + polling-delay = <5000>;
10048 + thermal-sensors = <&tmu 5>;
10049 + status = "disabled";
10050 +
10051 + trips {
10052 + alert5: alert5 {
10053 + temperature = <75000>;
10054 + hysteresis = <2000>;
10055 + type = "passive";
10056 + };
10057 +
10058 + crit5: crit5 {
10059 + temperature = <85000>;
10060 + hysteresis = <2000>;
10061 + type = "critical";
10062 + };
10063 + };
10064 +
10065 + cooling-maps {
10066 + map0 {
10067 + trip = <&alert5>;
10068 + cooling-device =
10069 + <&cooling_map0 THERMAL_NO_LIMIT
10070 + THERMAL_NO_LIMIT>;
10071 + };
10072 + };
10073 + };
10074 +
10075 + thermal-zone6 {
10076 + polling-delay-passive = <1000>;
10077 + polling-delay = <5000>;
10078 + thermal-sensors = <&tmu 6>;
10079 + status = "disabled";
10080 +
10081 + trips {
10082 + alert6: alert6 {
10083 + temperature = <75000>;
10084 + hysteresis = <2000>;
10085 + type = "passive";
10086 + };
10087 +
10088 + crit6: crit6 {
10089 + temperature = <85000>;
10090 + hysteresis = <2000>;
10091 + type = "critical";
10092 + };
10093 + };
10094 +
10095 + cooling-maps {
10096 + map0 {
10097 + trip = <&alert6>;
10098 + cooling-device =
10099 + <&cooling_map0 THERMAL_NO_LIMIT
10100 + THERMAL_NO_LIMIT>;
10101 + };
10102 + };
10103 + };
10104 +
10105 + thermal-zone7 {
10106 + polling-delay-passive = <1000>;
10107 + polling-delay = <5000>;
10108 + thermal-sensors = <&tmu 7>;
10109 + status = "disabled";
10110 +
10111 + trips {
10112 + alert7: alert7 {
10113 + temperature = <75000>;
10114 + hysteresis = <2000>;
10115 + type = "passive";
10116 + };
10117 +
10118 + crit7: crit7 {
10119 + temperature = <85000>;
10120 + hysteresis = <2000>;
10121 + type = "critical";
10122 + };
10123 + };
10124 +
10125 + cooling-maps {
10126 + map0 {
10127 + trip = <&alert7>;
10128 + cooling-device =
10129 + <&cooling_map0 THERMAL_NO_LIMIT
10130 + THERMAL_NO_LIMIT>;
10131 + };
10132 + };
10133 + };
10134 +};
10135 --- /dev/null
10136 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
10137 @@ -0,0 +1,55 @@
10138 +/*
10139 + * QorIQ BMan SDK Portals device tree nodes
10140 + *
10141 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10142 + * Copyright 2017 NXP
10143 + *
10144 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10145 + */
10146 +
10147 +&bportals {
10148 + bman-portal@0 {
10149 + cell-index = <0>;
10150 + };
10151 +
10152 + bman-portal@10000 {
10153 + cell-index = <1>;
10154 + };
10155 +
10156 + bman-portal@20000 {
10157 + cell-index = <2>;
10158 + };
10159 +
10160 + bman-portal@30000 {
10161 + cell-index = <3>;
10162 + };
10163 +
10164 + bman-portal@40000 {
10165 + cell-index = <4>;
10166 + };
10167 +
10168 + bman-portal@50000 {
10169 + cell-index = <5>;
10170 + };
10171 +
10172 + bman-portal@60000 {
10173 + cell-index = <6>;
10174 + };
10175 +
10176 + bman-portal@70000 {
10177 + cell-index = <7>;
10178 + };
10179 +
10180 + bman-portal@80000 {
10181 + cell-index = <8>;
10182 + };
10183 +
10184 + bman-portal@90000 {
10185 + cell-index = <9>;
10186 + };
10187 +
10188 + bman-bpids@0 {
10189 + compatible = "fsl,bpid-range";
10190 + fsl,bpid-range = <32 32>;
10191 + };
10192 +};
10193 --- a/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi
10194 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi
10195 @@ -1,9 +1,9 @@
10196 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10197 /*
10198 * QorIQ BMan Portals device tree
10199 *
10200 * Copyright 2011-2016 Freescale Semiconductor Inc.
10201 *
10202 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10203 */
10204
10205 &bportals {
10206 @@ -68,4 +68,10 @@
10207 reg = <0x80000 0x4000>, <0x4080000 0x4000>;
10208 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
10209 };
10210 +
10211 + bman-portal@90000 {
10212 + compatible = "fsl,bman-portal";
10213 + reg = <0x90000 0x4000>, <0x4090000 0x4000>;
10214 + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
10215 + };
10216 };
10217 --- /dev/null
10218 +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
10219 @@ -0,0 +1,97 @@
10220 +/*
10221 + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
10222 + *
10223 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
10224 + *
10225 + * Redistribution and use in source and binary forms, with or without
10226 + * modification, are permitted provided that the following conditions are met:
10227 + * * Redistributions of source code must retain the above copyright
10228 + * notice, this list of conditions and the following disclaimer.
10229 + * * Redistributions in binary form must reproduce the above copyright
10230 + * notice, this list of conditions and the following disclaimer in the
10231 + * documentation and/or other materials provided with the distribution.
10232 + * * Neither the name of Freescale Semiconductor nor the
10233 + * names of its contributors may be used to endorse or promote products
10234 + * derived from this software without specific prior written permission.
10235 + *
10236 + *
10237 + * ALTERNATIVELY, this software may be distributed under the terms of the
10238 + * GNU General Public License ("GPL") as published by the Free Software
10239 + * Foundation, either version 2 of that License or (at your option) any
10240 + * later version.
10241 + *
10242 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
10243 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
10244 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
10245 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
10246 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10247 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
10248 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
10249 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10250 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
10251 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10252 + */
10253 +
10254 +fsldpaa: fsl,dpaa {
10255 + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa";
10256 + ethernet@0 {
10257 + compatible = "fsl,dpa-ethernet";
10258 + fsl,fman-mac = <&enet0>;
10259 + dma-coherent;
10260 + };
10261 + ethernet@1 {
10262 + compatible = "fsl,dpa-ethernet";
10263 + fsl,fman-mac = <&enet1>;
10264 + dma-coherent;
10265 + };
10266 + ethernet@2 {
10267 + compatible = "fsl,dpa-ethernet";
10268 + fsl,fman-mac = <&enet2>;
10269 + dma-coherent;
10270 + };
10271 + ethernet@3 {
10272 + compatible = "fsl,dpa-ethernet";
10273 + fsl,fman-mac = <&enet3>;
10274 + dma-coherent;
10275 + };
10276 + ethernet@4 {
10277 + compatible = "fsl,dpa-ethernet";
10278 + fsl,fman-mac = <&enet4>;
10279 + dma-coherent;
10280 + };
10281 + ethernet@5 {
10282 + compatible = "fsl,dpa-ethernet";
10283 + fsl,fman-mac = <&enet5>;
10284 + dma-coherent;
10285 + };
10286 + ethernet@8 {
10287 + compatible = "fsl,dpa-ethernet";
10288 + fsl,fman-mac = <&enet6>;
10289 + dma-coherent;
10290 + };
10291 + ethernet@6 {
10292 + compatible = "fsl,im-ethernet";
10293 + fsl,fman-mac = <&enet2>;
10294 + dma-coherent;
10295 + fpmevt-sel = <0>;
10296 + };
10297 + ethernet@7 {
10298 + compatible = "fsl,im-ethernet";
10299 + fsl,fman-mac = <&enet3>;
10300 + dma-coherent;
10301 + fpmevt-sel = <1>;
10302 + };
10303 + ethernet@10 {
10304 + compatible = "fsl,im-ethernet";
10305 + fsl,fman-mac = <&enet4>;
10306 + dma-coherent;
10307 + fpmevt-sel = <2>;
10308 + };
10309 + ethernet@11 {
10310 + compatible = "fsl,im-ethernet";
10311 + fsl,fman-mac = <&enet5>;
10312 + dma-coherent;
10313 + fpmevt-sel = <3>;
10314 + };
10315 +};
10316 +
10317 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
10318 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
10319 @@ -1,27 +1,28 @@
10320 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10321 /*
10322 * QorIQ FMan v3 10g port #0 device tree
10323 *
10324 * Copyright 2012-2015 Freescale Semiconductor Inc.
10325 *
10326 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10327 */
10328
10329 fman@1a00000 {
10330 fman0_rx_0x10: port@90000 {
10331 cell-index = <0x10>;
10332 - compatible = "fsl,fman-v3-port-rx";
10333 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10334 reg = <0x90000 0x1000>;
10335 fsl,fman-10g-port;
10336 };
10337
10338 fman0_tx_0x30: port@b0000 {
10339 cell-index = <0x30>;
10340 - compatible = "fsl,fman-v3-port-tx";
10341 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10342 reg = <0xb0000 0x1000>;
10343 fsl,fman-10g-port;
10344 + fsl,qman-channel-id = <0x800>;
10345 };
10346
10347 - ethernet@f0000 {
10348 + mac9: ethernet@f0000 {
10349 cell-index = <0x8>;
10350 compatible = "fsl,fman-memac";
10351 reg = <0xf0000 0x1000>;
10352 @@ -29,7 +30,7 @@ fman@1a00000 {
10353 pcsphy-handle = <&pcsphy6>;
10354 };
10355
10356 - mdio@f1000 {
10357 + mdio9: mdio@f1000 {
10358 #address-cells = <1>;
10359 #size-cells = <0>;
10360 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10361 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
10362 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
10363 @@ -1,27 +1,28 @@
10364 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10365 /*
10366 * QorIQ FMan v3 10g port #1 device tree
10367 *
10368 * Copyright 2012-2015 Freescale Semiconductor Inc.
10369 *
10370 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10371 */
10372
10373 fman@1a00000 {
10374 fman0_rx_0x11: port@91000 {
10375 cell-index = <0x11>;
10376 - compatible = "fsl,fman-v3-port-rx";
10377 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10378 reg = <0x91000 0x1000>;
10379 fsl,fman-10g-port;
10380 };
10381
10382 fman0_tx_0x31: port@b1000 {
10383 cell-index = <0x31>;
10384 - compatible = "fsl,fman-v3-port-tx";
10385 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10386 reg = <0xb1000 0x1000>;
10387 fsl,fman-10g-port;
10388 + fsl,qman-channel-id = <0x801>;
10389 };
10390
10391 - ethernet@f2000 {
10392 + mac10: ethernet@f2000 {
10393 cell-index = <0x9>;
10394 compatible = "fsl,fman-memac";
10395 reg = <0xf2000 0x1000>;
10396 @@ -29,7 +30,7 @@ fman@1a00000 {
10397 pcsphy-handle = <&pcsphy7>;
10398 };
10399
10400 - mdio@f3000 {
10401 + mdio10: mdio@f3000 {
10402 #address-cells = <1>;
10403 #size-cells = <0>;
10404 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10405 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
10406 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
10407 @@ -1,22 +1,23 @@
10408 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10409 /*
10410 * QorIQ FMan v3 1g port #0 device tree
10411 *
10412 * Copyright 2012-2015 Freescale Semiconductor Inc.
10413 *
10414 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10415 */
10416
10417 fman@1a00000 {
10418 fman0_rx_0x08: port@88000 {
10419 cell-index = <0x8>;
10420 - compatible = "fsl,fman-v3-port-rx";
10421 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10422 reg = <0x88000 0x1000>;
10423 };
10424
10425 fman0_tx_0x28: port@a8000 {
10426 cell-index = <0x28>;
10427 - compatible = "fsl,fman-v3-port-tx";
10428 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10429 reg = <0xa8000 0x1000>;
10430 + fsl,qman-channel-id = <0x802>;
10431 };
10432
10433 ethernet@e0000 {
10434 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
10435 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
10436 @@ -1,22 +1,23 @@
10437 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10438 /*
10439 * QorIQ FMan v3 1g port #1 device tree
10440 *
10441 * Copyright 2012-2015 Freescale Semiconductor Inc.
10442 *
10443 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10444 */
10445
10446 fman@1a00000 {
10447 fman0_rx_0x09: port@89000 {
10448 cell-index = <0x9>;
10449 - compatible = "fsl,fman-v3-port-rx";
10450 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10451 reg = <0x89000 0x1000>;
10452 };
10453
10454 fman0_tx_0x29: port@a9000 {
10455 cell-index = <0x29>;
10456 - compatible = "fsl,fman-v3-port-tx";
10457 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10458 reg = <0xa9000 0x1000>;
10459 + fsl,qman-channel-id = <0x803>;
10460 };
10461
10462 ethernet@e2000 {
10463 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
10464 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
10465 @@ -1,22 +1,23 @@
10466 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10467 /*
10468 * QorIQ FMan v3 1g port #2 device tree
10469 *
10470 * Copyright 2012-2015 Freescale Semiconductor Inc.
10471 *
10472 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10473 */
10474
10475 fman@1a00000 {
10476 fman0_rx_0x0a: port@8a000 {
10477 cell-index = <0xa>;
10478 - compatible = "fsl,fman-v3-port-rx";
10479 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10480 reg = <0x8a000 0x1000>;
10481 };
10482
10483 fman0_tx_0x2a: port@aa000 {
10484 cell-index = <0x2a>;
10485 - compatible = "fsl,fman-v3-port-tx";
10486 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10487 reg = <0xaa000 0x1000>;
10488 + fsl,qman-channel-id = <0x804>;
10489 };
10490
10491 ethernet@e4000 {
10492 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
10493 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
10494 @@ -1,22 +1,23 @@
10495 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10496 /*
10497 * QorIQ FMan v3 1g port #3 device tree
10498 *
10499 * Copyright 2012-2015 Freescale Semiconductor Inc.
10500 *
10501 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10502 */
10503
10504 fman@1a00000 {
10505 fman0_rx_0x0b: port@8b000 {
10506 cell-index = <0xb>;
10507 - compatible = "fsl,fman-v3-port-rx";
10508 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10509 reg = <0x8b000 0x1000>;
10510 };
10511
10512 fman0_tx_0x2b: port@ab000 {
10513 cell-index = <0x2b>;
10514 - compatible = "fsl,fman-v3-port-tx";
10515 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10516 reg = <0xab000 0x1000>;
10517 + fsl,qman-channel-id = <0x805>;
10518 };
10519
10520 ethernet@e6000 {
10521 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
10522 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
10523 @@ -1,22 +1,23 @@
10524 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10525 /*
10526 * QorIQ FMan v3 1g port #4 device tree
10527 *
10528 * Copyright 2012-2015 Freescale Semiconductor Inc.
10529 *
10530 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10531 */
10532
10533 fman@1a00000 {
10534 fman0_rx_0x0c: port@8c000 {
10535 cell-index = <0xc>;
10536 - compatible = "fsl,fman-v3-port-rx";
10537 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10538 reg = <0x8c000 0x1000>;
10539 };
10540
10541 fman0_tx_0x2c: port@ac000 {
10542 cell-index = <0x2c>;
10543 - compatible = "fsl,fman-v3-port-tx";
10544 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10545 reg = <0xac000 0x1000>;
10546 + fsl,qman-channel-id = <0x806>;
10547 };
10548
10549 ethernet@e8000 {
10550 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
10551 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
10552 @@ -1,22 +1,23 @@
10553 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10554 /*
10555 * QorIQ FMan v3 1g port #5 device tree
10556 *
10557 * Copyright 2012-2015 Freescale Semiconductor Inc.
10558 *
10559 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10560 */
10561
10562 fman@1a00000 {
10563 fman0_rx_0x0d: port@8d000 {
10564 cell-index = <0xd>;
10565 - compatible = "fsl,fman-v3-port-rx";
10566 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10567 reg = <0x8d000 0x1000>;
10568 };
10569
10570 fman0_tx_0x2d: port@ad000 {
10571 cell-index = <0x2d>;
10572 - compatible = "fsl,fman-v3-port-tx";
10573 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10574 reg = <0xad000 0x1000>;
10575 + fsl,qman-channel-id = <0x807>;
10576 };
10577
10578 ethernet@ea000 {
10579 --- /dev/null
10580 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
10581 @@ -0,0 +1,47 @@
10582 +/*
10583 + * QorIQ FMan v3 OH ports device tree
10584 + *
10585 + * Copyright 2012-2015 Freescale Semiconductor Inc.
10586 + *
10587 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10588 + */
10589 +
10590 +fman@1a00000 {
10591 +
10592 + fman0_oh1: port@82000 {
10593 + cell-index = <0>;
10594 + compatible = "fsl,fman-port-oh";
10595 + reg = <0x82000 0x1000>;
10596 + };
10597 +
10598 + fman0_oh2: port@83000 {
10599 + cell-index = <1>;
10600 + compatible = "fsl,fman-port-oh";
10601 + reg = <0x83000 0x1000>;
10602 + };
10603 +
10604 + fman0_oh3: port@84000 {
10605 + cell-index = <2>;
10606 + compatible = "fsl,fman-port-oh";
10607 + reg = <0x84000 0x1000>;
10608 + };
10609 +
10610 + fman0_oh4: port@85000 {
10611 + cell-index = <3>;
10612 + compatible = "fsl,fman-port-oh";
10613 + reg = <0x85000 0x1000>;
10614 + };
10615 +
10616 + fman0_oh5: port@86000 {
10617 + cell-index = <4>;
10618 + compatible = "fsl,fman-port-oh";
10619 + reg = <0x86000 0x1000>;
10620 + };
10621 +
10622 + fman0_oh6: port@87000 {
10623 + cell-index = <5>;
10624 + compatible = "fsl,fman-port-oh";
10625 + reg = <0x87000 0x1000>;
10626 + };
10627 +
10628 +};
10629 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10630 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10631 @@ -1,9 +1,9 @@
10632 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10633 /*
10634 * QorIQ FMan v3 device tree
10635 *
10636 * Copyright 2012-2015 Freescale Semiconductor Inc.
10637 *
10638 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10639 */
10640
10641 fman0: fman@1a00000 {
10642 @@ -11,53 +11,104 @@ fman0: fman@1a00000 {
10643 #size-cells = <1>;
10644 cell-index = <0>;
10645 compatible = "fsl,fman";
10646 - ranges = <0x0 0x0 0x1a00000 0x100000>;
10647 - reg = <0x0 0x1a00000 0x0 0x100000>;
10648 + ranges = <0x0 0x0 0x1a00000 0xfe000>;
10649 + reg = <0x0 0x1a00000 0x0 0xfe000>;
10650 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
10651 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
10652 clocks = <&clockgen 3 0>;
10653 clock-names = "fmanclk";
10654 fsl,qman-channel-range = <0x800 0x10>;
10655 + ptimer-handle = <&ptp_timer0>;
10656 +
10657 + cc {
10658 + compatible = "fsl,fman-cc";
10659 + };
10660
10661 muram@0 {
10662 compatible = "fsl,fman-muram";
10663 reg = <0x0 0x60000>;
10664 };
10665
10666 + bmi@80000 {
10667 + compatible = "fsl,fman-bmi";
10668 + reg = <0x80000 0x400>;
10669 + };
10670 +
10671 + qmi@80400 {
10672 + compatible = "fsl,fman-qmi";
10673 + reg = <0x80400 0x400>;
10674 + };
10675 +
10676 fman0_oh_0x2: port@82000 {
10677 cell-index = <0x2>;
10678 compatible = "fsl,fman-v3-port-oh";
10679 reg = <0x82000 0x1000>;
10680 + fsl,qman-channel-id = <0x809>;
10681 };
10682
10683 fman0_oh_0x3: port@83000 {
10684 cell-index = <0x3>;
10685 compatible = "fsl,fman-v3-port-oh";
10686 reg = <0x83000 0x1000>;
10687 + fsl,qman-channel-id = <0x80a>;
10688 };
10689
10690 fman0_oh_0x4: port@84000 {
10691 cell-index = <0x4>;
10692 compatible = "fsl,fman-v3-port-oh";
10693 reg = <0x84000 0x1000>;
10694 + fsl,qman-channel-id = <0x80b>;
10695 };
10696
10697 fman0_oh_0x5: port@85000 {
10698 cell-index = <0x5>;
10699 compatible = "fsl,fman-v3-port-oh";
10700 reg = <0x85000 0x1000>;
10701 + fsl,qman-channel-id = <0x80c>;
10702 };
10703
10704 fman0_oh_0x6: port@86000 {
10705 cell-index = <0x6>;
10706 compatible = "fsl,fman-v3-port-oh";
10707 reg = <0x86000 0x1000>;
10708 + fsl,qman-channel-id = <0x80d>;
10709 };
10710
10711 fman0_oh_0x7: port@87000 {
10712 cell-index = <0x7>;
10713 compatible = "fsl,fman-v3-port-oh";
10714 reg = <0x87000 0x1000>;
10715 + fsl,qman-channel-id = <0x80e>;
10716 + };
10717 +
10718 + policer@c0000 {
10719 + compatible = "fsl,fman-policer";
10720 + reg = <0xc0000 0x1000>;
10721 + };
10722 +
10723 + keygen@c1000 {
10724 + compatible = "fsl,fman-keygen";
10725 + reg = <0xc1000 0x1000>;
10726 + };
10727 +
10728 + dma@c2000 {
10729 + compatible = "fsl,fman-dma";
10730 + reg = <0xc2000 0x1000>;
10731 + };
10732 +
10733 + fpm@c3000 {
10734 + compatible = "fsl,fman-fpm";
10735 + reg = <0xc3000 0x1000>;
10736 + };
10737 +
10738 + parser@c7000 {
10739 + compatible = "fsl,fman-parser";
10740 + reg = <0xc7000 0x1000>;
10741 + };
10742 +
10743 + vsps@dc000 {
10744 + compatible = "fsl,fman-vsps";
10745 + reg = <0xdc000 0x1000>;
10746 };
10747
10748 mdio0: mdio@fc000 {
10749 @@ -73,9 +124,11 @@ fman0: fman@1a00000 {
10750 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10751 reg = <0xfd000 0x1000>;
10752 };
10753 +};
10754
10755 - ptp_timer0: ptp-timer@fe000 {
10756 - compatible = "fsl,fman-ptp-timer";
10757 - reg = <0xfe000 0x1000>;
10758 - };
10759 +ptp_timer0: ptp-timer@1afe000 {
10760 + compatible = "fsl,fman-ptp-timer";
10761 + reg = <0x0 0x1afe000 0x0 0x1000>;
10762 + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
10763 + clocks = <&clockgen 3 0>;
10764 };
10765 --- /dev/null
10766 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
10767 @@ -0,0 +1,38 @@
10768 +/*
10769 + * QorIQ QMan SDK Portals device tree nodes
10770 + *
10771 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10772 + * Copyright 2017 NXP
10773 + *
10774 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10775 + */
10776 +
10777 +&qportals {
10778 + qman-fqids@0 {
10779 + compatible = "fsl,fqid-range";
10780 + fsl,fqid-range = <256 256>;
10781 + };
10782 +
10783 + qman-fqids@1 {
10784 + compatible = "fsl,fqid-range";
10785 + fsl,fqid-range = <32768 32768>;
10786 + };
10787 +
10788 + qman-pools@0 {
10789 + compatible = "fsl,pool-channel-range";
10790 + fsl,pool-channel-range = <0x401 0xf>;
10791 + };
10792 +
10793 + qman-cgrids@0 {
10794 + compatible = "fsl,cgrid-range";
10795 + fsl,cgrid-range = <0 256>;
10796 + };
10797 +
10798 + qman-ceetm@0 {
10799 + compatible = "fsl,qman-ceetm";
10800 + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
10801 + fsl,ceetm-sp-range = <0 16>;
10802 + fsl,ceetm-lni-range = <0 8>;
10803 + fsl,ceetm-channel-range = <0 32>;
10804 + };
10805 +};
10806 --- a/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi
10807 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi
10808 @@ -1,9 +1,9 @@
10809 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10810 /*
10811 * QorIQ QMan Portals device tree
10812 *
10813 * Copyright 2011-2016 Freescale Semiconductor Inc.
10814 *
10815 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10816 */
10817
10818 &qportals {
10819 @@ -77,4 +77,11 @@
10820 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
10821 cell-index = <8>;
10822 };
10823 +
10824 + qportal9: qman-portal@90000 {
10825 + compatible = "fsl,qman-portal";
10826 + reg = <0x90000 0x4000>, <0x4090000 0x4000>;
10827 + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
10828 + cell-index = <9>;
10829 + };
10830 };
10831 --- a/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts
10832 +++ b/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts
10833 @@ -330,3 +330,32 @@
10834 &sata {
10835 status = "disabled";
10836 };
10837 +
10838 +/* Additions for Layerscape SDK (4.4/4.9) Kernel only
10839 + * These kernels need additional setup for FMan/QMan DMA shared memory
10840 + */
10841 +
10842 +#include "qoriq-qman-portals-sdk.dtsi"
10843 +#include "qoriq-bman-portals-sdk.dtsi"
10844 +
10845 +&bman_fbpr {
10846 + compatible = "fsl,bman-fbpr";
10847 + alloc-ranges = <0 0 0x10000 0>;
10848 +};
10849 +&qman_fqd {
10850 + compatible = "fsl,qman-fqd";
10851 + alloc-ranges = <0 0 0x10000 0>;
10852 +};
10853 +&qman_pfdr {
10854 + compatible = "fsl,qman-pfdr";
10855 + alloc-ranges = <0 0 0x10000 0>;
10856 +};
10857 +
10858 +&soc {
10859 +#include "qoriq-dpaa-eth.dtsi"
10860 +#include "qoriq-fman3-0-6oh.dtsi"
10861 +};
10862 +
10863 +&fman0 {
10864 + compatible = "fsl,fman", "simple-bus";
10865 +};
10866 --- a/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts
10867 +++ b/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts
10868 @@ -251,3 +251,32 @@
10869 &sata {
10870 status = "disabled";
10871 };
10872 +
10873 +/* Additions for Layerscape SDK (4.4/4.9) Kernel only
10874 + * These kernels need additional setup for FMan/QMan DMA shared memory
10875 + */
10876 +
10877 +#include "qoriq-qman-portals-sdk.dtsi"
10878 +#include "qoriq-bman-portals-sdk.dtsi"
10879 +
10880 +&bman_fbpr {
10881 + compatible = "fsl,bman-fbpr";
10882 + alloc-ranges = <0 0 0x10000 0>;
10883 +};
10884 +&qman_fqd {
10885 + compatible = "fsl,qman-fqd";
10886 + alloc-ranges = <0 0 0x10000 0>;
10887 +};
10888 +&qman_pfdr {
10889 + compatible = "fsl,qman-pfdr";
10890 + alloc-ranges = <0 0 0x10000 0>;
10891 +};
10892 +
10893 +&soc {
10894 +#include "qoriq-dpaa-eth.dtsi"
10895 +#include "qoriq-fman3-0-6oh.dtsi"
10896 +};
10897 +
10898 +&fman0 {
10899 + compatible = "fsl,fman", "simple-bus";
10900 +};
Staging tree of Christian Lamparter