1 From cc1d1d1b68d18a31aeb8a572ca6b3929b083855c Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:33 +0800
4 Subject: [PATCH] dts: support layerscape
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 This is an integrated patch of dts for layerscape
11 Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
12 Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
13 Signed-off-by: Alan Wang <alan.wang@nxp.com>
14 Signed-off-by: Alison Wang <alison.wang@nxp.com>
15 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
16 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
17 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
18 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
19 Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
20 Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
21 Signed-off-by: Biwen Li <biwen.li@nxp.com>
22 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
23 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
24 Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
25 Signed-off-by: Catalin Neacsu <valentin-catalin.neacsu@nxp.com>
26 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
27 Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
28 Signed-off-by: Constantin Tudor <constantin.tudor@nxp.com>
29 Signed-off-by: David S. Miller <davem@davemloft.net>
30 Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
31 Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
32 Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com>
33 Signed-off-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
34 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
35 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
36 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
37 Signed-off-by: Iordache Florinel-R70177 <florinel.iordache@nxp.com>
38 Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
39 Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
40 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
41 Signed-off-by: Li Yang <leoyang.li@nxp.com>
42 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
43 Signed-off-by: Mathew McBride <matt@traverse.com.au>
44 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
45 Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
46 Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
47 Signed-off-by: Peng Ma <peng.ma@nxp.com>
48 Signed-off-by: Po Liu <po.liu@nxp.com>
49 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
50 Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
51 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
52 Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
53 Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
54 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
55 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
56 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
57 Signed-off-by: Sakar Arora <Sakar.Arora@freescale.com>
58 Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
59 Signed-off-by: Scott Wood <oss@buserror.net>
60 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
61 Signed-off-by: Shawn Guo <shawnguo@kernel.org>
62 Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
63 Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
64 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
65 Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
66 Signed-off-by: Tao Yang <b31903@freescale.com>
67 Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
68 Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
69 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
70 Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
71 Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
72 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
73 Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
74 Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
75 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
76 Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
77 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
78 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
79 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
81 arch/arm/boot/dts/Makefile | 3 +-
82 arch/arm/boot/dts/imx25.dtsi | 4 +-
83 arch/arm/boot/dts/imx28.dtsi | 4 +-
84 arch/arm/boot/dts/imx35.dtsi | 4 +-
85 arch/arm/boot/dts/imx53.dtsi | 4 +-
86 arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++
87 arch/arm/boot/dts/ls1021a-qds.dts | 32 +
88 arch/arm/boot/dts/ls1021a-twr.dts | 27 +
89 arch/arm/boot/dts/ls1021a.dtsi | 111 +-
90 arch/arm64/boot/dts/freescale/Makefile | 16 +-
91 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 126 ++
92 .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 97 +-
93 .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 179 +++
94 .../boot/dts/freescale/fsl-ls1012a-qds.dts | 136 +-
95 .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 100 +-
96 .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 210 ++-
97 .../boot/dts/freescale/fsl-ls1043-post.dtsi | 3 +-
98 .../dts/freescale/fsl-ls1043a-qds-sdk.dts | 263 ++++
99 .../boot/dts/freescale/fsl-ls1043a-qds.dts | 206 ++-
100 .../dts/freescale/fsl-ls1043a-rdb-sdk.dts | 262 ++++
101 .../dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 140 ++
102 .../boot/dts/freescale/fsl-ls1043a-rdb.dts | 76 +-
103 .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 382 +++--
104 .../boot/dts/freescale/fsl-ls1046-post.dtsi | 2 +-
105 .../dts/freescale/fsl-ls1046a-qds-sdk.dts | 268 ++++
106 .../boot/dts/freescale/fsl-ls1046a-qds.dts | 194 ++-
107 .../dts/freescale/fsl-ls1046a-rdb-sdk.dts | 307 ++++
108 .../dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 133 ++
109 .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 48 +-
110 .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 386 +++--
111 .../boot/dts/freescale/fsl-ls1088a-qds.dts | 88 +-
112 .../boot/dts/freescale/fsl-ls1088a-rdb.dts | 150 +-
113 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 546 ++++++-
114 .../boot/dts/freescale/fsl-ls2080a-qds.dts | 100 +-
115 .../boot/dts/freescale/fsl-ls2080a-rdb.dts | 118 +-
116 .../boot/dts/freescale/fsl-ls2080a-simu.dts | 38 +-
117 .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 50 +-
118 .../boot/dts/freescale/fsl-ls2081a-rdb.dts | 163 ++
119 .../boot/dts/freescale/fsl-ls2088a-qds.dts | 158 +-
120 .../boot/dts/freescale/fsl-ls2088a-rdb.dts | 118 +-
121 .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 52 +-
122 .../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 43 +-
123 .../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 60 +-
124 .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 299 ++--
125 .../boot/dts/freescale/fsl-lx2160a-qds.dts | 353 +++++
126 .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 241 +++
127 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 1318 +++++++++++++++++
128 .../boot/dts/freescale/fsl-tmu-map1.dtsi | 99 ++
129 .../boot/dts/freescale/fsl-tmu-map2.dtsi | 99 ++
130 .../boot/dts/freescale/fsl-tmu-map3.dtsi | 99 ++
131 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 ++++
132 .../dts/freescale/qoriq-bman-portals-sdk.dtsi | 55 +
133 .../dts/freescale/qoriq-bman-portals.dtsi | 8 +-
134 .../boot/dts/freescale/qoriq-dpaa-eth.dtsi | 97 ++
135 .../dts/freescale/qoriq-fman3-0-10g-0.dtsi | 11 +-
136 .../dts/freescale/qoriq-fman3-0-10g-1.dtsi | 11 +-
137 .../dts/freescale/qoriq-fman3-0-1g-0.dtsi | 7 +-
138 .../dts/freescale/qoriq-fman3-0-1g-1.dtsi | 7 +-
139 .../dts/freescale/qoriq-fman3-0-1g-2.dtsi | 7 +-
140 .../dts/freescale/qoriq-fman3-0-1g-3.dtsi | 7 +-
141 .../dts/freescale/qoriq-fman3-0-1g-4.dtsi | 7 +-
142 .../dts/freescale/qoriq-fman3-0-1g-5.dtsi | 7 +-
143 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 +
144 .../boot/dts/freescale/qoriq-fman3-0.dtsi | 67 +-
145 .../dts/freescale/qoriq-qman-portals-sdk.dtsi | 38 +
146 .../dts/freescale/qoriq-qman-portals.dtsi | 9 +-
147 .../boot/dts/freescale/traverse-ls1043s.dts | 29 +
148 .../boot/dts/freescale/traverse-ls1043v.dts | 29 +
149 68 files changed, 7660 insertions(+), 1211 deletions(-)
150 create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
151 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
152 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
153 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
154 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
155 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
156 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
157 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
158 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
159 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
160 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
161 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
162 create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
163 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
164 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
165 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
166 create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
167 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
168 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
169 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
170 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
172 --- a/arch/arm/boot/dts/Makefile
173 +++ b/arch/arm/boot/dts/Makefile
174 @@ -496,7 +496,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
176 dtb-$(CONFIG_SOC_LS1021A) += \
181 dtb-$(CONFIG_SOC_VF610) += \
182 vf500-colibri-eval-v3.dtb \
183 vf610-colibri-eval-v3.dtb \
184 --- a/arch/arm/boot/dts/imx25.dtsi
185 +++ b/arch/arm/boot/dts/imx25.dtsi
190 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
191 + compatible = "fsl,imx25-flexcan";
192 reg = <0x43f88000 0x4000>;
194 clocks = <&clks 75>, <&clks 75>;
199 - compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
200 + compatible = "fsl,imx25-flexcan";
201 reg = <0x43f8c000 0x4000>;
203 clocks = <&clks 76>, <&clks 76>;
204 --- a/arch/arm/boot/dts/imx28.dtsi
205 +++ b/arch/arm/boot/dts/imx28.dtsi
206 @@ -1038,7 +1038,7 @@
210 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
211 + compatible = "fsl,imx28-flexcan";
212 reg = <0x80032000 0x2000>;
214 clocks = <&clks 58>, <&clks 58>;
215 @@ -1047,7 +1047,7 @@
219 - compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
220 + compatible = "fsl,imx28-flexcan";
221 reg = <0x80034000 0x2000>;
223 clocks = <&clks 59>, <&clks 59>;
224 --- a/arch/arm/boot/dts/imx35.dtsi
225 +++ b/arch/arm/boot/dts/imx35.dtsi
230 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
231 + compatible = "fsl,imx35-flexcan";
232 reg = <0x53fe4000 0x1000>;
233 clocks = <&clks 33>, <&clks 33>;
234 clock-names = "ipg", "per";
239 - compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
240 + compatible = "fsl,imx35-flexcan";
241 reg = <0x53fe8000 0x1000>;
242 clocks = <&clks 34>, <&clks 34>;
243 clock-names = "ipg", "per";
244 --- a/arch/arm/boot/dts/imx53.dtsi
245 +++ b/arch/arm/boot/dts/imx53.dtsi
250 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
251 + compatible = "fsl,imx53-flexcan";
252 reg = <0x53fc8000 0x4000>;
254 clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>,
259 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
260 + compatible = "fsl,imx53-flexcan";
261 reg = <0x53fcc000 0x4000>;
263 clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>,
265 +++ b/arch/arm/boot/dts/ls1021a-iot.dts
268 + * Copyright 2013-2016 Freescale Semiconductor, Inc.
270 + * This program is free software; you can redistribute it and/or modify
271 + * it under the terms of the GNU General Public License as published by
272 + * the Free Software Foundation; either version 2 of the License, or
273 + * (at your option) any later version.
277 +#include "ls1021a.dtsi"
280 + model = "LS1021A IOT Board";
282 + sys_mclk: clock-mclk {
283 + compatible = "fixed-clock";
284 + #clock-cells = <0>;
285 + clock-frequency = <24576000>;
289 + compatible = "simple-bus";
290 + #address-cells = <1>;
293 + reg_3p3v: regulator@0 {
294 + compatible = "regulator-fixed";
296 + regulator-name = "3P3V";
297 + regulator-min-microvolt = <3300000>;
298 + regulator-max-microvolt = <3300000>;
299 + regulator-always-on;
302 + reg_2p5v: regulator@1 {
303 + compatible = "regulator-fixed";
305 + regulator-name = "2P5V";
306 + regulator-min-microvolt = <2500000>;
307 + regulator-max-microvolt = <2500000>;
308 + regulator-always-on;
313 + compatible = "simple-audio-card";
314 + simple-audio-card,format = "i2s";
315 + simple-audio-card,widgets =
316 + "Microphone", "Microphone Jack",
317 + "Headphone", "Headphone Jack",
318 + "Speaker", "Speaker Ext",
319 + "Line", "Line In Jack";
320 + simple-audio-card,routing =
321 + "MIC_IN", "Microphone Jack",
322 + "Microphone Jack", "Mic Bias",
323 + "LINE_IN", "Line In Jack",
324 + "Headphone Jack", "HP_OUT",
325 + "Speaker Ext", "LINE_OUT";
327 + simple-audio-card,cpu {
328 + sound-dai = <&sai2>;
333 + simple-audio-card,codec {
334 + sound-dai = <&codec>;
342 + compatible = "linaro,optee-tz";
349 + tbi-handle = <&tbi1>;
350 + phy-handle = <&phy1>;
351 + phy-connection-type = "sgmii";
356 + tbi-handle = <&tbi1>;
357 + phy-handle = <&phy3>;
358 + phy-connection-type = "sgmii";
363 + fixed-link = <0 1 1000 0 0>;
364 + phy-connection-type = "rgmii-id";
369 + status = "disabled";
373 + status = "disabled";
377 + status = "disabled";
392 + compatible = "maxim,max1239";
394 + #io-channel-cells = <1>;
397 + codec: sgtl5000@2a {
398 + #sound-dai-cells=<0x0>;
399 + compatible = "fsl,sgtl5000";
401 + VDDA-supply = <®_3p3v>;
402 + VDDIO-supply = <®_2p5v>;
403 + clocks = <&sys_mclk 1>;
406 + pca9555: pca9555@23 {
407 + compatible = "nxp,pca9555";
408 + /*pinctrl-names = "default";*/
409 + /*interrupt-parent = <&gpio2>;
410 + interrupts = <19 0x2>;*/
413 + interrupt-controller;
414 + #interrupt-cells = <2>;
419 + compatible = "ti,ina220";
421 + shunt-resistor = <1000>;
425 + compatible = "ti,ina220";
427 + shunt-resistor = <1000>;
431 + compatible = "nxp,lm75a";
436 + compatible = "adt7461a";
440 + hdmi: sii9022a@39 {
441 + compatible = "fsl,sii902x";
443 + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
448 + status = "disabled";
452 + status = "disabled";
460 + phy0: ethernet-phy@0 {
463 + phy1: ethernet-phy@1 {
466 + phy2: ethernet-phy@2 {
469 + phy3: ethernet-phy@3 {
474 + device_type = "tbi-phy";
482 + qflash0: s25fl128s@0 {
483 + compatible = "spansion,s25fl129p1";
484 + #address-cells = <1>;
486 + spi-max-frequency = <20000000>;
504 + display = <&display>;
507 + display: display@0 {
508 + bits-per-pixel = <24>;
511 + native-mode = <&timing0>;
514 + clock-frequency = <25000000>;
517 + hback-porch = <80>;
518 + hfront-porch = <80>;
519 + vback-porch = <16>;
520 + vfront-porch = <16>;
523 + hsync-active = <1>;
524 + vsync-active = <1>;
529 --- a/arch/arm/boot/dts/ls1021a-qds.dts
530 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
539 + qflash0: s25fl128s@0 {
540 + compatible = "spansion,m25p80";
541 + #address-cells = <1>;
543 + spi-max-frequency = <20000000>;
545 + spi-rx-bus-width = <4>;
546 + spi-tx-bus-width = <4>;
551 tbi-handle = <&tbi0>;
552 phy-handle = <&sgmii_phy1c>;
558 + compatible = "fsl,ifc-nand";
559 + reg = <0x2 0x0 0x10000>;
562 fpga: board-control@3,0 {
563 #address-cells = <1>;
588 --- a/arch/arm/boot/dts/ls1021a-twr.dts
589 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
598 + qflash0: n25q128a13@0 {
599 + compatible = "n25q128a13", "jedec,spi-nor";
600 + #address-cells = <1>;
602 + spi-max-frequency = <20000000>;
604 + spi-rx-bus-width = <4>;
605 + spi-tx-bus-width = <4>;
610 tbi-handle = <&tbi0>;
611 phy-handle = <&sgmii_phy2>;
635 --- a/arch/arm/boot/dts/ls1021a.dtsi
636 +++ b/arch/arm/boot/dts/ls1021a.dtsi
637 @@ -146,12 +146,13 @@
639 compatible = "fsl,ifc", "simple-bus";
640 reg = <0x0 0x1530000 0x0 0x10000>;
642 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
646 compatible = "fsl,ls1021a-dcfg", "syscon";
647 - reg = <0x0 0x1ee0000 0x0 0x10000>;
648 + reg = <0x0 0x1ee0000 0x0 0x1000>;
652 @@ -334,25 +335,44 @@
656 + qspi: quadspi@1550000 {
657 + compatible = "fsl,ls1021a-qspi";
658 + #address-cells = <1>;
660 + reg = <0x0 0x1550000 0x0 0x10000>,
661 + <0x0 0x40000000 0x0 0x4000000>;
662 + reg-names = "QuadSPI", "QuadSPI-memory";
663 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
664 + clock-names = "qspi_en", "qspi";
665 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
667 + status = "disabled";
671 - compatible = "fsl,vf610-i2c";
672 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
673 #address-cells = <1>;
675 reg = <0x0 0x2180000 0x0 0x10000>;
676 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
678 clocks = <&clockgen 4 1>;
679 + dma-names = "tx", "rx";
680 + dmas = <&edma0 1 39>,
682 + fsl-scl-gpio = <&gpio3 23 0>;
687 - compatible = "fsl,vf610-i2c";
688 + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c";
689 #address-cells = <1>;
691 reg = <0x0 0x2190000 0x0 0x10000>;
692 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&clockgen 4 1>;
695 + fsl-scl-gpio = <&gpio3 23 0>;
703 + ftm0: ftm0@29d0000 {
704 + compatible = "fsl,ls1021a-ftm-alarm";
705 + reg = <0x0 0x29d0000 0x0 0x10000>,
706 + <0x0 0x1ee2144 0x0 0x4>,
707 + <0x0 0x0157051c 0x0 0x4>;
708 + reg-names = "ftm", "pmctrl", "scrachpad";
709 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
714 wdog0: watchdog@2ad0000 {
715 compatible = "fsl,imx21-wdt";
716 reg = <0x0 0x2ad0000 0x0 0x10000>;
721 + qdma: qdma@8390000 {
722 + compatible = "fsl,ls1021a-qdma";
723 + reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
724 + <0x0 0x8389000 0x0 0x1000>, /* Status regs */
725 + <0x0 0x838a000 0x0 0x2000>; /* Block regs */
726 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
727 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
728 + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
729 + interrupt-names = "qdma-error",
730 + "qdma-queue0", "qdma-queue1";
732 + block-number = <2>;
733 + block-offset = <0x1000>;
735 + status-sizes = <64>;
736 + queue-sizes = <64 64>;
741 compatible = "fsl,ls1021a-dcu";
742 reg = <0x0 0x2ce0000 0x0 0x10000>;
745 snps,quirk-frame-length-adjustment = <0x20>;
746 snps,dis_rxdet_inp3_quirk;
749 + snps,dis-u1u2-when-u3-quirk;
750 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
751 + snps,host-vbus-glitches;
756 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
757 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
758 reg-names = "regs", "config";
759 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
760 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
761 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
762 + interrupt-names = "pme", "aer";
763 fsl,pcie-scfg = <&scfg 0>;
764 #address-cells = <3>;
767 <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
768 <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
769 <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
770 + status = "disabled";
775 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
776 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
777 reg-names = "regs", "config";
778 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
779 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
780 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
781 + interrupt-names = "pme", "aer";
782 fsl,pcie-scfg = <&scfg 1>;
783 #address-cells = <3>;
786 <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
787 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
788 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
789 + status = "disabled";
792 + can0: can@2a70000 {
793 + compatible = "fsl,ls1021ar2-flexcan";
794 + reg = <0x0 0x2a70000 0x0 0x1000>;
795 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
796 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
797 + clock-names = "ipg", "per";
799 + status = "disabled";
802 + can1: can@2a80000 {
803 + compatible = "fsl,ls1021ar2-flexcan";
804 + reg = <0x0 0x2a80000 0x0 0x1000>;
805 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
806 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
807 + clock-names = "ipg", "per";
809 + status = "disabled";
812 + can2: can@2a90000 {
813 + compatible = "fsl,ls1021ar2-flexcan";
814 + reg = <0x0 0x2a90000 0x0 0x1000>;
815 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
816 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
817 + clock-names = "ipg", "per";
819 + status = "disabled";
822 + can3: can@2aa0000 {
823 + compatible = "fsl,ls1021ar2-flexcan";
824 + reg = <0x0 0x2aa0000 0x0 0x1000>;
825 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
826 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
827 + clock-names = "ipg", "per";
829 + status = "disabled";
833 --- a/arch/arm64/boot/dts/freescale/Makefile
834 +++ b/arch/arm64/boot/dts/freescale/Makefile
836 # SPDX-License-Identifier: GPL-2.0
837 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
838 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
839 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
840 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
841 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
842 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
843 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
844 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
845 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
846 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
847 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
848 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
849 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
850 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
851 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
852 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
853 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
854 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
855 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
856 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
857 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
858 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
859 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
861 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
862 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
864 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043v.dtb
865 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += traverse-ls1043s.dtb
868 subdir-y := $(dts-dirs)
871 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
874 + * Device Tree file for NXP LS1012A 2G5RDB Board.
876 + * Copyright 2017 NXP
878 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
880 + * This file is dual-licensed: you can use it either under the terms
881 + * of the GPLv2 or the X11 license, at your option. Note that this dual
882 + * licensing only applies to this file, and not this project as a
885 + * a) This library is free software; you can redistribute it and/or
886 + * modify it under the terms of the GNU General Public License as
887 + * published by the Free Software Foundation; either version 2 of the
888 + * License, or (at your option) any later version.
890 + * This library is distributed in the hope that it will be useful,
891 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
892 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
893 + * GNU General Public License for more details.
895 + * Or, alternatively,
897 + * b) Permission is hereby granted, free of charge, to any person
898 + * obtaining a copy of this software and associated documentation
899 + * files (the "Software"), to deal in the Software without
900 + * restriction, including without limitation the rights to use,
901 + * copy, modify, merge, publish, distribute, sublicense, and/or
902 + * sell copies of the Software, and to permit persons to whom the
903 + * Software is furnished to do so, subject to the following
906 + * The above copyright notice and this permission notice shall be
907 + * included in all copies or substantial portions of the Software.
909 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
910 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
911 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
912 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
913 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
914 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
915 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
916 + * OTHER DEALINGS IN THE SOFTWARE.
920 +#include "fsl-ls1012a.dtsi"
923 + model = "LS1012A 2G5RDB Board";
924 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
927 + ethernet0 = &pfe_mac0;
928 + ethernet1 = &pfe_mac1;
945 + qflash0: s25fs512s@0 {
946 + compatible = "spansion,m25p80";
947 + #address-cells = <1>;
949 + spi-max-frequency = <20000000>;
961 + #address-cells = <1>;
964 + pfe_mac0: ethernet@0 {
965 + compatible = "fsl,pfe-gemac-port";
966 + #address-cells = <1>;
968 + reg = <0x0>; /* GEM_ID */
969 + fsl,mdio-mux-val = <0x0>;
970 + phy-mode = "sgmii-2500";
971 + phy-handle = <&sgmii_phy1>;
974 + pfe_mac1: ethernet@1 {
975 + compatible = "fsl,pfe-gemac-port";
976 + #address-cells = <1>;
978 + reg = <0x1>; /* GEM_ID */
979 + fsl,mdio-mux-val = <0x0>;
980 + phy-mode = "sgmii-2500";
981 + phy-handle = <&sgmii_phy2>;
985 + #address-cells = <1>;
988 + sgmii_phy1: ethernet-phy@1 {
989 + compatible = "ethernet-phy-ieee802.3-c45";
993 + sgmii_phy2: ethernet-phy@2 {
994 + compatible = "ethernet-phy-ieee802.3-c45";
999 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1000 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
1002 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1004 * Device Tree file for Freescale LS1012A Freedom Board.
1006 * Copyright 2016 Freescale Semiconductor, Inc.
1008 - * This file is dual-licensed: you can use it either under the terms
1009 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1010 - * licensing only applies to this file, and not this project as a
1013 - * a) This library is free software; you can redistribute it and/or
1014 - * modify it under the terms of the GNU General Public License as
1015 - * published by the Free Software Foundation; either version 2 of the
1016 - * License, or (at your option) any later version.
1018 - * This library is distributed in the hope that it will be useful,
1019 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1020 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1021 - * GNU General Public License for more details.
1023 - * Or, alternatively,
1025 - * b) Permission is hereby granted, free of charge, to any person
1026 - * obtaining a copy of this software and associated documentation
1027 - * files (the "Software"), to deal in the Software without
1028 - * restriction, including without limitation the rights to use,
1029 - * copy, modify, merge, publish, distribute, sublicense, and/or
1030 - * sell copies of the Software, and to permit persons to whom the
1031 - * Software is furnished to do so, subject to the following
1034 - * The above copyright notice and this permission notice shall be
1035 - * included in all copies or substantial portions of the Software.
1037 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1038 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1039 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1040 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1041 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1042 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1043 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1044 - * OTHER DEALINGS IN THE SOFTWARE.
1049 model = "LS1012A Freedom Board";
1050 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1053 + ethernet0 = &pfe_mac0;
1054 + ethernet1 = &pfe_mac1;
1057 sys_mclk: clock-mclk {
1058 compatible = "fixed-clock";
1066 + #address-cells = <1>;
1067 + #size-cells = <0>;
1069 + pfe_mac0: ethernet@0 {
1070 + compatible = "fsl,pfe-gemac-port";
1071 + #address-cells = <1>;
1072 + #size-cells = <0>;
1073 + reg = <0x0>; /* GEM_ID */
1074 + fsl,mdio-mux-val = <0x0>;
1075 + phy-mode = "sgmii";
1076 + phy-handle = <&sgmii_phy1>;
1079 + pfe_mac1: ethernet@1 {
1080 + compatible = "fsl,pfe-gemac-port";
1081 + #address-cells = <1>;
1082 + #size-cells = <0>;
1083 + reg = <0x1>; /* GEM_ID */
1084 + fsl,mdio-mux-val = <0x0>;
1085 + phy-mode = "sgmii";
1086 + phy-handle = <&sgmii_phy2>;
1090 + #address-cells = <1>;
1091 + #size-cells = <0>;
1093 + sgmii_phy1: ethernet-phy@2 {
1097 + sgmii_phy2: ethernet-phy@1 {
1106 @@ -117,3 +125,18 @@
1113 + qflash0: s25fs512s@0 {
1114 + compatible = "spansion,m25p80";
1115 + #address-cells = <1>;
1116 + #size-cells = <1>;
1117 + spi-max-frequency = <20000000>;
1120 + spi-rx-bus-width = <2>;
1121 + spi-tx-bus-width = <2>;
1126 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
1129 + * Device Tree file for NXP LS1012A FRWY Board.
1131 + * Copyright 2018 NXP
1133 + * This file is dual-licensed: you can use it either under the terms
1134 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1135 + * licensing only applies to this file, and not this project as a
1138 + * a) This library is free software; you can redistribute it and/or
1139 + * modify it under the terms of the GNU General Public License as
1140 + * published by the Free Software Foundation; either version 2 of the
1141 + * License, or (at your option) any later version.
1143 + * This library is distributed in the hope that it will be useful,
1144 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1145 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1146 + * GNU General Public License for more details.
1148 + * Or, alternatively,
1150 + * b) Permission is hereby granted, free of charge, to any person
1151 + * obtaining a copy of this software and associated documentation
1152 + * files (the "Software"), to deal in the Software without
1153 + * restriction, including without limitation the rights to use,
1154 + * copy, modify, merge, publish, distribute, sublicense, and/or
1155 + * sell copies of the Software, and to permit persons to whom the
1156 + * Software is furnished to do so, subject to the following
1159 + * The above copyright notice and this permission notice shall be
1160 + * included in all copies or substantial portions of the Software.
1162 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1163 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1164 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1165 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1166 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1167 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1168 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1169 + * OTHER DEALINGS IN THE SOFTWARE.
1173 +#include "fsl-ls1012a.dtsi"
1176 + model = "LS1012A FRWY Board";
1177 + compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
1180 + ethernet0 = &pfe_mac0;
1181 + ethernet1 = &pfe_mac1;
1184 + sys_mclk: clock-mclk {
1185 + compatible = "fixed-clock";
1186 + #clock-cells = <0>;
1187 + clock-frequency = <25000000>;
1190 + reg_1p8v: regulator-1p8v {
1191 + compatible = "regulator-fixed";
1192 + regulator-name = "1P8V";
1193 + regulator-min-microvolt = <1800000>;
1194 + regulator-max-microvolt = <1800000>;
1195 + regulator-always-on;
1199 + compatible = "simple-audio-card";
1200 + simple-audio-card,format = "i2s";
1201 + simple-audio-card,widgets =
1202 + "Microphone", "Microphone Jack",
1203 + "Headphone", "Headphone Jack",
1204 + "Speaker", "Speaker Ext",
1205 + "Line", "Line In Jack";
1206 + simple-audio-card,routing =
1207 + "MIC_IN", "Microphone Jack",
1208 + "Microphone Jack", "Mic Bias",
1209 + "LINE_IN", "Line In Jack",
1210 + "Headphone Jack", "HP_OUT",
1211 + "Speaker Ext", "LINE_OUT";
1213 + simple-audio-card,cpu {
1214 + sound-dai = <&sai2>;
1219 + simple-audio-card,codec {
1220 + sound-dai = <&codec>;
1223 + system-clock-frequency = <25000000>;
1239 + codec: sgtl5000@a {
1240 + compatible = "fsl,sgtl5000";
1241 + #sound-dai-cells = <0>;
1243 + VDDA-supply = <®_1p8v>;
1244 + VDDIO-supply = <®_1p8v>;
1245 + clocks = <&sys_mclk>;
1254 + qflash0: w25q16dw@0 {
1255 + compatible = "spansion,m25p80";
1256 + #address-cells = <1>;
1257 + #size-cells = <1>;
1259 + spi-max-frequency = <20000000>;
1266 + #address-cells = <1>;
1267 + #size-cells = <0>;
1269 + pfe_mac0: ethernet@0 {
1270 + compatible = "fsl,pfe-gemac-port";
1271 + #address-cells = <1>;
1272 + #size-cells = <0>;
1273 + reg = <0x0>; /* GEM_ID */
1274 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1275 + fsl,mdio-mux-val = <0x0>;
1276 + phy-mode = "sgmii";
1277 + phy-handle = <&sgmii_phy1>;
1280 + pfe_mac1: ethernet@1 {
1281 + compatible = "fsl,pfe-gemac-port";
1282 + #address-cells = <1>;
1283 + #size-cells = <0>;
1284 + reg = <0x1>; /* GEM_ID */
1285 + fsl,mdio-mux-val = <0x0>;
1286 + phy-mode = "sgmii";
1287 + phy-handle = <&sgmii_phy2>;
1291 + #address-cells = <1>;
1292 + #size-cells = <0>;
1294 + sgmii_phy1: ethernet-phy@2 {
1298 + sgmii_phy2: ethernet-phy@1 {
1307 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1308 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1310 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1312 * Device Tree file for Freescale LS1012A QDS Board.
1314 * Copyright 2016 Freescale Semiconductor, Inc.
1316 - * This file is dual-licensed: you can use it either under the terms
1317 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1318 - * licensing only applies to this file, and not this project as a
1321 - * a) This library is free software; you can redistribute it and/or
1322 - * modify it under the terms of the GNU General Public License as
1323 - * published by the Free Software Foundation; either version 2 of the
1324 - * License, or (at your option) any later version.
1326 - * This library is distributed in the hope that it will be useful,
1327 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1328 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1329 - * GNU General Public License for more details.
1331 - * Or, alternatively,
1333 - * b) Permission is hereby granted, free of charge, to any person
1334 - * obtaining a copy of this software and associated documentation
1335 - * files (the "Software"), to deal in the Software without
1336 - * restriction, including without limitation the rights to use,
1337 - * copy, modify, merge, publish, distribute, sublicense, and/or
1338 - * sell copies of the Software, and to permit persons to whom the
1339 - * Software is furnished to do so, subject to the following
1342 - * The above copyright notice and this permission notice shall be
1343 - * included in all copies or substantial portions of the Software.
1345 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1346 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1347 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1348 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1349 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1350 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1351 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1352 - * OTHER DEALINGS IN THE SOFTWARE.
1357 model = "LS1012A QDS Board";
1358 compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1361 + ethernet0 = &pfe_mac0;
1362 + ethernet1 = &pfe_mac1;
1365 sys_mclk: clock-mclk {
1366 compatible = "fixed-clock";
1381 + #address-cells = <1>;
1382 + #size-cells = <1>;
1383 + compatible = "n25q128a11", "jedec,spi-nor";
1385 + spi-max-frequency = <10000000>;
1389 + #address-cells = <1>;
1390 + #size-cells = <1>;
1391 + compatible = "sst25wf040b", "jedec,spi-nor";
1395 + spi-max-frequency = <10000000>;
1399 + #address-cells = <1>;
1400 + #size-cells = <1>;
1401 + compatible = "en25s64", "jedec,spi-nor";
1405 + spi-max-frequency = <10000000>;
1412 @@ -131,6 +137,47 @@
1418 + #address-cells = <1>;
1419 + #size-cells = <0>;
1421 + pfe_mac0: ethernet@0 {
1422 + compatible = "fsl,pfe-gemac-port";
1423 + #address-cells = <1>;
1424 + #size-cells = <0>;
1425 + reg = <0x0>; /* GEM_ID */
1426 + fsl,mdio-mux-val = <0x2>;
1427 + phy-mode = "sgmii-2500";
1428 + phy-handle = <&sgmii_phy1>;
1431 + pfe_mac1: ethernet@1 {
1432 + compatible = "fsl,pfe-gemac-port";
1433 + #address-cells = <1>;
1434 + #size-cells = <0>;
1435 + reg = <0x1>; /* GEM_ID */
1436 + fsl,mdio-mux-val = <0x3>;
1437 + phy-mode = "sgmii-2500";
1438 + phy-handle = <&sgmii_phy2>;
1442 + #address-cells = <1>;
1443 + #size-cells = <0>;
1445 + sgmii_phy1: ethernet-phy@1 {
1446 + compatible = "ethernet-phy-ieee802.3-c45";
1450 + sgmii_phy2: ethernet-phy@2 {
1451 + compatible = "ethernet-phy-ieee802.3-c45";
1460 @@ -138,3 +185,18 @@
1467 + qflash0: s25fs512s@0 {
1468 + compatible = "spansion,m25p80";
1469 + #address-cells = <1>;
1470 + #size-cells = <1>;
1471 + spi-max-frequency = <20000000>;
1474 + spi-rx-bus-width = <2>;
1475 + spi-tx-bus-width = <2>;
1479 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1480 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1482 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1484 * Device Tree file for Freescale LS1012A RDB Board.
1486 * Copyright 2016 Freescale Semiconductor, Inc.
1488 - * This file is dual-licensed: you can use it either under the terms
1489 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1490 - * licensing only applies to this file, and not this project as a
1493 - * a) This library is free software; you can redistribute it and/or
1494 - * modify it under the terms of the GNU General Public License as
1495 - * published by the Free Software Foundation; either version 2 of the
1496 - * License, or (at your option) any later version.
1498 - * This library is distributed in the hope that it will be useful,
1499 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1500 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1501 - * GNU General Public License for more details.
1503 - * Or, alternatively,
1505 - * b) Permission is hereby granted, free of charge, to any person
1506 - * obtaining a copy of this software and associated documentation
1507 - * files (the "Software"), to deal in the Software without
1508 - * restriction, including without limitation the rights to use,
1509 - * copy, modify, merge, publish, distribute, sublicense, and/or
1510 - * sell copies of the Software, and to permit persons to whom the
1511 - * Software is furnished to do so, subject to the following
1514 - * The above copyright notice and this permission notice shall be
1515 - * included in all copies or substantial portions of the Software.
1517 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1518 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1519 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1520 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1521 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1522 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1523 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1524 - * OTHER DEALINGS IN THE SOFTWARE.
1530 model = "LS1012A RDB Board";
1531 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1534 + ethernet0 = &pfe_mac0;
1535 + ethernet1 = &pfe_mac1;
1551 + #address-cells = <1>;
1552 + #size-cells = <0>;
1554 + pfe_mac0: ethernet@0 {
1555 + compatible = "fsl,pfe-gemac-port";
1556 + #address-cells = <1>;
1557 + #size-cells = <0>;
1558 + reg = <0x0>; /* GEM_ID */
1559 + fsl,mdio-mux-val = <0x0>;
1560 + phy-mode = "sgmii";
1561 + phy-handle = <&sgmii_phy>;
1564 + pfe_mac1: ethernet@1 {
1565 + compatible = "fsl,pfe-gemac-port";
1566 + #address-cells = <1>;
1567 + #size-cells = <0>;
1568 + reg = <0x1>; /* GEM_ID */
1569 + fsl,mdio-mux-val = <0x0>;
1570 + phy-mode = "rgmii-txid";
1571 + phy-handle = <&rgmii_phy>;
1574 + #address-cells = <1>;
1575 + #size-cells = <0>;
1577 + sgmii_phy: ethernet-phy@2 {
1581 + rgmii_phy: ethernet-phy@1 {
1589 + qflash0: s25fs512s@0 {
1590 + compatible = "spansion,m25p80";
1591 + #address-cells = <1>;
1592 + #size-cells = <1>;
1593 + spi-max-frequency = <20000000>;
1596 + spi-rx-bus-width = <2>;
1597 + spi-tx-bus-width = <2>;
1601 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1602 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1604 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
1606 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1608 * Copyright 2016 Freescale Semiconductor, Inc.
1610 - * This file is dual-licensed: you can use it either under the terms
1611 - * of the GPLv2 or the X11 license, at your option. Note that this dual
1612 - * licensing only applies to this file, and not this project as a
1615 - * a) This library is free software; you can redistribute it and/or
1616 - * modify it under the terms of the GNU General Public License as
1617 - * published by the Free Software Foundation; either version 2 of the
1618 - * License, or (at your option) any later version.
1620 - * This library is distributed in the hope that it will be useful,
1621 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
1622 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1623 - * GNU General Public License for more details.
1625 - * Or, alternatively,
1627 - * b) Permission is hereby granted, free of charge, to any person
1628 - * obtaining a copy of this software and associated documentation
1629 - * files (the "Software"), to deal in the Software without
1630 - * restriction, including without limitation the rights to use,
1631 - * copy, modify, merge, publish, distribute, sublicense, and/or
1632 - * sell copies of the Software, and to permit persons to whom the
1633 - * Software is furnished to do so, subject to the following
1636 - * The above copyright notice and this permission notice shall be
1637 - * included in all copies or substantial portions of the Software.
1639 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1640 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1641 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1642 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1643 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1644 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1645 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1646 - * OTHER DEALINGS IN THE SOFTWARE.
1649 #include <dt-bindings/interrupt-controller/arm-gic.h>
1651 #address-cells = <1>;
1655 + cooling_map0: cpu0: cpu@0 {
1656 device_type = "cpu";
1657 compatible = "arm,cortex-a53";
1659 clocks = <&clockgen 1 0>;
1660 #cooling-cells = <2>;
1661 + cpu-idle-states = <&CPU_PH20>;
1667 + * PSCI node is not added default, U-boot will add missing
1668 + * parts if it determines to use PSCI.
1670 + entry-method = "arm,psci";
1672 + CPU_PH20: cpu-ph20 {
1673 + compatible = "arm,idle-state";
1674 + idle-state-name = "PH20";
1675 + arm,psci-suspend-param = <0x0>;
1676 + entry-latency-us = <1000>;
1677 + exit-latency-us = <1000>;
1678 + min-residency-us = <3000>;
1683 dcfg: dcfg@1ee0000 {
1684 compatible = "fsl,ls1012a-dcfg",
1686 - reg = <0x0 0x1ee0000 0x0 0x10000>;
1687 + reg = <0x0 0x1ee0000 0x0 0x1000>;
1691 @@ -305,44 +287,25 @@
1692 #thermal-sensor-cells = <1>;
1696 - cpu_thermal: cpu-thermal {
1697 - polling-delay-passive = <1000>;
1698 - polling-delay = <5000>;
1699 - thermal-sensors = <&tmu 0>;
1702 - cpu_alert: cpu-alert {
1703 - temperature = <85000>;
1704 - hysteresis = <2000>;
1708 - cpu_crit: cpu-crit {
1709 - temperature = <95000>;
1710 - hysteresis = <2000>;
1711 - type = "critical";
1714 + #include "fsl-tmu.dtsi"
1718 - trip = <&cpu_alert>;
1720 - <&cpu0 THERMAL_NO_LIMIT
1721 - THERMAL_NO_LIMIT>;
1725 + ftm0: ftm0@29d0000 {
1726 + compatible = "fsl,ls1012a-ftm-alarm";
1727 + reg = <0x0 0x29d0000 0x0 0x10000>,
1728 + <0x0 0x1ee2140 0x0 0x4>;
1729 + reg-names = "ftm", "pmctrl";
1730 + interrupts = <0 86 0x4>;
1735 - compatible = "fsl,vf610-i2c";
1736 + compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
1737 #address-cells = <1>;
1739 reg = <0x0 0x2180000 0x0 0x10000>;
1740 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1741 - clocks = <&clockgen 4 0>;
1742 + clocks = <&clockgen 4 3>;
1743 + scl-gpios = <&gpio0 13 0>;
1744 status = "disabled";
1747 @@ -352,7 +315,20 @@
1749 reg = <0x0 0x2190000 0x0 0x10000>;
1750 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1751 + clocks = <&clockgen 4 3>;
1752 + status = "disabled";
1755 + dspi: dspi@2100000 {
1756 + compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
1757 + #address-cells = <1>;
1758 + #size-cells = <0>;
1759 + reg = <0x0 0x2100000 0x0 0x10000>;
1760 + interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
1761 + clock-names = "dspi";
1762 clocks = <&clockgen 4 0>;
1763 + spi-num-chipselects = <5>;
1765 status = "disabled";
1768 @@ -401,6 +377,20 @@
1772 + qspi: quadspi@1550000 {
1773 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1774 + #address-cells = <1>;
1775 + #size-cells = <0>;
1776 + reg = <0x0 0x1550000 0x0 0x10000>,
1777 + <0x0 0x40000000 0x0 0x10000000>;
1778 + reg-names = "QuadSPI", "QuadSPI-memory";
1779 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1780 + clock-names = "qspi_en", "qspi";
1781 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1783 + status = "disabled";
1787 #sound-dai-cells = <0>;
1788 compatible = "fsl,vf610-sai";
1791 snps,quirk-frame-length-adjustment = <0x20>;
1792 snps,dis_rxdet_inp3_quirk;
1793 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
1794 + snps,host-vbus-glitches;
1797 sata: sata@3200000 {
1798 @@ -472,5 +464,85 @@
1803 + msi: msi-controller1@1572000 {
1804 + compatible = "fsl,ls1012a-msi";
1805 + reg = <0x0 0x1572000 0x0 0x8>;
1807 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
1810 + pcie: pcie@3400000 {
1811 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
1812 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
1813 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
1814 + reg-names = "regs", "config";
1815 + interrupts = <0 118 0x4>, /* AER interrupt */
1816 + <0 117 0x4>; /* PME interrupt */
1817 + interrupt-names = "aer", "pme";
1818 + #address-cells = <3>;
1819 + #size-cells = <2>;
1820 + device_type = "pci";
1822 + bus-range = <0x0 0xff>;
1823 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
1824 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1825 + msi-parent = <&msi>;
1826 + #interrupt-cells = <1>;
1827 + interrupt-map-mask = <0 0 0 7>;
1828 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
1829 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
1830 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
1831 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
1832 + status = "disabled";
1835 + rcpm: rcpm@1ee2000 {
1836 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1837 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1838 + fsl,#rcpm-wakeup-cells = <1>;
1843 + #address-cells = <2>;
1844 + #size-cells = <2>;
1847 + pfe_reserved: packetbuffer@83400000 {
1848 + reg = <0 0x83400000 0 0xc00000>;
1852 + pfe: pfe@04000000 {
1853 + compatible = "fsl,pfe";
1854 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
1855 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
1856 + reg-names = "pfe", "pfe-ddr";
1857 + fsl,pfe-num-interfaces = <0x2>;
1858 + interrupts = <0 172 0x4>, /* HIF interrupt */
1859 + <0 173 0x4>, /*HIF_NOCPY interrupt */
1860 + <0 174 0x4>; /* WoL interrupt */
1861 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
1862 + memory-region = <&pfe_reserved>;
1863 + fsl,pfe-scfg = <&scfg 0>;
1864 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
1865 + clocks = <&clockgen 4 0>;
1866 + clock-names = "pfe";
1873 + compatible = "linaro,optee-tz";
1884 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1885 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1887 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1889 * QorIQ FMan v3 device tree nodes for ls1043
1891 * Copyright 2015-2016 Freescale Semiconductor Inc.
1893 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1898 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
1901 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
1903 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
1905 + * Mingkai Hu <Mingkai.hu@freescale.com>
1907 + * This file is dual-licensed: you can use it either under the terms
1908 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1909 + * licensing only applies to this file, and not this project as a
1912 + * a) This library is free software; you can redistribute it and/or
1913 + * modify it under the terms of the GNU General Public License as
1914 + * published by the Free Software Foundation; either version 2 of the
1915 + * License, or (at your option) any later version.
1917 + * This library is distributed in the hope that it will be useful,
1918 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1919 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1920 + * GNU General Public License for more details.
1922 + * Or, alternatively,
1924 + * b) Permission is hereby granted, free of charge, to any person
1925 + * obtaining a copy of this software and associated documentation
1926 + * files (the "Software"), to deal in the Software without
1927 + * restriction, including without limitation the rights to use,
1928 + * copy, modify, merge, publish, distribute, sublicense, and/or
1929 + * sell copies of the Software, and to permit persons to whom the
1930 + * Software is furnished to do so, subject to the following
1933 + * The above copyright notice and this permission notice shall be
1934 + * included in all copies or substantial portions of the Software.
1936 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1937 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1938 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1939 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1940 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1941 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1942 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1943 + * OTHER DEALINGS IN THE SOFTWARE.
1946 +#include "fsl-ls1043a-qds.dts"
1947 +#include "qoriq-qman-portals-sdk.dtsi"
1948 +#include "qoriq-bman-portals-sdk.dtsi"
1951 + compatible = "fsl,bman-fbpr";
1952 + alloc-ranges = <0 0 0x10000 0>;
1955 + compatible = "fsl,qman-fqd";
1956 + alloc-ranges = <0 0 0x10000 0>;
1959 + compatible = "fsl,qman-pfdr";
1960 + alloc-ranges = <0 0 0x10000 0>;
1964 +/delete-property/ dma-coherent;
1966 +#include "qoriq-dpaa-eth.dtsi"
1967 +#include "qoriq-fman3-0-6oh.dtsi"
1970 + /delete-property/ iommu-map;
1975 + /delete-property/ iommu-map;
1980 + /delete-property/ iommu-map;
1984 +/delete-node/ iommu@9000000;
1988 + compatible = "fsl,fman", "simple-bus";
2163 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2164 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2166 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2168 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2170 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2172 * Mingkai Hu <Mingkai.hu@freescale.com>
2174 - * This file is dual-licensed: you can use it either under the terms
2175 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2176 - * licensing only applies to this file, and not this project as a
2179 - * a) This library is free software; you can redistribute it and/or
2180 - * modify it under the terms of the GNU General Public License as
2181 - * published by the Free Software Foundation; either version 2 of the
2182 - * License, or (at your option) any later version.
2184 - * This library is distributed in the hope that it will be useful,
2185 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2186 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2187 - * GNU General Public License for more details.
2189 - * Or, alternatively,
2191 - * b) Permission is hereby granted, free of charge, to any person
2192 - * obtaining a copy of this software and associated documentation
2193 - * files (the "Software"), to deal in the Software without
2194 - * restriction, including without limitation the rights to use,
2195 - * copy, modify, merge, publish, distribute, sublicense, and/or
2196 - * sell copies of the Software, and to permit persons to whom the
2197 - * Software is furnished to do so, subject to the following
2200 - * The above copyright notice and this permission notice shall be
2201 - * included in all copies or substantial portions of the Software.
2203 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2204 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2205 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2206 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2207 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2208 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2209 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2210 - * OTHER DEALINGS IN THE SOFTWARE.
2218 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2219 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2220 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2221 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2222 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2223 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2224 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2225 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2226 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2227 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2228 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2229 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2230 + emi1_slot1 = &ls1043mdio_s1;
2231 + emi1_slot2 = &ls1043mdio_s2;
2232 + emi1_slot3 = &ls1043mdio_s3;
2233 + emi1_slot4 = &ls1043mdio_s4;
2240 fpga: board-control@2,0 {
2241 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2242 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2243 reg = <0x2 0x0 0x0000100>;
2244 + #address-cells = <1>;
2245 + #size-cells = <1>;
2246 + ranges = <0 2 0 0x100>;
2250 @@ -179,7 +161,153 @@
2252 spi-max-frequency = <20000000>;
2254 + spi-rx-bus-width = <4>;
2255 + spi-tx-bus-width = <4>;
2259 #include "fsl-ls1043-post.dtsi"
2263 + phy-handle = <&qsgmii_phy_s2_p1>;
2264 + phy-connection-type = "sgmii";
2268 + phy-handle = <&qsgmii_phy_s2_p2>;
2269 + phy-connection-type = "sgmii";
2273 + phy-handle = <&rgmii_phy1>;
2274 + phy-connection-type = "rgmii";
2278 + phy-handle = <&rgmii_phy2>;
2279 + phy-connection-type = "rgmii";
2283 + phy-handle = <&qsgmii_phy_s2_p3>;
2284 + phy-connection-type = "sgmii";
2288 + phy-handle = <&qsgmii_phy_s2_p4>;
2289 + phy-connection-type = "sgmii";
2292 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2293 + fixed-link = <1 1 10000 0 0>;
2294 + phy-connection-type = "xgmii";
2300 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2301 + mdio-parent-bus = <&mdio0>;
2302 + #address-cells = <1>;
2303 + #size-cells = <0>;
2304 + reg = <0x54 1>; /* BRDCFG4 */
2305 + mux-mask = <0xe0>; /* EMI1 */
2307 + /* On-board RGMII1 PHY */
2308 + ls1043mdio0: mdio@0 {
2310 + #address-cells = <1>;
2311 + #size-cells = <0>;
2313 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2318 + /* On-board RGMII2 PHY */
2319 + ls1043mdio1: mdio@1 {
2321 + #address-cells = <1>;
2322 + #size-cells = <0>;
2324 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2330 + ls1043mdio_s1: mdio@2 {
2332 + #address-cells = <1>;
2333 + #size-cells = <0>;
2334 + status = "disabled";
2336 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2339 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2342 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2345 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2349 + sgmii_phy_s1_p1: ethernet-phy@1c {
2355 + ls1043mdio_s2: mdio@3 {
2357 + #address-cells = <1>;
2358 + #size-cells = <0>;
2359 + status = "disabled";
2361 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2364 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2367 + qsgmii_phy_s2_p3: ethernet-phy@a {
2370 + qsgmii_phy_s2_p4: ethernet-phy@b {
2374 + sgmii_phy_s2_p1: ethernet-phy@1c {
2380 + ls1043mdio_s3: mdio@4 {
2382 + #address-cells = <1>;
2383 + #size-cells = <0>;
2384 + status = "disabled";
2386 + sgmii_phy_s3_p1: ethernet-phy@1c {
2392 + ls1043mdio_s4: mdio@5 {
2394 + #address-cells = <1>;
2395 + #size-cells = <0>;
2396 + status = "disabled";
2398 + sgmii_phy_s4_p1: ethernet-phy@1c {
2405 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2408 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2410 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2412 + * Mingkai Hu <Mingkai.hu@freescale.com>
2414 + * This file is dual-licensed: you can use it either under the terms
2415 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2416 + * licensing only applies to this file, and not this project as a
2419 + * a) This library is free software; you can redistribute it and/or
2420 + * modify it under the terms of the GNU General Public License as
2421 + * published by the Free Software Foundation; either version 2 of the
2422 + * License, or (at your option) any later version.
2424 + * This library is distributed in the hope that it will be useful,
2425 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2426 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2427 + * GNU General Public License for more details.
2429 + * Or, alternatively,
2431 + * b) Permission is hereby granted, free of charge, to any person
2432 + * obtaining a copy of this software and associated documentation
2433 + * files (the "Software"), to deal in the Software without
2434 + * restriction, including without limitation the rights to use,
2435 + * copy, modify, merge, publish, distribute, sublicense, and/or
2436 + * sell copies of the Software, and to permit persons to whom the
2437 + * Software is furnished to do so, subject to the following
2440 + * The above copyright notice and this permission notice shall be
2441 + * included in all copies or substantial portions of the Software.
2443 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2444 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2445 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2446 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2447 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2448 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2449 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2450 + * OTHER DEALINGS IN THE SOFTWARE.
2453 +#include "fsl-ls1043a-rdb.dts"
2454 +#include "qoriq-qman-portals-sdk.dtsi"
2455 +#include "qoriq-bman-portals-sdk.dtsi"
2458 + compatible = "fsl,bman-fbpr";
2459 + alloc-ranges = <0 0 0x10000 0>;
2462 + compatible = "fsl,qman-fqd";
2463 + alloc-ranges = <0 0 0x10000 0>;
2466 + compatible = "fsl,qman-pfdr";
2467 + alloc-ranges = <0 0 0x10000 0>;
2471 +/delete-property/ dma-coherent;
2473 +#include "qoriq-dpaa-eth.dtsi"
2474 +#include "qoriq-fman3-0-6oh.dtsi"
2477 + /delete-property/ iommu-map;
2482 + /delete-property/ iommu-map;
2487 + /delete-property/ iommu-map;
2491 +/delete-node/ iommu@9000000;
2495 + compatible = "fsl,fman", "simple-bus";
2670 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2673 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2675 + * Copyright (C) 2014-2015, Freescale Semiconductor
2677 + * This file is licensed under the terms of the GNU General Public
2678 + * License version 2. This program is licensed "as is" without any
2679 + * warranty of any kind, whether express or implied.
2682 +#include "fsl-ls1043a-rdb-sdk.dts"
2685 + bp7: buffer-pool@7 {
2686 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2688 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2689 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2693 + bp8: buffer-pool@8 {
2694 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2696 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2697 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2701 + bp9: buffer-pool@9 {
2702 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2704 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2705 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2710 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2714 + compatible = "fsl,dpa-ethernet-init";
2715 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2716 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2717 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2721 + compatible = "fsl,dpa-ethernet-init";
2722 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2723 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2724 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2728 + compatible = "fsl,dpa-ethernet-init";
2729 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2730 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2731 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2735 + compatible = "fsl,dpa-ethernet-init";
2736 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2737 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2738 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2742 + compatible = "fsl,dpa-ethernet-init";
2743 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2744 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2745 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2749 + compatible = "fsl,dpa-ethernet-init";
2750 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2751 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2752 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2756 + compatible = "fsl,dpa-ethernet-init";
2757 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2758 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2759 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2763 + compatible = "fsl,dpa-oh";
2764 + /* Define frame queues for the OH port*/
2765 + /* <OH Rx error, OH Rx default> */
2766 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2767 + fsl,fman-oh-port = <&fman0_oh2>;
2772 + /delete-property/ iommu-map;
2776 + /delete-property/ iommu-map;
2780 + /delete-property/ iommu-map;
2783 + /delete-node/ iommu@9000000;
2787 + #address-cells = <2>;
2788 + #size-cells = <2>;
2791 + /* For legacy usdpaa based use-cases, update the size and
2792 + alignment parameters. e.g. to allocate 256 MB memory:
2793 + size = <0 0x10000000>;
2794 + alignment = <0 0x10000000>;
2796 + usdpaa_mem: usdpaa_mem {
2797 + compatible = "fsl,usdpaa-mem";
2798 + alloc-ranges = <0 0 0x10000 0>;
2799 + size = <0 0x1000>;
2800 + alignment = <0 0x1000>;
2806 + fman0_oh2: port@83000 {
2808 + compatible = "fsl,fman-port-oh";
2809 + reg = <0x83000 0x1000>;
2812 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2813 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2815 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2817 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2819 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2821 * Mingkai Hu <Mingkai.hu@freescale.com>
2823 - * This file is dual-licensed: you can use it either under the terms
2824 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2825 - * licensing only applies to this file, and not this project as a
2828 - * a) This library is free software; you can redistribute it and/or
2829 - * modify it under the terms of the GNU General Public License as
2830 - * published by the Free Software Foundation; either version 2 of the
2831 - * License, or (at your option) any later version.
2833 - * This library is distributed in the hope that it will be useful,
2834 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2835 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2836 - * GNU General Public License for more details.
2838 - * Or, alternatively,
2840 - * b) Permission is hereby granted, free of charge, to any person
2841 - * obtaining a copy of this software and associated documentation
2842 - * files (the "Software"), to deal in the Software without
2843 - * restriction, including without limitation the rights to use,
2844 - * copy, modify, merge, publish, distribute, sublicense, and/or
2845 - * sell copies of the Software, and to permit persons to whom the
2846 - * Software is furnished to do so, subject to the following
2849 - * The above copyright notice and this permission notice shall be
2850 - * included in all copies or substantial portions of the Software.
2852 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2853 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2854 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2855 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2856 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2857 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2858 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2859 - * OTHER DEALINGS IN THE SOFTWARE.
2864 model = "LS1043A RDB Board";
2872 compatible = "pericom,pt7c4338";
2876 + compatible = "nxp,pcf85263";
2884 spi-max-frequency = <1000000>; /* input clock */
2888 + compatible = "maxim,ds26522";
2890 + spi-max-frequency = <2000000>;
2891 + fsl,spi-cs-sck-delay = <100>;
2892 + fsl,spi-sck-cs-delay = <50>;
2896 + compatible = "maxim,ds26522";
2898 + spi-max-frequency = <2000000>;
2899 + fsl,spi-cs-sck-delay = <100>;
2900 + fsl,spi-sck-cs-delay = <50>;
2905 + ucc_hdlc: ucc@2000 {
2906 + compatible = "fsl,ucc-hdlc";
2907 + rx-clock-name = "clk8";
2908 + tx-clock-name = "clk9";
2909 + fsl,rx-sync-clock = "rsync_pin";
2910 + fsl,tx-sync-clock = "tsync_pin";
2911 + fsl,tx-timeslot-mask = <0xfffffffe>;
2912 + fsl,rx-timeslot-mask = <0xfffffffe>;
2913 + fsl,tdm-framer-type = "e1";
2915 + fsl,siram-entry-id = <0>;
2916 + fsl,tdm-interface;
2921 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2922 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2924 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2926 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2928 * Copyright 2014-2015 Freescale Semiconductor, Inc.
2930 * Mingkai Hu <Mingkai.hu@freescale.com>
2932 - * This file is dual-licensed: you can use it either under the terms
2933 - * of the GPLv2 or the X11 license, at your option. Note that this dual
2934 - * licensing only applies to this file, and not this project as a
2937 - * a) This library is free software; you can redistribute it and/or
2938 - * modify it under the terms of the GNU General Public License as
2939 - * published by the Free Software Foundation; either version 2 of the
2940 - * License, or (at your option) any later version.
2942 - * This library is distributed in the hope that it will be useful,
2943 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
2944 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2945 - * GNU General Public License for more details.
2947 - * Or, alternatively,
2949 - * b) Permission is hereby granted, free of charge, to any person
2950 - * obtaining a copy of this software and associated documentation
2951 - * files (the "Software"), to deal in the Software without
2952 - * restriction, including without limitation the rights to use,
2953 - * copy, modify, merge, publish, distribute, sublicense, and/or
2954 - * sell copies of the Software, and to permit persons to whom the
2955 - * Software is furnished to do so, subject to the following
2958 - * The above copyright notice and this permission notice shall be
2959 - * included in all copies or substantial portions of the Software.
2961 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2962 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2963 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2964 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2965 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2966 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2967 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2968 - * OTHER DEALINGS IN THE SOFTWARE.
2971 #include <dt-bindings/thermal/thermal.h>
2982 * Currently supported enable-method is psci v0.2
2985 + cooling_map0: cpu0: cpu@0 {
2986 device_type = "cpu";
2987 compatible = "arm,cortex-a53";
2989 clocks = <&clockgen 1 0>;
2990 next-level-cache = <&l2>;
2991 #cooling-cells = <2>;
2992 + cpu-idle-states = <&CPU_PH20>;
2998 clocks = <&clockgen 1 0>;
2999 next-level-cache = <&l2>;
3000 + cpu-idle-states = <&CPU_PH20>;
3006 clocks = <&clockgen 1 0>;
3007 next-level-cache = <&l2>;
3008 + cpu-idle-states = <&CPU_PH20>;
3014 clocks = <&clockgen 1 0>;
3015 next-level-cache = <&l2>;
3016 + cpu-idle-states = <&CPU_PH20>;
3026 + * PSCI node is not added default, U-boot will add missing
3027 + * parts if it determines to use PSCI.
3029 + entry-method = "arm,psci";
3031 + CPU_PH20: cpu-ph20 {
3032 + compatible = "arm,idle-state";
3033 + idle-state-name = "PH20";
3034 + arm,psci-suspend-param = <0x0>;
3035 + entry-latency-us = <1000>;
3036 + exit-latency-us = <1000>;
3037 + min-residency-us = <3000>;
3042 device_type = "memory";
3043 reg = <0x0 0x80000000 0 0x80000000>;
3045 #address-cells = <2>;
3048 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
3051 clockgen: clocking@1ee1000 {
3052 compatible = "fsl,ls1043a-clockgen";
3053 @@ -204,6 +191,49 @@
3057 + smmu: iommu@9000000 {
3058 + compatible = "arm,mmu-500";
3059 + reg = <0 0x9000000 0 0x400000>;
3061 + stream-match-mask = <0x7f00>;
3062 + #global-interrupts = <2>;
3063 + #iommu-cells = <1>;
3064 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3065 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
3066 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3067 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3068 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3069 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3070 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3071 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3072 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3073 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3074 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3075 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3076 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3077 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3078 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3079 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3080 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3081 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3082 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3083 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3084 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3085 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3086 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3087 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3088 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3089 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3090 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3091 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3092 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3093 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3094 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3095 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3096 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
3097 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
3100 scfg: scfg@1570000 {
3101 compatible = "fsl,ls1043a-scfg", "syscon";
3102 reg = <0x0 0x1570000 0x0 0x10000>;
3105 dcfg: dcfg@1ee0000 {
3106 compatible = "fsl,ls1043a-dcfg", "syscon";
3107 - reg = <0x0 0x1ee0000 0x0 0x10000>;
3108 + reg = <0x0 0x1ee0000 0x0 0x1000>;
3112 @@ -343,36 +373,7 @@
3113 #thermal-sensor-cells = <1>;
3117 - cpu_thermal: cpu-thermal {
3118 - polling-delay-passive = <1000>;
3119 - polling-delay = <5000>;
3121 - thermal-sensors = <&tmu 3>;
3124 - cpu_alert: cpu-alert {
3125 - temperature = <85000>;
3126 - hysteresis = <2000>;
3129 - cpu_crit: cpu-crit {
3130 - temperature = <95000>;
3131 - hysteresis = <2000>;
3132 - type = "critical";
3138 - trip = <&cpu_alert>;
3140 - <&cpu0 THERMAL_NO_LIMIT
3141 - THERMAL_NO_LIMIT>;
3146 + #include "fsl-tmu.dtsi"
3148 qman: qman@1880000 {
3149 compatible = "fsl,qman";
3154 - compatible = "fsl,vf610-i2c";
3155 + compatible = "fsl,vf610-i2c", "fsl,ls1043a-vf610-i2c";
3156 #address-cells = <1>;
3158 reg = <0x0 0x2180000 0x0 0x10000>;
3160 dmas = <&edma0 1 39>,
3162 dma-names = "tx", "rx";
3163 + scl-gpios = <&gpio4 12 0>;
3164 status = "disabled";
3167 @@ -537,6 +539,72 @@
3168 #interrupt-cells = <2>;
3171 + uqe: uqe@2400000 {
3172 + #address-cells = <1>;
3173 + #size-cells = <1>;
3174 + device_type = "qe";
3175 + compatible = "fsl,qe", "simple-bus";
3176 + ranges = <0x0 0x0 0x2400000 0x40000>;
3177 + reg = <0x0 0x2400000 0x0 0x480>;
3178 + brg-frequency = <100000000>;
3179 + bus-frequency = <200000000>;
3181 + fsl,qe-num-riscs = <1>;
3182 + fsl,qe-num-snums = <28>;
3185 + compatible = "fsl,qe-ic";
3186 + reg = <0x80 0x80>;
3187 + #address-cells = <0>;
3188 + interrupt-controller;
3189 + #interrupt-cells = <1>;
3190 + interrupts = <0 77 0x04 0 77 0x04>;
3194 + #address-cells = <1>;
3195 + #size-cells = <0>;
3196 + compatible = "fsl,ls1043-qe-si",
3197 + "fsl,t1040-qe-si";
3198 + reg = <0x700 0x80>;
3201 + siram1: siram@1000 {
3202 + #address-cells = <1>;
3203 + #size-cells = <1>;
3204 + compatible = "fsl,ls1043-qe-siram",
3205 + "fsl,t1040-qe-siram";
3206 + reg = <0x1000 0x800>;
3211 + reg = <0x2000 0x200>;
3212 + interrupts = <32>;
3213 + interrupt-parent = <&qeic>;
3218 + reg = <0x2200 0x200>;
3219 + interrupts = <34>;
3220 + interrupt-parent = <&qeic>;
3224 + #address-cells = <1>;
3225 + #size-cells = <1>;
3226 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3227 + ranges = <0x0 0x10000 0x6000>;
3230 + compatible = "fsl,qe-muram-data",
3231 + "fsl,cpm-muram-data";
3232 + reg = <0x0 0x6000>;
3237 lpuart0: serial@2950000 {
3238 compatible = "fsl,ls1021a-lpuart";
3239 reg = <0x0 0x2950000 0x0 0x1000>;
3240 @@ -591,6 +659,16 @@
3241 status = "disabled";
3244 + ftm0: ftm0@29d0000 {
3245 + compatible = "fsl,ls1043a-ftm-alarm";
3246 + reg = <0x0 0x29d0000 0x0 0x10000>,
3247 + <0x0 0x1ee2140 0x0 0x4>;
3248 + reg-names = "ftm", "pmctrl";
3249 + interrupts = <0 86 0x4>;
3254 wdog0: wdog@2ad0000 {
3255 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3256 reg = <0x0 0x2ad0000 0x0 0x10000>;
3257 @@ -616,41 +694,81 @@
3261 - usb0: usb3@2f00000 {
3262 - compatible = "snps,dwc3";
3263 - reg = <0x0 0x2f00000 0x0 0x10000>;
3264 - interrupts = <0 60 0x4>;
3266 - snps,quirk-frame-length-adjustment = <0x20>;
3267 - snps,dis_rxdet_inp3_quirk;
3270 - usb1: usb3@3000000 {
3271 - compatible = "snps,dwc3";
3272 - reg = <0x0 0x3000000 0x0 0x10000>;
3273 - interrupts = <0 61 0x4>;
3275 - snps,quirk-frame-length-adjustment = <0x20>;
3276 - snps,dis_rxdet_inp3_quirk;
3279 - usb2: usb3@3100000 {
3280 - compatible = "snps,dwc3";
3281 - reg = <0x0 0x3100000 0x0 0x10000>;
3282 - interrupts = <0 63 0x4>;
3284 - snps,quirk-frame-length-adjustment = <0x20>;
3285 - snps,dis_rxdet_inp3_quirk;
3288 - sata: sata@3200000 {
3289 - compatible = "fsl,ls1043a-ahci";
3290 - reg = <0x0 0x3200000 0x0 0x10000>,
3291 - <0x0 0x20140520 0x0 0x4>;
3292 - reg-names = "ahci", "sata-ecc";
3293 - interrupts = <0 69 0x4>;
3294 - clocks = <&clockgen 4 0>;
3296 + aux_bus: aux_bus {
3297 + #address-cells = <2>;
3298 + #size-cells = <2>;
3299 + compatible = "simple-bus";
3301 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
3303 + usb0: usb3@2f00000 {
3304 + compatible = "snps,dwc3";
3305 + reg = <0x0 0x2f00000 0x0 0x10000>;
3306 + interrupts = <0 60 0x4>;
3308 + snps,quirk-frame-length-adjustment = <0x20>;
3309 + snps,dis_rxdet_inp3_quirk;
3311 + snps,dis-u1u2-when-u3-quirk;
3312 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3313 + snps,host-vbus-glitches;
3316 + usb1: usb3@3000000 {
3317 + compatible = "snps,dwc3";
3318 + reg = <0x0 0x3000000 0x0 0x10000>;
3319 + interrupts = <0 61 0x4>;
3321 + snps,quirk-frame-length-adjustment = <0x20>;
3322 + snps,dis_rxdet_inp3_quirk;
3324 + snps,dis-u1u2-when-u3-quirk;
3325 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3326 + snps,host-vbus-glitches;
3329 + usb2: usb3@3100000 {
3330 + compatible = "snps,dwc3";
3331 + reg = <0x0 0x3100000 0x0 0x10000>;
3332 + interrupts = <0 63 0x4>;
3334 + snps,quirk-frame-length-adjustment = <0x20>;
3335 + snps,dis_rxdet_inp3_quirk;
3337 + snps,dis-u1u2-when-u3-quirk;
3338 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3339 + snps,host-vbus-glitches;
3342 + sata: sata@3200000 {
3343 + compatible = "fsl,ls1043a-ahci";
3344 + reg = <0x0 0x3200000 0x0 0x10000>,
3345 + <0x0 0x20140520 0x0 0x4>;
3346 + reg-names = "ahci", "sata-ecc";
3347 + interrupts = <0 69 0x4>;
3348 + clocks = <&clockgen 4 0>;
3352 + qdma: qdma@8380000 {
3353 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3354 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3355 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3356 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3357 + interrupts = <0 152 0x4>,
3362 + interrupt-names = "qdma-error", "qdma-queue0",
3363 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
3365 + block-number = <1>;
3366 + block-offset = <0x10000>;
3368 + status-sizes = <64>;
3369 + queue-sizes = <64 64>;
3373 msi1: msi-controller1@1571000 {
3374 @@ -679,13 +797,13 @@
3375 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3376 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3377 reg-names = "regs", "config";
3378 - interrupts = <0 118 0x4>, /* controller interrupt */
3379 - <0 117 0x4>; /* PME interrupt */
3380 - interrupt-names = "intr", "pme";
3381 + interrupts = <0 117 0x4>, /* PME interrupt */
3382 + <0 118 0x4>; /* aer interrupt */
3383 + interrupt-names = "pme", "aer";
3384 #address-cells = <3>;
3386 device_type = "pci";
3388 + iommu-map = <0 &smmu 0 1>;
3390 bus-range = <0x0 0xff>;
3391 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3393 <0000 0 0 2 &gic 0 111 0x4>,
3394 <0000 0 0 3 &gic 0 112 0x4>,
3395 <0000 0 0 4 &gic 0 113 0x4>;
3396 + status = "disabled";
3400 @@ -704,13 +823,13 @@
3401 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3402 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3403 reg-names = "regs", "config";
3404 - interrupts = <0 128 0x4>,
3406 - interrupt-names = "intr", "pme";
3407 + interrupts = <0 127 0x4>,
3409 + interrupt-names = "pme", "aer";
3410 #address-cells = <3>;
3412 device_type = "pci";
3414 + iommu-map = <0 &smmu 0 1>;
3416 bus-range = <0x0 0xff>;
3417 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3419 <0000 0 0 2 &gic 0 121 0x4>,
3420 <0000 0 0 3 &gic 0 122 0x4>,
3421 <0000 0 0 4 &gic 0 123 0x4>;
3422 + status = "disabled";
3426 @@ -729,13 +849,13 @@
3427 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3428 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3429 reg-names = "regs", "config";
3430 - interrupts = <0 162 0x4>,
3432 - interrupt-names = "intr", "pme";
3433 + interrupts = <0 161 0x4>,
3435 + interrupt-names = "pme", "aer";
3436 #address-cells = <3>;
3438 device_type = "pci";
3440 + iommu-map = <0 &smmu 0 1>;
3442 bus-range = <0x0 0xff>;
3443 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3444 @@ -747,6 +867,14 @@
3445 <0000 0 0 2 &gic 0 155 0x4>,
3446 <0000 0 0 3 &gic 0 156 0x4>,
3447 <0000 0 0 4 &gic 0 157 0x4>;
3448 + status = "disabled";
3454 + compatible = "linaro,optee-tz";
3459 @@ -754,3 +882,29 @@
3461 #include "qoriq-qman-portals.dtsi"
3462 #include "qoriq-bman-portals.dtsi"
3489 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3490 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3492 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3494 * QorIQ FMan v3 device tree nodes for ls1046
3496 * Copyright 2015-2016 Freescale Semiconductor Inc.
3498 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3503 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
3506 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3508 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3510 + * Mingkai Hu <Mingkai.hu@freescale.com>
3512 + * This file is dual-licensed: you can use it either under the terms
3513 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3514 + * licensing only applies to this file, and not this project as a
3517 + * a) This library is free software; you can redistribute it and/or
3518 + * modify it under the terms of the GNU General Public License as
3519 + * published by the Free Software Foundation; either version 2 of the
3520 + * License, or (at your option) any later version.
3522 + * This library is distributed in the hope that it will be useful,
3523 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3524 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3525 + * GNU General Public License for more details.
3527 + * Or, alternatively,
3529 + * b) Permission is hereby granted, free of charge, to any person
3530 + * obtaining a copy of this software and associated documentation
3531 + * files (the "Software"), to deal in the Software without
3532 + * restriction, including without limitation the rights to use,
3533 + * copy, modify, merge, publish, distribute, sublicense, and/or
3534 + * sell copies of the Software, and to permit persons to whom the
3535 + * Software is furnished to do so, subject to the following
3538 + * The above copyright notice and this permission notice shall be
3539 + * included in all copies or substantial portions of the Software.
3541 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3542 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3543 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3544 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3545 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3546 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3547 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3548 + * OTHER DEALINGS IN THE SOFTWARE.
3551 +#include "fsl-ls1046a-qds.dts"
3552 +#include "qoriq-qman-portals-sdk.dtsi"
3553 +#include "qoriq-bman-portals-sdk.dtsi"
3556 + compatible = "fsl,bman-fbpr";
3557 + alloc-ranges = <0 0 0x10000 0>;
3560 + compatible = "fsl,qman-fqd";
3561 + alloc-ranges = <0 0 0x10000 0>;
3564 + compatible = "fsl,qman-pfdr";
3565 + alloc-ranges = <0 0 0x10000 0>;
3569 +/delete-property/ dma-coherent;
3571 +#include "qoriq-dpaa-eth.dtsi"
3572 +#include "qoriq-fman3-0-6oh.dtsi"
3575 + /delete-property/ iommu-map;
3579 + /delete-property/ iommu-map;
3583 + /delete-property/ iommu-map;
3586 +/delete-node/ iommu@9000000;
3591 + compatible = "fsl,dpa-ethernet";
3592 + fsl,fman-mac = <&enet7>;
3598 + compatible = "fsl,fman", "simple-bus";
3773 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3774 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3776 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3778 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3780 * Copyright 2016 Freescale Semiconductor, Inc.
3782 * Shaohui Xie <Shaohui.Xie@nxp.com>
3784 - * This file is dual-licensed: you can use it either under the terms
3785 - * of the GPLv2 or the X11 license, at your option. Note that this dual
3786 - * licensing only applies to this file, and not this project as a
3789 - * a) This library is free software; you can redistribute it and/or
3790 - * modify it under the terms of the GNU General Public License as
3791 - * published by the Free Software Foundation; either version 2 of the
3792 - * License, or (at your option) any later version.
3794 - * This library is distributed in the hope that it will be useful,
3795 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
3796 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3797 - * GNU General Public License for more details.
3799 - * Or, alternatively,
3801 - * b) Permission is hereby granted, free of charge, to any person
3802 - * obtaining a copy of this software and associated documentation
3803 - * files (the "Software"), to deal in the Software without
3804 - * restriction, including without limitation the rights to use,
3805 - * copy, modify, merge, publish, distribute, sublicense, and/or
3806 - * sell copies of the Software, and to permit persons to whom the
3807 - * Software is furnished to do so, subject to the following
3810 - * The above copyright notice and this permission notice shall be
3811 - * included in all copies or substantial portions of the Software.
3813 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3814 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3815 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3816 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3817 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3818 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3819 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3820 - * OTHER DEALINGS IN THE SOFTWARE.
3829 + emi1_slot1 = &ls1046mdio_s1;
3830 + emi1_slot2 = &ls1046mdio_s2;
3831 + emi1_slot4 = &ls1046mdio_s4;
3833 + sgmii_s1_p1 = &sgmii_phy_s1_p1;
3834 + sgmii_s1_p2 = &sgmii_phy_s1_p2;
3835 + sgmii_s1_p3 = &sgmii_phy_s1_p3;
3836 + sgmii_s1_p4 = &sgmii_phy_s1_p4;
3837 + sgmii_s4_p1 = &sgmii_phy_s4_p1;
3838 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
3839 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
3840 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
3841 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
3848 fpga: board-control@2,0 {
3849 - compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
3850 + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-bus";
3851 reg = <0x2 0x0 0x0000100>;
3852 + ranges = <0 2 0 0x100>;
3856 @@ -206,9 +184,145 @@
3857 compatible = "spansion,m25p80";
3858 #address-cells = <1>;
3860 - spi-max-frequency = <20000000>;
3861 + spi-max-frequency = <50000000>;
3863 + spi-rx-bus-width = <4>;
3864 + spi-tx-bus-width = <4>;
3868 #include "fsl-ls1046-post.dtsi"
3872 + phy-handle = <&qsgmii_phy_s2_p1>;
3873 + phy-connection-type = "sgmii";
3877 + phy-handle = <&sgmii_phy_s4_p1>;
3878 + phy-connection-type = "sgmii";
3882 + phy-handle = <&rgmii_phy1>;
3883 + phy-connection-type = "rgmii";
3887 + phy-handle = <&rgmii_phy2>;
3888 + phy-connection-type = "rgmii";
3892 + phy-handle = <&sgmii_phy_s1_p3>;
3893 + phy-connection-type = "sgmii";
3897 + phy-handle = <&sgmii_phy_s1_p4>;
3898 + phy-connection-type = "sgmii";
3901 + ethernet@f0000 { /* DTSEC9/10GEC1 */
3902 + phy-handle = <&sgmii_phy_s1_p1>;
3903 + phy-connection-type = "xgmii";
3906 + ethernet@f2000 { /* DTSEC10/10GEC2 */
3907 + phy-handle = <&sgmii_phy_s1_p2>;
3908 + phy-connection-type = "xgmii";
3913 + #address-cells = <1>;
3914 + #size-cells = <1>;
3916 + compatible = "mdio-mux-mmioreg", "mdio-mux";
3917 + mdio-parent-bus = <&mdio0>;
3918 + #address-cells = <1>;
3919 + #size-cells = <0>;
3920 + reg = <0x54 1>; /* BRDCFG4 */
3921 + mux-mask = <0xe0>; /* EMI1 */
3923 + /* On-board RGMII1 PHY */
3924 + ls1046mdio0: mdio@0 {
3926 + #address-cells = <1>;
3927 + #size-cells = <0>;
3929 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
3934 + /* On-board RGMII2 PHY */
3935 + ls1046mdio1: mdio@1 {
3937 + #address-cells = <1>;
3938 + #size-cells = <0>;
3940 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
3946 + ls1046mdio_s1: mdio@2 {
3948 + #address-cells = <1>;
3949 + #size-cells = <0>;
3950 + status = "disabled";
3952 + sgmii_phy_s1_p1: ethernet-phy@1c {
3956 + sgmii_phy_s1_p2: ethernet-phy@1d {
3960 + sgmii_phy_s1_p3: ethernet-phy@1e {
3964 + sgmii_phy_s1_p4: ethernet-phy@1f {
3970 + ls1046mdio_s2: mdio@3 {
3972 + #address-cells = <1>;
3973 + #size-cells = <0>;
3974 + status = "disabled";
3976 + qsgmii_phy_s2_p1: ethernet-phy@8 {
3979 + qsgmii_phy_s2_p2: ethernet-phy@9 {
3982 + qsgmii_phy_s2_p3: ethernet-phy@a {
3985 + qsgmii_phy_s2_p4: ethernet-phy@b {
3991 + ls1046mdio_s4: mdio@5 {
3993 + #address-cells = <1>;
3994 + #size-cells = <0>;
3995 + status = "disabled";
3997 + sgmii_phy_s4_p1: ethernet-phy@1c {
4004 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
4007 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4009 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
4011 + * Mingkai Hu <Mingkai.hu@freescale.com>
4013 + * This file is dual-licensed: you can use it either under the terms
4014 + * of the GPLv2 or the X11 license, at your option. Note that this dual
4015 + * licensing only applies to this file, and not this project as a
4018 + * a) This library is free software; you can redistribute it and/or
4019 + * modify it under the terms of the GNU General Public License as
4020 + * published by the Free Software Foundation; either version 2 of the
4021 + * License, or (at your option) any later version.
4023 + * This library is distributed in the hope that it will be useful,
4024 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4025 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4026 + * GNU General Public License for more details.
4028 + * Or, alternatively,
4030 + * b) Permission is hereby granted, free of charge, to any person
4031 + * obtaining a copy of this software and associated documentation
4032 + * files (the "Software"), to deal in the Software without
4033 + * restriction, including without limitation the rights to use,
4034 + * copy, modify, merge, publish, distribute, sublicense, and/or
4035 + * sell copies of the Software, and to permit persons to whom the
4036 + * Software is furnished to do so, subject to the following
4039 + * The above copyright notice and this permission notice shall be
4040 + * included in all copies or substantial portions of the Software.
4042 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4043 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4044 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4045 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4046 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4047 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4048 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4049 + * OTHER DEALINGS IN THE SOFTWARE.
4052 +#include "fsl-ls1046a-rdb.dts"
4053 +#include "qoriq-qman-portals-sdk.dtsi"
4054 +#include "qoriq-bman-portals-sdk.dtsi"
4057 + compatible = "fsl,bman-fbpr";
4058 + alloc-ranges = <0 0 0x10000 0>;
4061 + compatible = "fsl,qman-fqd";
4062 + alloc-ranges = <0 0 0x10000 0>;
4065 + compatible = "fsl,qman-pfdr";
4066 + alloc-ranges = <0 0 0x10000 0>;
4070 +/delete-property/ dma-coherent;
4072 +#include "qoriq-dpaa-eth.dtsi"
4073 +#include "qoriq-fman3-0-6oh.dtsi"
4076 + /delete-property/ iommu-map;
4080 + /delete-property/ iommu-map;
4084 + /delete-property/ iommu-map;
4087 +/delete-node/ iommu@9000000;
4092 + status = "disabled";
4095 + status = "disabled";
4098 + compatible = "fsl,dpa-ethernet";
4099 + fsl,fman-mac = <&enet7>;
4105 + compatible = "fsl,fman", "simple-bus";
4109 + pcsphy6: ethernet-phy@0 {
4110 + backplane-mode = "10gbase-kr";
4111 + compatible = "ethernet-phy-ieee802.3-c45";
4113 + fsl,lane-handle = <&serdes1>;
4114 + fsl,lane-reg = <0x8C0 0x40>; /* lane D */
4119 + pcsphy7: ethernet-phy@0 {
4120 + backplane-mode = "10gbase-kr";
4121 + compatible = "ethernet-phy-ieee802.3-c45";
4123 + fsl,lane-handle = <&serdes1>;
4124 + fsl,lane-reg = <0x880 0x40>; /* lane C */
4128 +/* Update MAC connections to backplane PHYs
4130 + * phy-handle = <&pcsphy6>;
4134 + * phy-handle = <&pcsphy7>;
4314 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
4317 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4319 + * Copyright (C) 2016, Freescale Semiconductor
4321 + * This file is licensed under the terms of the GNU General Public
4322 + * License version 2. This program is licensed "as is" without any
4323 + * warranty of any kind, whether express or implied.
4326 +#include "fsl-ls1046a-rdb-sdk.dts"
4329 + bp7: buffer-pool@7 {
4330 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4332 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
4333 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
4337 + bp8: buffer-pool@8 {
4338 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4340 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
4341 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
4345 + bp9: buffer-pool@9 {
4346 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
4348 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
4349 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
4354 + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
4358 + compatible = "fsl,dpa-ethernet-init";
4359 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4360 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
4361 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
4365 + compatible = "fsl,dpa-ethernet-init";
4366 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4367 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
4368 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
4372 + compatible = "fsl,dpa-ethernet-init";
4373 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4374 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
4375 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
4379 + compatible = "fsl,dpa-ethernet-init";
4380 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4381 + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
4382 + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
4386 + compatible = "fsl,dpa-ethernet-init";
4387 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4388 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
4389 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
4393 + compatible = "fsl,dpa-ethernet-init";
4394 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
4395 + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
4396 + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
4400 + compatible = "fsl,dpa-oh";
4401 + /* Define frame queues for the OH port*/
4402 + /* <OH Rx error, OH Rx default> */
4403 + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
4404 + fsl,fman-oh-port = <&fman0_oh2>;
4409 + /delete-property/ iommu-map;
4413 + /delete-property/ iommu-map;
4417 + /delete-property/ iommu-map;
4420 + /delete-node/ iommu@9000000;
4424 + #address-cells = <2>;
4425 + #size-cells = <2>;
4428 + /* For legacy usdpaa based use-cases, update the size and
4429 + alignment parameters. e.g. to allocate 256 MB memory:
4430 + size = <0 0x10000000>;
4431 + alignment = <0 0x10000000>;
4433 + usdpaa_mem: usdpaa_mem {
4434 + compatible = "fsl,usdpaa-mem";
4435 + alloc-ranges = <0 0 0x10000 0>;
4436 + size = <0 0x1000>;
4437 + alignment = <0 0x1000>;
4443 + fman0_oh2: port@83000 {
4445 + compatible = "fsl,fman-port-oh";
4446 + reg = <0x83000 0x1000>;
4449 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
4450 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
4452 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4454 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4456 * Copyright 2016 Freescale Semiconductor, Inc.
4458 * Mingkai Hu <mingkai.hu@nxp.com>
4460 - * This file is dual-licensed: you can use it either under the terms
4461 - * of the GPLv2 or the X11 license, at your option. Note that this dual
4462 - * licensing only applies to this file, and not this project as a
4465 - * a) This library is free software; you can redistribute it and/or
4466 - * modify it under the terms of the GNU General Public License as
4467 - * published by the Free Software Foundation; either version 2 of the
4468 - * License, or (at your option) any later version.
4470 - * This library is distributed in the hope that it will be useful,
4471 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
4472 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4473 - * GNU General Public License for more details.
4475 - * Or, alternatively,
4477 - * b) Permission is hereby granted, free of charge, to any person
4478 - * obtaining a copy of this software and associated documentation
4479 - * files (the "Software"), to deal in the Software without
4480 - * restriction, including without limitation the rights to use,
4481 - * copy, modify, merge, publish, distribute, sublicense, and/or
4482 - * sell copies of the Software, and to permit persons to whom the
4483 - * Software is furnished to do so, subject to the following
4486 - * The above copyright notice and this permission notice shall be
4487 - * included in all copies or substantial portions of the Software.
4489 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4490 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4491 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4492 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4493 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4494 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4495 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4496 - * OTHER DEALINGS IN THE SOFTWARE.
4500 @@ -139,21 +102,26 @@
4504 + fsl,qspi-has-second-chip;
4506 qflash0: s25fs512s@0 {
4507 compatible = "spansion,m25p80";
4508 #address-cells = <1>;
4510 - spi-max-frequency = <20000000>;
4511 + spi-max-frequency = <50000000>;
4513 + spi-rx-bus-width = <4>;
4514 + spi-tx-bus-width = <4>;
4517 qflash1: s25fs512s@1 {
4518 compatible = "spansion,m25p80";
4519 #address-cells = <1>;
4521 - spi-max-frequency = <20000000>;
4522 + spi-max-frequency = <50000000>;
4524 + spi-rx-bus-width = <4>;
4525 + spi-tx-bus-width = <4>;
4529 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4530 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4532 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4534 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4536 * Copyright 2016 Freescale Semiconductor, Inc.
4538 * Mingkai Hu <mingkai.hu@nxp.com>
4540 - * This file is dual-licensed: you can use it either under the terms
4541 - * of the GPLv2 or the X11 license, at your option. Note that this dual
4542 - * licensing only applies to this file, and not this project as a
4545 - * a) This library is free software; you can redistribute it and/or
4546 - * modify it under the terms of the GNU General Public License as
4547 - * published by the Free Software Foundation; either version 2 of the
4548 - * License, or (at your option) any later version.
4550 - * This library is distributed in the hope that it will be useful,
4551 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
4552 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4553 - * GNU General Public License for more details.
4555 - * Or, alternatively,
4557 - * b) Permission is hereby granted, free of charge, to any person
4558 - * obtaining a copy of this software and associated documentation
4559 - * files (the "Software"), to deal in the Software without
4560 - * restriction, including without limitation the rights to use,
4561 - * copy, modify, merge, publish, distribute, sublicense, and/or
4562 - * sell copies of the Software, and to permit persons to whom the
4563 - * Software is furnished to do so, subject to the following
4566 - * The above copyright notice and this permission notice shall be
4567 - * included in all copies or substantial portions of the Software.
4569 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4570 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4571 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4572 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4573 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4574 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4575 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4576 - * OTHER DEALINGS IN THE SOFTWARE.
4579 #include <dt-bindings/interrupt-controller/arm-gic.h>
4581 #address-cells = <1>;
4585 + cooling_map0: cpu0: cpu@0 {
4586 device_type = "cpu";
4587 compatible = "arm,cortex-a72";
4590 CPU_PH20: cpu-ph20 {
4591 compatible = "arm,idle-state";
4592 idle-state-name = "PH20";
4593 - arm,psci-suspend-param = <0x00010000>;
4594 + arm,psci-suspend-param = <0x0>;
4595 entry-latency-us = <1000>;
4596 exit-latency-us = <1000>;
4597 min-residency-us = <3000>;
4599 #address-cells = <2>;
4602 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
4605 ddr: memory-controller@1080000 {
4606 compatible = "fsl,qoriq-memory-controller";
4608 clock-names = "qspi_en", "qspi";
4609 clocks = <&clockgen 4 1>, <&clockgen 4 1>;
4611 - fsl,qspi-has-second-chip;
4612 status = "disabled";
4615 @@ -229,6 +193,49 @@
4619 + smmu: iommu@9000000 {
4620 + compatible = "arm,mmu-500";
4621 + reg = <0 0x9000000 0 0x400000>;
4623 + stream-match-mask = <0x7f00>;
4624 + #global-interrupts = <2>;
4625 + #iommu-cells = <1>;
4626 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4627 + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
4628 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4629 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4630 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4631 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4632 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4633 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4634 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4635 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4636 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4637 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4638 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4639 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4640 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4641 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4642 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4643 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4644 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4645 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4646 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4647 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4648 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4649 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4650 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4651 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4652 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4653 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4654 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4655 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4656 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4657 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4658 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
4659 + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
4662 scfg: scfg@1570000 {
4663 compatible = "fsl,ls1046a-scfg", "syscon";
4664 reg = <0x0 0x1570000 0x0 0x10000>;
4665 @@ -363,36 +370,7 @@
4666 #thermal-sensor-cells = <1>;
4670 - cpu_thermal: cpu-thermal {
4671 - polling-delay-passive = <1000>;
4672 - polling-delay = <5000>;
4673 - thermal-sensors = <&tmu 3>;
4676 - cpu_alert: cpu-alert {
4677 - temperature = <85000>;
4678 - hysteresis = <2000>;
4682 - cpu_crit: cpu-crit {
4683 - temperature = <95000>;
4684 - hysteresis = <2000>;
4685 - type = "critical";
4691 - trip = <&cpu_alert>;
4693 - <&cpu0 THERMAL_NO_LIMIT
4694 - THERMAL_NO_LIMIT>;
4699 + #include "fsl-tmu.dtsi"
4701 dspi: dspi@2100000 {
4702 compatible = "fsl,ls1021a-v1.0-dspi";
4707 - compatible = "fsl,vf610-i2c";
4708 + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c";
4709 #address-cells = <1>;
4711 reg = <0x0 0x2180000 0x0 0x10000>;
4713 dmas = <&edma0 1 39>,
4715 dma-names = "tx", "rx";
4716 + scl-gpios = <&gpio3 12 0>;
4717 status = "disabled";
4720 @@ -441,12 +420,13 @@
4724 - compatible = "fsl,vf610-i2c";
4725 + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c";
4726 #address-cells = <1>;
4728 reg = <0x0 0x21b0000 0x0 0x10000>;
4729 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
4730 clocks = <&clockgen 4 1>;
4731 + scl-gpios = <&gpio3 12 0>;
4732 status = "disabled";
4735 @@ -572,6 +552,15 @@
4736 status = "disabled";
4739 + ftm0: ftm0@29d0000 {
4740 + compatible = "fsl,ls1046a-ftm-alarm";
4741 + reg = <0x0 0x29d0000 0x0 0x10000>,
4742 + <0x0 0x1ee2140 0x0 0x4>;
4743 + reg-names = "ftm", "pmctrl";
4744 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
4748 wdog0: watchdog@2ad0000 {
4749 compatible = "fsl,imx21-wdt";
4750 reg = <0x0 0x2ad0000 0x0 0x10000>;
4751 @@ -596,40 +585,81 @@
4755 - usb0: usb@2f00000 {
4756 - compatible = "snps,dwc3";
4757 - reg = <0x0 0x2f00000 0x0 0x10000>;
4758 - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4760 - snps,quirk-frame-length-adjustment = <0x20>;
4761 - snps,dis_rxdet_inp3_quirk;
4764 - usb1: usb@3000000 {
4765 - compatible = "snps,dwc3";
4766 - reg = <0x0 0x3000000 0x0 0x10000>;
4767 - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4769 - snps,quirk-frame-length-adjustment = <0x20>;
4770 - snps,dis_rxdet_inp3_quirk;
4773 - usb2: usb@3100000 {
4774 - compatible = "snps,dwc3";
4775 - reg = <0x0 0x3100000 0x0 0x10000>;
4776 - interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4778 - snps,quirk-frame-length-adjustment = <0x20>;
4779 - snps,dis_rxdet_inp3_quirk;
4782 - sata: sata@3200000 {
4783 - compatible = "fsl,ls1046a-ahci";
4784 - reg = <0x0 0x3200000 0x0 0x10000>,
4785 - <0x0 0x20140520 0x0 0x4>;
4786 - reg-names = "ahci", "sata-ecc";
4787 - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4788 - clocks = <&clockgen 4 1>;
4789 + aux_bus: aux_bus {
4790 + #address-cells = <2>;
4791 + #size-cells = <2>;
4792 + compatible = "simple-bus";
4794 + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
4796 + usb0: usb@2f00000 {
4797 + compatible = "snps,dwc3";
4798 + reg = <0x0 0x2f00000 0x0 0x10000>;
4799 + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4801 + snps,quirk-frame-length-adjustment = <0x20>;
4802 + snps,dis_rxdet_inp3_quirk;
4804 + snps,dis-u1u2-when-u3-quirk;
4805 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4806 + snps,host-vbus-glitches;
4809 + usb1: usb@3000000 {
4810 + compatible = "snps,dwc3";
4811 + reg = <0x0 0x3000000 0x0 0x10000>;
4812 + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4814 + snps,quirk-frame-length-adjustment = <0x20>;
4815 + snps,dis_rxdet_inp3_quirk;
4817 + snps,dis-u1u2-when-u3-quirk;
4818 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4819 + snps,host-vbus-glitches;
4822 + usb2: usb@3100000 {
4823 + compatible = "snps,dwc3";
4824 + reg = <0x0 0x3100000 0x0 0x10000>;
4825 + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4827 + snps,quirk-frame-length-adjustment = <0x20>;
4828 + snps,dis_rxdet_inp3_quirk;
4830 + snps,dis-u1u2-when-u3-quirk;
4831 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
4832 + snps,host-vbus-glitches;
4835 + sata: sata@3200000 {
4836 + compatible = "fsl,ls1046a-ahci";
4837 + reg = <0x0 0x3200000 0x0 0x10000>,
4838 + <0x0 0x20140520 0x0 0x4>;
4839 + reg-names = "ahci", "sata-ecc";
4840 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4841 + clocks = <&clockgen 4 1>;
4845 + qdma: qdma@8380000 {
4846 + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
4847 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
4848 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
4849 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
4850 + interrupts = <0 153 0x4>,
4855 + interrupt-names = "qdma-error", "qdma-queue0",
4856 + "qdma-queue1", "qdma-queue2", "qdma-queue3";
4858 + block-number = <1>;
4859 + block-offset = <0x10000>;
4861 + status-sizes = <64>;
4862 + queue-sizes = <64 64>;
4866 msi1: msi-controller@1580000 {
4867 @@ -662,6 +692,125 @@
4868 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
4872 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4873 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
4874 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
4875 + reg-names = "regs", "config";
4876 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
4877 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
4878 + interrupt-names = "pme", "aer";
4879 + #address-cells = <3>;
4880 + #size-cells = <2>;
4881 + device_type = "pci";
4883 + iommu-map = <0 &smmu 0 1>;
4885 + bus-range = <0x0 0xff>;
4886 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
4887 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4888 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4889 + #interrupt-cells = <1>;
4890 + interrupt-map-mask = <0 0 0 7>;
4891 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4892 + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4893 + <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4894 + <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
4895 + status = "disabled";
4899 + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
4900 + reg = <0x00 0x03400000 0x0 0x00100000
4901 + 0x40 0x00000000 0x8 0x00000000>;
4902 + reg-names = "regs", "addr_space";
4903 + num-ib-windows = <6>;
4904 + num-ob-windows = <8>;
4906 + status = "disabled";
4910 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4911 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
4912 + 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
4913 + reg-names = "regs", "config";
4914 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
4915 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
4916 + interrupt-names = "pme", "aer";
4917 + #address-cells = <3>;
4918 + #size-cells = <2>;
4919 + device_type = "pci";
4921 + iommu-map = <0 &smmu 0 1>;
4923 + bus-range = <0x0 0xff>;
4924 + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
4925 + 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4926 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4927 + #interrupt-cells = <1>;
4928 + interrupt-map-mask = <0 0 0 7>;
4929 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4930 + <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4931 + <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4932 + <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
4933 + status = "disabled";
4937 + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
4938 + reg = <0x00 0x03500000 0x0 0x00100000
4939 + 0x48 0x00000000 0x8 0x00000000>;
4940 + reg-names = "regs", "addr_space";
4941 + num-ib-windows = <6>;
4942 + num-ob-windows = <8>;
4944 + status = "disabled";
4948 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4949 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
4950 + 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
4951 + reg-names = "regs", "config";
4952 + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
4953 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
4954 + interrupt-names = "pme", "aer";
4955 + #address-cells = <3>;
4956 + #size-cells = <2>;
4957 + device_type = "pci";
4959 + iommu-map = <0 &smmu 0 1>;
4961 + bus-range = <0x0 0xff>;
4962 + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
4963 + 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4964 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4965 + #interrupt-cells = <1>;
4966 + interrupt-map-mask = <0 0 0 7>;
4967 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4968 + <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4969 + <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4970 + <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
4971 + status = "disabled";
4975 + compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
4976 + reg = <0x00 0x03600000 0x0 0x00100000
4977 + 0x50 0x00000000 0x8 0x00000000>;
4978 + reg-names = "regs", "addr_space";
4979 + num-ib-windows = <6>;
4980 + num-ob-windows = <8>;
4982 + status = "disabled";
4985 + serdes1: serdes@1ea0000 {
4986 + reg = <0x0 0x1ea0000 0 0x00002000>;
4987 + compatible = "fsl,serdes-10g";
4993 @@ -690,7 +839,36 @@
5000 + compatible = "linaro,optee-tz";
5006 #include "qoriq-qman-portals.dtsi"
5007 #include "qoriq-bman-portals.dtsi"
5030 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5031 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5033 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5035 * Device Tree file for NXP LS1088A QDS Board.
5039 * Harninder Rai <harninder.rai@nxp.com>
5041 - * This file is dual-licensed: you can use it either under the terms
5042 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5043 - * licensing only applies to this file, and not this project as a
5046 - * a) This library is free software; you can redistribute it and/or
5047 - * modify it under the terms of the GNU General Public License as
5048 - * published by the Free Software Foundation; either version 2 of the
5049 - * License, or (at your option) any later version.
5051 - * This library is distributed in the hope that it will be useful,
5052 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5053 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5054 - * GNU General Public License for more details.
5056 - * Or, alternatively,
5058 - * b) Permission is hereby granted, free of charge, to any person
5059 - * obtaining a copy of this software and associated documentation
5060 - * files (the "Software"), to deal in the Software without
5061 - * restriction, including without limitation the rights to use,
5062 - * copy, modify, merge, publish, distribute, sublicense, and/or
5063 - * sell copies of the Software, and to permit persons to whom the
5064 - * Software is furnished to do so, subject to the following
5067 - * The above copyright notice and this permission notice shall be
5068 - * included in all copies or substantial portions of the Software.
5070 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5071 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5072 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5073 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5074 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5075 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5076 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5077 - * OTHER DEALINGS IN THE SOFTWARE.
5087 + fsl,qspi-has-second-chip;
5088 + qflash0: s25fs512s@0 {
5089 + compatible = "spansion,m25p80";
5090 + #address-cells = <1>;
5091 + #size-cells = <1>;
5092 + spi-max-frequency = <20000000>;
5094 + spi-rx-bus-width = <4>;
5095 + spi-tx-bus-width = <4>;
5098 + qflash1: s25fs512s@1 {
5099 + compatible = "spansion,m25p80";
5100 + #address-cells = <1>;
5101 + #size-cells = <1>;
5102 + spi-max-frequency = <20000000>;
5104 + spi-rx-bus-width = <4>;
5105 + spi-tx-bus-width = <4>;
5112 @@ -149,3 +137,29 @@
5118 + pcs_phy1: ethernet-phy@0 {
5119 + backplane-mode = "10gbase-kr";
5120 + compatible = "ethernet-phy-ieee802.3-c45";
5122 + fsl,lane-handle = <&serdes1>;
5123 + fsl,lane-reg = <0x840 0x40>;/* lane B */
5128 + pcs_phy2: ethernet-phy@0 {
5129 + backplane-mode = "10gbase-kr";
5130 + compatible = "ethernet-phy-ieee802.3-c45";
5132 + fsl,lane-handle = <&serdes1>;
5133 + fsl,lane-reg = <0x800 0x40>;/* lane A */
5137 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
5139 + * phy-handle = <&pcs_phy1>;
5142 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5143 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5145 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5147 * Device Tree file for NXP LS1088A RDB Board.
5151 * Harninder Rai <harninder.rai@nxp.com>
5153 - * This file is dual-licensed: you can use it either under the terms
5154 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5155 - * licensing only applies to this file, and not this project as a
5158 - * a) This library is free software; you can redistribute it and/or
5159 - * modify it under the terms of the GNU General Public License as
5160 - * published by the Free Software Foundation; either version 2 of the
5161 - * License, or (at your option) any later version.
5163 - * This library is distributed in the hope that it will be useful,
5164 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5165 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5166 - * GNU General Public License for more details.
5168 - * Or, alternatively,
5170 - * b) Permission is hereby granted, free of charge, to any person
5171 - * obtaining a copy of this software and associated documentation
5172 - * files (the "Software"), to deal in the Software without
5173 - * restriction, including without limitation the rights to use,
5174 - * copy, modify, merge, publish, distribute, sublicense, and/or
5175 - * sell copies of the Software, and to permit persons to whom the
5176 - * Software is furnished to do so, subject to the following
5179 - * The above copyright notice and this permission notice shall be
5180 - * included in all copies or substantial portions of the Software.
5182 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5183 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5184 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5185 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5186 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5187 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5188 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5189 - * OTHER DEALINGS IN THE SOFTWARE.
5199 + fsl,qspi-has-second-chip;
5200 + qflash0: s25fs512s@0 {
5201 + compatible = "spansion,m25p80";
5202 + #address-cells = <1>;
5203 + #size-cells = <1>;
5204 + spi-max-frequency = <20000000>;
5206 + spi-rx-bus-width = <4>;
5207 + spi-tx-bus-width = <4>;
5210 + qflash1: s25fs512s@1 {
5211 + compatible = "spansion,m25p80";
5212 + #address-cells = <1>;
5213 + #size-cells = <1>;
5214 + spi-max-frequency = <20000000>;
5216 + spi-rx-bus-width = <4>;
5217 + spi-tx-bus-width = <4>;
5225 @@ -118,6 +107,14 @@
5240 @@ -125,3 +122,82 @@
5246 + /* Freescale F104 PHY1 */
5247 + mdio1_phy1: emdio1_phy@1 {
5249 + phy-connection-type = "qsgmii";
5251 + mdio1_phy2: emdio1_phy@2 {
5253 + phy-connection-type = "qsgmii";
5255 + mdio1_phy3: emdio1_phy@3 {
5257 + phy-connection-type = "qsgmii";
5259 + mdio1_phy4: emdio1_phy@4 {
5261 + phy-connection-type = "qsgmii";
5264 + mdio1_phy5: emdio1_phy@5 {
5266 + phy-connection-type = "qsgmii";
5268 + mdio1_phy6: emdio1_phy@6 {
5270 + phy-connection-type = "qsgmii";
5272 + mdio1_phy7: emdio1_phy@7 {
5274 + phy-connection-type = "qsgmii";
5276 + mdio1_phy8: emdio1_phy@8 {
5278 + phy-connection-type = "qsgmii";
5283 + /* Aquantia AQR105 10G PHY */
5284 + mdio2_phy1: emdio2_phy@1 {
5285 + compatible = "ethernet-phy-ieee802.3-c45";
5286 + interrupts = <0 2 0x4>;
5288 + phy-connection-type = "xfi";
5292 +/* DPMAC connections to external PHYs
5293 + * based on LS1088A RM RevC - $24.1.2 SerDes Options
5295 +/* DPMAC1 is 10G SFP+, fixed link */
5297 + phy-handle = <&mdio2_phy1>;
5300 + phy-handle = <&mdio1_phy5>;
5303 + phy-handle = <&mdio1_phy6>;
5306 + phy-handle = <&mdio1_phy7>;
5309 + phy-handle = <&mdio1_phy8>;
5312 + phy-handle = <&mdio1_phy1>;
5315 + phy-handle = <&mdio1_phy2>;
5318 + phy-handle = <&mdio1_phy3>;
5321 + phy-handle = <&mdio1_phy4>;
5323 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5324 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5326 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5328 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5332 * Harninder Rai <harninder.rai@nxp.com>
5334 - * This file is dual-licensed: you can use it either under the terms
5335 - * of the GPLv2 or the X11 license, at your option. Note that this dual
5336 - * licensing only applies to this file, and not this project as a
5339 - * a) This library is free software; you can redistribute it and/or
5340 - * modify it under the terms of the GNU General Public License as
5341 - * published by the Free Software Foundation; either version 2 of the
5342 - * License, or (at your option) any later version.
5344 - * This library is distributed in the hope that it will be useful,
5345 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
5346 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5347 - * GNU General Public License for more details.
5349 - * Or, alternatively,
5351 - * b) Permission is hereby granted, free of charge, to any person
5352 - * obtaining a copy of this software and associated documentation
5353 - * files (the "Software"), to deal in the Software without
5354 - * restriction, including without limitation the rights to use,
5355 - * copy, modify, merge, publish, distribute, sublicense, and/or
5356 - * sell copies of the Software, and to permit persons to whom the
5357 - * Software is furnished to do so, subject to the following
5360 - * The above copyright notice and this permission notice shall be
5361 - * included in all copies or substantial portions of the Software.
5363 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5364 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5365 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5366 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5367 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5368 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5369 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5370 - * OTHER DEALINGS IN THE SOFTWARE.
5372 #include <dt-bindings/interrupt-controller/arm-gic.h>
5373 #include <dt-bindings/thermal/thermal.h>
5377 /* We have 2 clusters having 4 Cortex-A53 cores each */
5379 + cooling_map0: cpu0: cpu@0 {
5380 device_type = "cpu";
5381 compatible = "arm,cortex-a53";
5384 cpu-idle-states = <&CPU_PH20>;
5388 + cooling_map1: cpu4: cpu@100 {
5389 device_type = "cpu";
5390 compatible = "arm,cortex-a53";
5393 CPU_PH20: cpu-ph20 {
5394 compatible = "arm,idle-state";
5395 idle-state-name = "PH20";
5396 - arm,psci-suspend-param = <0x00010000>;
5397 + arm,psci-suspend-param = <0x0>;
5398 entry-latency-us = <1000>;
5399 exit-latency-us = <1000>;
5400 min-residency-us = <3000>;
5401 @@ -147,6 +111,15 @@
5402 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
5403 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
5404 interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>;
5405 + #address-cells = <2>;
5406 + #size-cells = <2>;
5409 + its: gic-its@6020000 {
5410 + compatible = "arm,gic-v3-its";
5412 + reg = <0x0 0x6020000 0 0x20000>;
5417 @@ -169,11 +142,31 @@
5418 clock-output-names = "sysclk";
5421 + dcfg: dcfg@1e00000 {
5422 + compatible = "fsl,ls1088a-dcfg", "syscon";
5423 + reg = <0x0 0x1e00000 0x0 0x10000>;
5427 + rstcr: syscon@1e60000 {
5428 + compatible = "fsl,ls1088a-rstcr", "syscon";
5429 + reg = <0x0 0x1e60000 0x0 0x4>;
5433 + compatible = "syscon-reboot";
5434 + regmap = <&rstcr>;
5441 compatible = "simple-bus";
5442 #address-cells = <2>;
5445 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
5447 clockgen: clocking@1300000 {
5448 compatible = "fsl,ls1088a-clockgen";
5449 @@ -229,43 +222,7 @@
5450 #thermal-sensor-cells = <1>;
5454 - cpu_thermal: cpu-thermal {
5455 - polling-delay-passive = <1000>;
5456 - polling-delay = <5000>;
5457 - thermal-sensors = <&tmu 0>;
5460 - cpu_alert: cpu-alert {
5461 - temperature = <85000>;
5462 - hysteresis = <2000>;
5466 - cpu_crit: cpu-crit {
5467 - temperature = <95000>;
5468 - hysteresis = <2000>;
5469 - type = "critical";
5475 - trip = <&cpu_alert>;
5477 - <&cpu0 THERMAL_NO_LIMIT
5478 - THERMAL_NO_LIMIT>;
5482 - trip = <&cpu_alert>;
5484 - <&cpu4 THERMAL_NO_LIMIT
5485 - THERMAL_NO_LIMIT>;
5490 + #include "fsl-tmu.dtsi"
5492 duart0: serial@21c0500 {
5493 compatible = "fsl,ns16550", "ns16550a";
5494 @@ -283,6 +240,62 @@
5495 status = "disabled";
5498 + cluster1_core0_watchdog: wdt@c000000 {
5499 + compatible = "arm,sp805-wdt", "arm,primecell";
5500 + reg = <0x0 0xc000000 0x0 0x1000>;
5501 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5502 + clock-names = "apb_pclk", "wdog_clk";
5505 + cluster1_core1_watchdog: wdt@c010000 {
5506 + compatible = "arm,sp805-wdt", "arm,primecell";
5507 + reg = <0x0 0xc010000 0x0 0x1000>;
5508 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5509 + clock-names = "apb_pclk", "wdog_clk";
5512 + cluster1_core2_watchdog: wdt@c020000 {
5513 + compatible = "arm,sp805-wdt", "arm,primecell";
5514 + reg = <0x0 0xc020000 0x0 0x1000>;
5515 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5516 + clock-names = "apb_pclk", "wdog_clk";
5519 + cluster1_core3_watchdog: wdt@c030000 {
5520 + compatible = "arm,sp805-wdt", "arm,primecell";
5521 + reg = <0x0 0xc030000 0x0 0x1000>;
5522 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5523 + clock-names = "apb_pclk", "wdog_clk";
5526 + cluster2_core0_watchdog: wdt@c100000 {
5527 + compatible = "arm,sp805-wdt", "arm,primecell";
5528 + reg = <0x0 0xc100000 0x0 0x1000>;
5529 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5530 + clock-names = "apb_pclk", "wdog_clk";
5533 + cluster2_core1_watchdog: wdt@c110000 {
5534 + compatible = "arm,sp805-wdt", "arm,primecell";
5535 + reg = <0x0 0xc110000 0x0 0x1000>;
5536 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5537 + clock-names = "apb_pclk", "wdog_clk";
5540 + cluster2_core2_watchdog: wdt@c120000 {
5541 + compatible = "arm,sp805-wdt", "arm,primecell";
5542 + reg = <0x0 0xc120000 0x0 0x1000>;
5543 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5544 + clock-names = "apb_pclk", "wdog_clk";
5547 + cluster2_core3_watchdog: wdt@c130000 {
5548 + compatible = "arm,sp805-wdt", "arm,primecell";
5549 + reg = <0x0 0xc130000 0x0 0x1000>;
5550 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5551 + clock-names = "apb_pclk", "wdog_clk";
5554 gpio0: gpio@2300000 {
5555 compatible = "fsl,qoriq-gpio";
5556 reg = <0x0 0x2300000 0x0 0x10000>;
5557 @@ -323,6 +336,72 @@
5558 #interrupt-cells = <2>;
5561 + /* TODO: WRIOP (CCSR?) */
5562 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
5563 + * E-MDIO1: 0x1_6000
5565 + compatible = "fsl,fman-memac-mdio";
5566 + reg = <0x0 0x8B96000 0x0 0x1000>;
5567 + device_type = "mdio";
5568 + little-endian; /* force the driver in LE mode */
5570 + /* Not necessary on the QDS, but needed on the RDB */
5571 + #address-cells = <1>;
5572 + #size-cells = <0>;
5575 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
5576 + * E-MDIO2: 0x1_7000
5578 + compatible = "fsl,fman-memac-mdio";
5579 + reg = <0x0 0x8B97000 0x0 0x1000>;
5580 + device_type = "mdio";
5581 + little-endian; /* force the driver in LE mode */
5583 + #address-cells = <1>;
5584 + #size-cells = <0>;
5587 + pcs_mdio1: mdio@0x8c07000 {
5588 + compatible = "fsl,fman-memac-mdio";
5589 + reg = <0x0 0x8c07000 0x0 0x1000>;
5590 + device_type = "mdio";
5593 + #address-cells = <1>;
5594 + #size-cells = <0>;
5597 + pcs_mdio2: mdio@0x8c0b000 {
5598 + compatible = "fsl,fman-memac-mdio";
5599 + reg = <0x0 0x8c0b000 0x0 0x1000>;
5600 + device_type = "mdio";
5603 + #address-cells = <1>;
5604 + #size-cells = <0>;
5607 + pcs_mdio3: mdio@0x8c0f000 {
5608 + compatible = "fsl,fman-memac-mdio";
5609 + reg = <0x0 0x8c0f000 0x0 0x1000>;
5610 + device_type = "mdio";
5613 + #address-cells = <1>;
5614 + #size-cells = <0>;
5617 + pcs_mdio4: mdio@0x8c13000 {
5618 + compatible = "fsl,fman-memac-mdio";
5619 + reg = <0x0 0x8c13000 0x0 0x1000>;
5620 + device_type = "mdio";
5623 + #address-cells = <1>;
5624 + #size-cells = <0>;
5628 compatible = "fsl,ifc", "simple-bus";
5629 reg = <0x0 0x2240000 0x0 0x20000>;
5630 @@ -333,13 +412,22 @@
5631 status = "disabled";
5634 + ftm0: ftm0@2800000 {
5635 + compatible = "fsl,ls1088a-ftm-alarm";
5636 + reg = <0x0 0x2800000 0x0 0x10000>,
5637 + <0x0 0x1e34050 0x0 0x4>;
5638 + reg-names = "ftm", "pmctrl";
5639 + interrupts = <0 44 4>;
5643 - compatible = "fsl,vf610-i2c";
5644 + compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c";
5645 #address-cells = <1>;
5647 reg = <0x0 0x2000000 0x0 0x10000>;
5648 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5649 - clocks = <&clockgen 4 3>;
5650 + clocks = <&clockgen 4 7>;
5651 + scl-gpios = <&gpio3 30 0>;
5652 status = "disabled";
5657 reg = <0x0 0x2010000 0x0 0x10000>;
5658 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5659 - clocks = <&clockgen 4 3>;
5660 + clocks = <&clockgen 4 7>;
5661 status = "disabled";
5666 reg = <0x0 0x2020000 0x0 0x10000>;
5667 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5668 - clocks = <&clockgen 4 3>;
5669 + clocks = <&clockgen 4 7>;
5670 status = "disabled";
5675 reg = <0x0 0x2030000 0x0 0x10000>;
5676 interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5677 - clocks = <&clockgen 4 3>;
5678 + clocks = <&clockgen 4 7>;
5679 status = "disabled";
5682 @@ -385,6 +473,28 @@
5683 status = "disabled";
5686 + usb0: usb3@3100000 {
5687 + compatible = "snps,dwc3";
5688 + reg = <0x0 0x3100000 0x0 0x10000>;
5689 + interrupts = <0 80 0x4>; /* Level high type */
5692 + snps,dis_rxdet_inp3_quirk;
5693 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
5694 + snps,host-vbus-glitches;
5697 + usb1: usb3@3110000 {
5698 + compatible = "snps,dwc3";
5699 + reg = <0x0 0x3110000 0x0 0x10000>;
5700 + interrupts = <0 81 0x4>; /* Level high type */
5703 + snps,dis_rxdet_inp3_quirk;
5704 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
5705 + snps,host-vbus-glitches;
5708 sata: sata@3200000 {
5709 compatible = "fsl,ls1088a-ahci";
5710 reg = <0x0 0x3200000 0x0 0x10000>,
5711 @@ -395,6 +505,17 @@
5713 status = "disabled";
5715 + qspi: quadspi@20c0000 {
5716 + compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
5717 + #address-cells = <1>;
5718 + #size-cells = <0>;
5719 + reg = <0x0 0x20c0000 0x0 0x10000>,
5720 + <0x0 0x20000000 0x0 0x10000000>;
5721 + reg-names = "QuadSPI", "QuadSPI-memory";
5722 + interrupts = <0 25 0x4>; /* Level high type */
5723 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5724 + clock-names = "qspi_en", "qspi";
5727 crypto: crypto@8000000 {
5728 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
5729 @@ -434,6 +555,267 @@
5730 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
5735 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5736 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
5737 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
5738 + reg-names = "regs", "config";
5739 + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5740 + interrupt-names = "aer";
5741 + #address-cells = <3>;
5742 + #size-cells = <2>;
5743 + device_type = "pci";
5746 + bus-range = <0x0 0xff>;
5747 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
5748 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5749 + msi-parent = <&its>;
5750 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5751 + #interrupt-cells = <1>;
5752 + interrupt-map-mask = <0 0 0 7>;
5753 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
5754 + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
5755 + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
5756 + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
5757 + status = "disabled";
5761 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5762 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
5763 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
5764 + reg-names = "regs", "config";
5765 + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5766 + interrupt-names = "aer";
5767 + #address-cells = <3>;
5768 + #size-cells = <2>;
5769 + device_type = "pci";
5772 + bus-range = <0x0 0xff>;
5773 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
5774 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5775 + msi-parent = <&its>;
5776 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5777 + #interrupt-cells = <1>;
5778 + interrupt-map-mask = <0 0 0 7>;
5779 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
5780 + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
5781 + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
5782 + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
5783 + status = "disabled";
5787 + compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
5788 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
5789 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
5790 + reg-names = "regs", "config";
5791 + interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5792 + interrupt-names = "aer";
5793 + #address-cells = <3>;
5794 + #size-cells = <2>;
5795 + device_type = "pci";
5798 + bus-range = <0x0 0xff>;
5799 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
5800 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5801 + msi-parent = <&its>;
5802 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5803 + #interrupt-cells = <1>;
5804 + interrupt-map-mask = <0 0 0 7>;
5805 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
5806 + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
5807 + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
5808 + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
5809 + status = "disabled";
5812 + fsl_mc: fsl-mc@80c000000 {
5813 + compatible = "fsl,qoriq-mc";
5814 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
5815 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
5816 + msi-parent = <&its>;
5817 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
5819 + #address-cells = <3>;
5820 + #size-cells = <1>;
5823 + * Region type 0x0 - MC portals
5824 + * Region type 0x1 - QBMAN portals
5826 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
5827 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
5830 + #address-cells = <1>;
5831 + #size-cells = <0>;
5834 + compatible = "fsl,qoriq-mc-dpmac";
5839 + compatible = "fsl,qoriq-mc-dpmac";
5844 + compatible = "fsl,qoriq-mc-dpmac";
5849 + compatible = "fsl,qoriq-mc-dpmac";
5854 + compatible = "fsl,qoriq-mc-dpmac";
5859 + compatible = "fsl,qoriq-mc-dpmac";
5864 + compatible = "fsl,qoriq-mc-dpmac";
5869 + compatible = "fsl,qoriq-mc-dpmac";
5874 + compatible = "fsl,qoriq-mc-dpmac";
5878 + dpmac10: dpmac@a {
5879 + compatible = "fsl,qoriq-mc-dpmac";
5885 + smmu: iommu@5000000 {
5886 + compatible = "arm,mmu-500";
5887 + reg = <0 0x5000000 0 0x800000>;
5888 + #global-interrupts = <12>;
5889 + #iommu-cells = <1>;
5890 + stream-match-mask = <0x7C00>;
5891 + interrupts = <0 13 4>, /* global secure fault */
5892 + <0 14 4>, /* combined secure interrupt */
5893 + <0 15 4>, /* global non-secure fault */
5894 + <0 16 4>, /* combined non-secure interrupt */
5895 + /* performance counter interrupts 0-7 */
5904 + /* per context interrupt, 64 interrupts */
5971 + serdes1: serdes@1ea0000 {
5972 + compatible = "fsl,serdes-10g";
5973 + reg = <0x0 0x1ea0000 0 0x00002000>;
5980 + compatible = "linaro,optee-tz";
5986 +#include "fsl-tmu-map1.dtsi"
5997 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
5998 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
6000 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6002 * Device Tree file for Freescale LS2080a QDS Board.
6005 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6006 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6008 - * This file is dual-licensed: you can use it either under the terms
6009 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6010 - * licensing only applies to this file, and not this project as a
6013 - * a) This library is free software; you can redistribute it and/or
6014 - * modify it under the terms of the GNU General Public License as
6015 - * published by the Free Software Foundation; either version 2 of the
6016 - * License, or (at your option) any later version.
6018 - * This library is distributed in the hope that it will be useful,
6019 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6020 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6021 - * GNU General Public License for more details.
6023 - * Or, alternatively,
6025 - * b) Permission is hereby granted, free of charge, to any person
6026 - * obtaining a copy of this software and associated documentation
6027 - * files (the "Software"), to deal in the Software without
6028 - * restriction, including without limitation the rights to use,
6029 - * copy, modify, merge, publish, distribute, sublicense, and/or
6030 - * sell copies of the Software, and to permit persons to whom the
6031 - * Software is furnished to do so, subject to the following
6034 - * The above copyright notice and this permission notice shall be
6035 - * included in all copies or substantial portions of the Software.
6037 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6038 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6039 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6040 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6041 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6042 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6043 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6044 - * OTHER DEALINGS IN THE SOFTWARE.
6049 stdout-path = "serial0:115200n8";
6054 + boardctrl: board-control@3,0 {
6055 + #address-cells = <1>;
6056 + #size-cells = <1>;
6057 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6058 + reg = <3 0 0x300>; /* TODO check address */
6059 + ranges = <0 3 0 0x300>;
6062 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6063 + mdio-parent-bus = <&emdio1>;
6064 + reg = <0x54 1>; /* BRDCFG4 */
6065 + mux-mask = <0xe0>; /* EMI1_MDIO */
6067 + #address-cells=<1>;
6068 + #size-cells = <0>;
6070 + /* Child MDIO buses, one for each riser card:
6071 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6072 + * VSC8234 PHYs on the riser cards.
6075 + mdio_mux3: mdio@60 {
6077 + #address-cells = <1>;
6078 + #size-cells = <0>;
6080 + mdio0_phy12: mdio_phy0@1c {
6082 + phy-connection-type = "sgmii";
6084 + mdio0_phy13: mdio_phy1@1d {
6086 + phy-connection-type = "sgmii";
6088 + mdio0_phy14: mdio_phy2@1e {
6090 + phy-connection-type = "sgmii";
6092 + mdio0_phy15: mdio_phy3@1f {
6094 + phy-connection-type = "sgmii";
6101 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6103 + phy-handle = <&mdio0_phy12>;
6106 + phy-handle = <&mdio0_phy13>;
6109 + phy-handle = <&mdio0_phy14>;
6112 + phy-handle = <&mdio0_phy15>;
6114 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6115 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6117 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6119 * Device Tree file for Freescale LS2080a RDB Board.
6122 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6123 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6125 - * This file is dual-licensed: you can use it either under the terms
6126 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6127 - * licensing only applies to this file, and not this project as a
6130 - * a) This library is free software; you can redistribute it and/or
6131 - * modify it under the terms of the GNU General Public License as
6132 - * published by the Free Software Foundation; either version 2 of the
6133 - * License, or (at your option) any later version.
6135 - * This library is distributed in the hope that it will be useful,
6136 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6137 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6138 - * GNU General Public License for more details.
6140 - * Or, alternatively,
6142 - * b) Permission is hereby granted, free of charge, to any person
6143 - * obtaining a copy of this software and associated documentation
6144 - * files (the "Software"), to deal in the Software without
6145 - * restriction, including without limitation the rights to use,
6146 - * copy, modify, merge, publish, distribute, sublicense, and/or
6147 - * sell copies of the Software, and to permit persons to whom the
6148 - * Software is furnished to do so, subject to the following
6151 - * The above copyright notice and this permission notice shall be
6152 - * included in all copies or substantial portions of the Software.
6154 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6155 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6156 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6157 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6158 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6159 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6160 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6161 - * OTHER DEALINGS IN THE SOFTWARE.
6166 stdout-path = "serial1:115200n8";
6171 + status = "disabled";
6173 + mdio1_phy1: emdio1_phy@1 {
6175 + phy-connection-type = "xfi";
6177 + mdio1_phy2: emdio1_phy@2 {
6179 + phy-connection-type = "xfi";
6181 + mdio1_phy3: emdio1_phy@3 {
6183 + phy-connection-type = "xfi";
6185 + mdio1_phy4: emdio1_phy@4 {
6187 + phy-connection-type = "xfi";
6193 + mdio2_phy1: emdio2_phy@1 {
6194 + compatible = "ethernet-phy-ieee802.3-c45";
6195 + interrupts = <0 1 0x4>; /* Level high type */
6197 + phy-connection-type = "xfi";
6199 + mdio2_phy2: emdio2_phy@2 {
6200 + compatible = "ethernet-phy-ieee802.3-c45";
6201 + interrupts = <0 2 0x4>; /* Level high type */
6203 + phy-connection-type = "xfi";
6205 + mdio2_phy3: emdio2_phy@3 {
6206 + compatible = "ethernet-phy-ieee802.3-c45";
6207 + interrupts = <0 4 0x4>; /* Level high type */
6209 + phy-connection-type = "xfi";
6211 + mdio2_phy4: emdio2_phy@4 {
6212 + compatible = "ethernet-phy-ieee802.3-c45";
6213 + interrupts = <0 5 0x4>; /* Level high type */
6215 + phy-connection-type = "xfi";
6219 +/* Update DPMAC connections to external PHYs, under the assumption of
6220 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6222 +/* Leave Cortina nodes commented out until driver is integrated
6224 + * phy-handle = <&mdio1_phy1>;
6227 + * phy-handle = <&mdio1_phy2>;
6230 + * phy-handle = <&mdio1_phy3>;
6233 + * phy-handle = <&mdio1_phy4>;
6238 + phy-handle = <&mdio2_phy1>;
6241 + phy-handle = <&mdio2_phy2>;
6244 + phy-handle = <&mdio2_phy3>;
6247 + phy-handle = <&mdio2_phy4>;
6249 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6250 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6252 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6254 * Device Tree file for Freescale LS2080a software Simulator model
6258 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6260 - * This file is dual-licensed: you can use it either under the terms
6261 - * of the GPL or the X11 license, at your option. Note that this dual
6262 - * licensing only applies to this file, and not this project as a
6265 - * a) This library is free software; you can redistribute it and/or
6266 - * modify it under the terms of the GNU General Public License as
6267 - * published by the Free Software Foundation; either version 2 of the
6268 - * License, or (at your option) any later version.
6270 - * This library is distributed in the hope that it will be useful,
6271 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6272 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6273 - * GNU General Public License for more details.
6275 - * Or, alternatively,
6277 - * b) Permission is hereby granted, free of charge, to any person
6278 - * obtaining a copy of this software and associated documentation
6279 - * files (the "Software"), to deal in the Software without
6280 - * restriction, including without limitation the rights to use,
6281 - * copy, modify, merge, publish, distribute, sublicense, and/or
6282 - * sell copies of the Software, and to permit persons to whom the
6283 - * Software is furnished to do so, subject to the following
6286 - * The above copyright notice and this permission notice shall be
6287 - * included in all copies or substantial portions of the Software.
6289 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6290 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6291 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6292 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6293 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6294 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6295 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6296 - * OTHER DEALINGS IN THE SOFTWARE.
6300 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6301 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6303 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6305 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6308 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6309 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6311 - * This file is dual-licensed: you can use it either under the terms
6312 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6313 - * licensing only applies to this file, and not this project as a
6316 - * a) This library is free software; you can redistribute it and/or
6317 - * modify it under the terms of the GNU General Public License as
6318 - * published by the Free Software Foundation; either version 2 of the
6319 - * License, or (at your option) any later version.
6321 - * This library is distributed in the hope that it will be useful,
6322 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6323 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6324 - * GNU General Public License for more details.
6326 - * Or, alternatively,
6328 - * b) Permission is hereby granted, free of charge, to any person
6329 - * obtaining a copy of this software and associated documentation
6330 - * files (the "Software"), to deal in the Software without
6331 - * restriction, including without limitation the rights to use,
6332 - * copy, modify, merge, publish, distribute, sublicense, and/or
6333 - * sell copies of the Software, and to permit persons to whom the
6334 - * Software is furnished to do so, subject to the following
6337 - * The above copyright notice and this permission notice shall be
6338 - * included in all copies or substantial portions of the Software.
6340 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6341 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6342 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6343 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6344 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6345 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6346 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6347 - * OTHER DEALINGS IN THE SOFTWARE.
6350 #include "fsl-ls208xa.dtsi"
6354 + cooling_map0: cpu0: cpu@0 {
6355 device_type = "cpu";
6356 compatible = "arm,cortex-a57";
6359 next-level-cache = <&cluster0_l2>;
6363 + cooling_map1: cpu2: cpu@100 {
6364 device_type = "cpu";
6365 compatible = "arm,cortex-a57";
6368 next-level-cache = <&cluster1_l2>;
6372 + cooling_map2: cpu4: cpu@200 {
6373 device_type = "cpu";
6374 compatible = "arm,cortex-a57";
6377 next-level-cache = <&cluster2_l2>;
6381 + cooling_map3: cpu6: cpu@300 {
6382 device_type = "cpu";
6383 compatible = "arm,cortex-a57";
6385 @@ -150,6 +114,10 @@
6390 + fsl,erratum-a008585;
6394 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6395 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
6397 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
6400 + * Device Tree file for NXP LS2081A RDB Board.
6402 + * Copyright 2017 NXP
6404 + * Priyanka Jain <priyanka.jain@nxp.com>
6406 + * This file is dual-licensed: you can use it either under the terms
6407 + * of the GPLv2 or the X11 license, at your option. Note that this dual
6408 + * licensing only applies to this file, and not this project as a
6411 + * a) This library is free software; you can redistribute it and/or
6412 + * modify it under the terms of the GNU General Public License as
6413 + * published by the Free Software Foundation; either version 2 of the
6414 + * License, or (at your option) any later version.
6416 + * This library is distributed in the hope that it will be useful,
6417 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6418 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6419 + * GNU General Public License for more details.
6421 + * Or, alternatively,
6423 + * b) Permission is hereby granted, free of charge, to any person
6424 + * obtaining a copy of this software and associated documentation
6425 + * files (the "Software"), to deal in the Software without
6426 + * restriction, including without limitation the rights to use,
6427 + * copy, modify, merge, publish, distribute, sublicense, and/or
6428 + * sell copies of the Software, and to permit persons to whom the
6429 + * Software is furnished to do so, subject to the following
6432 + * The above copyright notice and this permission notice shall be
6433 + * included in all copies or substantial portions of the Software.
6435 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6436 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6437 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6438 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6439 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6440 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6441 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6442 + * OTHER DEALINGS IN THE SOFTWARE.
6447 +#include "fsl-ls2088a.dtsi"
6450 + model = "NXP Layerscape 2081A RDB Board";
6451 + compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
6454 + serial0 = &serial0;
6455 + serial1 = &serial1;
6459 + stdout-path = "serial1:115200n8";
6468 + status = "disabled";
6474 + compatible = "nxp,pca9547";
6476 + #address-cells = <1>;
6477 + #size-cells = <0>;
6479 + #address-cells = <1>;
6480 + #size-cells = <0>;
6483 + compatible = "nxp,pcf2129";
6489 + #address-cells = <1>;
6490 + #size-cells = <0>;
6494 + compatible = "ti,ina220";
6496 + shunt-resistor = <500>;
6501 + #address-cells = <1>;
6502 + #size-cells = <0>;
6506 + compatible = "adi,adt7461";
6515 + dflash0: n25q512a {
6516 + #address-cells = <1>;
6517 + #size-cells = <1>;
6518 + compatible = "st,m25p80";
6519 + spi-max-frequency = <3000000>;
6526 + fsl,qspi-has-second-chip;
6527 + flash0: s25fs512s@0 {
6528 + #address-cells = <1>;
6529 + #size-cells = <1>;
6530 + compatible = "spansion,m25p80";
6531 + spi-rx-bus-width = <4>;
6532 + spi-tx-bus-width = <4>;
6533 + spi-max-frequency = <20000000>;
6536 + flash1: s25fs512s@1 {
6537 + #address-cells = <1>;
6538 + #size-cells = <1>;
6539 + spi-rx-bus-width = <4>;
6540 + spi-tx-bus-width = <4>;
6541 + compatible = "spansion,m25p80";
6542 + spi-max-frequency = <20000000>;
6562 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
6563 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
6565 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6567 * Device Tree file for Freescale LS2088A QDS Board.
6571 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6573 - * This file is dual-licensed: you can use it either under the terms
6574 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6575 - * licensing only applies to this file, and not this project as a
6578 - * a) This library is free software; you can redistribute it and/or
6579 - * modify it under the terms of the GNU General Public License as
6580 - * published by the Free Software Foundation; either version 2 of the
6581 - * License, or (at your option) any later version.
6583 - * This library is distributed in the hope that it will be useful,
6584 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6585 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6586 - * GNU General Public License for more details.
6588 - * Or, alternatively,
6590 - * b) Permission is hereby granted, free of charge, to any person
6591 - * obtaining a copy of this software and associated documentation
6592 - * files (the "Software"), to deal in the Software without
6593 - * restriction, including without limitation the rights to use,
6594 - * copy, modify, merge, publish, distribute, sublicense, and/or
6595 - * sell copies of the Software, and to permit persons to whom the
6596 - * Software is furnished to do so, subject to the following
6599 - * The above copyright notice and this permission notice shall be
6600 - * included in all copies or substantial portions of the Software.
6602 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6603 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6604 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6605 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6606 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6607 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6608 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6609 - * OTHER DEALINGS IN THE SOFTWARE.
6614 stdout-path = "serial0:115200n8";
6619 + boardctrl: board-control@3,0 {
6620 + #address-cells = <1>;
6621 + #size-cells = <1>;
6622 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6623 + reg = <3 0 0x300>; /* TODO check address */
6624 + ranges = <0 3 0 0x300>;
6627 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6628 + mdio-parent-bus = <&emdio1>;
6629 + reg = <0x54 1>; /* BRDCFG4 */
6630 + mux-mask = <0xe0>; /* EMI1_MDIO */
6632 + #address-cells=<1>;
6633 + #size-cells = <0>;
6635 + /* Child MDIO buses, one for each riser card:
6636 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6637 + * VSC8234 PHYs on the riser cards.
6640 + mdio_mux3: mdio@60 {
6642 + #address-cells = <1>;
6643 + #size-cells = <0>;
6645 + mdio0_phy12: mdio_phy0@1c {
6647 + phy-connection-type = "sgmii";
6649 + mdio0_phy13: mdio_phy1@1d {
6651 + phy-connection-type = "sgmii";
6653 + mdio0_phy14: mdio_phy2@1e {
6655 + phy-connection-type = "sgmii";
6657 + mdio0_phy15: mdio_phy3@1f {
6659 + phy-connection-type = "sgmii";
6667 + pcs_phy1: ethernet-phy@0 {
6668 + backplane-mode = "10gbase-kr";
6669 + compatible = "ethernet-phy-ieee802.3-c45";
6671 + fsl,lane-handle = <&serdes1>;
6672 + fsl,lane-reg = <0x9C0 0x40>;/* lane H */
6677 + pcs_phy2: ethernet-phy@0 {
6678 + backplane-mode = "10gbase-kr";
6679 + compatible = "ethernet-phy-ieee802.3-c45";
6681 + fsl,lane-handle = <&serdes1>;
6682 + fsl,lane-reg = <0x980 0x40>;/* lane G */
6687 + pcs_phy3: ethernet-phy@0 {
6688 + backplane-mode = "10gbase-kr";
6689 + compatible = "ethernet-phy-ieee802.3-c45";
6691 + fsl,lane-handle = <&serdes1>;
6692 + fsl,lane-reg = <0x940 0x40>;/* lane F */
6697 + pcs_phy4: ethernet-phy@0 {
6698 + backplane-mode = "10gbase-kr";
6699 + compatible = "ethernet-phy-ieee802.3-c45";
6701 + fsl,lane-handle = <&serdes1>;
6702 + fsl,lane-reg = <0x900 0x40>;/* lane E */
6706 +/* Update DPMAC connections to backplane PHYs, under SerDes 0x2a_0xXX.
6708 + * phy-handle = <&pcs_phy1>;
6712 + * phy-handle = <&pcs_phy2>;
6716 + * phy-handle = <&pcs_phy3>;
6720 + * phy-handle = <&pcs_phy4>;
6724 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6726 + phy-handle = <&mdio0_phy12>;
6729 + phy-handle = <&mdio0_phy13>;
6732 + phy-handle = <&mdio0_phy14>;
6735 + phy-handle = <&mdio0_phy15>;
6737 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
6738 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
6740 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6742 * Device Tree file for Freescale LS2088A RDB Board.
6746 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6748 - * This file is dual-licensed: you can use it either under the terms
6749 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6750 - * licensing only applies to this file, and not this project as a
6753 - * a) This library is free software; you can redistribute it and/or
6754 - * modify it under the terms of the GNU General Public License as
6755 - * published by the Free Software Foundation; either version 2 of the
6756 - * License, or (at your option) any later version.
6758 - * This library is distributed in the hope that it will be useful,
6759 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6760 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6761 - * GNU General Public License for more details.
6763 - * Or, alternatively,
6765 - * b) Permission is hereby granted, free of charge, to any person
6766 - * obtaining a copy of this software and associated documentation
6767 - * files (the "Software"), to deal in the Software without
6768 - * restriction, including without limitation the rights to use,
6769 - * copy, modify, merge, publish, distribute, sublicense, and/or
6770 - * sell copies of the Software, and to permit persons to whom the
6771 - * Software is furnished to do so, subject to the following
6774 - * The above copyright notice and this permission notice shall be
6775 - * included in all copies or substantial portions of the Software.
6777 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6778 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6779 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6780 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6781 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6782 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6783 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6784 - * OTHER DEALINGS IN THE SOFTWARE.
6789 stdout-path = "serial1:115200n8";
6794 + status = "disabled";
6796 + mdio1_phy1: emdio1_phy@1 {
6798 + phy-connection-type = "xfi";
6800 + mdio1_phy2: emdio1_phy@2 {
6802 + phy-connection-type = "xfi";
6804 + mdio1_phy3: emdio1_phy@3 {
6806 + phy-connection-type = "xfi";
6808 + mdio1_phy4: emdio1_phy@4 {
6810 + phy-connection-type = "xfi";
6816 + mdio2_phy1: emdio2_phy@1 {
6817 + compatible = "ethernet-phy-ieee802.3-c45";
6818 + interrupts = <0 1 0x4>; /* Level high type */
6820 + phy-connection-type = "xfi";
6822 + mdio2_phy2: emdio2_phy@2 {
6823 + compatible = "ethernet-phy-ieee802.3-c45";
6824 + interrupts = <0 2 0x4>; /* Level high type */
6826 + phy-connection-type = "xfi";
6828 + mdio2_phy3: emdio2_phy@3 {
6829 + compatible = "ethernet-phy-ieee802.3-c45";
6830 + interrupts = <0 4 0x4>; /* Level high type */
6832 + phy-connection-type = "xfi";
6834 + mdio2_phy4: emdio2_phy@4 {
6835 + compatible = "ethernet-phy-ieee802.3-c45";
6836 + interrupts = <0 5 0x4>; /* Level high type */
6838 + phy-connection-type = "xfi";
6842 +/* Update DPMAC connections to external PHYs, under the assumption of
6843 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6845 +/* Leave Cortina PHYs commented out until proper driver is integrated
6847 + * phy-handle = <&mdio1_phy1>;
6850 + * phy-handle = <&mdio1_phy2>;
6853 + * phy-handle = <&mdio1_phy3>;
6856 + * phy-handle = <&mdio1_phy4>;
6861 + phy-handle = <&mdio2_phy1>;
6864 + phy-handle = <&mdio2_phy2>;
6867 + phy-handle = <&mdio2_phy3>;
6870 + phy-handle = <&mdio2_phy4>;
6872 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
6873 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
6875 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6877 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
6881 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6883 - * This file is dual-licensed: you can use it either under the terms
6884 - * of the GPLv2 or the X11 license, at your option. Note that this dual
6885 - * licensing only applies to this file, and not this project as a
6888 - * a) This library is free software; you can redistribute it and/or
6889 - * modify it under the terms of the GNU General Public License as
6890 - * published by the Free Software Foundation; either version 2 of the
6891 - * License, or (at your option) any later version.
6893 - * This library is distributed in the hope that it will be useful,
6894 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
6895 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6896 - * GNU General Public License for more details.
6898 - * Or, alternatively,
6900 - * b) Permission is hereby granted, free of charge, to any person
6901 - * obtaining a copy of this software and associated documentation
6902 - * files (the "Software"), to deal in the Software without
6903 - * restriction, including without limitation the rights to use,
6904 - * copy, modify, merge, publish, distribute, sublicense, and/or
6905 - * sell copies of the Software, and to permit persons to whom the
6906 - * Software is furnished to do so, subject to the following
6909 - * The above copyright notice and this permission notice shall be
6910 - * included in all copies or substantial portions of the Software.
6912 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
6913 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
6914 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
6915 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
6916 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
6917 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
6918 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
6919 - * OTHER DEALINGS IN THE SOFTWARE.
6922 #include "fsl-ls208xa.dtsi"
6926 + cooling_map0: cpu0: cpu@0 {
6927 device_type = "cpu";
6928 compatible = "arm,cortex-a72";
6931 next-level-cache = <&cluster0_l2>;
6935 + cooling_map1: cpu2: cpu@100 {
6936 device_type = "cpu";
6937 compatible = "arm,cortex-a72";
6940 next-level-cache = <&cluster1_l2>;
6944 + cooling_map2: cpu4: cpu@200 {
6945 device_type = "cpu";
6946 compatible = "arm,cortex-a72";
6949 next-level-cache = <&cluster2_l2>;
6953 + cooling_map3: cpu6: cpu@300 {
6954 device_type = "cpu";
6955 compatible = "arm,cortex-a72";
6958 CPU_PW20: cpu-pw20 {
6959 compatible = "arm,idle-state";
6960 idle-state-name = "PW20";
6961 - arm,psci-suspend-param = <0x00010000>;
6962 + arm,psci-suspend-param = <0x0>;
6963 entry-latency-us = <2000>;
6964 exit-latency-us = <2000>;
6965 min-residency-us = <6000>;
6970 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6971 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6972 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
6978 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6979 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
6980 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
6986 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6987 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
6988 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
6994 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
6995 reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
6996 0x38 0x00000000 0x0 0x00002000>; /* configuration space */
6998 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
6999 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
7001 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7003 * Device Tree file for Freescale LS2080A QDS Board.
7007 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7009 - * This file is dual-licensed: you can use it either under the terms
7010 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7011 - * licensing only applies to this file, and not this project as a
7014 - * a) This library is free software; you can redistribute it and/or
7015 - * modify it under the terms of the GNU General Public License as
7016 - * published by the Free Software Foundation; either version 2 of the
7017 - * License, or (at your option) any later version.
7019 - * This library is distributed in the hope that it will be useful,
7020 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7021 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7022 - * GNU General Public License for more details.
7024 - * Or, alternatively,
7026 - * b) Permission is hereby granted, free of charge, to any person
7027 - * obtaining a copy of this software and associated documentation
7028 - * files (the "Software"), to deal in the Software without
7029 - * restriction, including without limitation the rights to use,
7030 - * copy, modify, merge, publish, distribute, sublicense, and/or
7031 - * sell copies of the Software, and to permit persons to whom the
7032 - * Software is furnished to do so, subject to the following
7035 - * The above copyright notice and this permission notice shall be
7036 - * included in all copies or substantial portions of the Software.
7038 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7039 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7040 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7041 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7042 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7043 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7044 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7045 - * OTHER DEALINGS IN THE SOFTWARE.
7049 @@ -165,16 +129,21 @@
7053 + fsl,qspi-has-second-chip;
7054 flash0: s25fl256s1@0 {
7055 #address-cells = <1>;
7057 compatible = "st,m25p80";
7058 + spi-rx-bus-width = <4>;
7059 + spi-tx-bus-width = <4>;
7060 spi-max-frequency = <20000000>;
7063 flash2: s25fl256s1@2 {
7064 #address-cells = <1>;
7066 + spi-rx-bus-width = <4>;
7067 + spi-tx-bus-width = <4>;
7068 compatible = "st,m25p80";
7069 spi-max-frequency = <20000000>;
7071 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
7072 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
7074 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7076 * Device Tree file for Freescale LS2080A RDB Board.
7080 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7082 - * This file is dual-licensed: you can use it either under the terms
7083 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7084 - * licensing only applies to this file, and not this project as a
7087 - * a) This library is free software; you can redistribute it and/or
7088 - * modify it under the terms of the GNU General Public License as
7089 - * published by the Free Software Foundation; either version 2 of the
7090 - * License, or (at your option) any later version.
7092 - * This library is distributed in the hope that it will be useful,
7093 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7094 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7095 - * GNU General Public License for more details.
7097 - * Or, alternatively,
7099 - * b) Permission is hereby granted, free of charge, to any person
7100 - * obtaining a copy of this software and associated documentation
7101 - * files (the "Software"), to deal in the Software without
7102 - * restriction, including without limitation the rights to use,
7103 - * copy, modify, merge, publish, distribute, sublicense, and/or
7104 - * sell copies of the Software, and to permit persons to whom the
7105 - * Software is furnished to do so, subject to the following
7108 - * The above copyright notice and this permission notice shall be
7109 - * included in all copies or substantial portions of the Software.
7111 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7112 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7113 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7114 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7115 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7116 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7117 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7118 - * OTHER DEALINGS IN THE SOFTWARE.
7124 #address-cells = <1>;
7126 + i2c-mux-never-disable;
7128 #address-cells = <1>;
7135 + #address-cells = <1>;
7136 + #size-cells = <0>;
7139 + compatible = "ti,ina220";
7141 + shunt-resistor = <500>;
7146 #address-cells = <1>;
7148 @@ -132,7 +108,15 @@
7152 - status = "disabled";
7154 + flash0: s25fs512s@0 {
7155 + #address-cells = <1>;
7156 + #size-cells = <1>;
7157 + compatible = "spansion,m25p80";
7159 + spi-max-frequency = <20000000>;
7165 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
7166 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
7168 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7170 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
7174 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7176 - * This file is dual-licensed: you can use it either under the terms
7177 - * of the GPLv2 or the X11 license, at your option. Note that this dual
7178 - * licensing only applies to this file, and not this project as a
7181 - * a) This library is free software; you can redistribute it and/or
7182 - * modify it under the terms of the GNU General Public License as
7183 - * published by the Free Software Foundation; either version 2 of the
7184 - * License, or (at your option) any later version.
7186 - * This library is distributed in the hope that it will be useful,
7187 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
7188 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7189 - * GNU General Public License for more details.
7191 - * Or, alternatively,
7193 - * b) Permission is hereby granted, free of charge, to any person
7194 - * obtaining a copy of this software and associated documentation
7195 - * files (the "Software"), to deal in the Software without
7196 - * restriction, including without limitation the rights to use,
7197 - * copy, modify, merge, publish, distribute, sublicense, and/or
7198 - * sell copies of the Software, and to permit persons to whom the
7199 - * Software is furnished to do so, subject to the following
7202 - * The above copyright notice and this permission notice shall be
7203 - * included in all copies or substantial portions of the Software.
7205 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7206 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7207 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7208 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7209 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7210 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7211 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7212 - * OTHER DEALINGS IN THE SOFTWARE.
7215 #include <dt-bindings/thermal/thermal.h>
7216 @@ -111,13 +75,12 @@
7222 compatible = "arm,armv8-timer";
7223 interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
7224 <1 14 4>, /* Physical Non-Secure PPI, active-low */
7225 <1 11 4>, /* Virtual PPI, active-low */
7226 <1 10 4>; /* Hypervisor PPI, active-low */
7227 - fsl,erratum-a008585;
7232 #address-cells = <2>;
7235 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
7237 clockgen: clocking@1300000 {
7238 compatible = "fsl,ls2080a-clockgen";
7239 @@ -194,54 +158,7 @@
7240 #thermal-sensor-cells = <1>;
7244 - cpu_thermal: cpu-thermal {
7245 - polling-delay-passive = <1000>;
7246 - polling-delay = <5000>;
7248 - thermal-sensors = <&tmu 4>;
7251 - cpu_alert: cpu-alert {
7252 - temperature = <75000>;
7253 - hysteresis = <2000>;
7256 - cpu_crit: cpu-crit {
7257 - temperature = <85000>;
7258 - hysteresis = <2000>;
7259 - type = "critical";
7265 - trip = <&cpu_alert>;
7267 - <&cpu0 THERMAL_NO_LIMIT
7268 - THERMAL_NO_LIMIT>;
7271 - trip = <&cpu_alert>;
7273 - <&cpu2 THERMAL_NO_LIMIT
7274 - THERMAL_NO_LIMIT>;
7277 - trip = <&cpu_alert>;
7279 - <&cpu4 THERMAL_NO_LIMIT
7280 - THERMAL_NO_LIMIT>;
7283 - trip = <&cpu_alert>;
7285 - <&cpu6 THERMAL_NO_LIMIT
7286 - THERMAL_NO_LIMIT>;
7291 + #include "fsl-tmu.dtsi"
7293 serial0: serial@21c0500 {
7294 compatible = "fsl,ns16550", "ns16550a";
7296 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
7297 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
7298 msi-parent = <&its>;
7299 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
7301 #address-cells = <3>;
7305 compatible = "arm,mmu-500";
7306 reg = <0 0x5000000 0 0x800000>;
7307 #global-interrupts = <12>;
7308 + #iommu-cells = <1>;
7309 + stream-match-mask = <0x7C00>;
7310 interrupts = <0 13 4>, /* global secure fault */
7311 <0 14 4>, /* combined secure interrupt */
7312 <0 15 4>, /* global non-secure fault */
7314 <0 204 4>, <0 205 4>,
7315 <0 206 4>, <0 207 4>,
7316 <0 208 4>, <0 209 4>;
7317 - mmu-masters = <&fsl_mc 0x300 0>;
7320 dspi: dspi@2100000 {
7321 @@ -574,15 +494,126 @@
7322 #interrupt-cells = <2>;
7325 + /* TODO: WRIOP (CCSR?) */
7326 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
7327 + * E-MDIO1: 0x1_6000
7329 + compatible = "fsl,fman-memac-mdio";
7330 + reg = <0x0 0x8B96000 0x0 0x1000>;
7331 + device_type = "mdio"; /* TODO: is this necessary? */
7332 + little-endian; /* force the driver in LE mode */
7334 + /* Not necessary on the QDS, but needed on the RDB */
7335 + #address-cells = <1>;
7336 + #size-cells = <0>;
7339 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
7340 + * E-MDIO2: 0x1_7000
7342 + compatible = "fsl,fman-memac-mdio";
7343 + reg = <0x0 0x8B97000 0x0 0x1000>;
7344 + device_type = "mdio"; /* TODO: is this necessary? */
7345 + little-endian; /* force the driver in LE mode */
7347 + #address-cells = <1>;
7348 + #size-cells = <0>;
7351 + pcs_mdio1: mdio@0x8c07000 {
7352 + compatible = "fsl,fman-memac-mdio";
7353 + reg = <0x0 0x8c07000 0x0 0x1000>;
7354 + device_type = "mdio";
7357 + #address-cells = <1>;
7358 + #size-cells = <0>;
7361 + pcs_mdio2: mdio@0x8c0b000 {
7362 + compatible = "fsl,fman-memac-mdio";
7363 + reg = <0x0 0x8c0b000 0x0 0x1000>;
7364 + device_type = "mdio";
7367 + #address-cells = <1>;
7368 + #size-cells = <0>;
7371 + pcs_mdio3: mdio@0x8c0f000 {
7372 + compatible = "fsl,fman-memac-mdio";
7373 + reg = <0x0 0x8c0f000 0x0 0x1000>;
7374 + device_type = "mdio";
7377 + #address-cells = <1>;
7378 + #size-cells = <0>;
7381 + pcs_mdio4: mdio@0x8c13000 {
7382 + compatible = "fsl,fman-memac-mdio";
7383 + reg = <0x0 0x8c13000 0x0 0x1000>;
7384 + device_type = "mdio";
7387 + #address-cells = <1>;
7388 + #size-cells = <0>;
7391 + pcs_mdio5: mdio@0x8c17000 {
7392 + status = "disabled";
7393 + compatible = "fsl,fman-memac-mdio";
7394 + reg = <0x0 0x8c17000 0x0 0x1000>;
7395 + device_type = "mdio";
7398 + #address-cells = <1>;
7399 + #size-cells = <0>;
7402 + pcs_mdio6: mdio@0x8c1b000 {
7403 + status = "disabled";
7404 + compatible = "fsl,fman-memac-mdio";
7405 + reg = <0x0 0x8c1b000 0x0 0x1000>;
7406 + device_type = "mdio";
7409 + #address-cells = <1>;
7410 + #size-cells = <0>;
7413 + pcs_mdio7: mdio@0x8c1f000 {
7414 + status = "disabled";
7415 + compatible = "fsl,fman-memac-mdio";
7416 + reg = <0x0 0x8c1f000 0x0 0x1000>;
7417 + device_type = "mdio";
7420 + #address-cells = <1>;
7421 + #size-cells = <0>;
7424 + pcs_mdio8: mdio@0x8c23000 {
7425 + status = "disabled";
7426 + compatible = "fsl,fman-memac-mdio";
7427 + reg = <0x0 0x8c23000 0x0 0x1000>;
7428 + device_type = "mdio";
7431 + #address-cells = <1>;
7432 + #size-cells = <0>;
7436 status = "disabled";
7437 - compatible = "fsl,vf610-i2c";
7438 + compatible = "fsl,vf610-i2c", "fsl,ls208xa-vf610-i2c";
7439 #address-cells = <1>;
7441 reg = <0x0 0x2000000 0x0 0x10000>;
7442 interrupts = <0 34 0x4>; /* Level high type */
7443 clock-names = "i2c";
7444 - clocks = <&clockgen 4 3>;
7445 + clocks = <&clockgen 4 1>;
7446 + scl-gpios = <&gpio3 10 0>;
7451 reg = <0x0 0x2010000 0x0 0x10000>;
7452 interrupts = <0 34 0x4>; /* Level high type */
7453 clock-names = "i2c";
7454 - clocks = <&clockgen 4 3>;
7455 + clocks = <&clockgen 4 1>;
7460 reg = <0x0 0x2020000 0x0 0x10000>;
7461 interrupts = <0 35 0x4>; /* Level high type */
7462 clock-names = "i2c";
7463 - clocks = <&clockgen 4 3>;
7464 + clocks = <&clockgen 4 1>;
7469 reg = <0x0 0x2030000 0x0 0x10000>;
7470 interrupts = <0 35 0x4>; /* Level high type */
7471 clock-names = "i2c";
7472 - clocks = <&clockgen 4 3>;
7473 + clocks = <&clockgen 4 1>;
7478 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7480 reg-names = "regs", "config";
7481 - interrupts = <0 108 0x4>; /* Level high type */
7482 - interrupt-names = "intr";
7483 + interrupts = <0 108 0x4>; /* aer interrupt */
7484 + interrupt-names = "aer";
7485 #address-cells = <3>;
7487 device_type = "pci";
7488 @@ -657,20 +688,22 @@
7490 bus-range = <0x0 0xff>;
7491 msi-parent = <&its>;
7492 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7493 #interrupt-cells = <1>;
7494 interrupt-map-mask = <0 0 0 7>;
7495 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
7496 <0000 0 0 2 &gic 0 0 0 110 4>,
7497 <0000 0 0 3 &gic 0 0 0 111 4>,
7498 <0000 0 0 4 &gic 0 0 0 112 4>;
7499 + status = "disabled";
7502 pcie2: pcie@3500000 {
7503 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7505 reg-names = "regs", "config";
7506 - interrupts = <0 113 0x4>; /* Level high type */
7507 - interrupt-names = "intr";
7508 + interrupts = <0 113 0x4>; /* aer interrupt */
7509 + interrupt-names = "aer";
7510 #address-cells = <3>;
7512 device_type = "pci";
7513 @@ -678,20 +711,22 @@
7515 bus-range = <0x0 0xff>;
7516 msi-parent = <&its>;
7517 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7518 #interrupt-cells = <1>;
7519 interrupt-map-mask = <0 0 0 7>;
7520 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
7521 <0000 0 0 2 &gic 0 0 0 115 4>,
7522 <0000 0 0 3 &gic 0 0 0 116 4>,
7523 <0000 0 0 4 &gic 0 0 0 117 4>;
7524 + status = "disabled";
7527 pcie3: pcie@3600000 {
7528 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7530 reg-names = "regs", "config";
7531 - interrupts = <0 118 0x4>; /* Level high type */
7532 - interrupt-names = "intr";
7533 + interrupts = <0 118 0x4>; /* aer interrupt */
7534 + interrupt-names = "aer";
7535 #address-cells = <3>;
7537 device_type = "pci";
7538 @@ -699,20 +734,22 @@
7540 bus-range = <0x0 0xff>;
7541 msi-parent = <&its>;
7542 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7543 #interrupt-cells = <1>;
7544 interrupt-map-mask = <0 0 0 7>;
7545 interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
7546 <0000 0 0 2 &gic 0 0 0 120 4>,
7547 <0000 0 0 3 &gic 0 0 0 121 4>,
7548 <0000 0 0 4 &gic 0 0 0 122 4>;
7549 + status = "disabled";
7552 pcie4: pcie@3700000 {
7553 compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7555 reg-names = "regs", "config";
7556 - interrupts = <0 123 0x4>; /* Level high type */
7557 - interrupt-names = "intr";
7558 + interrupts = <0 123 0x4>; /* aer interrupt */
7559 + interrupt-names = "aer";
7560 #address-cells = <3>;
7562 device_type = "pci";
7563 @@ -720,12 +757,14 @@
7565 bus-range = <0x0 0xff>;
7566 msi-parent = <&its>;
7567 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
7568 #interrupt-cells = <1>;
7569 interrupt-map-mask = <0 0 0 7>;
7570 interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
7571 <0000 0 0 2 &gic 0 0 0 125 4>,
7572 <0000 0 0 3 &gic 0 0 0 126 4>,
7573 <0000 0 0 4 &gic 0 0 0 127 4>;
7574 + status = "disabled";
7577 sata0: sata@3200000 {
7580 snps,quirk-frame-length-adjustment = <0x20>;
7581 snps,dis_rxdet_inp3_quirk;
7582 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7583 + snps,host-vbus-glitches;
7586 usb1: usb3@3110000 {
7587 @@ -764,6 +805,14 @@
7589 snps,quirk-frame-length-adjustment = <0x20>;
7590 snps,dis_rxdet_inp3_quirk;
7591 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7592 + snps,host-vbus-glitches;
7595 + serdes1: serdes@1ea0000 {
7596 + compatible = "fsl,serdes-10g";
7597 + reg = <0x0 0x1ea0000 0 0x00002000>;
7602 @@ -771,6 +820,14 @@
7603 reg = <0x0 0x04000000 0x0 0x01000000>;
7604 interrupts = <0 12 4>;
7607 + ftm0: ftm0@2800000 {
7608 + compatible = "fsl,ls208xa-ftm-alarm";
7609 + reg = <0x0 0x2800000 0x0 0x10000>,
7610 + <0x0 0x1e34050 0x0 0x4>;
7611 + reg-names = "ftm", "pmctrl";
7612 + interrupts = <0 44 4>;
7616 ddr1: memory-controller@1080000 {
7617 @@ -786,4 +843,44 @@
7618 interrupts = <0 18 0x4>;
7624 + compatible = "linaro,optee-tz";
7630 +#include "fsl-tmu-map1.dtsi"
7631 +#include "fsl-tmu-map2.dtsi"
7632 +#include "fsl-tmu-map3.dtsi"
7663 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
7665 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
7667 +// Device Tree file for LX2160AQDS
7669 +// Copyright 2018 NXP
7673 +#include "fsl-lx2160a.dtsi"
7676 + model = "NXP Layerscape LX2160AQDS";
7677 + compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
7685 + stdout-path = "serial0:115200n8";
7688 + sb_3v3: regulator-sb3v3 {
7689 + compatible = "regulator-fixed";
7690 + regulator-name = "MC34717-3.3VSB";
7691 + regulator-min-microvolt = <3300000>;
7692 + regulator-max-microvolt = <3300000>;
7693 + regulator-boot-on;
7694 + regulator-always-on;
7698 + compatible = "mdio-mux-multiplexer";
7699 + mux-controls = <&mux 0>;
7700 + mdio-parent-bus = <&emdio1>;
7701 + #address-cells=<1>;
7702 + #size-cells = <0>;
7704 + mdio@0 { /* On-board PHY #1 RGMI1*/
7706 + #address-cells = <1>;
7707 + #size-cells = <0>;
7710 + mdio@8 { /* On-board PHY #2 RGMI2*/
7712 + #address-cells = <1>;
7713 + #size-cells = <0>;
7716 + mdio@18 { /* Slot #1 */
7718 + #address-cells = <1>;
7719 + #size-cells = <0>;
7722 + mdio@19 { /* Slot #2 */
7724 + #address-cells = <1>;
7725 + #size-cells = <0>;
7728 + mdio@1a { /* Slot #3 */
7730 + #address-cells = <1>;
7731 + #size-cells = <0>;
7734 + mdio@1b { /* Slot #4 */
7736 + #address-cells = <1>;
7737 + #size-cells = <0>;
7740 + mdio@1c { /* Slot #5 */
7742 + #address-cells = <1>;
7743 + #size-cells = <0>;
7746 + mdio@1d { /* Slot #6 */
7748 + #address-cells = <1>;
7749 + #size-cells = <0>;
7752 + mdio@1e { /* Slot #7 */
7754 + #address-cells = <1>;
7755 + #size-cells = <0>;
7758 + mdio@1f { /* Slot #8 */
7760 + #address-cells = <1>;
7761 + #size-cells = <0>;
7766 + compatible = "mdio-mux-multiplexer";
7767 + mux-controls = <&mux 1>;
7768 + mdio-parent-bus = <&emdio2>;
7769 + #address-cells=<1>;
7770 + #size-cells = <0>;
7772 + mdio@0 { /* Slot #1 (secondary EMI) */
7774 + #address-cells = <1>;
7775 + #size-cells = <0>;
7778 + mdio@1 { /* Slot #2 (secondary EMI) */
7780 + #address-cells = <1>;
7781 + #size-cells = <0>;
7784 + mdio@2 { /* Slot #3 (secondary EMI) */
7786 + #address-cells = <1>;
7787 + #size-cells = <0>;
7790 + mdio@3 { /* Slot #4 (secondary EMI) */
7792 + #address-cells = <1>;
7793 + #size-cells = <0>;
7796 + mdio@4 { /* Slot #5 (secondary EMI) */
7798 + #address-cells = <1>;
7799 + #size-cells = <0>;
7802 + mdio@5 { /* Slot #6 (secondary EMI) */
7804 + #address-cells = <1>;
7805 + #size-cells = <0>;
7808 + mdio@6 { /* Slot #7 (secondary EMI) */
7810 + #address-cells = <1>;
7811 + #size-cells = <0>;
7814 + mdio@7 { /* Slot #8 (secondary EMI) */
7816 + #address-cells = <1>;
7817 + #size-cells = <0>;
7829 + dflash0: flash@0 {
7830 + #address-cells = <1>;
7831 + #size-cells = <1>;
7832 + compatible = "jedec,spi-nor";
7834 + spi-max-frequency = <1000000>;
7841 + dflash1: flash@0 {
7842 + #address-cells = <1>;
7843 + #size-cells = <1>;
7844 + compatible = "jedec,spi-nor";
7846 + spi-max-frequency = <1000000>;
7853 + dflash2: flash@0 {
7854 + #address-cells = <1>;
7855 + #size-cells = <1>;
7856 + compatible = "jedec,spi-nor";
7858 + spi-max-frequency = <1000000>;
7882 + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
7886 + mux: mux-controller {
7887 + compatible = "reg-mux";
7888 + #mux-control-cells = <1>;
7889 + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
7890 + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
7895 + compatible = "nxp,pca9547";
7897 + #address-cells = <1>;
7898 + #size-cells = <0>;
7901 + #address-cells = <1>;
7902 + #size-cells = <0>;
7905 + power-monitor@40 {
7906 + compatible = "ti,ina220";
7908 + shunt-resistor = <500>;
7911 + power-monitor@41 {
7912 + compatible = "ti,ina220";
7914 + shunt-resistor = <1000>;
7919 + #address-cells = <1>;
7920 + #size-cells = <0>;
7923 + temperature-sensor@4c {
7924 + compatible = "nxp,sa56004";
7926 + vcc-supply = <&sb_3v3>;
7929 + temperature-sensor@4d {
7930 + compatible = "nxp,sa56004";
7932 + vcc-supply = <&sb_3v3>;
7936 + compatible = "nxp,pcf2129";
7960 + pcs_phy1: ethernet-phy@0 {
7961 + compatible = "ethernet-phy-ieee802.3-c45";
7962 + backplane-mode = "40gbase-kr";
7964 + fsl,lane-handle = <&serdes1>;
7965 + fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */
7970 + pcs_phy2: ethernet-phy@0 {
7971 + compatible = "ethernet-phy-ieee802.3-c45";
7972 + backplane-mode = "40gbase-kr";
7974 + fsl,lane-handle = <&serdes1>;
7975 + fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */
7980 + pcs_phy3: ethernet-phy@0 {
7981 + compatible = "ethernet-phy-ieee802.3-c45";
7982 + backplane-mode = "10gbase-kr";
7984 + fsl,lane-handle = <&serdes1>;
7985 + fsl,lane-reg = <0xF00 0x100>; /* lane H */
7990 + pcs_phy4: ethernet-phy@0 {
7991 + compatible = "ethernet-phy-ieee802.3-c45";
7992 + backplane-mode = "10gbase-kr";
7994 + fsl,lane-handle = <&serdes1>;
7995 + fsl,lane-reg = <0xE00 0x100>; /* lane G */
7999 +/* Update DPMAC connections to 40G backplane PHYs
8001 + * phy-handle = <&pcs_phy1>;
8005 + * phy-handle = <&pcs_phy2>;
8009 +/* Update DPMAC connections to 10G backplane PHYs
8011 + * phy-handle = <&pcs_phy3>;
8015 + * phy-handle = <&pcs_phy4>;
8019 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
8021 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
8023 +// Device Tree file for LX2160ARDB
8025 +// Copyright 2018 NXP
8029 +#include "fsl-lx2160a.dtsi"
8032 + model = "NXP Layerscape LX2160ARDB";
8033 + compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
8041 + stdout-path = "serial0:115200n8";
8044 + sb_3v3: regulator-sb3v3 {
8045 + compatible = "regulator-fixed";
8046 + regulator-name = "MC34717-3.3VSB";
8047 + regulator-min-microvolt = <3300000>;
8048 + regulator-max-microvolt = <3300000>;
8049 + regulator-boot-on;
8050 + regulator-always-on;
8085 + compatible = "nxp,pca9547";
8087 + #address-cells = <1>;
8088 + #size-cells = <0>;
8091 + #address-cells = <1>;
8092 + #size-cells = <0>;
8095 + power-monitor@40 {
8096 + compatible = "ti,ina220";
8098 + shunt-resistor = <1000>;
8103 + #address-cells = <1>;
8104 + #size-cells = <0>;
8107 + temperature-sensor@4c {
8108 + compatible = "nxp,sa56004";
8110 + vcc-supply = <&sb_3v3>;
8113 + temperature-sensor@4d {
8114 + compatible = "nxp,sa56004";
8116 + vcc-supply = <&sb_3v3>;
8126 + compatible = "nxp,pcf2129";
8129 + interrupts = <0 150 0x4>;
8135 + nxp,fspi-has-second-chip;
8136 + flash0: mt35xu512aba@0 {
8137 + #address-cells = <1>;
8138 + #size-cells = <1>;
8139 + compatible = "micron,m25p80";
8141 + spi-max-frequency = <50000000>;
8143 + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
8144 + spi-rx-bus-width = <8>;
8145 + spi-tx-bus-width = <1>;
8148 + flash1: mt35xu512aba@1 {
8149 + #address-cells = <1>;
8150 + #size-cells = <1>;
8151 + compatible = "micron,m25p80";
8153 + spi-max-frequency = <50000000>;
8155 + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
8156 + spi-rx-bus-width = <8>;
8157 + spi-tx-bus-width = <1>;
8178 + rgmii_phy1: ethernet-phy@1 {
8179 + /* AR8035 PHY - "compatible" property not strictly needed */
8180 + compatible = "ethernet-phy-id004d.d072";
8182 + /* Poll mode - no "interrupts" property defined */
8184 + rgmii_phy2: ethernet-phy@2 {
8185 + /* AR8035 PHY - "compatible" property not strictly needed */
8186 + compatible = "ethernet-phy-id004d.d072";
8188 + /* Poll mode - no "interrupts" property defined */
8190 + aquantia_phy1: ethernet-phy@4 {
8191 + /* AQR107 PHY - "compatible" property not strictly needed */
8192 + compatible = "ethernet-phy-ieee802.3-c45";
8194 + /* Poll mode - no "interrupts" property defined */
8196 + aquantia_phy2: ethernet-phy@5 {
8197 + /* AQR107 PHY - "compatible" property not strictly needed */
8198 + compatible = "ethernet-phy-ieee802.3-c45";
8200 + /* Poll mode - no "interrupts" property defined */
8205 + inphi_phy: ethernet-phy@0 {
8206 + compatible = "ethernet-phy-id0210.7440";
8212 + phy-handle = <&aquantia_phy1>;
8213 + phy-connection-type = "xgmii";
8217 + phy-handle = <&aquantia_phy2>;
8218 + phy-connection-type = "xgmii";
8222 + phy-handle = <&inphi_phy>;
8226 + phy-handle = <&inphi_phy>;
8230 + phy-handle = <&rgmii_phy1>;
8231 + phy-connection-type = "rgmii-id";
8235 + phy-handle = <&rgmii_phy2>;
8236 + phy-connection-type = "rgmii-id";
8255 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
8257 +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
8259 +// Device Tree Include file for Layerscape-LX2160A family SoC.
8261 +// Copyright 2018 NXP
8263 +#include <dt-bindings/gpio/gpio.h>
8264 +#include <dt-bindings/interrupt-controller/arm-gic.h>
8266 +/memreserve/ 0x80000000 0x00010000;
8269 + compatible = "fsl,lx2160a";
8270 + interrupt-parent = <&gic>;
8271 + #address-cells = <2>;
8272 + #size-cells = <2>;
8275 + #address-cells = <1>;
8276 + #size-cells = <0>;
8278 + // 8 clusters having 2 Cortex-A72 cores each
8280 + device_type = "cpu";
8281 + compatible = "arm,cortex-a72";
8282 + enable-method = "psci";
8284 + clocks = <&clockgen 1 0>;
8285 + d-cache-size = <0x8000>;
8286 + d-cache-line-size = <64>;
8287 + d-cache-sets = <128>;
8288 + i-cache-size = <0xC000>;
8289 + i-cache-line-size = <64>;
8290 + i-cache-sets = <192>;
8291 + next-level-cache = <&cluster0_l2>;
8295 + device_type = "cpu";
8296 + compatible = "arm,cortex-a72";
8297 + enable-method = "psci";
8299 + clocks = <&clockgen 1 0>;
8300 + d-cache-size = <0x8000>;
8301 + d-cache-line-size = <64>;
8302 + d-cache-sets = <128>;
8303 + i-cache-size = <0xC000>;
8304 + i-cache-line-size = <64>;
8305 + i-cache-sets = <192>;
8306 + next-level-cache = <&cluster0_l2>;
8310 + device_type = "cpu";
8311 + compatible = "arm,cortex-a72";
8312 + enable-method = "psci";
8314 + clocks = <&clockgen 1 1>;
8315 + d-cache-size = <0x8000>;
8316 + d-cache-line-size = <64>;
8317 + d-cache-sets = <128>;
8318 + i-cache-size = <0xC000>;
8319 + i-cache-line-size = <64>;
8320 + i-cache-sets = <192>;
8321 + next-level-cache = <&cluster1_l2>;
8325 + device_type = "cpu";
8326 + compatible = "arm,cortex-a72";
8327 + enable-method = "psci";
8329 + clocks = <&clockgen 1 1>;
8330 + d-cache-size = <0x8000>;
8331 + d-cache-line-size = <64>;
8332 + d-cache-sets = <128>;
8333 + i-cache-size = <0xC000>;
8334 + i-cache-line-size = <64>;
8335 + i-cache-sets = <192>;
8336 + next-level-cache = <&cluster1_l2>;
8340 + device_type = "cpu";
8341 + compatible = "arm,cortex-a72";
8342 + enable-method = "psci";
8344 + clocks = <&clockgen 1 2>;
8345 + d-cache-size = <0x8000>;
8346 + d-cache-line-size = <64>;
8347 + d-cache-sets = <128>;
8348 + i-cache-size = <0xC000>;
8349 + i-cache-line-size = <64>;
8350 + i-cache-sets = <192>;
8351 + next-level-cache = <&cluster2_l2>;
8355 + device_type = "cpu";
8356 + compatible = "arm,cortex-a72";
8357 + enable-method = "psci";
8359 + clocks = <&clockgen 1 2>;
8360 + d-cache-size = <0x8000>;
8361 + d-cache-line-size = <64>;
8362 + d-cache-sets = <128>;
8363 + i-cache-size = <0xC000>;
8364 + i-cache-line-size = <64>;
8365 + i-cache-sets = <192>;
8366 + next-level-cache = <&cluster2_l2>;
8370 + device_type = "cpu";
8371 + compatible = "arm,cortex-a72";
8372 + enable-method = "psci";
8374 + clocks = <&clockgen 1 3>;
8375 + d-cache-size = <0x8000>;
8376 + d-cache-line-size = <64>;
8377 + d-cache-sets = <128>;
8378 + i-cache-size = <0xC000>;
8379 + i-cache-line-size = <64>;
8380 + i-cache-sets = <192>;
8381 + next-level-cache = <&cluster3_l2>;
8385 + device_type = "cpu";
8386 + compatible = "arm,cortex-a72";
8387 + enable-method = "psci";
8389 + clocks = <&clockgen 1 3>;
8390 + d-cache-size = <0x8000>;
8391 + d-cache-line-size = <64>;
8392 + d-cache-sets = <128>;
8393 + i-cache-size = <0xC000>;
8394 + i-cache-line-size = <64>;
8395 + i-cache-sets = <192>;
8396 + next-level-cache = <&cluster3_l2>;
8400 + device_type = "cpu";
8401 + compatible = "arm,cortex-a72";
8402 + enable-method = "psci";
8404 + clocks = <&clockgen 1 4>;
8405 + d-cache-size = <0x8000>;
8406 + d-cache-line-size = <64>;
8407 + d-cache-sets = <128>;
8408 + i-cache-size = <0xC000>;
8409 + i-cache-line-size = <64>;
8410 + i-cache-sets = <192>;
8411 + next-level-cache = <&cluster4_l2>;
8415 + device_type = "cpu";
8416 + compatible = "arm,cortex-a72";
8417 + enable-method = "psci";
8419 + clocks = <&clockgen 1 4>;
8420 + d-cache-size = <0x8000>;
8421 + d-cache-line-size = <64>;
8422 + d-cache-sets = <128>;
8423 + i-cache-size = <0xC000>;
8424 + i-cache-line-size = <64>;
8425 + i-cache-sets = <192>;
8426 + next-level-cache = <&cluster4_l2>;
8430 + device_type = "cpu";
8431 + compatible = "arm,cortex-a72";
8432 + enable-method = "psci";
8434 + clocks = <&clockgen 1 5>;
8435 + d-cache-size = <0x8000>;
8436 + d-cache-line-size = <64>;
8437 + d-cache-sets = <128>;
8438 + i-cache-size = <0xC000>;
8439 + i-cache-line-size = <64>;
8440 + i-cache-sets = <192>;
8441 + next-level-cache = <&cluster5_l2>;
8445 + device_type = "cpu";
8446 + compatible = "arm,cortex-a72";
8447 + enable-method = "psci";
8449 + clocks = <&clockgen 1 5>;
8450 + d-cache-size = <0x8000>;
8451 + d-cache-line-size = <64>;
8452 + d-cache-sets = <128>;
8453 + i-cache-size = <0xC000>;
8454 + i-cache-line-size = <64>;
8455 + i-cache-sets = <192>;
8456 + next-level-cache = <&cluster5_l2>;
8460 + device_type = "cpu";
8461 + compatible = "arm,cortex-a72";
8462 + enable-method = "psci";
8464 + clocks = <&clockgen 1 6>;
8465 + d-cache-size = <0x8000>;
8466 + d-cache-line-size = <64>;
8467 + d-cache-sets = <128>;
8468 + i-cache-size = <0xC000>;
8469 + i-cache-line-size = <64>;
8470 + i-cache-sets = <192>;
8471 + next-level-cache = <&cluster6_l2>;
8475 + device_type = "cpu";
8476 + compatible = "arm,cortex-a72";
8477 + enable-method = "psci";
8479 + clocks = <&clockgen 1 6>;
8480 + d-cache-size = <0x8000>;
8481 + d-cache-line-size = <64>;
8482 + d-cache-sets = <128>;
8483 + i-cache-size = <0xC000>;
8484 + i-cache-line-size = <64>;
8485 + i-cache-sets = <192>;
8486 + next-level-cache = <&cluster6_l2>;
8490 + device_type = "cpu";
8491 + compatible = "arm,cortex-a72";
8492 + enable-method = "psci";
8494 + clocks = <&clockgen 1 7>;
8495 + d-cache-size = <0x8000>;
8496 + d-cache-line-size = <64>;
8497 + d-cache-sets = <128>;
8498 + i-cache-size = <0xC000>;
8499 + i-cache-line-size = <64>;
8500 + i-cache-sets = <192>;
8501 + next-level-cache = <&cluster7_l2>;
8505 + device_type = "cpu";
8506 + compatible = "arm,cortex-a72";
8507 + enable-method = "psci";
8509 + clocks = <&clockgen 1 7>;
8510 + d-cache-size = <0x8000>;
8511 + d-cache-line-size = <64>;
8512 + d-cache-sets = <128>;
8513 + i-cache-size = <0xC000>;
8514 + i-cache-line-size = <64>;
8515 + i-cache-sets = <192>;
8516 + next-level-cache = <&cluster7_l2>;
8519 + cluster0_l2: l2-cache0 {
8520 + compatible = "cache";
8521 + cache-size = <0x100000>;
8522 + cache-line-size = <64>;
8523 + cache-sets = <1024>;
8524 + cache-level = <2>;
8527 + cluster1_l2: l2-cache1 {
8528 + compatible = "cache";
8529 + cache-size = <0x100000>;
8530 + cache-line-size = <64>;
8531 + cache-sets = <1024>;
8532 + cache-level = <2>;
8535 + cluster2_l2: l2-cache2 {
8536 + compatible = "cache";
8537 + cache-size = <0x100000>;
8538 + cache-line-size = <64>;
8539 + cache-sets = <1024>;
8540 + cache-level = <2>;
8543 + cluster3_l2: l2-cache3 {
8544 + compatible = "cache";
8545 + cache-size = <0x100000>;
8546 + cache-line-size = <64>;
8547 + cache-sets = <1024>;
8548 + cache-level = <2>;
8551 + cluster4_l2: l2-cache4 {
8552 + compatible = "cache";
8553 + cache-size = <0x100000>;
8554 + cache-line-size = <64>;
8555 + cache-sets = <1024>;
8556 + cache-level = <2>;
8559 + cluster5_l2: l2-cache5 {
8560 + compatible = "cache";
8561 + cache-size = <0x100000>;
8562 + cache-line-size = <64>;
8563 + cache-sets = <1024>;
8564 + cache-level = <2>;
8567 + cluster6_l2: l2-cache6 {
8568 + compatible = "cache";
8569 + cache-size = <0x100000>;
8570 + cache-line-size = <64>;
8571 + cache-sets = <1024>;
8572 + cache-level = <2>;
8575 + cluster7_l2: l2-cache7 {
8576 + compatible = "cache";
8577 + cache-size = <0x100000>;
8578 + cache-line-size = <64>;
8579 + cache-sets = <1024>;
8580 + cache-level = <2>;
8584 + gic: interrupt-controller@6000000 {
8585 + compatible = "arm,gic-v3";
8586 + reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
8587 + <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
8589 + <0x0 0x0c0c0000 0 0x2000>, // GICC
8590 + <0x0 0x0c0d0000 0 0x1000>, // GICH
8591 + <0x0 0x0c0e0000 0 0x20000>; // GICV
8592 + #interrupt-cells = <3>;
8593 + #address-cells = <2>;
8594 + #size-cells = <2>;
8596 + interrupt-controller;
8597 + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
8599 + its: gic-its@6020000 {
8600 + compatible = "arm,gic-v3-its";
8602 + reg = <0x0 0x6020000 0 0x20000>;
8607 + compatible = "arm,armv8-timer";
8608 + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
8609 + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
8610 + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
8611 + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
8615 + compatible = "arm,cortex-a72-pmu";
8616 + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
8620 + compatible = "arm,psci-0.2";
8625 + // DRAM space - 1, size : 2 GB DRAM
8626 + device_type = "memory";
8627 + reg = <0x00000000 0x80000000 0 0x80000000>;
8630 + ddr1: memory-controller@1080000 {
8631 + compatible = "fsl,qoriq-memory-controller";
8632 + reg = <0x0 0x1080000 0x0 0x1000>;
8633 + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
8637 + ddr2: memory-controller@1090000 {
8638 + compatible = "fsl,qoriq-memory-controller";
8639 + reg = <0x0 0x1090000 0x0 0x1000>;
8640 + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
8645 + compatible = "fixed-clock";
8646 + #clock-cells = <0>;
8647 + clock-frequency = <100000000>;
8648 + clock-output-names = "sysclk";
8652 + compatible = "simple-bus";
8653 + #address-cells = <2>;
8654 + #size-cells = <2>;
8656 + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
8658 + crypto: crypto@8000000 {
8659 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
8660 + fsl,sec-era = <10>;
8661 + #address-cells = <1>;
8662 + #size-cells = <1>;
8663 + ranges = <0x0 0x00 0x8000000 0x100000>;
8664 + reg = <0x00 0x8000000 0x0 0x100000>;
8665 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
8667 + status = "disabled";
8669 + sec_jr0: jr@10000 {
8670 + compatible = "fsl,sec-v5.0-job-ring",
8671 + "fsl,sec-v4.0-job-ring";
8672 + reg = <0x10000 0x10000>;
8673 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
8676 + sec_jr1: jr@20000 {
8677 + compatible = "fsl,sec-v5.0-job-ring",
8678 + "fsl,sec-v4.0-job-ring";
8679 + reg = <0x20000 0x10000>;
8680 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
8683 + sec_jr2: jr@30000 {
8684 + compatible = "fsl,sec-v5.0-job-ring",
8685 + "fsl,sec-v4.0-job-ring";
8686 + reg = <0x30000 0x10000>;
8687 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
8690 + sec_jr3: jr@40000 {
8691 + compatible = "fsl,sec-v5.0-job-ring",
8692 + "fsl,sec-v4.0-job-ring";
8693 + reg = <0x40000 0x10000>;
8694 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
8698 + clockgen: clock-controller@1300000 {
8699 + compatible = "fsl,lx2160a-clockgen";
8700 + reg = <0 0x1300000 0 0xa0000>;
8701 + #clock-cells = <2>;
8702 + clocks = <&sysclk>;
8705 + dcfg: syscon@1e00000 {
8706 + compatible = "fsl,lx2160a-dcfg", "syscon";
8707 + reg = <0x0 0x1e00000 0x0 0x10000>;
8711 + /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
8712 + emdio1: mdio@8b96000 {
8713 + compatible = "fsl,fman-memac-mdio";
8714 + reg = <0x0 0x8b96000 0x0 0x1000>;
8715 + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
8716 + #address-cells = <1>;
8717 + #size-cells = <0>;
8718 + little-endian; /* force the driver in LE mode */
8719 + status = "disabled";
8722 + /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */
8723 + emdio2: mdio@8b97000 {
8724 + compatible = "fsl,fman-memac-mdio";
8725 + reg = <0x0 0x8b97000 0x0 0x1000>;
8726 + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
8727 + #address-cells = <1>;
8728 + #size-cells = <0>;
8729 + little-endian; /* force the driver in LE mode */
8730 + status = "disabled";
8733 + pcs_mdio1: mdio@0x8c07000 {
8734 + compatible = "fsl,fman-memac-mdio";
8735 + reg = <0x0 0x8c07000 0x0 0x1000>;
8736 + device_type = "mdio";
8739 + #address-cells = <1>;
8740 + #size-cells = <0>;
8743 + pcs_mdio2: mdio@0x8c0b000 {
8744 + compatible = "fsl,fman-memac-mdio";
8745 + reg = <0x0 0x8c0b000 0x0 0x1000>;
8746 + device_type = "mdio";
8749 + #address-cells = <1>;
8750 + #size-cells = <0>;
8753 + pcs_mdio3: mdio@0x8c0f000 {
8754 + compatible = "fsl,fman-memac-mdio";
8755 + reg = <0x0 0x8c0f000 0x0 0x1000>;
8756 + device_type = "mdio";
8759 + #address-cells = <1>;
8760 + #size-cells = <0>;
8763 + pcs_mdio4: mdio@0x8c13000 {
8764 + compatible = "fsl,fman-memac-mdio";
8765 + reg = <0x0 0x8c13000 0x0 0x1000>;
8766 + device_type = "mdio";
8769 + #address-cells = <1>;
8770 + #size-cells = <0>;
8773 + pcs_mdio5: mdio@0x8c17000 {
8774 + compatible = "fsl,fman-memac-mdio";
8775 + reg = <0x0 0x8c17000 0x0 0x1000>;
8776 + device_type = "mdio";
8779 + #address-cells = <1>;
8780 + #size-cells = <0>;
8783 + pcs_mdio6: mdio@0x8c1b000 {
8784 + compatible = "fsl,fman-memac-mdio";
8785 + reg = <0x0 0x8c1b000 0x0 0x1000>;
8786 + device_type = "mdio";
8789 + #address-cells = <1>;
8790 + #size-cells = <0>;
8793 + pcs_mdio7: mdio@0x8c1f000 {
8794 + compatible = "fsl,fman-memac-mdio";
8795 + reg = <0x0 0x8c1f000 0x0 0x1000>;
8796 + device_type = "mdio";
8799 + #address-cells = <1>;
8800 + #size-cells = <0>;
8803 + pcs_mdio8: mdio@0x8c23000 {
8804 + compatible = "fsl,fman-memac-mdio";
8805 + reg = <0x0 0x8c23000 0x0 0x1000>;
8806 + device_type = "mdio";
8809 + #address-cells = <1>;
8810 + #size-cells = <0>;
8813 + serdes1: serdes@1ea0000 {
8814 + compatible = "fsl,serdes-28g";
8815 + reg = <0x0 0x1ea0000 0 0x00002000>;
8819 + i2c0: i2c@2000000 {
8820 + compatible = "fsl,vf610-i2c";
8821 + #address-cells = <1>;
8822 + #size-cells = <0>;
8823 + reg = <0x0 0x2000000 0x0 0x10000>;
8824 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
8825 + clock-names = "i2c";
8826 + clocks = <&clockgen 4 7>;
8827 + scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
8828 + status = "disabled";
8831 + i2c1: i2c@2010000 {
8832 + compatible = "fsl,vf610-i2c";
8833 + #address-cells = <1>;
8834 + #size-cells = <0>;
8835 + reg = <0x0 0x2010000 0x0 0x10000>;
8836 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
8837 + clock-names = "i2c";
8838 + clocks = <&clockgen 4 7>;
8839 + status = "disabled";
8842 + i2c2: i2c@2020000 {
8843 + compatible = "fsl,vf610-i2c";
8844 + #address-cells = <1>;
8845 + #size-cells = <0>;
8846 + reg = <0x0 0x2020000 0x0 0x10000>;
8847 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
8848 + clock-names = "i2c";
8849 + clocks = <&clockgen 4 7>;
8850 + status = "disabled";
8853 + i2c3: i2c@2030000 {
8854 + compatible = "fsl,vf610-i2c";
8855 + #address-cells = <1>;
8856 + #size-cells = <0>;
8857 + reg = <0x0 0x2030000 0x0 0x10000>;
8858 + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
8859 + clock-names = "i2c";
8860 + clocks = <&clockgen 4 7>;
8861 + status = "disabled";
8864 + i2c4: i2c@2040000 {
8865 + compatible = "fsl,vf610-i2c";
8866 + #address-cells = <1>;
8867 + #size-cells = <0>;
8868 + reg = <0x0 0x2040000 0x0 0x10000>;
8869 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8870 + clock-names = "i2c";
8871 + clocks = <&clockgen 4 7>;
8872 + scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
8873 + status = "disabled";
8876 + i2c5: i2c@2050000 {
8877 + compatible = "fsl,vf610-i2c";
8878 + #address-cells = <1>;
8879 + #size-cells = <0>;
8880 + reg = <0x0 0x2050000 0x0 0x10000>;
8881 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8882 + clock-names = "i2c";
8883 + clocks = <&clockgen 4 7>;
8884 + status = "disabled";
8887 + i2c6: i2c@2060000 {
8888 + compatible = "fsl,vf610-i2c";
8889 + #address-cells = <1>;
8890 + #size-cells = <0>;
8891 + reg = <0x0 0x2060000 0x0 0x10000>;
8892 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
8893 + clock-names = "i2c";
8894 + clocks = <&clockgen 4 7>;
8895 + status = "disabled";
8898 + i2c7: i2c@2070000 {
8899 + compatible = "fsl,vf610-i2c";
8900 + #address-cells = <1>;
8901 + #size-cells = <0>;
8902 + reg = <0x0 0x2070000 0x0 0x10000>;
8903 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
8904 + clock-names = "i2c";
8905 + clocks = <&clockgen 4 7>;
8906 + status = "disabled";
8909 + dspi0: spi@2100000 {
8910 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8911 + #address-cells = <1>;
8912 + #size-cells = <0>;
8913 + reg = <0x0 0x2100000 0x0 0x10000>;
8914 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
8915 + clocks = <&clockgen 4 7>;
8916 + clock-names = "dspi";
8917 + spi-num-chipselects = <5>;
8919 + status = "disabled";
8922 + dspi1: spi@2110000 {
8923 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8924 + #address-cells = <1>;
8925 + #size-cells = <0>;
8926 + reg = <0x0 0x2110000 0x0 0x10000>;
8927 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
8928 + clocks = <&clockgen 4 7>;
8929 + clock-names = "dspi";
8930 + spi-num-chipselects = <5>;
8932 + status = "disabled";
8935 + dspi2: spi@2120000 {
8936 + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
8937 + #address-cells = <1>;
8938 + #size-cells = <0>;
8939 + reg = <0x0 0x2120000 0x0 0x10000>;
8940 + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
8941 + clocks = <&clockgen 4 7>;
8942 + clock-names = "dspi";
8943 + spi-num-chipselects = <5>;
8945 + status = "disabled";
8948 + esdhc0: esdhc@2140000 {
8949 + compatible = "fsl,esdhc";
8950 + reg = <0x0 0x2140000 0x0 0x10000>;
8951 + interrupts = <0 28 0x4>; /* Level high type */
8952 + clocks = <&clockgen 4 1>;
8953 + voltage-ranges = <1800 1800 3300 3300>;
8957 + status = "disabled";
8960 + esdhc1: esdhc@2150000 {
8961 + compatible = "fsl,esdhc";
8962 + reg = <0x0 0x2150000 0x0 0x10000>;
8963 + interrupts = <0 63 0x4>; /* Level high type */
8964 + clocks = <&clockgen 4 1>;
8965 + voltage-ranges = <1800 1800 3300 3300>;
8970 + status = "disabled";
8973 + uart0: serial@21c0000 {
8974 + compatible = "arm,sbsa-uart","arm,pl011";
8975 + reg = <0x0 0x21c0000 0x0 0x1000>;
8976 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
8977 + current-speed = <115200>;
8978 + status = "disabled";
8981 + uart1: serial@21d0000 {
8982 + compatible = "arm,sbsa-uart","arm,pl011";
8983 + reg = <0x0 0x21d0000 0x0 0x1000>;
8984 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
8985 + current-speed = <115200>;
8986 + status = "disabled";
8989 + uart2: serial@21e0000 {
8990 + compatible = "arm,sbsa-uart","arm,pl011";
8991 + reg = <0x0 0x21e0000 0x0 0x1000>;
8992 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
8993 + current-speed = <115200>;
8994 + status = "disabled";
8997 + uart3: serial@21f0000 {
8998 + compatible = "arm,sbsa-uart","arm,pl011";
8999 + reg = <0x0 0x21f0000 0x0 0x1000>;
9000 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
9001 + current-speed = <115200>;
9002 + status = "disabled";
9005 + gpio0: gpio@2300000 {
9006 + compatible = "fsl,qoriq-gpio";
9007 + reg = <0x0 0x2300000 0x0 0x10000>;
9008 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
9011 + #gpio-cells = <2>;
9012 + interrupt-controller;
9013 + #interrupt-cells = <2>;
9016 + gpio1: gpio@2310000 {
9017 + compatible = "fsl,qoriq-gpio";
9018 + reg = <0x0 0x2310000 0x0 0x10000>;
9019 + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
9022 + #gpio-cells = <2>;
9023 + interrupt-controller;
9024 + #interrupt-cells = <2>;
9027 + gpio2: gpio@2320000 {
9028 + compatible = "fsl,qoriq-gpio";
9029 + reg = <0x0 0x2320000 0x0 0x10000>;
9030 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
9033 + #gpio-cells = <2>;
9034 + interrupt-controller;
9035 + #interrupt-cells = <2>;
9038 + gpio3: gpio@2330000 {
9039 + compatible = "fsl,qoriq-gpio";
9040 + reg = <0x0 0x2330000 0x0 0x10000>;
9041 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
9044 + #gpio-cells = <2>;
9045 + interrupt-controller;
9046 + #interrupt-cells = <2>;
9049 + watchdog@23a0000 {
9050 + compatible = "arm,sbsa-gwdt";
9051 + reg = <0x0 0x23a0000 0 0x1000>,
9052 + <0x0 0x2390000 0 0x1000>;
9053 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
9054 + timeout-sec = <30>;
9057 + ftm0: ftm0@2800000 {
9058 + compatible = "fsl,ftm-alarm", "fsl,lx2160a-ftm-alarm";
9059 + reg = <0x0 0x2800000 0x0 0x10000>,
9060 + <0x0 0x1e34050 0x0 0x4>;
9061 + reg-names = "ftm", "FlexTimer1";
9062 + interrupts = <0 44 0x4>;
9066 + usb0: usb@3100000 {
9067 + compatible = "snps,dwc3";
9068 + reg = <0x0 0x3100000 0x0 0x10000>;
9069 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
9071 + snps,quirk-frame-length-adjustment = <0x20>;
9072 + snps,dis_rxdet_inp3_quirk;
9073 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
9074 + snps,host-vbus-glitches;
9075 + status = "disabled";
9078 + usb1: usb@3110000 {
9079 + compatible = "snps,dwc3";
9080 + reg = <0x0 0x3110000 0x0 0x10000>;
9081 + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
9083 + snps,quirk-frame-length-adjustment = <0x20>;
9084 + snps,dis_rxdet_inp3_quirk;
9085 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
9086 + snps,host-vbus-glitches;
9087 + status = "disabled";
9090 + smmu: iommu@5000000 {
9091 + compatible = "arm,mmu-500";
9092 + reg = <0 0x5000000 0 0x800000>;
9093 + #iommu-cells = <1>;
9094 + #global-interrupts = <14>;
9095 + // global secure fault
9096 + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
9097 + // combined secure
9098 + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
9099 + // global non-secure fault
9100 + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
9101 + // combined non-secure
9102 + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
9103 + // performance counter interrupts 0-9
9104 + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
9105 + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
9106 + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
9107 + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
9108 + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
9109 + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
9110 + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
9111 + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
9112 + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
9113 + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
9114 + // per context interrupt, 64 interrupts
9115 + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
9116 + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
9117 + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
9118 + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
9119 + <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
9120 + <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
9121 + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
9122 + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
9123 + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
9124 + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
9125 + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
9126 + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
9127 + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
9128 + <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
9129 + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
9130 + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
9131 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
9132 + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
9133 + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
9134 + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
9135 + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
9136 + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
9137 + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
9138 + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
9139 + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
9140 + <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
9141 + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
9142 + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
9143 + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
9144 + <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
9145 + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
9146 + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
9147 + <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
9148 + <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
9149 + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
9150 + <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
9151 + <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
9152 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
9153 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
9154 + <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
9155 + <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
9156 + <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
9157 + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
9158 + <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
9159 + <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
9160 + <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
9161 + <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
9162 + <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
9163 + <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
9164 + <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
9165 + <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
9166 + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
9167 + <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
9168 + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
9169 + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
9170 + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
9171 + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
9172 + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
9173 + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
9174 + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
9175 + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
9176 + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
9177 + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
9178 + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
9182 + fsl_mc: fsl-mc@80c000000 {
9183 + compatible = "fsl,qoriq-mc";
9184 + reg = <0x00000008 0x0c000000 0 0x40>,
9185 + <0x00000000 0x08340000 0 0x40000>;
9186 + msi-parent = <&its>;
9187 + /* iommu-map property is fixed up by u-boot */
9188 + iommu-map = <0 &smmu 0 0>;
9190 + #address-cells = <3>;
9191 + #size-cells = <1>;
9194 + * Region type 0x0 - MC portals
9195 + * Region type 0x1 - QBMAN portals
9197 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
9198 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
9201 + * Define the maximum number of MACs present on the SoC.
9204 + #address-cells = <1>;
9205 + #size-cells = <0>;
9208 + compatible = "fsl,qoriq-mc-dpmac";
9213 + compatible = "fsl,qoriq-mc-dpmac";
9218 + compatible = "fsl,qoriq-mc-dpmac";
9223 + compatible = "fsl,qoriq-mc-dpmac";
9228 + compatible = "fsl,qoriq-mc-dpmac";
9233 + compatible = "fsl,qoriq-mc-dpmac";
9238 + compatible = "fsl,qoriq-mc-dpmac";
9243 + compatible = "fsl,qoriq-mc-dpmac";
9248 + compatible = "fsl,qoriq-mc-dpmac";
9252 + dpmac10: dpmac@a {
9253 + compatible = "fsl,qoriq-mc-dpmac";
9257 + dpmac11: dpmac@b {
9258 + compatible = "fsl,qoriq-mc-dpmac";
9262 + dpmac12: dpmac@c {
9263 + compatible = "fsl,qoriq-mc-dpmac";
9267 + dpmac13: dpmac@d {
9268 + compatible = "fsl,qoriq-mc-dpmac";
9272 + dpmac14: dpmac@e {
9273 + compatible = "fsl,qoriq-mc-dpmac";
9277 + dpmac15: dpmac@f {
9278 + compatible = "fsl,qoriq-mc-dpmac";
9282 + dpmac16: dpmac@10 {
9283 + compatible = "fsl,qoriq-mc-dpmac";
9287 + dpmac17: dpmac@11 {
9288 + compatible = "fsl,qoriq-mc-dpmac";
9292 + dpmac18: dpmac@12 {
9293 + compatible = "fsl,qoriq-mc-dpmac";
9299 + fspi: flexspi@20c0000 {
9300 + status = "disabled";
9301 + compatible = "nxp,lx2160a-fspi";
9302 + #address-cells = <1>;
9303 + #size-cells = <0>;
9304 + reg = <0x0 0x20c0000 0x0 0x10000>,
9305 + <0x0 0x20000000 0x0 0x10000000>;
9306 + reg-names = "FSPI", "FSPI-memory";
9307 + interrupts = <0 25 0x4>; /* Level high type */
9308 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
9309 + clock-names = "fspi_en", "fspi";
9312 + sata0: sata@3200000 {
9313 + status = "disabled";
9314 + compatible = "fsl,lx2160a-ahci";
9315 + reg = <0x0 0x3200000 0x0 0x10000>;
9316 + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
9317 + clocks = <&clockgen 4 3>;
9321 + sata1: sata@3210000 {
9322 + status = "disabled";
9323 + compatible = "fsl,lx2160a-ahci";
9324 + reg = <0x0 0x3210000 0x0 0x10000>;
9325 + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
9326 + clocks = <&clockgen 4 3>;
9330 + sata2: sata@3220000 {
9331 + status = "disabled";
9332 + compatible = "fsl,lx2160a-ahci";
9333 + reg = <0x0 0x3220000 0x0 0x10000>;
9334 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
9335 + clocks = <&clockgen 4 3>;
9339 + sata3: sata@3230000 {
9340 + status = "disabled";
9341 + compatible = "fsl,lx2160a-ahci";
9342 + reg = <0x0 0x3230000 0x0 0x10000>;
9343 + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
9344 + clocks = <&clockgen 4 3>;
9349 + compatible = "fsl,lx2160a-pcie";
9350 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
9351 + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */
9352 + reg-names = "csr_axi_slave", "config_axi_slave";
9353 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9354 + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9355 + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9356 + interrupt-names = "aer", "pme", "intr";
9357 + #address-cells = <3>;
9358 + #size-cells = <2>;
9359 + device_type = "pci";
9363 + bus-range = <0x0 0xff>;
9364 + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9365 + msi-parent = <&its>;
9366 + #interrupt-cells = <1>;
9367 + interrupt-map-mask = <0 0 0 7>;
9368 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
9369 + <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
9370 + <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
9371 + <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
9372 + status = "disabled";
9376 + compatible = "fsl,lx2160a-pcie-ep";
9377 + reg = <0x00 0x03400000 0x0 0x00100000
9378 + 0x80 0x00000000 0x8 0x00000000>;
9379 + reg-names = "regs", "addr_space";
9380 + num-ob-windows = <256>;
9381 + status = "disabled";
9385 + compatible = "fsl,lx2160a-pcie";
9386 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
9387 + 0x88 0x00000000 0x0 0x00001000>; /* configuration space */
9388 + reg-names = "csr_axi_slave", "config_axi_slave";
9389 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9390 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9391 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9392 + interrupt-names = "aer", "pme", "intr";
9393 + #address-cells = <3>;
9394 + #size-cells = <2>;
9395 + device_type = "pci";
9399 + bus-range = <0x0 0xff>;
9400 + ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9401 + msi-parent = <&its>;
9402 + #interrupt-cells = <1>;
9403 + interrupt-map-mask = <0 0 0 7>;
9404 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
9405 + <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
9406 + <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
9407 + <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
9408 + status = "disabled";
9412 + compatible = "fsl,lx2160a-pcie-ep";
9413 + reg = <0x00 0x03500000 0x0 0x00100000
9414 + 0x88 0x00000000 0x8 0x00000000>;
9415 + reg-names = "regs", "addr_space";
9416 + num-ob-windows = <256>;
9417 + status = "disabled";
9421 + compatible = "fsl,lx2160a-pcie";
9422 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
9423 + 0x90 0x00000000 0x0 0x00001000>; /* configuration space */
9424 + reg-names = "csr_axi_slave", "config_axi_slave";
9425 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9426 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9427 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9428 + interrupt-names = "aer", "pme", "intr";
9429 + #address-cells = <3>;
9430 + #size-cells = <2>;
9431 + device_type = "pci";
9435 + bus-range = <0x0 0xff>;
9436 + ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9437 + msi-parent = <&its>;
9438 + #interrupt-cells = <1>;
9439 + interrupt-map-mask = <0 0 0 7>;
9440 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
9441 + <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
9442 + <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
9443 + <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
9444 + status = "disabled";
9448 + compatible = "fsl,lx2160a-pcie-ep";
9449 + reg = <0x00 0x03600000 0x0 0x00100000
9450 + 0x90 0x00000000 0x8 0x00000000>;
9451 + reg-names = "regs", "addr_space";
9452 + num-ob-windows = <256>;
9453 + max-functions = <2>;
9454 + status = "disabled";
9458 + compatible = "fsl,lx2160a-pcie";
9459 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
9460 + 0x98 0x00000000 0x0 0x00001000>; /* configuration space */
9461 + reg-names = "csr_axi_slave", "config_axi_slave";
9462 + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9463 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9464 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9465 + interrupt-names = "aer", "pme", "intr";
9466 + #address-cells = <3>;
9467 + #size-cells = <2>;
9468 + device_type = "pci";
9472 + bus-range = <0x0 0xff>;
9473 + ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9474 + msi-parent = <&its>;
9475 + #interrupt-cells = <1>;
9476 + interrupt-map-mask = <0 0 0 7>;
9477 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
9478 + <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
9479 + <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
9480 + <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
9481 + status = "disabled";
9485 + compatible = "fsl,lx2160a-pcie-ep";
9486 + reg = <0x00 0x03700000 0x0 0x00100000
9487 + 0x98 0x00000000 0x8 0x00000000>;
9488 + reg-names = "regs", "addr_space";
9489 + num-ob-windows = <256>;
9490 + status = "disabled";
9494 + compatible = "fsl,lx2160a-pcie";
9495 + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */
9496 + 0xa0 0x00000000 0x0 0x00001000>; /* configuration space */
9497 + reg-names = "csr_axi_slave", "config_axi_slave";
9498 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9499 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9500 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9501 + interrupt-names = "aer", "pme", "intr";
9502 + #address-cells = <3>;
9503 + #size-cells = <2>;
9504 + device_type = "pci";
9508 + bus-range = <0x0 0xff>;
9509 + ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9510 + msi-parent = <&its>;
9511 + #interrupt-cells = <1>;
9512 + interrupt-map-mask = <0 0 0 7>;
9513 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
9514 + <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
9515 + <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
9516 + <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
9517 + status = "disabled";
9521 + compatible = "fsl,lx2160a-pcie-ep";
9522 + reg = <0x00 0x03800000 0x0 0x00100000
9523 + 0xa0 0x00000000 0x8 0x00000000>;
9524 + reg-names = "regs", "addr_space";
9525 + num-ob-windows = <256>;
9526 + max-functions = <2>;
9527 + status = "disabled";
9531 + compatible = "fsl,lx2160a-pcie";
9532 + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */
9533 + 0xa8 0x00000000 0x0 0x00001000>; /* configuration space */
9534 + reg-names = "csr_axi_slave", "config_axi_slave";
9535 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
9536 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
9537 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
9538 + interrupt-names = "aer", "pme", "intr";
9539 + #address-cells = <3>;
9540 + #size-cells = <2>;
9541 + device_type = "pci";
9545 + bus-range = <0x0 0xff>;
9546 + ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
9547 + msi-parent = <&its>;
9548 + #interrupt-cells = <1>;
9549 + interrupt-map-mask = <0 0 0 7>;
9550 + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
9551 + <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
9552 + <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
9553 + <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
9554 + status = "disabled";
9558 + compatible = "fsl,lx2160a-pcie-ep";
9559 + reg = <0x00 0x03900000 0x0 0x00100000
9560 + 0xa8 0x00000000 0x8 0x00000000>;
9561 + reg-names = "regs", "addr_space";
9562 + num-ob-windows = <256>;
9563 + status = "disabled";
9570 + compatible = "linaro,optee-tz";
9576 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
9578 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9580 + * Device Tree Include file for Thermal Monitor Unit.
9582 + * Copyright 2018 NXP
9584 + * Tang Yuantian <andy.tang@nxp.com>
9594 + <&cooling_map1 THERMAL_NO_LIMIT
9595 + THERMAL_NO_LIMIT>;
9605 + <&cooling_map1 THERMAL_NO_LIMIT
9606 + THERMAL_NO_LIMIT>;
9616 + <&cooling_map1 THERMAL_NO_LIMIT
9617 + THERMAL_NO_LIMIT>;
9627 + <&cooling_map1 THERMAL_NO_LIMIT
9628 + THERMAL_NO_LIMIT>;
9638 + <&cooling_map1 THERMAL_NO_LIMIT
9639 + THERMAL_NO_LIMIT>;
9649 + <&cooling_map1 THERMAL_NO_LIMIT
9650 + THERMAL_NO_LIMIT>;
9660 + <&cooling_map1 THERMAL_NO_LIMIT
9661 + THERMAL_NO_LIMIT>;
9671 + <&cooling_map1 THERMAL_NO_LIMIT
9672 + THERMAL_NO_LIMIT>;
9678 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
9680 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9682 + * Device Tree Include file for Thermal Monitor Unit.
9684 + * Copyright 2018 NXP
9686 + * Tang Yuantian <andy.tang@nxp.com>
9696 + <&cooling_map2 THERMAL_NO_LIMIT
9697 + THERMAL_NO_LIMIT>;
9707 + <&cooling_map2 THERMAL_NO_LIMIT
9708 + THERMAL_NO_LIMIT>;
9718 + <&cooling_map2 THERMAL_NO_LIMIT
9719 + THERMAL_NO_LIMIT>;
9729 + <&cooling_map2 THERMAL_NO_LIMIT
9730 + THERMAL_NO_LIMIT>;
9740 + <&cooling_map2 THERMAL_NO_LIMIT
9741 + THERMAL_NO_LIMIT>;
9751 + <&cooling_map2 THERMAL_NO_LIMIT
9752 + THERMAL_NO_LIMIT>;
9762 + <&cooling_map2 THERMAL_NO_LIMIT
9763 + THERMAL_NO_LIMIT>;
9773 + <&cooling_map2 THERMAL_NO_LIMIT
9774 + THERMAL_NO_LIMIT>;
9780 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
9782 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9784 + * Device Tree Include file for Thermal Monitor Unit.
9786 + * Copyright 2018 NXP
9788 + * Tang Yuantian <andy.tang@nxp.com>
9798 + <&cooling_map3 THERMAL_NO_LIMIT
9799 + THERMAL_NO_LIMIT>;
9809 + <&cooling_map3 THERMAL_NO_LIMIT
9810 + THERMAL_NO_LIMIT>;
9820 + <&cooling_map3 THERMAL_NO_LIMIT
9821 + THERMAL_NO_LIMIT>;
9831 + <&cooling_map3 THERMAL_NO_LIMIT
9832 + THERMAL_NO_LIMIT>;
9842 + <&cooling_map3 THERMAL_NO_LIMIT
9843 + THERMAL_NO_LIMIT>;
9853 + <&cooling_map3 THERMAL_NO_LIMIT
9854 + THERMAL_NO_LIMIT>;
9864 + <&cooling_map3 THERMAL_NO_LIMIT
9865 + THERMAL_NO_LIMIT>;
9875 + <&cooling_map3 THERMAL_NO_LIMIT
9876 + THERMAL_NO_LIMIT>;
9882 +++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
9884 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9886 + * Device Tree Include file for Thermal Monitor Unit.
9888 + * Copyright 2018 NXP
9890 + * Tang Yuantian <andy.tang@nxp.com>
9894 +thermal_zones: thermal-zones {
9895 + thermal_zone0: thermal-zone0 {
9896 + polling-delay-passive = <1000>;
9897 + polling-delay = <5000>;
9898 + thermal-sensors = <&tmu 0>;
9899 + status = "disabled";
9903 + temperature = <75000>;
9904 + hysteresis = <2000>;
9909 + temperature = <85000>;
9910 + hysteresis = <2000>;
9911 + type = "critical";
9919 + <&cooling_map0 THERMAL_NO_LIMIT
9920 + THERMAL_NO_LIMIT>;
9926 + polling-delay-passive = <1000>;
9927 + polling-delay = <5000>;
9928 + thermal-sensors = <&tmu 1>;
9929 + status = "disabled";
9933 + temperature = <75000>;
9934 + hysteresis = <2000>;
9939 + temperature = <85000>;
9940 + hysteresis = <2000>;
9941 + type = "critical";
9949 + <&cooling_map0 THERMAL_NO_LIMIT
9950 + THERMAL_NO_LIMIT>;
9956 + polling-delay-passive = <1000>;
9957 + polling-delay = <5000>;
9958 + thermal-sensors = <&tmu 2>;
9959 + status = "disabled";
9963 + temperature = <75000>;
9964 + hysteresis = <2000>;
9969 + temperature = <85000>;
9970 + hysteresis = <2000>;
9971 + type = "critical";
9979 + <&cooling_map0 THERMAL_NO_LIMIT
9980 + THERMAL_NO_LIMIT>;
9986 + polling-delay-passive = <1000>;
9987 + polling-delay = <5000>;
9988 + thermal-sensors = <&tmu 3>;
9989 + status = "disabled";
9993 + temperature = <75000>;
9994 + hysteresis = <2000>;
9999 + temperature = <85000>;
10000 + hysteresis = <2000>;
10001 + type = "critical";
10007 + trip = <&alert3>;
10009 + <&cooling_map0 THERMAL_NO_LIMIT
10010 + THERMAL_NO_LIMIT>;
10016 + polling-delay-passive = <1000>;
10017 + polling-delay = <5000>;
10018 + thermal-sensors = <&tmu 4>;
10019 + status = "disabled";
10023 + temperature = <75000>;
10024 + hysteresis = <2000>;
10025 + type = "passive";
10029 + temperature = <85000>;
10030 + hysteresis = <2000>;
10031 + type = "critical";
10037 + trip = <&alert4>;
10039 + <&cooling_map0 THERMAL_NO_LIMIT
10040 + THERMAL_NO_LIMIT>;
10046 + polling-delay-passive = <1000>;
10047 + polling-delay = <5000>;
10048 + thermal-sensors = <&tmu 5>;
10049 + status = "disabled";
10053 + temperature = <75000>;
10054 + hysteresis = <2000>;
10055 + type = "passive";
10059 + temperature = <85000>;
10060 + hysteresis = <2000>;
10061 + type = "critical";
10067 + trip = <&alert5>;
10069 + <&cooling_map0 THERMAL_NO_LIMIT
10070 + THERMAL_NO_LIMIT>;
10076 + polling-delay-passive = <1000>;
10077 + polling-delay = <5000>;
10078 + thermal-sensors = <&tmu 6>;
10079 + status = "disabled";
10083 + temperature = <75000>;
10084 + hysteresis = <2000>;
10085 + type = "passive";
10089 + temperature = <85000>;
10090 + hysteresis = <2000>;
10091 + type = "critical";
10097 + trip = <&alert6>;
10099 + <&cooling_map0 THERMAL_NO_LIMIT
10100 + THERMAL_NO_LIMIT>;
10106 + polling-delay-passive = <1000>;
10107 + polling-delay = <5000>;
10108 + thermal-sensors = <&tmu 7>;
10109 + status = "disabled";
10113 + temperature = <75000>;
10114 + hysteresis = <2000>;
10115 + type = "passive";
10119 + temperature = <85000>;
10120 + hysteresis = <2000>;
10121 + type = "critical";
10127 + trip = <&alert7>;
10129 + <&cooling_map0 THERMAL_NO_LIMIT
10130 + THERMAL_NO_LIMIT>;
10136 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi
10139 + * QorIQ BMan SDK Portals device tree nodes
10141 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10142 + * Copyright 2017 NXP
10144 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10149 + cell-index = <0>;
10152 + bman-portal@10000 {
10153 + cell-index = <1>;
10156 + bman-portal@20000 {
10157 + cell-index = <2>;
10160 + bman-portal@30000 {
10161 + cell-index = <3>;
10164 + bman-portal@40000 {
10165 + cell-index = <4>;
10168 + bman-portal@50000 {
10169 + cell-index = <5>;
10172 + bman-portal@60000 {
10173 + cell-index = <6>;
10176 + bman-portal@70000 {
10177 + cell-index = <7>;
10180 + bman-portal@80000 {
10181 + cell-index = <8>;
10184 + bman-portal@90000 {
10185 + cell-index = <9>;
10189 + compatible = "fsl,bpid-range";
10190 + fsl,bpid-range = <32 32>;
10193 --- a/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi
10194 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi
10196 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10198 * QorIQ BMan Portals device tree
10200 * Copyright 2011-2016 Freescale Semiconductor Inc.
10202 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10207 reg = <0x80000 0x4000>, <0x4080000 0x4000>;
10208 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
10211 + bman-portal@90000 {
10212 + compatible = "fsl,bman-portal";
10213 + reg = <0x90000 0x4000>, <0x4090000 0x4000>;
10214 + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
10218 +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
10221 + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
10223 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
10225 + * Redistribution and use in source and binary forms, with or without
10226 + * modification, are permitted provided that the following conditions are met:
10227 + * * Redistributions of source code must retain the above copyright
10228 + * notice, this list of conditions and the following disclaimer.
10229 + * * Redistributions in binary form must reproduce the above copyright
10230 + * notice, this list of conditions and the following disclaimer in the
10231 + * documentation and/or other materials provided with the distribution.
10232 + * * Neither the name of Freescale Semiconductor nor the
10233 + * names of its contributors may be used to endorse or promote products
10234 + * derived from this software without specific prior written permission.
10237 + * ALTERNATIVELY, this software may be distributed under the terms of the
10238 + * GNU General Public License ("GPL") as published by the Free Software
10239 + * Foundation, either version 2 of that License or (at your option) any
10242 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
10243 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
10244 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
10245 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
10246 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10247 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
10248 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
10249 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
10250 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
10251 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
10254 +fsldpaa: fsl,dpaa {
10255 + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa";
10257 + compatible = "fsl,dpa-ethernet";
10258 + fsl,fman-mac = <&enet0>;
10262 + compatible = "fsl,dpa-ethernet";
10263 + fsl,fman-mac = <&enet1>;
10267 + compatible = "fsl,dpa-ethernet";
10268 + fsl,fman-mac = <&enet2>;
10272 + compatible = "fsl,dpa-ethernet";
10273 + fsl,fman-mac = <&enet3>;
10277 + compatible = "fsl,dpa-ethernet";
10278 + fsl,fman-mac = <&enet4>;
10282 + compatible = "fsl,dpa-ethernet";
10283 + fsl,fman-mac = <&enet5>;
10287 + compatible = "fsl,dpa-ethernet";
10288 + fsl,fman-mac = <&enet6>;
10292 + compatible = "fsl,im-ethernet";
10293 + fsl,fman-mac = <&enet2>;
10295 + fpmevt-sel = <0>;
10298 + compatible = "fsl,im-ethernet";
10299 + fsl,fman-mac = <&enet3>;
10301 + fpmevt-sel = <1>;
10304 + compatible = "fsl,im-ethernet";
10305 + fsl,fman-mac = <&enet4>;
10307 + fpmevt-sel = <2>;
10310 + compatible = "fsl,im-ethernet";
10311 + fsl,fman-mac = <&enet5>;
10313 + fpmevt-sel = <3>;
10317 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
10318 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
10320 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10322 * QorIQ FMan v3 10g port #0 device tree
10324 * Copyright 2012-2015 Freescale Semiconductor Inc.
10326 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10330 fman0_rx_0x10: port@90000 {
10331 cell-index = <0x10>;
10332 - compatible = "fsl,fman-v3-port-rx";
10333 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10334 reg = <0x90000 0x1000>;
10338 fman0_tx_0x30: port@b0000 {
10339 cell-index = <0x30>;
10340 - compatible = "fsl,fman-v3-port-tx";
10341 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10342 reg = <0xb0000 0x1000>;
10344 + fsl,qman-channel-id = <0x800>;
10348 + mac9: ethernet@f0000 {
10349 cell-index = <0x8>;
10350 compatible = "fsl,fman-memac";
10351 reg = <0xf0000 0x1000>;
10352 @@ -29,7 +30,7 @@ fman@1a00000 {
10353 pcsphy-handle = <&pcsphy6>;
10357 + mdio9: mdio@f1000 {
10358 #address-cells = <1>;
10360 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10361 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
10362 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
10364 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10366 * QorIQ FMan v3 10g port #1 device tree
10368 * Copyright 2012-2015 Freescale Semiconductor Inc.
10370 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10374 fman0_rx_0x11: port@91000 {
10375 cell-index = <0x11>;
10376 - compatible = "fsl,fman-v3-port-rx";
10377 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10378 reg = <0x91000 0x1000>;
10382 fman0_tx_0x31: port@b1000 {
10383 cell-index = <0x31>;
10384 - compatible = "fsl,fman-v3-port-tx";
10385 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10386 reg = <0xb1000 0x1000>;
10388 + fsl,qman-channel-id = <0x801>;
10392 + mac10: ethernet@f2000 {
10393 cell-index = <0x9>;
10394 compatible = "fsl,fman-memac";
10395 reg = <0xf2000 0x1000>;
10396 @@ -29,7 +30,7 @@ fman@1a00000 {
10397 pcsphy-handle = <&pcsphy7>;
10401 + mdio10: mdio@f3000 {
10402 #address-cells = <1>;
10404 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10405 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
10406 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
10408 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10410 * QorIQ FMan v3 1g port #0 device tree
10412 * Copyright 2012-2015 Freescale Semiconductor Inc.
10414 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10418 fman0_rx_0x08: port@88000 {
10419 cell-index = <0x8>;
10420 - compatible = "fsl,fman-v3-port-rx";
10421 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10422 reg = <0x88000 0x1000>;
10425 fman0_tx_0x28: port@a8000 {
10426 cell-index = <0x28>;
10427 - compatible = "fsl,fman-v3-port-tx";
10428 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10429 reg = <0xa8000 0x1000>;
10430 + fsl,qman-channel-id = <0x802>;
10434 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
10435 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
10437 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10439 * QorIQ FMan v3 1g port #1 device tree
10441 * Copyright 2012-2015 Freescale Semiconductor Inc.
10443 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10447 fman0_rx_0x09: port@89000 {
10448 cell-index = <0x9>;
10449 - compatible = "fsl,fman-v3-port-rx";
10450 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10451 reg = <0x89000 0x1000>;
10454 fman0_tx_0x29: port@a9000 {
10455 cell-index = <0x29>;
10456 - compatible = "fsl,fman-v3-port-tx";
10457 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10458 reg = <0xa9000 0x1000>;
10459 + fsl,qman-channel-id = <0x803>;
10463 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
10464 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
10466 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10468 * QorIQ FMan v3 1g port #2 device tree
10470 * Copyright 2012-2015 Freescale Semiconductor Inc.
10472 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10476 fman0_rx_0x0a: port@8a000 {
10477 cell-index = <0xa>;
10478 - compatible = "fsl,fman-v3-port-rx";
10479 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10480 reg = <0x8a000 0x1000>;
10483 fman0_tx_0x2a: port@aa000 {
10484 cell-index = <0x2a>;
10485 - compatible = "fsl,fman-v3-port-tx";
10486 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10487 reg = <0xaa000 0x1000>;
10488 + fsl,qman-channel-id = <0x804>;
10492 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
10493 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
10495 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10497 * QorIQ FMan v3 1g port #3 device tree
10499 * Copyright 2012-2015 Freescale Semiconductor Inc.
10501 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10505 fman0_rx_0x0b: port@8b000 {
10506 cell-index = <0xb>;
10507 - compatible = "fsl,fman-v3-port-rx";
10508 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10509 reg = <0x8b000 0x1000>;
10512 fman0_tx_0x2b: port@ab000 {
10513 cell-index = <0x2b>;
10514 - compatible = "fsl,fman-v3-port-tx";
10515 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10516 reg = <0xab000 0x1000>;
10517 + fsl,qman-channel-id = <0x805>;
10521 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
10522 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
10524 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10526 * QorIQ FMan v3 1g port #4 device tree
10528 * Copyright 2012-2015 Freescale Semiconductor Inc.
10530 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10534 fman0_rx_0x0c: port@8c000 {
10535 cell-index = <0xc>;
10536 - compatible = "fsl,fman-v3-port-rx";
10537 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10538 reg = <0x8c000 0x1000>;
10541 fman0_tx_0x2c: port@ac000 {
10542 cell-index = <0x2c>;
10543 - compatible = "fsl,fman-v3-port-tx";
10544 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10545 reg = <0xac000 0x1000>;
10546 + fsl,qman-channel-id = <0x806>;
10550 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
10551 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
10553 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10555 * QorIQ FMan v3 1g port #5 device tree
10557 * Copyright 2012-2015 Freescale Semiconductor Inc.
10559 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10563 fman0_rx_0x0d: port@8d000 {
10564 cell-index = <0xd>;
10565 - compatible = "fsl,fman-v3-port-rx";
10566 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10567 reg = <0x8d000 0x1000>;
10570 fman0_tx_0x2d: port@ad000 {
10571 cell-index = <0x2d>;
10572 - compatible = "fsl,fman-v3-port-tx";
10573 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10574 reg = <0xad000 0x1000>;
10575 + fsl,qman-channel-id = <0x807>;
10580 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
10583 + * QorIQ FMan v3 OH ports device tree
10585 + * Copyright 2012-2015 Freescale Semiconductor Inc.
10587 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10592 + fman0_oh1: port@82000 {
10593 + cell-index = <0>;
10594 + compatible = "fsl,fman-port-oh";
10595 + reg = <0x82000 0x1000>;
10598 + fman0_oh2: port@83000 {
10599 + cell-index = <1>;
10600 + compatible = "fsl,fman-port-oh";
10601 + reg = <0x83000 0x1000>;
10604 + fman0_oh3: port@84000 {
10605 + cell-index = <2>;
10606 + compatible = "fsl,fman-port-oh";
10607 + reg = <0x84000 0x1000>;
10610 + fman0_oh4: port@85000 {
10611 + cell-index = <3>;
10612 + compatible = "fsl,fman-port-oh";
10613 + reg = <0x85000 0x1000>;
10616 + fman0_oh5: port@86000 {
10617 + cell-index = <4>;
10618 + compatible = "fsl,fman-port-oh";
10619 + reg = <0x86000 0x1000>;
10622 + fman0_oh6: port@87000 {
10623 + cell-index = <5>;
10624 + compatible = "fsl,fman-port-oh";
10625 + reg = <0x87000 0x1000>;
10629 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10630 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10632 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10634 * QorIQ FMan v3 device tree
10636 * Copyright 2012-2015 Freescale Semiconductor Inc.
10638 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10641 fman0: fman@1a00000 {
10642 @@ -11,53 +11,104 @@ fman0: fman@1a00000 {
10645 compatible = "fsl,fman";
10646 - ranges = <0x0 0x0 0x1a00000 0x100000>;
10647 - reg = <0x0 0x1a00000 0x0 0x100000>;
10648 + ranges = <0x0 0x0 0x1a00000 0xfe000>;
10649 + reg = <0x0 0x1a00000 0x0 0xfe000>;
10650 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
10651 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
10652 clocks = <&clockgen 3 0>;
10653 clock-names = "fmanclk";
10654 fsl,qman-channel-range = <0x800 0x10>;
10655 + ptimer-handle = <&ptp_timer0>;
10658 + compatible = "fsl,fman-cc";
10662 compatible = "fsl,fman-muram";
10663 reg = <0x0 0x60000>;
10667 + compatible = "fsl,fman-bmi";
10668 + reg = <0x80000 0x400>;
10672 + compatible = "fsl,fman-qmi";
10673 + reg = <0x80400 0x400>;
10676 fman0_oh_0x2: port@82000 {
10677 cell-index = <0x2>;
10678 compatible = "fsl,fman-v3-port-oh";
10679 reg = <0x82000 0x1000>;
10680 + fsl,qman-channel-id = <0x809>;
10683 fman0_oh_0x3: port@83000 {
10684 cell-index = <0x3>;
10685 compatible = "fsl,fman-v3-port-oh";
10686 reg = <0x83000 0x1000>;
10687 + fsl,qman-channel-id = <0x80a>;
10690 fman0_oh_0x4: port@84000 {
10691 cell-index = <0x4>;
10692 compatible = "fsl,fman-v3-port-oh";
10693 reg = <0x84000 0x1000>;
10694 + fsl,qman-channel-id = <0x80b>;
10697 fman0_oh_0x5: port@85000 {
10698 cell-index = <0x5>;
10699 compatible = "fsl,fman-v3-port-oh";
10700 reg = <0x85000 0x1000>;
10701 + fsl,qman-channel-id = <0x80c>;
10704 fman0_oh_0x6: port@86000 {
10705 cell-index = <0x6>;
10706 compatible = "fsl,fman-v3-port-oh";
10707 reg = <0x86000 0x1000>;
10708 + fsl,qman-channel-id = <0x80d>;
10711 fman0_oh_0x7: port@87000 {
10712 cell-index = <0x7>;
10713 compatible = "fsl,fman-v3-port-oh";
10714 reg = <0x87000 0x1000>;
10715 + fsl,qman-channel-id = <0x80e>;
10719 + compatible = "fsl,fman-policer";
10720 + reg = <0xc0000 0x1000>;
10724 + compatible = "fsl,fman-keygen";
10725 + reg = <0xc1000 0x1000>;
10729 + compatible = "fsl,fman-dma";
10730 + reg = <0xc2000 0x1000>;
10734 + compatible = "fsl,fman-fpm";
10735 + reg = <0xc3000 0x1000>;
10739 + compatible = "fsl,fman-parser";
10740 + reg = <0xc7000 0x1000>;
10744 + compatible = "fsl,fman-vsps";
10745 + reg = <0xdc000 0x1000>;
10748 mdio0: mdio@fc000 {
10749 @@ -73,9 +124,11 @@ fman0: fman@1a00000 {
10750 compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10751 reg = <0xfd000 0x1000>;
10755 - ptp_timer0: ptp-timer@fe000 {
10756 - compatible = "fsl,fman-ptp-timer";
10757 - reg = <0xfe000 0x1000>;
10759 +ptp_timer0: ptp-timer@1afe000 {
10760 + compatible = "fsl,fman-ptp-timer";
10761 + reg = <0x0 0x1afe000 0x0 0x1000>;
10762 + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
10763 + clocks = <&clockgen 3 0>;
10766 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi
10769 + * QorIQ QMan SDK Portals device tree nodes
10771 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10772 + * Copyright 2017 NXP
10774 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10779 + compatible = "fsl,fqid-range";
10780 + fsl,fqid-range = <256 256>;
10784 + compatible = "fsl,fqid-range";
10785 + fsl,fqid-range = <32768 32768>;
10789 + compatible = "fsl,pool-channel-range";
10790 + fsl,pool-channel-range = <0x401 0xf>;
10794 + compatible = "fsl,cgrid-range";
10795 + fsl,cgrid-range = <0 256>;
10799 + compatible = "fsl,qman-ceetm";
10800 + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
10801 + fsl,ceetm-sp-range = <0 16>;
10802 + fsl,ceetm-lni-range = <0 8>;
10803 + fsl,ceetm-channel-range = <0 32>;
10806 --- a/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi
10807 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals.dtsi
10809 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10811 * QorIQ QMan Portals device tree
10813 * Copyright 2011-2016 Freescale Semiconductor Inc.
10815 - * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10820 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
10824 + qportal9: qman-portal@90000 {
10825 + compatible = "fsl,qman-portal";
10826 + reg = <0x90000 0x4000>, <0x4090000 0x4000>;
10827 + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
10828 + cell-index = <9>;
10831 --- a/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts
10832 +++ b/arch/arm64/boot/dts/freescale/traverse-ls1043s.dts
10833 @@ -330,3 +330,32 @@
10835 status = "disabled";
10838 +/* Additions for Layerscape SDK (4.4/4.9) Kernel only
10839 + * These kernels need additional setup for FMan/QMan DMA shared memory
10842 +#include "qoriq-qman-portals-sdk.dtsi"
10843 +#include "qoriq-bman-portals-sdk.dtsi"
10846 + compatible = "fsl,bman-fbpr";
10847 + alloc-ranges = <0 0 0x10000 0>;
10850 + compatible = "fsl,qman-fqd";
10851 + alloc-ranges = <0 0 0x10000 0>;
10854 + compatible = "fsl,qman-pfdr";
10855 + alloc-ranges = <0 0 0x10000 0>;
10859 +#include "qoriq-dpaa-eth.dtsi"
10860 +#include "qoriq-fman3-0-6oh.dtsi"
10864 + compatible = "fsl,fman", "simple-bus";
10866 --- a/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts
10867 +++ b/arch/arm64/boot/dts/freescale/traverse-ls1043v.dts
10868 @@ -251,3 +251,32 @@
10870 status = "disabled";
10873 +/* Additions for Layerscape SDK (4.4/4.9) Kernel only
10874 + * These kernels need additional setup for FMan/QMan DMA shared memory
10877 +#include "qoriq-qman-portals-sdk.dtsi"
10878 +#include "qoriq-bman-portals-sdk.dtsi"
10881 + compatible = "fsl,bman-fbpr";
10882 + alloc-ranges = <0 0 0x10000 0>;
10885 + compatible = "fsl,qman-fqd";
10886 + alloc-ranges = <0 0 0x10000 0>;
10889 + compatible = "fsl,qman-pfdr";
10890 + alloc-ranges = <0 0 0x10000 0>;
10894 +#include "qoriq-dpaa-eth.dtsi"
10895 +#include "qoriq-fman3-0-6oh.dtsi"
10899 + compatible = "fsl,fman", "simple-bus";