1 From 802238feea29ddfb765fc0c162e0de34920cd58d Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:31 +0800
4 Subject: [PATCH] dpaa2-rtc: support layerscape
6 This is an integrated patch of dpaa2-rtc for layerscape
8 Signed-off-by: Biwen Li <biwen.li@nxp.com>
9 Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
10 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
11 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
13 drivers/staging/fsl-dpaa2/rtc/Makefile | 10 +
14 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h | 160 +++++
15 drivers/staging/fsl-dpaa2/rtc/dprtc.c | 746 ++++++++++++++++++++++
16 drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 +++++
17 drivers/staging/fsl-dpaa2/rtc/rtc.c | 240 +++++++
18 drivers/staging/fsl-dpaa2/rtc/rtc.h | 14 +
19 6 files changed, 1342 insertions(+)
20 create mode 100644 drivers/staging/fsl-dpaa2/rtc/Makefile
21 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
22 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.c
23 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.h
24 create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.c
25 create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.h
28 +++ b/drivers/staging/fsl-dpaa2/rtc/Makefile
31 +obj-$(CONFIG_FSL_DPAA2_PTP_CLOCK) += dpaa2-rtc.o
33 +dpaa2-rtc-objs := rtc.o dprtc.o
36 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
39 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
41 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
43 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
45 + * Redistribution and use in source and binary forms, with or without
46 + * modification, are permitted provided that the following conditions are met:
47 + * * Redistributions of source code must retain the above copyright
48 + * notice, this list of conditions and the following disclaimer.
49 + * * Redistributions in binary form must reproduce the above copyright
50 + * notice, this list of conditions and the following disclaimer in the
51 + * documentation and/or other materials provided with the distribution.
52 + * * Neither the name of the above-listed copyright holders nor the
53 + * names of any contributors may be used to endorse or promote products
54 + * derived from this software without specific prior written permission.
57 + * ALTERNATIVELY, this software may be distributed under the terms of the
58 + * GNU General Public License ("GPL") as published by the Free Software
59 + * Foundation, either version 2 of that License or (at your option) any
62 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
63 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
66 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
67 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
68 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
69 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
70 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
71 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
72 + * POSSIBILITY OF SUCH DAMAGE.
74 +#ifndef _FSL_DPRTC_CMD_H
75 +#define _FSL_DPRTC_CMD_H
78 +#define DPRTC_VER_MAJOR 2
79 +#define DPRTC_VER_MINOR 0
81 +/* Command versioning */
82 +#define DPRTC_CMD_BASE_VERSION 1
83 +#define DPRTC_CMD_ID_OFFSET 4
85 +#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
88 +#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
89 +#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
90 +#define DPRTC_CMDID_CREATE DPRTC_CMD(0x910)
91 +#define DPRTC_CMDID_DESTROY DPRTC_CMD(0x990)
92 +#define DPRTC_CMDID_GET_API_VERSION DPRTC_CMD(0xa10)
94 +#define DPRTC_CMDID_ENABLE DPRTC_CMD(0x002)
95 +#define DPRTC_CMDID_DISABLE DPRTC_CMD(0x003)
96 +#define DPRTC_CMDID_GET_ATTR DPRTC_CMD(0x004)
97 +#define DPRTC_CMDID_RESET DPRTC_CMD(0x005)
98 +#define DPRTC_CMDID_IS_ENABLED DPRTC_CMD(0x006)
100 +#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
101 +#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
102 +#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD(0x014)
103 +#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
104 +#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
105 +#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
107 +#define DPRTC_CMDID_SET_CLOCK_OFFSET DPRTC_CMD(0x1d0)
108 +#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
109 +#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
110 +#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
111 +#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
112 +#define DPRTC_CMDID_SET_ALARM DPRTC_CMD(0x1d5)
113 +#define DPRTC_CMDID_SET_PERIODIC_PULSE DPRTC_CMD(0x1d6)
114 +#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE DPRTC_CMD(0x1d7)
115 +#define DPRTC_CMDID_SET_EXT_TRIGGER DPRTC_CMD(0x1d8)
116 +#define DPRTC_CMDID_CLEAR_EXT_TRIGGER DPRTC_CMD(0x1d9)
117 +#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP DPRTC_CMD(0x1dA)
119 +/* Macros for accessing command fields smaller than 1byte */
120 +#define DPRTC_MASK(field) \
121 + GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
122 + DPRTC_##field##_SHIFT)
123 +#define dprtc_get_field(var, field) \
124 + (((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
126 +#pragma pack(push, 1)
127 +struct dprtc_cmd_open {
131 +struct dprtc_cmd_destroy {
132 + uint32_t object_id;
135 +#define DPRTC_ENABLE_SHIFT 0
136 +#define DPRTC_ENABLE_SIZE 1
138 +struct dprtc_rsp_is_enabled {
142 +struct dprtc_cmd_get_irq {
147 +struct dprtc_cmd_set_irq_enable {
153 +struct dprtc_rsp_get_irq_enable {
157 +struct dprtc_cmd_set_irq_mask {
162 +struct dprtc_rsp_get_irq_mask {
166 +struct dprtc_cmd_get_irq_status {
171 +struct dprtc_rsp_get_irq_status {
175 +struct dprtc_cmd_clear_irq_status {
180 +struct dprtc_rsp_get_attributes {
185 +struct dprtc_cmd_set_clock_offset {
189 +struct dprtc_get_freq_compensation {
190 + uint32_t freq_compensation;
197 +struct dprtc_rsp_get_api_version {
202 +#endif /* _FSL_DPRTC_CMD_H */
204 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.c
206 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
208 + * Redistribution and use in source and binary forms, with or without
209 + * modification, are permitted provided that the following conditions are met:
210 + * * Redistributions of source code must retain the above copyright
211 + * notice, this list of conditions and the following disclaimer.
212 + * * Redistributions in binary form must reproduce the above copyright
213 + * notice, this list of conditions and the following disclaimer in the
214 + * documentation and/or other materials provided with the distribution.
215 + * * Neither the name of the above-listed copyright holders nor the
216 + * names of any contributors may be used to endorse or promote products
217 + * derived from this software without specific prior written permission.
220 + * ALTERNATIVELY, this software may be distributed under the terms of the
221 + * GNU General Public License ("GPL") as published by the Free Software
222 + * Foundation, either version 2 of that License or (at your option) any
225 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
226 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
227 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
228 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
229 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
230 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
231 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
232 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
233 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
234 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
235 + * POSSIBILITY OF SUCH DAMAGE.
237 +#include <linux/fsl/mc.h>
240 +#include "dprtc-cmd.h"
243 + * dprtc_open() - Open a control session for the specified object.
244 + * @mc_io: Pointer to MC portal's I/O object
245 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
246 + * @dprtc_id: DPRTC unique ID
247 + * @token: Returned token; use in subsequent API calls
249 + * This function can be used to open a control session for an
250 + * already created object; an object may have been declared in
251 + * the DPL or by calling the dprtc_create function.
252 + * This function returns a unique authentication token,
253 + * associated with the specific object ID and the specific MC
254 + * portal; this token must be used in all subsequent commands for
255 + * this specific object
257 + * Return: '0' on Success; Error code otherwise.
259 +int dprtc_open(struct fsl_mc_io *mc_io,
260 + uint32_t cmd_flags,
264 + struct dprtc_cmd_open *cmd_params;
265 + struct fsl_mc_command cmd = { 0 };
268 + /* prepare command */
269 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
272 + cmd_params = (struct dprtc_cmd_open *)cmd.params;
273 + cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
275 + /* send command to mc*/
276 + err = mc_send_command(mc_io, &cmd);
280 + /* retrieve response parameters */
281 + *token = mc_cmd_hdr_read_token(&cmd);
287 + * dprtc_close() - Close the control session of the object
288 + * @mc_io: Pointer to MC portal's I/O object
289 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
290 + * @token: Token of DPRTC object
292 + * After this function is called, no further operations are
293 + * allowed on the object without opening a new control session.
295 + * Return: '0' on Success; Error code otherwise.
297 +int dprtc_close(struct fsl_mc_io *mc_io,
298 + uint32_t cmd_flags,
301 + struct fsl_mc_command cmd = { 0 };
303 + /* prepare command */
304 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
307 + /* send command to mc*/
308 + return mc_send_command(mc_io, &cmd);
312 + * dprtc_create() - Create the DPRTC object.
313 + * @mc_io: Pointer to MC portal's I/O object
314 + * @dprc_token: Parent container token; '0' for default container
315 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
316 + * @cfg: Configuration structure
317 + * @obj_id: Returned object id
319 + * Create the DPRTC object, allocate required resources and
320 + * perform required initialization.
322 + * The function accepts an authentication token of a parent
323 + * container that this object should be assigned to. The token
324 + * can be '0' so the object will be assigned to the default container.
325 + * The newly created object can be opened with the returned
326 + * object id and using the container's associated tokens and MC portals.
328 + * Return: '0' on Success; Error code otherwise.
330 +int dprtc_create(struct fsl_mc_io *mc_io,
331 + uint16_t dprc_token,
332 + uint32_t cmd_flags,
333 + const struct dprtc_cfg *cfg,
336 + struct fsl_mc_command cmd = { 0 };
339 + (void)(cfg); /* unused */
341 + /* prepare command */
342 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
346 + /* send command to mc*/
347 + err = mc_send_command(mc_io, &cmd);
351 + /* retrieve response parameters */
352 + *obj_id = mc_cmd_read_object_id(&cmd);
358 + * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
359 + * @mc_io: Pointer to MC portal's I/O object
360 + * @dprc_token: Parent container token; '0' for default container
361 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
362 + * @object_id: The object id; it must be a valid id within the container that
363 + * created this object;
365 + * The function accepts the authentication token of the parent container that
366 + * created the object (not the one that currently owns the object). The object
367 + * is searched within parent using the provided 'object_id'.
368 + * All tokens to the object must be closed before calling destroy.
370 + * Return: '0' on Success; error code otherwise.
372 +int dprtc_destroy(struct fsl_mc_io *mc_io,
373 + uint16_t dprc_token,
374 + uint32_t cmd_flags,
375 + uint32_t object_id)
377 + struct dprtc_cmd_destroy *cmd_params;
378 + struct fsl_mc_command cmd = { 0 };
380 + /* prepare command */
381 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
384 + cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
385 + cmd_params->object_id = cpu_to_le32(object_id);
387 + /* send command to mc*/
388 + return mc_send_command(mc_io, &cmd);
391 +int dprtc_enable(struct fsl_mc_io *mc_io,
392 + uint32_t cmd_flags,
395 + struct fsl_mc_command cmd = { 0 };
397 + /* prepare command */
398 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
401 + /* send command to mc*/
402 + return mc_send_command(mc_io, &cmd);
405 +int dprtc_disable(struct fsl_mc_io *mc_io,
406 + uint32_t cmd_flags,
409 + struct fsl_mc_command cmd = { 0 };
411 + /* prepare command */
412 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
416 + /* send command to mc*/
417 + return mc_send_command(mc_io, &cmd);
420 +int dprtc_is_enabled(struct fsl_mc_io *mc_io,
421 + uint32_t cmd_flags,
425 + struct dprtc_rsp_is_enabled *rsp_params;
426 + struct fsl_mc_command cmd = { 0 };
429 + /* prepare command */
430 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
433 + /* send command to mc*/
434 + err = mc_send_command(mc_io, &cmd);
438 + /* retrieve response parameters */
439 + rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
440 + *en = dprtc_get_field(rsp_params->en, ENABLE);
445 +int dprtc_reset(struct fsl_mc_io *mc_io,
446 + uint32_t cmd_flags,
449 + struct fsl_mc_command cmd = { 0 };
451 + /* prepare command */
452 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
456 + /* send command to mc*/
457 + return mc_send_command(mc_io, &cmd);
461 + * dprtc_set_irq_enable() - Set overall interrupt state.
462 + * @mc_io: Pointer to MC portal's I/O object
463 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
464 + * @token: Token of DPRTC object
465 + * @irq_index: The interrupt index to configure
466 + * @en: Interrupt state - enable = 1, disable = 0
468 + * Allows GPP software to control when interrupts are generated.
469 + * Each interrupt can have up to 32 causes. The enable/disable control's the
470 + * overall interrupt state. if the interrupt is disabled no causes will cause
473 + * Return: '0' on Success; Error code otherwise.
475 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
476 + uint32_t cmd_flags,
481 + struct dprtc_cmd_set_irq_enable *cmd_params;
482 + struct fsl_mc_command cmd = { 0 };
484 + /* prepare command */
485 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
488 + cmd_params = (struct dprtc_cmd_set_irq_enable *)cmd.params;
489 + cmd_params->irq_index = irq_index;
490 + cmd_params->en = en;
492 + /* send command to mc*/
493 + return mc_send_command(mc_io, &cmd);
497 + * dprtc_get_irq_enable() - Get overall interrupt state
498 + * @mc_io: Pointer to MC portal's I/O object
499 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
500 + * @token: Token of DPRTC object
501 + * @irq_index: The interrupt index to configure
502 + * @en: Returned interrupt state - enable = 1, disable = 0
504 + * Return: '0' on Success; Error code otherwise.
506 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
507 + uint32_t cmd_flags,
512 + struct dprtc_rsp_get_irq_enable *rsp_params;
513 + struct dprtc_cmd_get_irq *cmd_params;
514 + struct fsl_mc_command cmd = { 0 };
517 + /* prepare command */
518 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
521 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
522 + cmd_params->irq_index = irq_index;
524 + /* send command to mc*/
525 + err = mc_send_command(mc_io, &cmd);
529 + /* retrieve response parameters */
530 + rsp_params = (struct dprtc_rsp_get_irq_enable *)cmd.params;
531 + *en = rsp_params->en;
537 + * dprtc_set_irq_mask() - Set interrupt mask.
538 + * @mc_io: Pointer to MC portal's I/O object
539 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
540 + * @token: Token of DPRTC object
541 + * @irq_index: The interrupt index to configure
542 + * @mask: Event mask to trigger interrupt;
545 + * 1 = consider event for asserting IRQ
547 + * Every interrupt can have up to 32 causes and the interrupt model supports
548 + * masking/unmasking each cause independently
550 + * Return: '0' on Success; Error code otherwise.
552 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
553 + uint32_t cmd_flags,
558 + struct dprtc_cmd_set_irq_mask *cmd_params;
559 + struct fsl_mc_command cmd = { 0 };
561 + /* prepare command */
562 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
565 + cmd_params = (struct dprtc_cmd_set_irq_mask *)cmd.params;
566 + cmd_params->mask = cpu_to_le32(mask);
567 + cmd_params->irq_index = irq_index;
569 + /* send command to mc*/
570 + return mc_send_command(mc_io, &cmd);
574 + * dprtc_get_irq_mask() - Get interrupt mask.
575 + * @mc_io: Pointer to MC portal's I/O object
576 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
577 + * @token: Token of DPRTC object
578 + * @irq_index: The interrupt index to configure
579 + * @mask: Returned event mask to trigger interrupt
581 + * Every interrupt can have up to 32 causes and the interrupt model supports
582 + * masking/unmasking each cause independently
584 + * Return: '0' on Success; Error code otherwise.
586 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
587 + uint32_t cmd_flags,
592 + struct dprtc_rsp_get_irq_mask *rsp_params;
593 + struct dprtc_cmd_get_irq *cmd_params;
594 + struct fsl_mc_command cmd = { 0 };
597 + /* prepare command */
598 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
601 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
602 + cmd_params->irq_index = irq_index;
604 + /* send command to mc*/
605 + err = mc_send_command(mc_io, &cmd);
609 + /* retrieve response parameters */
610 + rsp_params = (struct dprtc_rsp_get_irq_mask *)cmd.params;
611 + *mask = le32_to_cpu(rsp_params->mask);
617 + * dprtc_get_irq_status() - Get the current status of any pending interrupts.
619 + * @mc_io: Pointer to MC portal's I/O object
620 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
621 + * @token: Token of DPRTC object
622 + * @irq_index: The interrupt index to configure
623 + * @status: Returned interrupts status - one bit per cause:
624 + * 0 = no interrupt pending
625 + * 1 = interrupt pending
627 + * Return: '0' on Success; Error code otherwise.
629 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
630 + uint32_t cmd_flags,
635 + struct dprtc_cmd_get_irq_status *cmd_params;
636 + struct dprtc_rsp_get_irq_status *rsp_params;
637 + struct fsl_mc_command cmd = { 0 };
640 + /* prepare command */
641 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
644 + cmd_params = (struct dprtc_cmd_get_irq_status *)cmd.params;
645 + cmd_params->status = cpu_to_le32(*status);
646 + cmd_params->irq_index = irq_index;
648 + /* send command to mc*/
649 + err = mc_send_command(mc_io, &cmd);
653 + /* retrieve response parameters */
654 + rsp_params = (struct dprtc_rsp_get_irq_status *)cmd.params;
655 + *status = rsp_params->status;
661 + * dprtc_clear_irq_status() - Clear a pending interrupt's status
663 + * @mc_io: Pointer to MC portal's I/O object
664 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
665 + * @token: Token of DPRTC object
666 + * @irq_index: The interrupt index to configure
667 + * @status: Bits to clear (W1C) - one bit per cause:
669 + * 1 = clear status bit
671 + * Return: '0' on Success; Error code otherwise.
673 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
674 + uint32_t cmd_flags,
679 + struct dprtc_cmd_clear_irq_status *cmd_params;
680 + struct fsl_mc_command cmd = { 0 };
682 + /* prepare command */
683 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
686 + cmd_params = (struct dprtc_cmd_clear_irq_status *)cmd.params;
687 + cmd_params->irq_index = irq_index;
688 + cmd_params->status = cpu_to_le32(status);
690 + /* send command to mc*/
691 + return mc_send_command(mc_io, &cmd);
695 + * dprtc_get_attributes - Retrieve DPRTC attributes.
697 + * @mc_io: Pointer to MC portal's I/O object
698 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
699 + * @token: Token of DPRTC object
700 + * @attr: Returned object's attributes
702 + * Return: '0' on Success; Error code otherwise.
704 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
705 + uint32_t cmd_flags,
707 + struct dprtc_attr *attr)
709 + struct dprtc_rsp_get_attributes *rsp_params;
710 + struct fsl_mc_command cmd = { 0 };
713 + /* prepare command */
714 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
718 + /* send command to mc*/
719 + err = mc_send_command(mc_io, &cmd);
723 + /* retrieve response parameters */
724 + rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
725 + attr->id = le32_to_cpu(rsp_params->id);
731 + * dprtc_set_clock_offset() - Sets the clock's offset
732 + * (usually relative to another clock).
734 + * @mc_io: Pointer to MC portal's I/O object
735 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
736 + * @token: Token of DPRTC object
737 + * @offset: New clock offset (in nanoseconds).
739 + * Return: '0' on Success; Error code otherwise.
741 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
742 + uint32_t cmd_flags,
746 + struct dprtc_cmd_set_clock_offset *cmd_params;
747 + struct fsl_mc_command cmd = { 0 };
749 + /* prepare command */
750 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
753 + cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
754 + cmd_params->offset = cpu_to_le64(offset);
756 + /* send command to mc*/
757 + return mc_send_command(mc_io, &cmd);
761 + * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
763 + * @mc_io: Pointer to MC portal's I/O object
764 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
765 + * @token: Token of DPRTC object
766 + * @freq_compensation: The new frequency compensation value to set.
768 + * Return: '0' on Success; Error code otherwise.
770 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
771 + uint32_t cmd_flags,
773 + uint32_t freq_compensation)
775 + struct dprtc_get_freq_compensation *cmd_params;
776 + struct fsl_mc_command cmd = { 0 };
778 + /* prepare command */
779 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
782 + cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
783 + cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
785 + /* send command to mc*/
786 + return mc_send_command(mc_io, &cmd);
790 + * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
792 + * @mc_io: Pointer to MC portal's I/O object
793 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
794 + * @token: Token of DPRTC object
795 + * @freq_compensation: Frequency compensation value
797 + * Return: '0' on Success; Error code otherwise.
799 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
800 + uint32_t cmd_flags,
802 + uint32_t *freq_compensation)
804 + struct dprtc_get_freq_compensation *rsp_params;
805 + struct fsl_mc_command cmd = { 0 };
808 + /* prepare command */
809 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
813 + /* send command to mc*/
814 + err = mc_send_command(mc_io, &cmd);
818 + /* retrieve response parameters */
819 + rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
820 + *freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
826 + * dprtc_get_time() - Returns the current RTC time.
828 + * @mc_io: Pointer to MC portal's I/O object
829 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
830 + * @token: Token of DPRTC object
831 + * @time: Current RTC time.
833 + * Return: '0' on Success; Error code otherwise.
835 +int dprtc_get_time(struct fsl_mc_io *mc_io,
836 + uint32_t cmd_flags,
840 + struct dprtc_time *rsp_params;
841 + struct fsl_mc_command cmd = { 0 };
844 + /* prepare command */
845 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
849 + /* send command to mc*/
850 + err = mc_send_command(mc_io, &cmd);
854 + /* retrieve response parameters */
855 + rsp_params = (struct dprtc_time *)cmd.params;
856 + *time = le64_to_cpu(rsp_params->time);
862 + * dprtc_set_time() - Updates current RTC time.
864 + * @mc_io: Pointer to MC portal's I/O object
865 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
866 + * @token: Token of DPRTC object
867 + * @time: New RTC time.
869 + * Return: '0' on Success; Error code otherwise.
871 +int dprtc_set_time(struct fsl_mc_io *mc_io,
872 + uint32_t cmd_flags,
876 + struct dprtc_time *cmd_params;
877 + struct fsl_mc_command cmd = { 0 };
879 + /* prepare command */
880 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
883 + cmd_params = (struct dprtc_time *)cmd.params;
884 + cmd_params->time = cpu_to_le64(time);
886 + /* send command to mc*/
887 + return mc_send_command(mc_io, &cmd);
891 + * dprtc_set_alarm() - Defines and sets alarm.
893 + * @mc_io: Pointer to MC portal's I/O object
894 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
895 + * @token: Token of DPRTC object
896 + * @time: In nanoseconds, the time when the alarm
897 + * should go off - must be a multiple of
900 + * Return: '0' on Success; Error code otherwise.
902 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
903 + uint32_t cmd_flags,
904 + uint16_t token, uint64_t time)
906 + struct dprtc_time *cmd_params;
907 + struct fsl_mc_command cmd = { 0 };
909 + /* prepare command */
910 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
913 + cmd_params = (struct dprtc_time *)cmd.params;
914 + cmd_params->time = cpu_to_le64(time);
916 + /* send command to mc*/
917 + return mc_send_command(mc_io, &cmd);
921 + * dprtc_get_api_version() - Get Data Path Real Time Counter API version
922 + * @mc_io: Pointer to MC portal's I/O object
923 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
924 + * @major_ver: Major version of data path real time counter API
925 + * @minor_ver: Minor version of data path real time counter API
927 + * Return: '0' on Success; Error code otherwise.
929 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
930 + uint32_t cmd_flags,
931 + uint16_t *major_ver,
932 + uint16_t *minor_ver)
934 + struct dprtc_rsp_get_api_version *rsp_params;
935 + struct fsl_mc_command cmd = { 0 };
938 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
942 + err = mc_send_command(mc_io, &cmd);
946 + rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
947 + *major_ver = le16_to_cpu(rsp_params->major);
948 + *minor_ver = le16_to_cpu(rsp_params->minor);
953 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.h
955 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
957 + * Redistribution and use in source and binary forms, with or without
958 + * modification, are permitted provided that the following conditions are met:
959 + * * Redistributions of source code must retain the above copyright
960 + * notice, this list of conditions and the following disclaimer.
961 + * * Redistributions in binary form must reproduce the above copyright
962 + * notice, this list of conditions and the following disclaimer in the
963 + * documentation and/or other materials provided with the distribution.
964 + * * Neither the name of the above-listed copyright holders nor the
965 + * names of any contributors may be used to endorse or promote products
966 + * derived from this software without specific prior written permission.
969 + * ALTERNATIVELY, this software may be distributed under the terms of the
970 + * GNU General Public License ("GPL") as published by the Free Software
971 + * Foundation, either version 2 of that License or (at your option) any
974 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
975 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
976 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
977 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
978 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
979 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
980 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
981 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
982 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
983 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
984 + * POSSIBILITY OF SUCH DAMAGE.
986 +#ifndef __FSL_DPRTC_H
987 +#define __FSL_DPRTC_H
989 +/* Data Path Real Time Counter API
990 + * Contains initialization APIs and runtime control APIs for RTC
998 +#define DPRTC_MAX_IRQ_NUM 1
999 +#define DPRTC_IRQ_INDEX 0
1002 + * Interrupt event masks:
1006 + * Interrupt event mask indicating alarm event had occurred
1008 +#define DPRTC_EVENT_ALARM 0x40000000
1010 + * Interrupt event mask indicating periodic pulse event had occurred
1012 +#define DPRTC_EVENT_PPS 0x08000000
1014 +int dprtc_open(struct fsl_mc_io *mc_io,
1015 + uint32_t cmd_flags,
1019 +int dprtc_close(struct fsl_mc_io *mc_io,
1020 + uint32_t cmd_flags,
1024 + * struct dprtc_cfg - Structure representing DPRTC configuration
1025 + * @options: place holder
1031 +int dprtc_create(struct fsl_mc_io *mc_io,
1032 + uint16_t dprc_token,
1033 + uint32_t cmd_flags,
1034 + const struct dprtc_cfg *cfg,
1035 + uint32_t *obj_id);
1037 +int dprtc_destroy(struct fsl_mc_io *mc_io,
1038 + uint16_t dprc_token,
1039 + uint32_t cmd_flags,
1040 + uint32_t object_id);
1042 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
1043 + uint32_t cmd_flags,
1047 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
1048 + uint32_t cmd_flags,
1050 + uint32_t freq_compensation);
1052 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
1053 + uint32_t cmd_flags,
1055 + uint32_t *freq_compensation);
1057 +int dprtc_get_time(struct fsl_mc_io *mc_io,
1058 + uint32_t cmd_flags,
1062 +int dprtc_set_time(struct fsl_mc_io *mc_io,
1063 + uint32_t cmd_flags,
1067 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
1068 + uint32_t cmd_flags,
1072 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
1073 + uint32_t cmd_flags,
1075 + uint8_t irq_index,
1078 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
1079 + uint32_t cmd_flags,
1081 + uint8_t irq_index,
1084 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
1085 + uint32_t cmd_flags,
1087 + uint8_t irq_index,
1090 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
1091 + uint32_t cmd_flags,
1093 + uint8_t irq_index,
1096 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
1097 + uint32_t cmd_flags,
1099 + uint8_t irq_index,
1100 + uint32_t *status);
1102 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
1103 + uint32_t cmd_flags,
1105 + uint8_t irq_index,
1109 + * struct dprtc_attr - Structure representing DPRTC attributes
1110 + * @id: DPRTC object ID
1112 +struct dprtc_attr {
1116 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
1117 + uint32_t cmd_flags,
1119 + struct dprtc_attr *attr);
1121 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
1122 + uint32_t cmd_flags,
1123 + uint16_t *major_ver,
1124 + uint16_t *minor_ver);
1126 +#endif /* __FSL_DPRTC_H */
1128 +++ b/drivers/staging/fsl-dpaa2/rtc/rtc.c
1130 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
1132 + * Redistribution and use in source and binary forms, with or without
1133 + * modification, are permitted provided that the following conditions are met:
1134 + * * Redistributions of source code must retain the above copyright
1135 + * notice, this list of conditions and the following disclaimer.
1136 + * * Redistributions in binary form must reproduce the above copyright
1137 + * notice, this list of conditions and the following disclaimer in the
1138 + * documentation and/or other materials provided with the distribution.
1139 + * * Neither the name of the above-listed copyright holders nor the
1140 + * names of any contributors may be used to endorse or promote products
1141 + * derived from this software without specific prior written permission.
1144 + * ALTERNATIVELY, this software may be distributed under the terms of the
1145 + * GNU General Public License ("GPL") as published by the Free Software
1146 + * Foundation, either version 2 of that License or (at your option) any
1149 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1150 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1151 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1152 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1153 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1154 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1155 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1156 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1157 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1158 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1159 + * POSSIBILITY OF SUCH DAMAGE.
1162 +#include <linux/module.h>
1163 +#include <linux/ptp_clock_kernel.h>
1165 +#include <linux/fsl/mc.h>
1171 +struct ptp_clock *clock;
1172 +struct fsl_mc_device *rtc_mc_dev;
1173 +u32 freqCompensation;
1175 +/* PTP clock operations */
1176 +static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1179 + u32 diff, tmr_add;
1182 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1183 + struct device *dev = &mc_dev->dev;
1190 + tmr_add = freqCompensation;
1193 + diff = div_u64(adj, 1000000000ULL);
1195 + tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
1197 + err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
1198 + mc_dev->mc_handle, tmr_add);
1200 + dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
1204 +static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
1208 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1209 + struct device *dev = &mc_dev->dev;
1211 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
1213 + dev_err(dev, "dprtc_get_time err %d\n", err);
1219 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
1221 + dev_err(dev, "dprtc_set_time err %d\n", err);
1227 +static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
1232 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1233 + struct device *dev = &mc_dev->dev;
1235 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
1237 + dev_err(dev, "dprtc_get_time err %d\n", err);
1241 + ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
1242 + ts->tv_nsec = remainder;
1246 +static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
1247 + const struct timespec *ts)
1251 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1252 + struct device *dev = &mc_dev->dev;
1254 + ns = ts->tv_sec * 1000000000ULL;
1255 + ns += ts->tv_nsec;
1257 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
1259 + dev_err(dev, "dprtc_set_time err %d\n", err);
1263 +static struct ptp_clock_info ptp_dpaa2_caps = {
1264 + .owner = THIS_MODULE,
1265 + .name = "dpaa2 clock",
1266 + .max_adj = 512000,
1268 + .n_ext_ts = N_EXT_TS,
1272 + .adjfreq = ptp_dpaa2_adjfreq,
1273 + .adjtime = ptp_dpaa2_adjtime,
1274 + .gettime64 = ptp_dpaa2_gettime,
1275 + .settime64 = ptp_dpaa2_settime,
1278 +static int rtc_probe(struct fsl_mc_device *mc_dev)
1280 + struct device *dev;
1287 + dev = &mc_dev->dev;
1289 + err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
1290 + if (unlikely(err)) {
1291 + dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
1294 + if (!mc_dev->mc_io) {
1296 + "fsl_mc_portal_allocate returned null handle but no error\n");
1301 + err = dprtc_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
1302 + &mc_dev->mc_handle);
1304 + dev_err(dev, "dprtc_open err %d\n", err);
1305 + goto err_free_mcp;
1307 + if (!mc_dev->mc_handle) {
1308 + dev_err(dev, "dprtc_open returned null handle but no error\n");
1310 + goto err_free_mcp;
1313 + rtc_mc_dev = mc_dev;
1315 + err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
1316 + mc_dev->mc_handle, &tmr_add);
1318 + dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
1321 + freqCompensation = tmr_add;
1323 + clock = ptp_clock_register(&ptp_dpaa2_caps, dev);
1324 + if (IS_ERR(clock)) {
1325 + err = PTR_ERR(clock);
1328 + dpaa2_phc_index = ptp_clock_index(clock);
1332 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
1334 + fsl_mc_portal_free(mc_dev->mc_io);
1339 +static int rtc_remove(struct fsl_mc_device *mc_dev)
1341 + ptp_clock_unregister(clock);
1342 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
1343 + fsl_mc_portal_free(mc_dev->mc_io);
1348 +static const struct fsl_mc_device_id rtc_match_id_table[] = {
1350 + .vendor = FSL_MC_VENDOR_FREESCALE,
1351 + .obj_type = "dprtc",
1356 +static struct fsl_mc_driver rtc_drv = {
1358 + .name = KBUILD_MODNAME,
1359 + .owner = THIS_MODULE,
1361 + .probe = rtc_probe,
1362 + .remove = rtc_remove,
1363 + .match_id_table = rtc_match_id_table,
1366 +module_fsl_mc_driver(rtc_drv);
1368 +MODULE_LICENSE("GPL");
1369 +MODULE_DESCRIPTION("DPAA2 RTC (PTP 1588 clock) driver (prototype)");
1371 +++ b/drivers/staging/fsl-dpaa2/rtc/rtc.h
1373 +// SPDX-License-Identifier: GPL-2.0
1375 + * Copyright 2018 NXP
1382 +#include "dprtc-cmd.h"
1384 +extern int dpaa2_phc_index;