1 From feb12cb699adbac2d4619401c7ff4fcc2fc97b6c Mon Sep 17 00:00:00 2001
2 From: Mingkai Hu <mingkai.hu@nxp.com>
3 Date: Mon, 26 Sep 2016 12:33:42 +0800
4 Subject: [PATCH 132/141] dts/ls1046a: add LS1046ARDB board support
6 commit e95a28cfd9a392fe5dc189a9ae097bbaaccd1228
9 Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
10 Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
12 arch/arm64/boot/dts/freescale/Makefile | 1 +
13 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 198 +++++++++++++++++++++
14 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 178 +++++++++++++-----
15 3 files changed, 328 insertions(+), 49 deletions(-)
16 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
18 --- a/arch/arm64/boot/dts/freescale/Makefile
19 +++ b/arch/arm64/boot/dts/freescale/Makefile
20 @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2
21 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
22 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
23 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
24 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
27 subdir-y := $(dts-dirs)
29 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
32 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
34 + * Copyright 2016, Freescale Semiconductor
36 + * Mingkai Hu <mingkai.hu@nxp.com>
38 + * This file is dual-licensed: you can use it either under the terms
39 + * of the GPLv2 or the X11 license, at your option. Note that this dual
40 + * licensing only applies to this file, and not this project as a
43 + * a) This library is free software; you can redistribute it and/or
44 + * modify it under the terms of the GNU General Public License as
45 + * published by the Free Software Foundation; either version 2 of the
46 + * License, or (at your option) any later version.
48 + * This library is distributed in the hope that it will be useful,
49 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
50 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
51 + * GNU General Public License for more details.
53 + * Or, alternatively,
55 + * b) Permission is hereby granted, free of charge, to any person
56 + * obtaining a copy of this software and associated documentation
57 + * files (the "Software"), to deal in the Software without
58 + * restriction, including without limitation the rights to use,
59 + * copy, modify, merge, publish, distribute, sublicense, and/or
60 + * sell copies of the Software, and to permit persons to whom the
61 + * Software is furnished to do so, subject to the following
64 + * The above copyright notice and this permission notice shall be
65 + * included in all copies or substantial portions of the Software.
67 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
68 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
69 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
70 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
71 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
72 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
73 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
74 + * OTHER DEALINGS IN THE SOFTWARE.
78 +#include "fsl-ls1046a.dtsi"
81 + model = "LS1046A RDB Board";
82 + compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
85 + ethernet0 = &fm1mac3;
86 + ethernet1 = &fm1mac4;
87 + ethernet2 = &fm1mac5;
88 + ethernet3 = &fm1mac6;
89 + ethernet4 = &fm1mac9;
90 + ethernet5 = &fm1mac10;
97 + compatible = "ti,ina220";
99 + shunt-resistor = <1000>;
102 + compatible = "adi,adt7461";
106 + compatible = "at24,24c512";
110 + compatible = "at24,24c512";
118 + compatible = "nxp,pcf2129";
125 + #address-cells = <2>;
127 + /* NAND Flashe and CPLD on board */
128 + ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
129 + 0x2 0x0 0x0 0x7fb00000 0x00000100>;
132 + compatible = "fsl,ifc-nand";
133 + #address-cells = <1>;
135 + reg = <0x0 0x0 0x10000>;
138 + cpld: board-control@2,0 {
139 + compatible = "fsl,ls1046ardb-cpld";
140 + reg = <0x2 0x0 0x0000100>;
149 + qflash0: s25fs128s@0 {
150 + compatible = "spansion,m25p80";
151 + #address-cells = <1>;
153 + spi-max-frequency = <20000000>;
157 + qflash1: s25fs128s@1 {
158 + compatible = "spansion,m25p80";
159 + #address-cells = <1>;
161 + spi-max-frequency = <20000000>;
177 + phy-handle = <&rgmii_phy1>;
178 + phy-connection-type = "rgmii";
182 + phy-handle = <&rgmii_phy2>;
183 + phy-connection-type = "rgmii";
187 + phy-handle = <&sgmii_phy1>;
188 + phy-connection-type = "sgmii";
192 + phy-handle = <&sgmii_phy2>;
193 + phy-connection-type = "sgmii";
196 + ethernet@f0000 { /* 10GEC1 */
197 + phy-handle = <&aqr106_phy>;
198 + phy-connection-type = "xgmii";
201 + ethernet@f2000 { /* 10GEC2 */
202 + fixed-link = <0 1 10000 0 0>;
203 + phy-connection-type = "xgmii";
207 + rgmii_phy1: ethernet-phy@1 {
210 + rgmii_phy2: ethernet-phy@2 {
213 + sgmii_phy1: ethernet-phy@3 {
216 + sgmii_phy2: ethernet-phy@4 {
222 + aqr106_phy: ethernet-phy@1 {
223 + compatible = "ethernet-phy-ieee802.3-c45";
224 + interrupts = <0 131 4>;
229 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
230 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
235 - ethernet0 = &fm1mac1;
236 - ethernet1 = &fm1mac2;
237 - ethernet2 = &fm1mac3;
238 - ethernet3 = &fm1mac4;
239 - ethernet4 = &fm1mac5;
240 - ethernet5 = &fm1mac6;
241 - ethernet6 = &fm1mac9;
248 clocks = <&clockgen 1 0>;
249 next-level-cache = <&l2>;
250 + cpu-idle-states = <&CPU_PH20>;
256 clocks = <&clockgen 1 0>;
257 next-level-cache = <&l2>;
258 + cpu-idle-states = <&CPU_PH20>;
264 clocks = <&clockgen 1 0>;
265 next-level-cache = <&l2>;
266 + cpu-idle-states = <&CPU_PH20>;
272 clocks = <&clockgen 1 0>;
273 next-level-cache = <&l2>;
274 + cpu-idle-states = <&CPU_PH20>;
283 + entry-method = "arm,psci";
285 + CPU_PH20: cpu-ph20 {
286 + compatible = "arm,idle-state";
287 + idle-state-name = "PH20";
288 + arm,psci-suspend-param = <0x00010000>;
289 + entry-latency-us = <1000>;
290 + exit-latency-us = <1000>;
291 + min-residency-us = <3000>;
296 device_type = "memory";
297 reg = <0x0 0x80000000 0 0x80000000>;
302 + crypto: crypto@1700000 {
303 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
306 + #address-cells = <1>;
308 + ranges = <0x0 0x00 0x1700000 0x100000>;
309 + reg = <0x00 0x1700000 0x0 0x100000>;
310 + interrupts = <0 75 0x4>;
312 + sec_jr0: jr@10000 {
313 + compatible = "fsl,sec-v5.4-job-ring",
314 + "fsl,sec-v5.0-job-ring",
315 + "fsl,sec-v4.0-job-ring";
316 + reg = <0x10000 0x10000>;
317 + interrupts = <0 71 0x4>;
320 + sec_jr1: jr@20000 {
321 + compatible = "fsl,sec-v5.4-job-ring",
322 + "fsl,sec-v5.0-job-ring",
323 + "fsl,sec-v4.0-job-ring";
324 + reg = <0x20000 0x10000>;
325 + interrupts = <0 72 0x4>;
328 + sec_jr2: jr@30000 {
329 + compatible = "fsl,sec-v5.4-job-ring",
330 + "fsl,sec-v5.0-job-ring",
331 + "fsl,sec-v4.0-job-ring";
332 + reg = <0x30000 0x10000>;
333 + interrupts = <0 73 0x4>;
336 + sec_jr3: jr@40000 {
337 + compatible = "fsl,sec-v5.4-job-ring",
338 + "fsl,sec-v5.0-job-ring",
339 + "fsl,sec-v4.0-job-ring";
340 + reg = <0x40000 0x10000>;
341 + interrupts = <0 74 0x4>;
346 compatible = "fsl,qman";
347 reg = <0x00 0x1880000 0x0 0x10000>;
349 fsl,qman-channel-id = <0x800>;
352 + fman0_10g_rx1: port@91000 {
354 + compatible = "fsl,fman-port-10g-rx";
355 + reg = <0x91000 0x1000>;
358 + fman0_10g_tx1: port@b1000 {
360 + compatible = "fsl,fman-port-10g-tx";
361 + reg = <0xb1000 0x1000>;
362 + fsl,qman-channel-id = <0x801>;
365 fm1mac9: ethernet@f0000 {
367 compatible = "fsl,fman-memac";
369 fsl,port-handles = <&fman0_10g_rx0 &fman0_10g_tx0>;
372 + fm1mac10: ethernet@f2000 {
374 + compatible = "fsl,fman-memac";
375 + reg = <0xf2000 0x1000>;
376 + fsl,port-handles = <&fman0_10g_rx1 &fman0_10g_tx1>;
380 #address-cells = <1>;
383 reg = <0xf1000 0x1000>;
387 + #address-cells = <1>;
389 + compatible = "fsl,fman-memac-mdio";
390 + reg = <0xf3000 0x1000>;
393 ptp_timer0: rtc@fe000 {
394 compatible = "fsl,fman-rtc";
395 reg = <0xfe000 0x1000>;
397 compatible = "fsl,ls1021a-lpuart";
398 reg = <0x0 0x2950000 0x0 0x1000>;
399 interrupts = <0 48 0x4>;
400 - clocks = <&clockgen 0 0>;
401 + clocks = <&clockgen 4 0>;
406 reg = <0x0 0x29d0000 0x0 0x10000>;
407 interrupts = <0 86 0x4>;
409 - rcpm-wakeup = <&rcpm 0x0 0x20000000>;
410 + rcpm-wakeup = <&rcpm 0x00020000 0x0>;
414 @@ -789,34 +870,34 @@
418 - msi1: msi-controller@1580000 {
419 - compatible = "fsl,1s1046a-msi";
420 - reg = <0x0 0x1580000 0x0 0x10000>;
421 + msi: msi-controller@1580000 {
422 + compatible = "fsl,ls1046a-msi";
423 + #address-cells = <2>;
427 - interrupts = <0 116 0x4>,
433 - msi2: msi-controller@1590000 {
434 - compatible = "fsl,1s1046a-msi";
435 - reg = <0x0 0x1590000 0x0 0x10000>;
437 - interrupts = <0 126 0x4>,
443 - msi3: msi-controller@15a0000 {
444 - compatible = "fsl,1s1046a-msi";
445 - reg = <0x0 0x15a0000 0x0 0x10000>;
447 - interrupts = <0 160 0x4>,
452 + reg = <0x0 0x1580000 0x0 0x10000>;
453 + interrupts = <0 116 0x4>,
459 + reg = <0x0 0x1590000 0x0 0x10000>;
460 + interrupts = <0 126 0x4>,
466 + reg = <0x0 0x15a0000 0x0 0x10000>;
467 + interrupts = <0 160 0x4>,
475 @@ -826,15 +907,16 @@
476 reg-names = "regs", "config";
477 interrupts = <0 118 0x4>, /* controller interrupt */
478 <0 117 0x4>; /* PME interrupt */
479 - interrupt-names = "intr", "pme";
480 + interrupt-names = "aer";
481 #address-cells = <3>;
486 bus-range = <0x0 0xff>;
487 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
488 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
489 - msi-parent = <&msi1>;
490 + msi-parent = <&msi>;
491 #interrupt-cells = <1>;
492 interrupt-map-mask = <0 0 0 7>;
493 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
494 @@ -850,15 +932,16 @@
495 reg-names = "regs", "config";
496 interrupts = <0 128 0x4>,
498 - interrupt-names = "intr", "pme";
499 + interrupt-names = "aer";
500 #address-cells = <3>;
505 bus-range = <0x0 0xff>;
506 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
507 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
508 - msi-parent = <&msi2>;
509 + msi-parent = <&msi>;
510 #interrupt-cells = <1>;
511 interrupt-map-mask = <0 0 0 7>;
512 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
513 @@ -874,15 +957,16 @@
514 reg-names = "regs", "config";
515 interrupts = <0 162 0x4>,
517 - interrupt-names = "intr", "pme";
518 + interrupt-names = "aer";
519 #address-cells = <3>;
524 bus-range = <0x0 0xff>;
525 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
526 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
527 - msi-parent = <&msi3>;
528 + msi-parent = <&msi>;
529 #interrupt-cells = <1>;
530 interrupt-map-mask = <0 0 0 7>;
531 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
535 compatible = "fsl,ls1046a-dpaa", "simple-bus", "fsl,dpaa";
537 - compatible = "fsl,dpa-ethernet";
538 - fsl,fman-mac = <&fm1mac1>;
541 - compatible = "fsl,dpa-ethernet";
542 - fsl,fman-mac = <&fm1mac2>;
545 compatible = "fsl,dpa-ethernet";
546 fsl,fman-mac = <&fm1mac3>;
548 compatible = "fsl,dpa-ethernet";
549 fsl,fman-mac = <&fm1mac9>;
552 + compatible = "fsl,dpa-ethernet";
553 + fsl,fman-mac = <&fm1mac10>;
557 qportals: qman-portals@500000000 {