1 From 1806d342beb334c8cb0a438315ad5529262b2791 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Wed, 17 Jan 2018 14:52:50 +0800
4 Subject: [PATCH 04/30] dts: support layercape
6 This is an integrated patch for layerscape dts support.
8 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
9 Signed-off-by: Alison Wang <b18965@freescale.com>
10 Signed-off-by: Li Yang <leoyang.li@nxp.com>
11 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
12 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
13 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
14 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
15 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
16 Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
17 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
18 Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
19 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
20 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
21 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
22 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
23 Signed-off-by: Meng Yi <meng.yi@nxp.com>
24 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
25 Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
26 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
27 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
28 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
30 arch/arm/boot/dts/alpine.dtsi | 2 +-
31 arch/arm/boot/dts/axm55xx.dtsi | 2 +-
32 arch/arm/boot/dts/ecx-2000.dts | 2 +-
33 arch/arm/boot/dts/imx6ul.dtsi | 4 +-
34 arch/arm/boot/dts/keystone.dtsi | 4 +-
35 arch/arm/boot/dts/ls1021a-qds.dts | 21 +
36 arch/arm/boot/dts/ls1021a-twr.dts | 25 +
37 arch/arm/boot/dts/ls1021a.dtsi | 197 +++--
38 arch/arm/boot/dts/mt6580.dtsi | 2 +-
39 arch/arm/boot/dts/mt6589.dtsi | 2 +-
40 arch/arm/boot/dts/mt8127.dtsi | 2 +-
41 arch/arm/boot/dts/mt8135.dtsi | 2 +-
42 arch/arm/boot/dts/rk3288.dtsi | 2 +-
43 arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
44 arch/arm/boot/dts/sun7i-a20.dtsi | 4 +-
45 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
46 arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
47 arch/arm64/boot/dts/freescale/Makefile | 17 +
48 .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 123 +++
49 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++
50 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 202 +++++
51 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 138 ++++
52 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 602 ++++++++++++++
53 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 +
54 .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++
55 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++-
56 .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts | 69 ++
57 .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++
58 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 113 ++-
59 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 308 ++++++-
60 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 48 ++
61 .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 110 +++
62 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 363 ++++++++
63 .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 83 ++
64 .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 +++
65 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 218 +++++
66 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 800 ++++++++++++++++++
67 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++
68 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++
69 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 825 ++++++++++++++++++
70 arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++---
71 arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++--
72 arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +-
73 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 763 +++--------------
74 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts | 161 ++++
75 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 162 ++++
76 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 140 ++++
77 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++
78 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
79 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
80 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 919 +++++++++++++++++++++
81 .../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++
82 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 73 ++
83 .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 +
84 .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 43 +
85 .../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi | 42 +
86 .../boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi | 42 +
87 .../boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi | 42 +
88 .../boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi | 42 +
89 .../boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi | 42 +
90 .../boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi | 42 +
91 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 ++
92 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi | 130 +++
93 .../boot/dts/freescale/qoriq-qman1-portals.dtsi | 104 +++
94 arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 +
95 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +-
96 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +-
97 67 files changed, 8231 insertions(+), 1022 deletions(-)
98 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
99 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
100 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
101 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
102 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
103 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
104 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
105 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
106 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
107 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
108 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
109 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
110 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
111 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
112 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
113 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
114 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
115 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
116 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
117 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
118 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
119 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
120 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
121 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
122 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
123 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
124 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
125 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
126 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
127 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
128 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
129 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
130 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
131 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
132 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
133 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
134 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
135 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
136 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
138 --- a/arch/arm/boot/dts/alpine.dtsi
139 +++ b/arch/arm/boot/dts/alpine.dtsi
141 interrupt-controller;
142 reg = <0x0 0xfb001000 0x0 0x1000>,
143 <0x0 0xfb002000 0x0 0x2000>,
144 - <0x0 0xfb004000 0x0 0x1000>,
145 + <0x0 0xfb004000 0x0 0x2000>,
146 <0x0 0xfb006000 0x0 0x2000>;
148 <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
149 --- a/arch/arm/boot/dts/axm55xx.dtsi
150 +++ b/arch/arm/boot/dts/axm55xx.dtsi
152 #address-cells = <0>;
153 interrupt-controller;
154 reg = <0x20 0x01001000 0 0x1000>,
155 - <0x20 0x01002000 0 0x1000>,
156 + <0x20 0x01002000 0 0x2000>,
157 <0x20 0x01004000 0 0x2000>,
158 <0x20 0x01006000 0 0x2000>;
159 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
160 --- a/arch/arm/boot/dts/ecx-2000.dts
161 +++ b/arch/arm/boot/dts/ecx-2000.dts
163 interrupt-controller;
164 interrupts = <1 9 0xf04>;
165 reg = <0xfff11000 0x1000>,
166 - <0xfff12000 0x1000>,
167 + <0xfff12000 0x2000>,
171 --- a/arch/arm/boot/dts/imx6ul.dtsi
172 +++ b/arch/arm/boot/dts/imx6ul.dtsi
176 intc: interrupt-controller@00a01000 {
177 - compatible = "arm,cortex-a7-gic";
178 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
179 #interrupt-cells = <3>;
180 interrupt-controller;
181 reg = <0x00a01000 0x1000>,
182 - <0x00a02000 0x1000>,
183 + <0x00a02000 0x2000>,
187 --- a/arch/arm/boot/dts/keystone.dtsi
188 +++ b/arch/arm/boot/dts/keystone.dtsi
192 gic: interrupt-controller {
193 - compatible = "arm,cortex-a15-gic";
194 + compatible = "arm,gic-400", "arm,cortex-a15-gic";
195 #interrupt-cells = <3>;
196 interrupt-controller;
197 reg = <0x0 0x02561000 0x0 0x1000>,
198 <0x0 0x02562000 0x0 0x2000>,
199 - <0x0 0x02564000 0x0 0x1000>,
200 + <0x0 0x02564000 0x0 0x2000>,
201 <0x0 0x02566000 0x0 0x2000>;
202 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
203 IRQ_TYPE_LEVEL_HIGH)>;
204 --- a/arch/arm/boot/dts/ls1021a-qds.dts
205 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
214 + qflash0: s25fl128s@0 {
215 + compatible = "spansion,m25p80";
216 + #address-cells = <1>;
218 + spi-max-frequency = <20000000>;
224 tbi-handle = <&tbi0>;
225 phy-handle = <&sgmii_phy1c>;
238 --- a/arch/arm/boot/dts/ls1021a-twr.dts
239 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
248 + qflash0: n25q128a13@0 {
249 + compatible = "n25q128a13", "jedec,spi-nor";
250 + #address-cells = <1>;
252 + spi-max-frequency = <20000000>;
258 tbi-handle = <&tbi1>;
259 phy-handle = <&sgmii_phy2>;
283 --- a/arch/arm/boot/dts/ls1021a.dtsi
284 +++ b/arch/arm/boot/dts/ls1021a.dtsi
286 compatible = "arm,cortex-a7";
289 - clocks = <&cluster1_clk>;
290 + clocks = <&clockgen 1 0>;
294 compatible = "arm,cortex-a7";
297 - clocks = <&cluster1_clk>;
298 + clocks = <&clockgen 1 0>;
303 + compatible = "fixed-clock";
304 + #clock-cells = <0>;
305 + clock-frequency = <100000000>;
306 + clock-output-names = "sysclk";
310 compatible = "arm,armv7-timer";
311 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
312 @@ -108,11 +115,11 @@
315 gic: interrupt-controller@1400000 {
316 - compatible = "arm,cortex-a7-gic";
317 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
318 #interrupt-cells = <3>;
319 interrupt-controller;
320 reg = <0x0 0x1401000 0x0 0x1000>,
321 - <0x0 0x1402000 0x0 0x1000>,
322 + <0x0 0x1402000 0x0 0x2000>,
323 <0x0 0x1404000 0x0 0x2000>,
324 <0x0 0x1406000 0x0 0x2000>;
325 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
326 @@ -120,14 +127,14 @@
329 msi1: msi-controller@1570e00 {
330 - compatible = "fsl,1s1021a-msi";
331 + compatible = "fsl,ls1021a-msi";
332 reg = <0x0 0x1570e00 0x0 0x8>;
334 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
337 msi2: msi-controller@1570e08 {
338 - compatible = "fsl,1s1021a-msi";
339 + compatible = "fsl,ls1021a-msi";
340 reg = <0x0 0x1570e08 0x0 0x8>;
342 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
343 @@ -137,11 +144,12 @@
344 compatible = "fsl,ifc", "simple-bus";
345 reg = <0x0 0x1530000 0x0 0x10000>;
346 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
351 compatible = "fsl,ls1021a-dcfg", "syscon";
352 - reg = <0x0 0x1ee0000 0x0 0x10000>;
353 + reg = <0x0 0x1ee0000 0x0 0x1000>;
358 <0x0 0x20220520 0x0 0x4>;
359 reg-names = "ahci", "sata-ecc";
360 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
361 - clocks = <&platform_clk 1>;
362 + clocks = <&clockgen 4 1>;
366 @@ -214,41 +222,10 @@
369 clockgen: clocking@1ee1000 {
370 - #address-cells = <1>;
372 - ranges = <0x0 0x0 0x1ee1000 0x10000>;
375 - compatible = "fixed-clock";
376 - #clock-cells = <0>;
377 - clock-output-names = "sysclk";
380 - cga_pll1: pll@800 {
381 - compatible = "fsl,qoriq-core-pll-2.0";
382 - #clock-cells = <1>;
383 - reg = <0x800 0x10>;
384 - clocks = <&sysclk>;
385 - clock-output-names = "cga-pll1", "cga-pll1-div2",
389 - platform_clk: pll@c00 {
390 - compatible = "fsl,qoriq-core-pll-2.0";
391 - #clock-cells = <1>;
392 - reg = <0xc00 0x10>;
393 - clocks = <&sysclk>;
394 - clock-output-names = "platform-clk", "platform-clk-div2";
397 - cluster1_clk: clk0c0@0 {
398 - compatible = "fsl,qoriq-core-mux-2.0";
399 - #clock-cells = <0>;
401 - clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
402 - clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>;
403 - clock-output-names = "cluster1-clk";
405 + compatible = "fsl,ls1021a-clockgen";
406 + reg = <0x0 0x1ee1000 0x0 0x1000>;
407 + #clock-cells = <2>;
408 + clocks = <&sysclk>;
411 dspi0: dspi@2100000 {
413 reg = <0x0 0x2100000 0x0 0x10000>;
414 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
415 clock-names = "dspi";
416 - clocks = <&platform_clk 1>;
417 + clocks = <&clockgen 4 1>;
418 spi-num-chipselects = <6>;
421 @@ -271,12 +248,27 @@
422 reg = <0x0 0x2110000 0x0 0x10000>;
423 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
424 clock-names = "dspi";
425 - clocks = <&platform_clk 1>;
426 + clocks = <&clockgen 4 1>;
427 spi-num-chipselects = <6>;
432 + qspi: quadspi@1550000 {
433 + compatible = "fsl,ls1021a-qspi";
434 + #address-cells = <1>;
436 + reg = <0x0 0x1550000 0x0 0x10000>,
437 + <0x0 0x40000000 0x0 0x4000000>;
438 + reg-names = "QuadSPI", "QuadSPI-memory";
439 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
440 + clock-names = "qspi_en", "qspi";
441 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
443 + amba-base = <0x40000000>;
444 + status = "disabled";
448 compatible = "fsl,vf610-i2c";
449 #address-cells = <1>;
451 reg = <0x0 0x2180000 0x0 0x10000>;
452 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
454 - clocks = <&platform_clk 1>;
455 + clocks = <&clockgen 4 1>;
460 reg = <0x0 0x2190000 0x0 0x10000>;
461 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
463 - clocks = <&platform_clk 1>;
464 + clocks = <&clockgen 4 1>;
469 reg = <0x0 0x21a0000 0x0 0x10000>;
470 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
472 - clocks = <&platform_clk 1>;
473 + clocks = <&clockgen 4 1>;
478 compatible = "fsl,ls1021a-lpuart";
479 reg = <0x0 0x2960000 0x0 0x1000>;
480 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
481 - clocks = <&platform_clk 1>;
482 + clocks = <&clockgen 4 1>;
487 compatible = "fsl,ls1021a-lpuart";
488 reg = <0x0 0x2970000 0x0 0x1000>;
489 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
490 - clocks = <&platform_clk 1>;
491 + clocks = <&clockgen 4 1>;
496 compatible = "fsl,ls1021a-lpuart";
497 reg = <0x0 0x2980000 0x0 0x1000>;
498 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
499 - clocks = <&platform_clk 1>;
500 + clocks = <&clockgen 4 1>;
505 compatible = "fsl,ls1021a-lpuart";
506 reg = <0x0 0x2990000 0x0 0x1000>;
507 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
508 - clocks = <&platform_clk 1>;
509 + clocks = <&clockgen 4 1>;
513 @@ -435,16 +427,26 @@
514 compatible = "fsl,ls1021a-lpuart";
515 reg = <0x0 0x29a0000 0x0 0x1000>;
516 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
517 - clocks = <&platform_clk 1>;
518 + clocks = <&clockgen 4 1>;
523 + ftm0: ftm0@29d0000 {
524 + compatible = "fsl,ls1021a-ftm";
525 + reg = <0x0 0x29d0000 0x0 0x10000>,
526 + <0x0 0x1ee2140 0x0 0x4>;
527 + reg-names = "ftm", "FlexTimer1";
528 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
533 wdog0: watchdog@2ad0000 {
534 compatible = "fsl,imx21-wdt";
535 reg = <0x0 0x2ad0000 0x0 0x10000>;
536 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
537 - clocks = <&platform_clk 1>;
538 + clocks = <&clockgen 4 1>;
539 clock-names = "wdog-en";
543 compatible = "fsl,vf610-sai";
544 reg = <0x0 0x2b50000 0x0 0x10000>;
545 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
546 - clocks = <&platform_clk 1>, <&platform_clk 1>,
547 - <&platform_clk 1>, <&platform_clk 1>;
548 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
549 + <&clockgen 4 1>, <&clockgen 4 1>;
550 clock-names = "bus", "mclk1", "mclk2", "mclk3";
551 dma-names = "tx", "rx";
552 dmas = <&edma0 1 47>,
554 compatible = "fsl,vf610-sai";
555 reg = <0x0 0x2b60000 0x0 0x10000>;
556 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
557 - clocks = <&platform_clk 1>, <&platform_clk 1>,
558 - <&platform_clk 1>, <&platform_clk 1>;
559 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
560 + <&clockgen 4 1>, <&clockgen 4 1>;
561 clock-names = "bus", "mclk1", "mclk2", "mclk3";
562 dma-names = "tx", "rx";
563 dmas = <&edma0 1 45>,
564 @@ -489,16 +491,31 @@
567 clock-names = "dmamux0", "dmamux1";
568 - clocks = <&platform_clk 1>,
570 + clocks = <&clockgen 4 1>,
574 + qdma: qdma@8390000 {
575 + compatible = "fsl,ls1021a-qdma";
576 + reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */
577 + <0x0 0x8399000 0x0 0x1000>, /* Status regs */
578 + <0x0 0x839a000 0x0 0x2000>; /* Block regs */
579 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
580 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
581 + interrupt-names = "qdma-error", "qdma-queue";
584 + status-sizes = <64>;
585 + queue-sizes = <64 64>;
590 compatible = "fsl,ls1021a-dcu";
591 reg = <0x0 0x2ce0000 0x0 0x10000>;
592 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
593 - clocks = <&platform_clk 0>,
595 + clocks = <&clockgen 4 0>,
597 clock-names = "dcu", "pix";
601 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
603 snps,quirk-frame-length-adjustment = <0x20>;
606 snps,dis_rxdet_inp3_quirk;
610 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
611 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
612 reg-names = "regs", "config";
613 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
614 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
615 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
616 + interrupt-names = "pme", "aer";
617 fsl,pcie-scfg = <&scfg 0>;
618 #address-cells = <3>;
621 bus-range = <0x0 0xff>;
622 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
623 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
624 - msi-parent = <&msi1>;
625 + msi-parent = <&msi1>, <&msi2>;
626 #interrupt-cells = <1>;
627 interrupt-map-mask = <0 0 0 7>;
628 interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
630 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
631 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
632 reg-names = "regs", "config";
633 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
634 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
635 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
636 + interrupt-names = "pme", "aer";
637 fsl,pcie-scfg = <&scfg 1>;
638 #address-cells = <3>;
641 bus-range = <0x0 0xff>;
642 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
643 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
644 - msi-parent = <&msi2>;
645 + msi-parent = <&msi1>, <&msi2>;
646 #interrupt-cells = <1>;
647 interrupt-map-mask = <0 0 0 7>;
648 interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
650 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
651 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
654 + can0: can@2a70000 {
655 + compatible = "fsl,ls1021ar2-flexcan";
656 + reg = <0x0 0x2a70000 0x0 0x1000>;
657 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
658 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
659 + clock-names = "ipg", "per";
661 + status = "disabled";
664 + can1: can@2a80000 {
665 + compatible = "fsl,ls1021ar2-flexcan";
666 + reg = <0x0 0x2a80000 0x0 0x1000>;
667 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
668 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
669 + clock-names = "ipg", "per";
671 + status = "disabled";
674 + can2: can@2a90000 {
675 + compatible = "fsl,ls1021ar2-flexcan";
676 + reg = <0x0 0x2a90000 0x0 0x1000>;
677 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
678 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
679 + clock-names = "ipg", "per";
681 + status = "disabled";
684 + can3: can@2aa0000 {
685 + compatible = "fsl,ls1021ar2-flexcan";
686 + reg = <0x0 0x2aa0000 0x0 0x1000>;
687 + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
688 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
689 + clock-names = "ipg", "per";
691 + status = "disabled";
695 --- a/arch/arm/boot/dts/mt6580.dtsi
696 +++ b/arch/arm/boot/dts/mt6580.dtsi
698 #interrupt-cells = <3>;
699 interrupt-parent = <&gic>;
700 reg = <0x10211000 0x1000>,
701 - <0x10212000 0x1000>,
702 + <0x10212000 0x2000>,
706 --- a/arch/arm/boot/dts/mt6589.dtsi
707 +++ b/arch/arm/boot/dts/mt6589.dtsi
709 #interrupt-cells = <3>;
710 interrupt-parent = <&gic>;
711 reg = <0x10211000 0x1000>,
712 - <0x10212000 0x1000>,
713 + <0x10212000 0x2000>,
717 --- a/arch/arm/boot/dts/mt8127.dtsi
718 +++ b/arch/arm/boot/dts/mt8127.dtsi
720 #interrupt-cells = <3>;
721 interrupt-parent = <&gic>;
722 reg = <0 0x10211000 0 0x1000>,
723 - <0 0x10212000 0 0x1000>,
724 + <0 0x10212000 0 0x2000>,
725 <0 0x10214000 0 0x2000>,
726 <0 0x10216000 0 0x2000>;
728 --- a/arch/arm/boot/dts/mt8135.dtsi
729 +++ b/arch/arm/boot/dts/mt8135.dtsi
731 #interrupt-cells = <3>;
732 interrupt-parent = <&gic>;
733 reg = <0 0x10211000 0 0x1000>,
734 - <0 0x10212000 0 0x1000>,
735 + <0 0x10212000 0 0x2000>,
736 <0 0x10214000 0 0x2000>,
737 <0 0x10216000 0 0x2000>;
739 --- a/arch/arm/boot/dts/rk3288.dtsi
740 +++ b/arch/arm/boot/dts/rk3288.dtsi
741 @@ -1109,7 +1109,7 @@
742 #address-cells = <0>;
744 reg = <0xffc01000 0x1000>,
745 - <0xffc02000 0x1000>,
746 + <0xffc02000 0x2000>,
749 interrupts = <GIC_PPI 9 0xf04>;
750 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
751 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
753 gic: interrupt-controller@01c81000 {
754 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
755 reg = <0x01c81000 0x1000>,
756 - <0x01c82000 0x1000>,
757 + <0x01c82000 0x2000>,
760 interrupt-controller;
761 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
762 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
763 @@ -1685,9 +1685,9 @@
766 gic: interrupt-controller@01c81000 {
767 - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
768 + compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
769 reg = <0x01c81000 0x1000>,
770 - <0x01c82000 0x1000>,
771 + <0x01c82000 0x2000>,
774 interrupt-controller;
775 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
776 +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
778 gic: interrupt-controller@01c81000 {
779 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
780 reg = <0x01c81000 0x1000>,
781 - <0x01c82000 0x1000>,
782 + <0x01c82000 0x2000>,
785 interrupt-controller;
786 --- a/arch/arm/boot/dts/sun9i-a80.dtsi
787 +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
789 gic: interrupt-controller@01c41000 {
790 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
791 reg = <0x01c41000 0x1000>,
792 - <0x01c42000 0x1000>,
793 + <0x01c42000 0x2000>,
796 interrupt-controller;
797 --- a/arch/arm64/boot/dts/freescale/Makefile
798 +++ b/arch/arm64/boot/dts/freescale/Makefile
800 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
801 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
802 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
803 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
804 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
805 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
806 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
807 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
808 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
809 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
810 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
811 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
812 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
813 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
814 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
815 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
816 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
817 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
818 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
819 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
820 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
821 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
824 subdir-y := $(dts-dirs)
826 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
829 + * Device Tree file for NXP LS1012A 2G5RDB Board.
831 + * Copyright 2017 NXP
833 + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
835 + * This file is dual-licensed: you can use it either under the terms
836 + * of the GPLv2 or the X11 license, at your option. Note that this dual
837 + * licensing only applies to this file, and not this project as a
840 + * a) This library is free software; you can redistribute it and/or
841 + * modify it under the terms of the GNU General Public License as
842 + * published by the Free Software Foundation; either version 2 of the
843 + * License, or (at your option) any later version.
845 + * This library is distributed in the hope that it will be useful,
846 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
847 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
848 + * GNU General Public License for more details.
850 + * Or, alternatively,
852 + * b) Permission is hereby granted, free of charge, to any person
853 + * obtaining a copy of this software and associated documentation
854 + * files (the "Software"), to deal in the Software without
855 + * restriction, including without limitation the rights to use,
856 + * copy, modify, merge, publish, distribute, sublicense, and/or
857 + * sell copies of the Software, and to permit persons to whom the
858 + * Software is furnished to do so, subject to the following
861 + * The above copyright notice and this permission notice shall be
862 + * included in all copies or substantial portions of the Software.
864 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
865 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
866 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
867 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
868 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
869 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
870 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
871 + * OTHER DEALINGS IN THE SOFTWARE.
875 +#include "fsl-ls1012a.dtsi"
878 + model = "LS1012A 2G5RDB Board";
879 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
882 + ethernet0 = &pfe_mac0;
883 + ethernet1 = &pfe_mac1;
900 + qflash0: s25fs512s@0 {
901 + compatible = "spansion,m25p80";
902 + #address-cells = <1>;
904 + spi-max-frequency = <20000000>;
916 + #address-cells = <1>;
920 + compatible = "fsl,pfe-gemac-port";
921 + #address-cells = <1>;
923 + reg = <0x0>; /* GEM_ID */
924 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
925 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
926 + fsl,mdio-mux-val = <0x0>;
927 + phy-mode = "sgmii-2500";
928 + fsl,pfe-phy-if-flags = <0x0>;
931 + reg = <0x1>; /* enabled/disabled */
936 + compatible = "fsl,pfe-gemac-port";
937 + #address-cells = <1>;
939 + reg = <0x1>; /* GEM_ID */
940 + fsl,gemac-bus-id = < 0x0>; /* BUS_ID */
941 + fsl,gemac-phy-id = < 0x2>; /* PHY_ID */
942 + fsl,mdio-mux-val = <0x0>;
943 + phy-mode = "sgmii-2500";
944 + fsl,pfe-phy-if-flags = <0x0>;
947 + reg = <0x0>; /* enabled/disabled */
952 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
955 + * Device Tree file for Freescale LS1012A Freedom Board.
957 + * Copyright 2016 Freescale Semiconductor, Inc.
959 + * This file is dual-licensed: you can use it either under the terms
960 + * of the GPLv2 or the X11 license, at your option. Note that this dual
961 + * licensing only applies to this file, and not this project as a
964 + * a) This library is free software; you can redistribute it and/or
965 + * modify it under the terms of the GNU General Public License as
966 + * published by the Free Software Foundation; either version 2 of the
967 + * License, or (at your option) any later version.
969 + * This library is distributed in the hope that it will be useful,
970 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
971 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
972 + * GNU General Public License for more details.
974 + * Or, alternatively,
976 + * b) Permission is hereby granted, free of charge, to any person
977 + * obtaining a copy of this software and associated documentation
978 + * files (the "Software"), to deal in the Software without
979 + * restriction, including without limitation the rights to use,
980 + * copy, modify, merge, publish, distribute, sublicense, and/or
981 + * sell copies of the Software, and to permit persons to whom the
982 + * Software is furnished to do so, subject to the following
985 + * The above copyright notice and this permission notice shall be
986 + * included in all copies or substantial portions of the Software.
988 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
989 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
990 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
991 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
992 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
993 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
994 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
995 + * OTHER DEALINGS IN THE SOFTWARE.
999 +#include "fsl-ls1012a.dtsi"
1002 + model = "LS1012A Freedom Board";
1003 + compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
1006 + ethernet0 = &pfe_mac0;
1007 + ethernet1 = &pfe_mac1;
1010 + sys_mclk: clock-mclk {
1011 + compatible = "fixed-clock";
1012 + #clock-cells = <0>;
1013 + clock-frequency = <25000000>;
1016 + reg_1p8v: regulator-1p8v {
1017 + compatible = "regulator-fixed";
1018 + regulator-name = "1P8V";
1019 + regulator-min-microvolt = <1800000>;
1020 + regulator-max-microvolt = <1800000>;
1021 + regulator-always-on;
1025 + compatible = "simple-audio-card";
1026 + simple-audio-card,format = "i2s";
1027 + simple-audio-card,widgets =
1028 + "Microphone", "Microphone Jack",
1029 + "Headphone", "Headphone Jack",
1030 + "Speaker", "Speaker Ext",
1031 + "Line", "Line In Jack";
1032 + simple-audio-card,routing =
1033 + "MIC_IN", "Microphone Jack",
1034 + "Microphone Jack", "Mic Bias",
1035 + "LINE_IN", "Line In Jack",
1036 + "Headphone Jack", "HP_OUT",
1037 + "Speaker Ext", "LINE_OUT";
1039 + simple-audio-card,cpu {
1040 + sound-dai = <&sai2>;
1045 + simple-audio-card,codec {
1046 + sound-dai = <&codec>;
1049 + system-clock-frequency = <25000000>;
1061 + codec: sgtl5000@a {
1062 + #sound-dai-cells = <0>;
1063 + compatible = "fsl,sgtl5000";
1065 + VDDA-supply = <®_1p8v>;
1066 + VDDIO-supply = <®_1p8v>;
1067 + clocks = <&sys_mclk>;
1076 + qflash0: s25fs512s@0 {
1077 + compatible = "spansion,m25p80";
1078 + #address-cells = <1>;
1079 + #size-cells = <1>;
1081 + spi-max-frequency = <20000000>;
1088 + #address-cells = <1>;
1089 + #size-cells = <0>;
1092 + compatible = "fsl,pfe-gemac-port";
1093 + #address-cells = <1>;
1094 + #size-cells = <0>;
1095 + reg = <0x0>; /* GEM_ID */
1096 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1097 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1098 + fsl,mdio-mux-val = <0x0>;
1099 + phy-mode = "sgmii";
1100 + fsl,pfe-phy-if-flags = <0x0>;
1103 + reg = <0x1>; /* enabled/disabled */
1108 + compatible = "fsl,pfe-gemac-port";
1109 + #address-cells = <1>;
1110 + #size-cells = <0>;
1111 + reg = <0x1>; /* GEM_ID */
1112 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
1113 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
1114 + fsl,mdio-mux-val = <0x0>;
1115 + phy-mode = "sgmii";
1116 + fsl,pfe-phy-if-flags = <0x0>;
1119 + reg = <0x0>; /* enabled/disabled */
1132 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
1135 + * Device Tree file for Freescale LS1012A QDS Board.
1137 + * Copyright 2016 Freescale Semiconductor, Inc.
1139 + * This file is dual-licensed: you can use it either under the terms
1140 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1141 + * licensing only applies to this file, and not this project as a
1144 + * a) This library is free software; you can redistribute it and/or
1145 + * modify it under the terms of the GNU General Public License as
1146 + * published by the Free Software Foundation; either version 2 of the
1147 + * License, or (at your option) any later version.
1149 + * This library is distributed in the hope that it will be useful,
1150 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1151 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1152 + * GNU General Public License for more details.
1154 + * Or, alternatively,
1156 + * b) Permission is hereby granted, free of charge, to any person
1157 + * obtaining a copy of this software and associated documentation
1158 + * files (the "Software"), to deal in the Software without
1159 + * restriction, including without limitation the rights to use,
1160 + * copy, modify, merge, publish, distribute, sublicense, and/or
1161 + * sell copies of the Software, and to permit persons to whom the
1162 + * Software is furnished to do so, subject to the following
1165 + * The above copyright notice and this permission notice shall be
1166 + * included in all copies or substantial portions of the Software.
1168 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1169 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1170 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1171 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1172 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1173 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1174 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1175 + * OTHER DEALINGS IN THE SOFTWARE.
1179 +#include "fsl-ls1012a.dtsi"
1182 + model = "LS1012A QDS Board";
1183 + compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
1186 + ethernet0 = &pfe_mac0;
1187 + ethernet1 = &pfe_mac1;
1190 + sys_mclk: clock-mclk {
1191 + compatible = "fixed-clock";
1192 + #clock-cells = <0>;
1193 + clock-frequency = <24576000>;
1196 + reg_3p3v: regulator-3p3v {
1197 + compatible = "regulator-fixed";
1198 + regulator-name = "3P3V";
1199 + regulator-min-microvolt = <3300000>;
1200 + regulator-max-microvolt = <3300000>;
1201 + regulator-always-on;
1205 + compatible = "simple-audio-card";
1206 + simple-audio-card,format = "i2s";
1207 + simple-audio-card,widgets =
1208 + "Microphone", "Microphone Jack",
1209 + "Headphone", "Headphone Jack",
1210 + "Speaker", "Speaker Ext",
1211 + "Line", "Line In Jack";
1212 + simple-audio-card,routing =
1213 + "MIC_IN", "Microphone Jack",
1214 + "Microphone Jack", "Mic Bias",
1215 + "LINE_IN", "Line In Jack",
1216 + "Headphone Jack", "HP_OUT",
1217 + "Speaker Ext", "LINE_OUT";
1219 + simple-audio-card,cpu {
1220 + sound-dai = <&sai2>;
1225 + simple-audio-card,codec {
1226 + sound-dai = <&codec>;
1229 + system-clock-frequency = <24576000>;
1246 + compatible = "nxp,pca9547";
1248 + #address-cells = <1>;
1249 + #size-cells = <0>;
1252 + #address-cells = <1>;
1253 + #size-cells = <0>;
1256 + codec: sgtl5000@a {
1257 + #sound-dai-cells = <0>;
1258 + compatible = "fsl,sgtl5000";
1260 + VDDA-supply = <®_3p3v>;
1261 + VDDIO-supply = <®_3p3v>;
1262 + clocks = <&sys_mclk>;
1273 + qflash0: s25fs512s@0 {
1274 + compatible = "spansion,m25p80";
1275 + #address-cells = <1>;
1276 + #size-cells = <1>;
1277 + spi-max-frequency = <20000000>;
1285 + #address-cells = <1>;
1286 + #size-cells = <0>;
1289 + compatible = "fsl,pfe-gemac-port";
1290 + #address-cells = <1>;
1291 + #size-cells = <0>;
1292 + reg = <0x0>; /* GEM_ID */
1293 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1294 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
1295 + fsl,mdio-mux-val = <0x2>;
1296 + phy-mode = "sgmii-2500";
1297 + fsl,pfe-phy-if-flags = <0x0>;
1300 + reg = <0x1>; /* enabled/disabled */
1305 + compatible = "fsl,pfe-gemac-port";
1306 + #address-cells = <1>;
1307 + #size-cells = <0>;
1308 + reg = <0x1>; /* GEM_ID */
1309 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
1310 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1311 + fsl,mdio-mux-val = <0x3>;
1312 + phy-mode = "sgmii-2500";
1313 + fsl,pfe-phy-if-flags = <0x0>;
1316 + reg = <0x0>; /* enabled/disabled */
1337 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1340 + * Device Tree file for Freescale LS1012A RDB Board.
1342 + * Copyright 2016 Freescale Semiconductor, Inc.
1344 + * This file is dual-licensed: you can use it either under the terms
1345 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1346 + * licensing only applies to this file, and not this project as a
1349 + * a) This library is free software; you can redistribute it and/or
1350 + * modify it under the terms of the GNU General Public License as
1351 + * published by the Free Software Foundation; either version 2 of the
1352 + * License, or (at your option) any later version.
1354 + * This library is distributed in the hope that it will be useful,
1355 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1356 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1357 + * GNU General Public License for more details.
1359 + * Or, alternatively,
1361 + * b) Permission is hereby granted, free of charge, to any person
1362 + * obtaining a copy of this software and associated documentation
1363 + * files (the "Software"), to deal in the Software without
1364 + * restriction, including without limitation the rights to use,
1365 + * copy, modify, merge, publish, distribute, sublicense, and/or
1366 + * sell copies of the Software, and to permit persons to whom the
1367 + * Software is furnished to do so, subject to the following
1370 + * The above copyright notice and this permission notice shall be
1371 + * included in all copies or substantial portions of the Software.
1373 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1374 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1375 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1376 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1377 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1378 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1379 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1380 + * OTHER DEALINGS IN THE SOFTWARE.
1384 +#include "fsl-ls1012a.dtsi"
1387 + model = "LS1012A RDB Board";
1388 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1391 + ethernet0 = &pfe_mac0;
1392 + ethernet1 = &pfe_mac1;
1413 + qflash0: s25fs512s@0 {
1414 + compatible = "spansion,m25p80";
1415 + #address-cells = <1>;
1416 + #size-cells = <1>;
1417 + spi-max-frequency = <20000000>;
1442 + #address-cells = <1>;
1443 + #size-cells = <0>;
1446 + compatible = "fsl,pfe-gemac-port";
1447 + #address-cells = <1>;
1448 + #size-cells = <0>;
1449 + reg = <0x0>; /* GEM_ID */
1450 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
1451 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
1452 + fsl,mdio-mux-val = <0x0>;
1453 + phy-mode = "sgmii";
1454 + fsl,pfe-phy-if-flags = <0x0>;
1457 + reg = <0x1>; /* enabled/disabled */
1462 + compatible = "fsl,pfe-gemac-port";
1463 + #address-cells = <1>;
1464 + #size-cells = <0>;
1465 + reg = <0x1>; /* GEM_ID */
1466 + fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
1467 + fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
1468 + fsl,mdio-mux-val = <0x0>;
1469 + phy-mode = "rgmii-txid";
1470 + fsl,pfe-phy-if-flags = <0x0>;
1473 + reg = <0x0>; /* enabled/disabled */
1478 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1481 + * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1483 + * Copyright 2016 Freescale Semiconductor, Inc.
1485 + * This file is dual-licensed: you can use it either under the terms
1486 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1487 + * licensing only applies to this file, and not this project as a
1490 + * a) This library is free software; you can redistribute it and/or
1491 + * modify it under the terms of the GNU General Public License as
1492 + * published by the Free Software Foundation; either version 2 of the
1493 + * License, or (at your option) any later version.
1495 + * This library is distributed in the hope that it will be useful,
1496 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1497 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1498 + * GNU General Public License for more details.
1500 + * Or, alternatively,
1502 + * b) Permission is hereby granted, free of charge, to any person
1503 + * obtaining a copy of this software and associated documentation
1504 + * files (the "Software"), to deal in the Software without
1505 + * restriction, including without limitation the rights to use,
1506 + * copy, modify, merge, publish, distribute, sublicense, and/or
1507 + * sell copies of the Software, and to permit persons to whom the
1508 + * Software is furnished to do so, subject to the following
1511 + * The above copyright notice and this permission notice shall be
1512 + * included in all copies or substantial portions of the Software.
1514 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1515 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1516 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1517 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1518 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1519 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1520 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1521 + * OTHER DEALINGS IN THE SOFTWARE.
1524 +#include <dt-bindings/interrupt-controller/arm-gic.h>
1525 +#include <dt-bindings/thermal/thermal.h>
1528 + compatible = "fsl,ls1012a";
1529 + interrupt-parent = <&gic>;
1530 + #address-cells = <2>;
1531 + #size-cells = <2>;
1539 + sec_mon = &sec_mon;
1543 + #address-cells = <1>;
1544 + #size-cells = <0>;
1547 + device_type = "cpu";
1548 + compatible = "arm,cortex-a53";
1550 + clocks = <&clockgen 1 0>;
1551 + #cooling-cells = <2>;
1552 + cpu-idle-states = <&CPU_PH20>;
1558 + * PSCI node is not added default, U-boot will add missing
1559 + * parts if it determines to use PSCI.
1561 + entry-method = "arm,psci";
1563 + CPU_PH20: cpu-ph20 {
1564 + compatible = "arm,idle-state";
1565 + idle-state-name = "PH20";
1566 + arm,psci-suspend-param = <0x0>;
1567 + entry-latency-us = <1000>;
1568 + exit-latency-us = <1000>;
1569 + min-residency-us = <3000>;
1574 + compatible = "fixed-clock";
1575 + #clock-cells = <0>;
1576 + clock-frequency = <125000000>;
1577 + clock-output-names = "sysclk";
1580 + coreclk: coreclk {
1581 + compatible = "fixed-clock";
1582 + #clock-cells = <0>;
1583 + clock-frequency = <100000000>;
1584 + clock-output-names = "coreclk";
1588 + compatible = "arm,armv8-timer";
1589 + interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
1590 + <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
1591 + <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
1592 + <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
1596 + compatible = "arm,armv8-pmuv3";
1597 + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
1600 + gic: interrupt-controller@1400000 {
1601 + compatible = "arm,gic-400";
1602 + #interrupt-cells = <3>;
1603 + interrupt-controller;
1604 + reg = <0x0 0x1401000 0 0x1000>, /* GICD */
1605 + <0x0 0x1402000 0 0x2000>, /* GICC */
1606 + <0x0 0x1404000 0 0x2000>, /* GICH */
1607 + <0x0 0x1406000 0 0x2000>; /* GICV */
1608 + interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
1612 + compatible = "syscon-reboot";
1619 + compatible = "simple-bus";
1620 + #address-cells = <2>;
1621 + #size-cells = <2>;
1624 + scfg: scfg@1570000 {
1625 + compatible = "fsl,ls1012a-scfg", "syscon";
1626 + reg = <0x0 0x1570000 0x0 0x10000>;
1630 + crypto: crypto@1700000 {
1631 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
1633 + fsl,sec-era = <8>;
1634 + #address-cells = <1>;
1635 + #size-cells = <1>;
1636 + ranges = <0x0 0x00 0x1700000 0x100000>;
1637 + reg = <0x00 0x1700000 0x0 0x100000>;
1638 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
1640 + sec_jr0: jr@10000 {
1641 + compatible = "fsl,sec-v5.4-job-ring",
1642 + "fsl,sec-v5.0-job-ring",
1643 + "fsl,sec-v4.0-job-ring";
1644 + reg = <0x10000 0x10000>;
1645 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1648 + sec_jr1: jr@20000 {
1649 + compatible = "fsl,sec-v5.4-job-ring",
1650 + "fsl,sec-v5.0-job-ring",
1651 + "fsl,sec-v4.0-job-ring";
1652 + reg = <0x20000 0x10000>;
1653 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1656 + sec_jr2: jr@30000 {
1657 + compatible = "fsl,sec-v5.4-job-ring",
1658 + "fsl,sec-v5.0-job-ring",
1659 + "fsl,sec-v4.0-job-ring";
1660 + reg = <0x30000 0x10000>;
1661 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1664 + sec_jr3: jr@40000 {
1665 + compatible = "fsl,sec-v5.4-job-ring",
1666 + "fsl,sec-v5.0-job-ring",
1667 + "fsl,sec-v4.0-job-ring";
1668 + reg = <0x40000 0x10000>;
1669 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1673 + compatible = "fsl,sec-v5.4-dma",
1674 + "fsl,sec-v5.0-dma",
1675 + "fsl,sec-v4.0-dma";
1679 + compatible = "fsl,sec-v5.4-rtic",
1680 + "fsl,sec-v5.0-rtic",
1681 + "fsl,sec-v4.0-rtic";
1682 + #address-cells = <1>;
1683 + #size-cells = <1>;
1684 + reg = <0x60000 0x100 0x60e00 0x18>;
1685 + ranges = <0x0 0x60100 0x500>;
1687 + rtic_a: rtic-a@0 {
1688 + compatible = "fsl,sec-v5.4-rtic-memory",
1689 + "fsl,sec-v5.0-rtic-memory",
1690 + "fsl,sec-v4.0-rtic-memory";
1691 + reg = <0x00 0x20 0x100 0x100>;
1694 + rtic_b: rtic-b@20 {
1695 + compatible = "fsl,sec-v5.4-rtic-memory",
1696 + "fsl,sec-v5.0-rtic-memory",
1697 + "fsl,sec-v4.0-rtic-memory";
1698 + reg = <0x20 0x20 0x200 0x100>;
1701 + rtic_c: rtic-c@40 {
1702 + compatible = "fsl,sec-v5.4-rtic-memory",
1703 + "fsl,sec-v5.0-rtic-memory",
1704 + "fsl,sec-v4.0-rtic-memory";
1705 + reg = <0x40 0x20 0x300 0x100>;
1708 + rtic_d: rtic-d@60 {
1709 + compatible = "fsl,sec-v5.4-rtic-memory",
1710 + "fsl,sec-v5.0-rtic-memory",
1711 + "fsl,sec-v4.0-rtic-memory";
1712 + reg = <0x60 0x20 0x400 0x100>;
1717 + sec_mon: sec_mon@1e90000 {
1718 + compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
1719 + "fsl,sec-v4.0-mon";
1720 + reg = <0x0 0x1e90000 0x0 0x10000>;
1721 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
1722 + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
1725 + dcfg: dcfg@1ee0000 {
1726 + compatible = "fsl,ls1012a-dcfg",
1728 + reg = <0x0 0x1ee0000 0x0 0x10000>;
1732 + clockgen: clocking@1ee1000 {
1733 + compatible = "fsl,ls1012a-clockgen";
1734 + reg = <0x0 0x1ee1000 0x0 0x1000>;
1735 + #clock-cells = <2>;
1736 + clocks = <&sysclk &coreclk>;
1737 + clock-names = "sysclk", "coreclk";
1740 + tmu: tmu@1f00000 {
1741 + compatible = "fsl,qoriq-tmu";
1742 + reg = <0x0 0x1f00000 0x0 0x10000>;
1743 + interrupts = <0 33 0x4>;
1744 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
1745 + fsl,tmu-calibration = <0x00000000 0x00000026
1746 + 0x00000001 0x0000002d
1747 + 0x00000002 0x00000032
1748 + 0x00000003 0x00000039
1749 + 0x00000004 0x0000003f
1750 + 0x00000005 0x00000046
1751 + 0x00000006 0x0000004d
1752 + 0x00000007 0x00000054
1753 + 0x00000008 0x0000005a
1754 + 0x00000009 0x00000061
1755 + 0x0000000a 0x0000006a
1756 + 0x0000000b 0x00000071
1758 + 0x00010000 0x00000025
1759 + 0x00010001 0x0000002c
1760 + 0x00010002 0x00000035
1761 + 0x00010003 0x0000003d
1762 + 0x00010004 0x00000045
1763 + 0x00010005 0x0000004e
1764 + 0x00010006 0x00000057
1765 + 0x00010007 0x00000061
1766 + 0x00010008 0x0000006b
1767 + 0x00010009 0x00000076
1769 + 0x00020000 0x00000029
1770 + 0x00020001 0x00000033
1771 + 0x00020002 0x0000003d
1772 + 0x00020003 0x00000049
1773 + 0x00020004 0x00000056
1774 + 0x00020005 0x00000061
1775 + 0x00020006 0x0000006d
1777 + 0x00030000 0x00000021
1778 + 0x00030001 0x0000002a
1779 + 0x00030002 0x0000003c
1780 + 0x00030003 0x0000004e>;
1782 + #thermal-sensor-cells = <1>;
1786 + cpu_thermal: cpu-thermal {
1787 + polling-delay-passive = <1000>;
1788 + polling-delay = <5000>;
1789 + thermal-sensors = <&tmu 0>;
1792 + cpu_alert: cpu-alert {
1793 + temperature = <85000>;
1794 + hysteresis = <2000>;
1798 + cpu_crit: cpu-crit {
1799 + temperature = <95000>;
1800 + hysteresis = <2000>;
1801 + type = "critical";
1807 + trip = <&cpu_alert>;
1809 + <&cpu0 THERMAL_NO_LIMIT
1810 + THERMAL_NO_LIMIT>;
1816 + esdhc0: esdhc@1560000 {
1817 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1818 + reg = <0x0 0x1560000 0x0 0x10000>;
1819 + interrupts = <0 62 0x4>;
1820 + clocks = <&clockgen 4 0>;
1821 + voltage-ranges = <1800 1800 3300 3300>;
1825 + status = "disabled";
1828 + esdhc1: esdhc@1580000 {
1829 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1830 + reg = <0x0 0x1580000 0x0 0x10000>;
1831 + interrupts = <0 65 0x4>;
1832 + clocks = <&clockgen 4 0>;
1833 + voltage-ranges = <1800 1800 3300 3300>;
1838 + status = "disabled";
1841 + rcpm: rcpm@1ee2000 {
1842 + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
1843 + reg = <0x0 0x1ee2000 0x0 0x1000>;
1844 + fsl,#rcpm-wakeup-cells = <1>;
1847 + ftm0: ftm0@29d0000 {
1848 + compatible = "fsl,ls1012a-ftm";
1849 + reg = <0x0 0x29d0000 0x0 0x10000>,
1850 + <0x0 0x1ee2140 0x0 0x4>;
1851 + reg-names = "ftm", "FlexTimer1";
1852 + interrupts = <0 86 0x4>;
1856 + i2c0: i2c@2180000 {
1857 + compatible = "fsl,vf610-i2c";
1858 + #address-cells = <1>;
1859 + #size-cells = <0>;
1860 + reg = <0x0 0x2180000 0x0 0x10000>;
1861 + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1862 + clocks = <&clockgen 4 3>;
1863 + status = "disabled";
1866 + i2c1: i2c@2190000 {
1867 + compatible = "fsl,vf610-i2c";
1868 + #address-cells = <1>;
1869 + #size-cells = <0>;
1870 + reg = <0x0 0x2190000 0x0 0x10000>;
1871 + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1872 + clocks = <&clockgen 4 3>;
1873 + status = "disabled";
1876 + duart0: serial@21c0500 {
1877 + compatible = "fsl,ns16550", "ns16550a";
1878 + reg = <0x00 0x21c0500 0x0 0x100>;
1879 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1880 + clocks = <&clockgen 4 0>;
1881 + status = "disabled";
1884 + duart1: serial@21c0600 {
1885 + compatible = "fsl,ns16550", "ns16550a";
1886 + reg = <0x00 0x21c0600 0x0 0x100>;
1887 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1888 + clocks = <&clockgen 4 0>;
1889 + status = "disabled";
1892 + gpio0: gpio@2300000 {
1893 + compatible = "fsl,qoriq-gpio";
1894 + reg = <0x0 0x2300000 0x0 0x10000>;
1895 + interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
1897 + #gpio-cells = <2>;
1898 + interrupt-controller;
1899 + #interrupt-cells = <2>;
1902 + gpio1: gpio@2310000 {
1903 + compatible = "fsl,qoriq-gpio";
1904 + reg = <0x0 0x2310000 0x0 0x10000>;
1905 + interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
1907 + #gpio-cells = <2>;
1908 + interrupt-controller;
1909 + #interrupt-cells = <2>;
1912 + qspi: quadspi@1550000 {
1913 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1914 + #address-cells = <1>;
1915 + #size-cells = <0>;
1916 + reg = <0x0 0x1550000 0x0 0x10000>,
1917 + <0x0 0x40000000 0x0 0x10000000>;
1918 + reg-names = "QuadSPI", "QuadSPI-memory";
1919 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1920 + clock-names = "qspi_en", "qspi";
1921 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1923 + fsl,qspi-has-second-chip;
1924 + status = "disabled";
1927 + wdog0: wdog@2ad0000 {
1928 + compatible = "fsl,ls1012a-wdt",
1930 + reg = <0x0 0x2ad0000 0x0 0x10000>;
1931 + interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
1932 + clocks = <&clockgen 4 0>;
1936 + sai1: sai@2b50000 {
1937 + #sound-dai-cells = <0>;
1938 + compatible = "fsl,vf610-sai";
1939 + reg = <0x0 0x2b50000 0x0 0x10000>;
1940 + interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
1941 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1942 + <&clockgen 4 3>, <&clockgen 4 3>;
1943 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1944 + dma-names = "tx", "rx";
1945 + dmas = <&edma0 1 47>,
1947 + status = "disabled";
1950 + sai2: sai@2b60000 {
1951 + #sound-dai-cells = <0>;
1952 + compatible = "fsl,vf610-sai";
1953 + reg = <0x0 0x2b60000 0x0 0x10000>;
1954 + interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
1955 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1956 + <&clockgen 4 3>, <&clockgen 4 3>;
1957 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1958 + dma-names = "tx", "rx";
1959 + dmas = <&edma0 1 45>,
1961 + status = "disabled";
1964 + edma0: edma@2c00000 {
1966 + compatible = "fsl,vf610-edma";
1967 + reg = <0x0 0x2c00000 0x0 0x10000>,
1968 + <0x0 0x2c10000 0x0 0x10000>,
1969 + <0x0 0x2c20000 0x0 0x10000>;
1970 + interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
1971 + <0 103 IRQ_TYPE_LEVEL_HIGH>;
1972 + interrupt-names = "edma-tx", "edma-err";
1973 + dma-channels = <32>;
1975 + clock-names = "dmamux0", "dmamux1";
1976 + clocks = <&clockgen 4 3>,
1980 + usb0: usb3@2f00000 {
1981 + compatible = "snps,dwc3";
1982 + reg = <0x0 0x2f00000 0x0 0x10000>;
1983 + interrupts = <0 60 0x4>;
1985 + snps,quirk-frame-length-adjustment = <0x20>;
1986 + snps,dis_rxdet_inp3_quirk;
1989 + usb1: usb2@8600000 {
1990 + compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
1991 + reg = <0x0 0x8600000 0x0 0x1000>;
1992 + interrupts = <0 139 0x4>;
1994 + phy_type = "ulpi";
1997 + sata: sata@3200000 {
1998 + compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
1999 + reg = <0x0 0x3200000 0x0 0x10000>,
2000 + <0x0 0x20140520 0x0 0x4>;
2001 + reg-names = "ahci", "sata-ecc";
2002 + interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
2003 + clocks = <&clockgen 4 0>;
2005 + status = "disabled";
2008 + msi: msi-controller1@1572000 {
2009 + compatible = "fsl,ls1012a-msi";
2010 + reg = <0x0 0x1572000 0x0 0x8>;
2012 + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
2015 + pcie: pcie@3400000 {
2016 + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
2017 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
2018 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
2019 + reg-names = "regs", "config";
2020 + interrupts = <0 118 0x4>, /* AER interrupt */
2021 + <0 117 0x4>; /* PME interrupt */
2022 + interrupt-names = "aer", "pme";
2023 + #address-cells = <3>;
2024 + #size-cells = <2>;
2025 + device_type = "pci";
2027 + bus-range = <0x0 0xff>;
2028 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
2029 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
2030 + msi-parent = <&msi>;
2031 + #interrupt-cells = <1>;
2032 + interrupt-map-mask = <0 0 0 7>;
2033 + interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
2034 + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
2035 + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
2036 + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
2037 + status = "disabled";
2042 + #address-cells = <2>;
2043 + #size-cells = <2>;
2046 + pfe_reserved: packetbuffer@83400000 {
2047 + reg = <0 0x83400000 0 0xc00000>;
2051 + pfe: pfe@04000000 {
2052 + compatible = "fsl,pfe";
2053 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
2054 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
2055 + reg-names = "pfe", "pfe-ddr";
2056 + fsl,pfe-num-interfaces = <0x2>;
2057 + interrupts = <0 172 0x4>, /* HIF interrupt */
2058 + <0 173 0x4>, /*HIF_NOCPY interrupt */
2059 + <0 174 0x4>; /* WoL interrupt */
2060 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
2061 + memory-region = <&pfe_reserved>;
2062 + fsl,pfe-scfg = <&scfg 0>;
2063 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
2064 + clocks = <&clockgen 4 0>;
2065 + clock-names = "pfe";
2068 + pfe_mac0: ethernet@0 {
2071 + pfe_mac1: ethernet@1 {
2077 + compatible = "linaro,optee-tz";
2083 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
2086 + * QorIQ FMan v3 device tree nodes for ls1043
2088 + * Copyright 2015-2016 Freescale Semiconductor Inc.
2090 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2095 +/* include used FMan blocks */
2096 +#include "qoriq-fman3-0.dtsi"
2097 +#include "qoriq-fman3-0-1g-0.dtsi"
2098 +#include "qoriq-fman3-0-1g-1.dtsi"
2099 +#include "qoriq-fman3-0-1g-2.dtsi"
2100 +#include "qoriq-fman3-0-1g-3.dtsi"
2101 +#include "qoriq-fman3-0-1g-4.dtsi"
2102 +#include "qoriq-fman3-0-1g-5.dtsi"
2103 +#include "qoriq-fman3-0-10g-0.dtsi"
2108 + /* these aliases provide the FMan ports mapping */
2109 + enet0: ethernet@e0000 {
2112 + enet1: ethernet@e2000 {
2115 + enet2: ethernet@e4000 {
2118 + enet3: ethernet@e6000 {
2121 + enet4: ethernet@e8000 {
2124 + enet5: ethernet@ea000 {
2127 + enet6: ethernet@f0000 {
2131 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
2134 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2136 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2138 + * Mingkai Hu <Mingkai.hu@freescale.com>
2140 + * This file is dual-licensed: you can use it either under the terms
2141 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2142 + * licensing only applies to this file, and not this project as a
2145 + * a) This library is free software; you can redistribute it and/or
2146 + * modify it under the terms of the GNU General Public License as
2147 + * published by the Free Software Foundation; either version 2 of the
2148 + * License, or (at your option) any later version.
2150 + * This library is distributed in the hope that it will be useful,
2151 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2152 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2153 + * GNU General Public License for more details.
2155 + * Or, alternatively,
2157 + * b) Permission is hereby granted, free of charge, to any person
2158 + * obtaining a copy of this software and associated documentation
2159 + * files (the "Software"), to deal in the Software without
2160 + * restriction, including without limitation the rights to use,
2161 + * copy, modify, merge, publish, distribute, sublicense, and/or
2162 + * sell copies of the Software, and to permit persons to whom the
2163 + * Software is furnished to do so, subject to the following
2166 + * The above copyright notice and this permission notice shall be
2167 + * included in all copies or substantial portions of the Software.
2169 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2170 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2171 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2172 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2173 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2174 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2175 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2176 + * OTHER DEALINGS IN THE SOFTWARE.
2179 +#include "fsl-ls1043a-qds.dts"
2182 + compatible = "fsl,bman-fbpr";
2183 + alloc-ranges = <0 0 0x10000 0>;
2186 + compatible = "fsl,qman-fqd";
2187 + alloc-ranges = <0 0 0x10000 0>;
2190 + compatible = "fsl,qman-pfdr";
2191 + alloc-ranges = <0 0 0x10000 0>;
2195 +#include "qoriq-dpaa-eth.dtsi"
2196 +#include "qoriq-fman3-0-6oh.dtsi"
2200 + compatible = "fsl,fman", "simple-bus";
2202 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2203 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
2206 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2208 - * Copyright 2014-2015, Freescale Semiconductor
2209 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2211 * Mingkai Hu <Mingkai.hu@freescale.com>
2217 -/include/ "fsl-ls1043a.dtsi"
2218 +#include "fsl-ls1043a.dtsi"
2221 model = "LS1043A QDS Board";
2226 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
2227 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
2228 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
2229 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
2230 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
2231 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
2232 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
2233 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
2234 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
2235 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
2236 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
2237 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
2238 + emi1_slot1 = &ls1043mdio_s1;
2239 + emi1_slot2 = &ls1043mdio_s2;
2240 + emi1_slot3 = &ls1043mdio_s3;
2241 + emi1_slot4 = &ls1043mdio_s4;
2248 fpga: board-control@2,0 {
2249 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
2250 + #address-cells = <1>;
2251 + #size-cells = <1>;
2252 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
2253 reg = <0x2 0x0 0x0000100>;
2254 + ranges = <0 2 0 0x100>;
2258 @@ -181,3 +200,149 @@
2263 +#include "fsl-ls1043-post.dtsi"
2267 + phy-handle = <&qsgmii_phy_s2_p1>;
2268 + phy-connection-type = "sgmii";
2272 + phy-handle = <&qsgmii_phy_s2_p2>;
2273 + phy-connection-type = "sgmii";
2277 + phy-handle = <&rgmii_phy1>;
2278 + phy-connection-type = "rgmii";
2282 + phy-handle = <&rgmii_phy2>;
2283 + phy-connection-type = "rgmii";
2287 + phy-handle = <&qsgmii_phy_s2_p3>;
2288 + phy-connection-type = "sgmii";
2292 + phy-handle = <&qsgmii_phy_s2_p4>;
2293 + phy-connection-type = "sgmii";
2296 + ethernet@f0000 { /* DTSEC9/10GEC1 */
2297 + fixed-link = <1 1 10000 0 0>;
2298 + phy-connection-type = "xgmii";
2304 + compatible = "mdio-mux-mmioreg", "mdio-mux";
2305 + mdio-parent-bus = <&mdio0>;
2306 + #address-cells = <1>;
2307 + #size-cells = <0>;
2308 + reg = <0x54 1>; /* BRDCFG4 */
2309 + mux-mask = <0xe0>; /* EMI1 */
2311 + /* On-board RGMII1 PHY */
2312 + ls1043mdio0: mdio@0 {
2314 + #address-cells = <1>;
2315 + #size-cells = <0>;
2317 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
2322 + /* On-board RGMII2 PHY */
2323 + ls1043mdio1: mdio@1 {
2325 + #address-cells = <1>;
2326 + #size-cells = <0>;
2328 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
2334 + ls1043mdio_s1: mdio@2 {
2336 + #address-cells = <1>;
2337 + #size-cells = <0>;
2338 + status = "disabled";
2340 + qsgmii_phy_s1_p1: ethernet-phy@4 {
2343 + qsgmii_phy_s1_p2: ethernet-phy@5 {
2346 + qsgmii_phy_s1_p3: ethernet-phy@6 {
2349 + qsgmii_phy_s1_p4: ethernet-phy@7 {
2353 + sgmii_phy_s1_p1: ethernet-phy@1c {
2359 + ls1043mdio_s2: mdio@3 {
2361 + #address-cells = <1>;
2362 + #size-cells = <0>;
2363 + status = "disabled";
2365 + qsgmii_phy_s2_p1: ethernet-phy@8 {
2368 + qsgmii_phy_s2_p2: ethernet-phy@9 {
2371 + qsgmii_phy_s2_p3: ethernet-phy@a {
2374 + qsgmii_phy_s2_p4: ethernet-phy@b {
2378 + sgmii_phy_s2_p1: ethernet-phy@1c {
2384 + ls1043mdio_s3: mdio@4 {
2386 + #address-cells = <1>;
2387 + #size-cells = <0>;
2388 + status = "disabled";
2390 + sgmii_phy_s3_p1: ethernet-phy@1c {
2396 + ls1043mdio_s4: mdio@5 {
2398 + #address-cells = <1>;
2399 + #size-cells = <0>;
2400 + status = "disabled";
2402 + sgmii_phy_s4_p1: ethernet-phy@1c {
2409 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2412 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2414 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2416 + * Mingkai Hu <Mingkai.hu@freescale.com>
2418 + * This file is dual-licensed: you can use it either under the terms
2419 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2420 + * licensing only applies to this file, and not this project as a
2423 + * a) This library is free software; you can redistribute it and/or
2424 + * modify it under the terms of the GNU General Public License as
2425 + * published by the Free Software Foundation; either version 2 of the
2426 + * License, or (at your option) any later version.
2428 + * This library is distributed in the hope that it will be useful,
2429 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2430 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2431 + * GNU General Public License for more details.
2433 + * Or, alternatively,
2435 + * b) Permission is hereby granted, free of charge, to any person
2436 + * obtaining a copy of this software and associated documentation
2437 + * files (the "Software"), to deal in the Software without
2438 + * restriction, including without limitation the rights to use,
2439 + * copy, modify, merge, publish, distribute, sublicense, and/or
2440 + * sell copies of the Software, and to permit persons to whom the
2441 + * Software is furnished to do so, subject to the following
2444 + * The above copyright notice and this permission notice shall be
2445 + * included in all copies or substantial portions of the Software.
2447 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2448 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2449 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2450 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2451 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2452 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2453 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2454 + * OTHER DEALINGS IN THE SOFTWARE.
2457 +#include "fsl-ls1043a-rdb.dts"
2460 + compatible = "fsl,bman-fbpr";
2461 + alloc-ranges = <0 0 0x10000 0>;
2464 + compatible = "fsl,qman-fqd";
2465 + alloc-ranges = <0 0 0x10000 0>;
2468 + compatible = "fsl,qman-pfdr";
2469 + alloc-ranges = <0 0 0x10000 0>;
2473 +#include "qoriq-dpaa-eth.dtsi"
2474 +#include "qoriq-fman3-0-6oh.dtsi"
2478 + compatible = "fsl,fman", "simple-bus";
2481 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2484 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2486 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2488 + * This file is licensed under the terms of the GNU General Public
2489 + * License version 2. This program is licensed "as is" without any
2490 + * warranty of any kind, whether express or implied.
2493 +#include "fsl-ls1043a-rdb-sdk.dts"
2496 + bp7: buffer-pool@7 {
2497 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2499 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2500 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2503 + bp8: buffer-pool@8 {
2504 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2506 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2507 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2510 + bp9: buffer-pool@9 {
2511 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2513 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2514 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2518 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2521 + compatible = "fsl,dpa-ethernet-init";
2522 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2523 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2524 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2528 + compatible = "fsl,dpa-ethernet-init";
2529 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2530 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2531 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2535 + compatible = "fsl,dpa-ethernet-init";
2536 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2537 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2538 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2542 + compatible = "fsl,dpa-ethernet-init";
2543 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2544 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2545 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2549 + compatible = "fsl,dpa-ethernet-init";
2550 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2551 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2552 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2556 + compatible = "fsl,dpa-ethernet-init";
2557 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2558 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2559 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2563 + compatible = "fsl,dpa-ethernet-init";
2564 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2565 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2566 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2570 + compatible = "fsl,dpa-oh";
2571 + /* Define frame queues for the OH port*/
2572 + /* <OH Rx error, OH Rx default> */
2573 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2574 + fsl,fman-oh-port = <&fman0_oh2>;
2580 + #address-cells = <2>;
2581 + #size-cells = <2>;
2584 + usdpaa_mem: usdpaa_mem {
2585 + compatible = "fsl,usdpaa-mem";
2586 + alloc-ranges = <0 0 0x10000 0>;
2587 + size = <0 0x10000000>;
2588 + alignment = <0 0x10000000>;
2594 + fman0_oh2: port@83000 {
2596 + compatible = "fsl,fman-port-oh";
2597 + reg = <0x83000 0x1000>;
2600 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2601 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2604 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2606 - * Copyright 2014-2015, Freescale Semiconductor
2607 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2609 * Mingkai Hu <Mingkai.hu@freescale.com>
2615 -/include/ "fsl-ls1043a.dtsi"
2616 +#include "fsl-ls1043a.dtsi"
2619 model = "LS1043A RDB Board";
2621 compatible = "pericom,pt7c4338";
2625 + compatible = "nxp,pcf85263";
2631 @@ -130,6 +134,38 @@
2633 spi-max-frequency = <1000000>; /* input clock */
2637 + compatible = "maxim,ds26522";
2639 + spi-max-frequency = <2000000>;
2640 + fsl,spi-cs-sck-delay = <100>;
2641 + fsl,spi-sck-cs-delay = <50>;
2645 + compatible = "maxim,ds26522";
2647 + spi-max-frequency = <2000000>;
2648 + fsl,spi-cs-sck-delay = <100>;
2649 + fsl,spi-sck-cs-delay = <50>;
2654 + ucc_hdlc: ucc@2000 {
2655 + compatible = "fsl,ucc-hdlc";
2656 + rx-clock-name = "clk8";
2657 + tx-clock-name = "clk9";
2658 + fsl,rx-sync-clock = "rsync_pin";
2659 + fsl,tx-sync-clock = "tsync_pin";
2660 + fsl,tx-timeslot-mask = <0xfffffffe>;
2661 + fsl,rx-timeslot-mask = <0xfffffffe>;
2662 + fsl,tdm-framer-type = "e1";
2664 + fsl,siram-entry-id = <0>;
2665 + fsl,tdm-interface;
2670 @@ -139,3 +175,76 @@
2675 +#include "fsl-ls1043-post.dtsi"
2679 + phy-handle = <&qsgmii_phy1>;
2680 + phy-connection-type = "qsgmii";
2684 + phy-handle = <&qsgmii_phy2>;
2685 + phy-connection-type = "qsgmii";
2689 + phy-handle = <&rgmii_phy1>;
2690 + phy-connection-type = "rgmii-txid";
2694 + phy-handle = <&rgmii_phy2>;
2695 + phy-connection-type = "rgmii-txid";
2699 + phy-handle = <&qsgmii_phy3>;
2700 + phy-connection-type = "qsgmii";
2704 + phy-handle = <&qsgmii_phy4>;
2705 + phy-connection-type = "qsgmii";
2708 + ethernet@f0000 { /* 10GEC1 */
2709 + phy-handle = <&aqr105_phy>;
2710 + phy-connection-type = "xgmii";
2714 + rgmii_phy1: ethernet-phy@1 {
2718 + rgmii_phy2: ethernet-phy@2 {
2722 + qsgmii_phy1: ethernet-phy@4 {
2726 + qsgmii_phy2: ethernet-phy@5 {
2730 + qsgmii_phy3: ethernet-phy@6 {
2734 + qsgmii_phy4: ethernet-phy@7 {
2740 + aqr105_phy: ethernet-phy@1 {
2741 + compatible = "ethernet-phy-ieee802.3-c45";
2742 + interrupts = <0 132 4>;
2747 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2748 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2751 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2753 - * Copyright 2014-2015, Freescale Semiconductor
2754 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2756 * Mingkai Hu <Mingkai.hu@freescale.com>
2759 * OTHER DEALINGS IN THE SOFTWARE.
2762 +#include <dt-bindings/thermal/thermal.h>
2765 compatible = "fsl,ls1043a";
2766 interrupt-parent = <&gic>;
2767 #address-cells = <2>;
2772 + ethernet0 = &enet0;
2773 + ethernet1 = &enet1;
2774 + ethernet2 = &enet2;
2775 + ethernet3 = &enet3;
2776 + ethernet4 = &enet4;
2777 + ethernet5 = &enet5;
2778 + ethernet6 = &enet6;
2782 #address-cells = <1>;
2786 clocks = <&clockgen 1 0>;
2787 next-level-cache = <&l2>;
2788 + #cooling-cells = <2>;
2789 + cpu-idle-states = <&CPU_PH20>;
2795 clocks = <&clockgen 1 0>;
2796 next-level-cache = <&l2>;
2797 + cpu-idle-states = <&CPU_PH20>;
2803 clocks = <&clockgen 1 0>;
2804 next-level-cache = <&l2>;
2805 + cpu-idle-states = <&CPU_PH20>;
2811 clocks = <&clockgen 1 0>;
2812 next-level-cache = <&l2>;
2813 + cpu-idle-states = <&CPU_PH20>;
2817 @@ -97,12 +115,56 @@
2823 + * PSCI node is not added default, U-boot will add missing
2824 + * parts if it determines to use PSCI.
2826 + entry-method = "arm,psci";
2828 + CPU_PH20: cpu-ph20 {
2829 + compatible = "arm,idle-state";
2830 + idle-state-name = "PH20";
2831 + arm,psci-suspend-param = <0x0>;
2832 + entry-latency-us = <1000>;
2833 + exit-latency-us = <1000>;
2834 + min-residency-us = <3000>;
2839 device_type = "memory";
2840 reg = <0x0 0x80000000 0 0x80000000>;
2841 /* DRAM space 1, size: 2GiB DRAM */
2845 + #address-cells = <2>;
2846 + #size-cells = <2>;
2849 + bman_fbpr: bman-fbpr {
2850 + compatible = "shared-dma-pool";
2851 + size = <0 0x1000000>;
2852 + alignment = <0 0x1000000>;
2856 + qman_fqd: qman-fqd {
2857 + compatible = "shared-dma-pool";
2858 + size = <0 0x400000>;
2859 + alignment = <0 0x400000>;
2863 + qman_pfdr: qman-pfdr {
2864 + compatible = "shared-dma-pool";
2865 + size = <0 0x2000000>;
2866 + alignment = <0 0x2000000>;
2872 compatible = "fixed-clock";
2875 interrupts = <1 9 0xf08>;
2880 compatible = "simple-bus";
2881 #address-cells = <2>;
2883 @@ -213,13 +275,14 @@
2885 dcfg: dcfg@1ee0000 {
2886 compatible = "fsl,ls1043a-dcfg", "syscon";
2887 - reg = <0x0 0x1ee0000 0x0 0x10000>;
2888 + reg = <0x0 0x1ee0000 0x0 0x1000>;
2893 compatible = "fsl,ifc", "simple-bus";
2894 reg = <0x0 0x1530000 0x0 0x10000>;
2896 interrupts = <0 43 0x4>;
2899 @@ -255,6 +318,103 @@
2903 + tmu: tmu@1f00000 {
2904 + compatible = "fsl,qoriq-tmu";
2905 + reg = <0x0 0x1f00000 0x0 0x10000>;
2906 + interrupts = <0 33 0x4>;
2907 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
2908 + fsl,tmu-calibration = <0x00000000 0x00000026
2909 + 0x00000001 0x0000002d
2910 + 0x00000002 0x00000032
2911 + 0x00000003 0x00000039
2912 + 0x00000004 0x0000003f
2913 + 0x00000005 0x00000046
2914 + 0x00000006 0x0000004d
2915 + 0x00000007 0x00000054
2916 + 0x00000008 0x0000005a
2917 + 0x00000009 0x00000061
2918 + 0x0000000a 0x0000006a
2919 + 0x0000000b 0x00000071
2921 + 0x00010000 0x00000025
2922 + 0x00010001 0x0000002c
2923 + 0x00010002 0x00000035
2924 + 0x00010003 0x0000003d
2925 + 0x00010004 0x00000045
2926 + 0x00010005 0x0000004e
2927 + 0x00010006 0x00000057
2928 + 0x00010007 0x00000061
2929 + 0x00010008 0x0000006b
2930 + 0x00010009 0x00000076
2932 + 0x00020000 0x00000029
2933 + 0x00020001 0x00000033
2934 + 0x00020002 0x0000003d
2935 + 0x00020003 0x00000049
2936 + 0x00020004 0x00000056
2937 + 0x00020005 0x00000061
2938 + 0x00020006 0x0000006d
2940 + 0x00030000 0x00000021
2941 + 0x00030001 0x0000002a
2942 + 0x00030002 0x0000003c
2943 + 0x00030003 0x0000004e>;
2944 + #thermal-sensor-cells = <1>;
2948 + cpu_thermal: cpu-thermal {
2949 + polling-delay-passive = <1000>;
2950 + polling-delay = <5000>;
2952 + thermal-sensors = <&tmu 3>;
2955 + cpu_alert: cpu-alert {
2956 + temperature = <85000>;
2957 + hysteresis = <2000>;
2960 + cpu_crit: cpu-crit {
2961 + temperature = <95000>;
2962 + hysteresis = <2000>;
2963 + type = "critical";
2969 + trip = <&cpu_alert>;
2971 + <&cpu0 THERMAL_NO_LIMIT
2972 + THERMAL_NO_LIMIT>;
2978 + qman: qman@1880000 {
2979 + compatible = "fsl,qman";
2980 + reg = <0x00 0x1880000 0x0 0x10000>;
2981 + interrupts = <0 45 0x4>;
2982 + memory-region = <&qman_fqd &qman_pfdr>;
2985 + bman: bman@1890000 {
2986 + compatible = "fsl,bman";
2987 + reg = <0x00 0x1890000 0x0 0x10000>;
2988 + interrupts = <0 45 0x4>;
2989 + memory-region = <&bman_fbpr>;
2992 + bportals: bman-portals@508000000 {
2993 + ranges = <0x0 0x5 0x08000000 0x8000000>;
2996 + qportals: qman-portals@500000000 {
2997 + ranges = <0x0 0x5 0x00000000 0x8000000>;
3000 dspi0: dspi@2100000 {
3001 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
3002 #address-cells = <1>;
3003 @@ -396,6 +556,72 @@
3004 #interrupt-cells = <2>;
3007 + uqe: uqe@2400000 {
3008 + #address-cells = <1>;
3009 + #size-cells = <1>;
3010 + device_type = "qe";
3011 + compatible = "fsl,qe", "simple-bus";
3012 + ranges = <0x0 0x0 0x2400000 0x40000>;
3013 + reg = <0x0 0x2400000 0x0 0x480>;
3014 + brg-frequency = <100000000>;
3015 + bus-frequency = <200000000>;
3017 + fsl,qe-num-riscs = <1>;
3018 + fsl,qe-num-snums = <28>;
3021 + compatible = "fsl,qe-ic";
3022 + reg = <0x80 0x80>;
3023 + #address-cells = <0>;
3024 + interrupt-controller;
3025 + #interrupt-cells = <1>;
3026 + interrupts = <0 77 0x04 0 77 0x04>;
3030 + #address-cells = <1>;
3031 + #size-cells = <0>;
3032 + compatible = "fsl,ls1043-qe-si",
3033 + "fsl,t1040-qe-si";
3034 + reg = <0x700 0x80>;
3037 + siram1: siram@1000 {
3038 + #address-cells = <1>;
3039 + #size-cells = <1>;
3040 + compatible = "fsl,ls1043-qe-siram",
3041 + "fsl,t1040-qe-siram";
3042 + reg = <0x1000 0x800>;
3047 + reg = <0x2000 0x200>;
3048 + interrupts = <32>;
3049 + interrupt-parent = <&qeic>;
3054 + reg = <0x2200 0x200>;
3055 + interrupts = <34>;
3056 + interrupt-parent = <&qeic>;
3060 + #address-cells = <1>;
3061 + #size-cells = <1>;
3062 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
3063 + ranges = <0x0 0x10000 0x6000>;
3066 + compatible = "fsl,qe-muram-data",
3067 + "fsl,cpm-muram-data";
3068 + reg = <0x0 0x6000>;
3073 lpuart0: serial@2950000 {
3074 compatible = "fsl,ls1021a-lpuart";
3075 reg = <0x0 0x2950000 0x0 0x1000>;
3076 @@ -450,6 +676,16 @@
3077 status = "disabled";
3080 + ftm0: ftm0@29d0000 {
3081 + compatible = "fsl,ls1043a-ftm";
3082 + reg = <0x0 0x29d0000 0x0 0x10000>,
3083 + <0x0 0x1ee2140 0x0 0x4>;
3084 + reg-names = "ftm", "FlexTimer1";
3085 + interrupts = <0 86 0x4>;
3090 wdog0: wdog@2ad0000 {
3091 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
3092 reg = <0x0 0x2ad0000 0x0 0x10000>;
3095 snps,quirk-frame-length-adjustment = <0x20>;
3096 snps,dis_rxdet_inp3_quirk;
3097 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3098 + snps,dma-snooping;
3101 usb1: usb3@3000000 {
3104 snps,quirk-frame-length-adjustment = <0x20>;
3105 snps,dis_rxdet_inp3_quirk;
3106 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3107 + snps,dma-snooping;
3111 usb2: usb3@3100000 {
3112 @@ -500,32 +741,52 @@
3114 snps,quirk-frame-length-adjustment = <0x20>;
3115 snps,dis_rxdet_inp3_quirk;
3116 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
3117 + snps,dma-snooping;
3121 sata: sata@3200000 {
3122 compatible = "fsl,ls1043a-ahci";
3123 - reg = <0x0 0x3200000 0x0 0x10000>;
3124 + reg = <0x0 0x3200000 0x0 0x10000>,
3125 + <0x0 0x20140520 0x0 0x4>;
3126 + reg-names = "ahci", "sata-ecc";
3127 interrupts = <0 69 0x4>;
3128 clocks = <&clockgen 4 0>;
3132 + qdma: qdma@8380000 {
3133 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
3134 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
3135 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
3136 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
3137 + interrupts = <0 152 0x4>,
3139 + interrupt-names = "qdma-error", "qdma-queue";
3142 + status-sizes = <64>;
3143 + queue-sizes = <64 64>;
3147 msi1: msi-controller1@1571000 {
3148 - compatible = "fsl,1s1043a-msi";
3149 + compatible = "fsl,ls1043a-msi";
3150 reg = <0x0 0x1571000 0x0 0x8>;
3152 interrupts = <0 116 0x4>;
3155 msi2: msi-controller2@1572000 {
3156 - compatible = "fsl,1s1043a-msi";
3157 + compatible = "fsl,ls1043a-msi";
3158 reg = <0x0 0x1572000 0x0 0x8>;
3160 interrupts = <0 126 0x4>;
3163 msi3: msi-controller3@1573000 {
3164 - compatible = "fsl,1s1043a-msi";
3165 + compatible = "fsl,ls1043a-msi";
3166 reg = <0x0 0x1573000 0x0 0x8>;
3168 interrupts = <0 160 0x4>;
3170 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
3171 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
3172 reg-names = "regs", "config";
3173 - interrupts = <0 118 0x4>, /* controller interrupt */
3174 - <0 117 0x4>; /* PME interrupt */
3175 - interrupt-names = "intr", "pme";
3176 + interrupts = <0 117 0x4>, /* PME interrupt */
3177 + <0 118 0x4>; /* aer interrupt */
3178 + interrupt-names = "pme", "aer";
3179 #address-cells = <3>;
3181 device_type = "pci";
3183 bus-range = <0x0 0xff>;
3184 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
3185 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3186 - msi-parent = <&msi1>;
3187 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3188 #interrupt-cells = <1>;
3189 interrupt-map-mask = <0 0 0 7>;
3190 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
3192 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
3193 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
3194 reg-names = "regs", "config";
3195 - interrupts = <0 128 0x4>,
3197 - interrupt-names = "intr", "pme";
3198 + interrupts = <0 127 0x4>,
3200 + interrupt-names = "pme", "aer";
3201 #address-cells = <3>;
3203 device_type = "pci";
3205 bus-range = <0x0 0xff>;
3206 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
3207 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3208 - msi-parent = <&msi2>;
3209 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3210 #interrupt-cells = <1>;
3211 interrupt-map-mask = <0 0 0 7>;
3212 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
3214 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
3215 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
3216 reg-names = "regs", "config";
3217 - interrupts = <0 162 0x4>,
3219 - interrupt-names = "intr", "pme";
3220 + interrupts = <0 161 0x4>,
3222 + interrupt-names = "pme", "aer";
3223 #address-cells = <3>;
3225 device_type = "pci";
3227 bus-range = <0x0 0xff>;
3228 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
3229 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
3230 - msi-parent = <&msi3>;
3231 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
3232 #interrupt-cells = <1>;
3233 interrupt-map-mask = <0 0 0 7>;
3234 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
3235 @@ -607,4 +868,13 @@
3241 + compatible = "linaro,optee-tz";
3247 +#include "qoriq-qman1-portals.dtsi"
3248 +#include "qoriq-bman1-portals.dtsi"
3250 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
3253 + * QorIQ FMan v3 device tree nodes for ls1046
3255 + * Copyright 2015-2016 Freescale Semiconductor Inc.
3257 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3262 +/* include used FMan blocks */
3263 +#include "qoriq-fman3-0.dtsi"
3264 +#include "qoriq-fman3-0-1g-0.dtsi"
3265 +#include "qoriq-fman3-0-1g-1.dtsi"
3266 +#include "qoriq-fman3-0-1g-2.dtsi"
3267 +#include "qoriq-fman3-0-1g-3.dtsi"
3268 +#include "qoriq-fman3-0-1g-4.dtsi"
3269 +#include "qoriq-fman3-0-1g-5.dtsi"
3270 +#include "qoriq-fman3-0-10g-0.dtsi"
3271 +#include "qoriq-fman3-0-10g-1.dtsi"
3275 + /* these aliases provide the FMan ports mapping */
3276 + enet0: ethernet@e0000 {
3279 + enet1: ethernet@e2000 {
3282 + enet2: ethernet@e4000 {
3285 + enet3: ethernet@e6000 {
3288 + enet4: ethernet@e8000 {
3291 + enet5: ethernet@ea000 {
3294 + enet6: ethernet@f0000 {
3297 + enet7: ethernet@f2000 {
3301 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
3304 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3306 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3308 + * Mingkai Hu <Mingkai.hu@freescale.com>
3310 + * This file is dual-licensed: you can use it either under the terms
3311 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3312 + * licensing only applies to this file, and not this project as a
3315 + * a) This library is free software; you can redistribute it and/or
3316 + * modify it under the terms of the GNU General Public License as
3317 + * published by the Free Software Foundation; either version 2 of the
3318 + * License, or (at your option) any later version.
3320 + * This library is distributed in the hope that it will be useful,
3321 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3322 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3323 + * GNU General Public License for more details.
3325 + * Or, alternatively,
3327 + * b) Permission is hereby granted, free of charge, to any person
3328 + * obtaining a copy of this software and associated documentation
3329 + * files (the "Software"), to deal in the Software without
3330 + * restriction, including without limitation the rights to use,
3331 + * copy, modify, merge, publish, distribute, sublicense, and/or
3332 + * sell copies of the Software, and to permit persons to whom the
3333 + * Software is furnished to do so, subject to the following
3336 + * The above copyright notice and this permission notice shall be
3337 + * included in all copies or substantial portions of the Software.
3339 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3340 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3341 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3342 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3343 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3344 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3345 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3346 + * OTHER DEALINGS IN THE SOFTWARE.
3349 +#include "fsl-ls1046a-qds.dts"
3352 + compatible = "fsl,bman-fbpr";
3353 + alloc-ranges = <0 0 0x10000 0>;
3356 + compatible = "fsl,qman-fqd";
3357 + alloc-ranges = <0 0 0x10000 0>;
3360 + compatible = "fsl,qman-pfdr";
3361 + alloc-ranges = <0 0 0x10000 0>;
3365 +#include "qoriq-dpaa-eth.dtsi"
3366 +#include "qoriq-fman3-0-6oh.dtsi"
3371 + compatible = "fsl,dpa-ethernet";
3372 + fsl,fman-mac = <&enet7>;
3378 + compatible = "fsl,fman", "simple-bus";
3386 + #address-cells = <1>;
3387 + #size-cells = <1>;
3388 + compatible = "n25q128a11", "jedec,spi-nor";
3390 + spi-max-frequency = <10000000>;
3394 + #address-cells = <1>;
3395 + #size-cells = <1>;
3396 + compatible = "sst25wf040b", "jedec,spi-nor";
3400 + spi-max-frequency = <10000000>;
3404 + #address-cells = <1>;
3405 + #size-cells = <1>;
3406 + compatible = "en25s64", "jedec,spi-nor";
3410 + spi-max-frequency = <10000000>;
3414 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3417 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3419 + * Copyright 2016 Freescale Semiconductor, Inc.
3421 + * Shaohui Xie <Shaohui.Xie@nxp.com>
3423 + * This file is dual-licensed: you can use it either under the terms
3424 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3425 + * licensing only applies to this file, and not this project as a
3428 + * a) This library is free software; you can redistribute it and/or
3429 + * modify it under the terms of the GNU General Public License as
3430 + * published by the Free Software Foundation; either version 2 of the
3431 + * License, or (at your option) any later version.
3433 + * This library is distributed in the hope that it will be useful,
3434 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3435 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3436 + * GNU General Public License for more details.
3438 + * Or, alternatively,
3440 + * b) Permission is hereby granted, free of charge, to any person
3441 + * obtaining a copy of this software and associated documentation
3442 + * files (the "Software"), to deal in the Software without
3443 + * restriction, including without limitation the rights to use,
3444 + * copy, modify, merge, publish, distribute, sublicense, and/or
3445 + * sell copies of the Software, and to permit persons to whom the
3446 + * Software is furnished to do so, subject to the following
3449 + * The above copyright notice and this permission notice shall be
3450 + * included in all copies or substantial portions of the Software.
3452 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3453 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3454 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3455 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3456 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3457 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3458 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3459 + * OTHER DEALINGS IN THE SOFTWARE.
3464 +#include "fsl-ls1046a.dtsi"
3467 + model = "LS1046A QDS Board";
3468 + compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
3475 + serial0 = &duart0;
3476 + serial1 = &duart1;
3477 + serial2 = &duart2;
3478 + serial3 = &duart3;
3480 + emi1_slot1 = &ls1046mdio_s1;
3481 + emi1_slot2 = &ls1046mdio_s2;
3482 + emi1_slot4 = &ls1046mdio_s4;
3484 + sgmii_s1_p1 = &sgmii_phy_s1_p1;
3485 + sgmii_s1_p2 = &sgmii_phy_s1_p2;
3486 + sgmii_s1_p3 = &sgmii_phy_s1_p3;
3487 + sgmii_s1_p4 = &sgmii_phy_s1_p4;
3488 + sgmii_s4_p1 = &sgmii_phy_s4_p1;
3489 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
3490 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
3491 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
3492 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
3496 + stdout-path = "serial0:115200n8";
3505 + #address-cells = <1>;
3506 + #size-cells = <1>;
3507 + compatible = "n25q128a11", "jedec,spi-nor";
3509 + spi-max-frequency = <10000000>;
3513 + #address-cells = <1>;
3514 + #size-cells = <1>;
3515 + compatible = "sst25wf040b", "jedec,spi-nor";
3519 + spi-max-frequency = <10000000>;
3523 + #address-cells = <1>;
3524 + #size-cells = <1>;
3525 + compatible = "en25s64", "jedec,spi-nor";
3529 + spi-max-frequency = <10000000>;
3545 + compatible = "nxp,pca9547";
3547 + #address-cells = <1>;
3548 + #size-cells = <0>;
3551 + #address-cells = <1>;
3552 + #size-cells = <0>;
3556 + compatible = "ti,ina220";
3558 + shunt-resistor = <1000>;
3562 + compatible = "ti,ina220";
3564 + shunt-resistor = <1000>;
3569 + #address-cells = <1>;
3570 + #size-cells = <0>;
3574 + compatible = "nxp,pcf2129";
3577 + interrupts = <0 150 0x4>;
3581 + compatible = "atmel,24c512";
3586 + compatible = "atmel,24c512";
3591 + compatible = "adi,adt7461a";
3599 + #address-cells = <2>;
3600 + #size-cells = <1>;
3601 + /* NOR, NAND Flashes and FPGA on board */
3602 + ranges = <0x0 0x0 0x0 0x60000000 0x08000000
3603 + 0x1 0x0 0x0 0x7e800000 0x00010000
3604 + 0x2 0x0 0x0 0x7fb00000 0x00000100>;
3608 + compatible = "cfi-flash";
3609 + reg = <0x0 0x0 0x8000000>;
3611 + device-width = <1>;
3615 + compatible = "fsl,ifc-nand";
3616 + reg = <0x1 0x0 0x10000>;
3619 + fpga: board-control@2,0 {
3620 + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-bus";
3621 + reg = <0x2 0x0 0x0000100>;
3622 + ranges = <0 2 0 0x100>;
3635 + qflash0: s25fl128s@0 {
3636 + compatible = "spansion,m25p80";
3637 + #address-cells = <1>;
3638 + #size-cells = <1>;
3639 + spi-max-frequency = <20000000>;
3644 +#include "fsl-ls1046-post.dtsi"
3648 + phy-handle = <&qsgmii_phy_s2_p1>;
3649 + phy-connection-type = "sgmii";
3653 + phy-handle = <&sgmii_phy_s4_p1>;
3654 + phy-connection-type = "sgmii";
3658 + phy-handle = <&rgmii_phy1>;
3659 + phy-connection-type = "rgmii";
3663 + phy-handle = <&rgmii_phy2>;
3664 + phy-connection-type = "rgmii";
3668 + phy-handle = <&sgmii_phy_s1_p3>;
3669 + phy-connection-type = "sgmii";
3673 + phy-handle = <&sgmii_phy_s1_p4>;
3674 + phy-connection-type = "sgmii";
3677 + ethernet@f0000 { /* DTSEC9/10GEC1 */
3678 + phy-handle = <&sgmii_phy_s1_p1>;
3679 + phy-connection-type = "xgmii";
3682 + ethernet@f2000 { /* DTSEC10/10GEC2 */
3683 + phy-handle = <&sgmii_phy_s1_p2>;
3684 + phy-connection-type = "xgmii";
3689 + #address-cells = <1>;
3690 + #size-cells = <1>;
3692 + compatible = "mdio-mux-mmioreg", "mdio-mux";
3693 + mdio-parent-bus = <&mdio0>;
3694 + #address-cells = <1>;
3695 + #size-cells = <0>;
3696 + reg = <0x54 1>; /* BRDCFG4 */
3697 + mux-mask = <0xe0>; /* EMI1 */
3699 + /* On-board RGMII1 PHY */
3700 + ls1046mdio0: mdio@0 {
3702 + #address-cells = <1>;
3703 + #size-cells = <0>;
3705 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
3710 + /* On-board RGMII2 PHY */
3711 + ls1046mdio1: mdio@1 {
3713 + #address-cells = <1>;
3714 + #size-cells = <0>;
3716 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
3722 + ls1046mdio_s1: mdio@2 {
3724 + #address-cells = <1>;
3725 + #size-cells = <0>;
3726 + status = "disabled";
3728 + sgmii_phy_s1_p1: ethernet-phy@1c {
3732 + sgmii_phy_s1_p2: ethernet-phy@1d {
3736 + sgmii_phy_s1_p3: ethernet-phy@1e {
3740 + sgmii_phy_s1_p4: ethernet-phy@1f {
3746 + ls1046mdio_s2: mdio@3 {
3748 + #address-cells = <1>;
3749 + #size-cells = <0>;
3750 + status = "disabled";
3752 + qsgmii_phy_s2_p1: ethernet-phy@8 {
3755 + qsgmii_phy_s2_p2: ethernet-phy@9 {
3758 + qsgmii_phy_s2_p3: ethernet-phy@a {
3761 + qsgmii_phy_s2_p4: ethernet-phy@b {
3767 + ls1046mdio_s4: mdio@5 {
3769 + #address-cells = <1>;
3770 + #size-cells = <0>;
3771 + status = "disabled";
3773 + sgmii_phy_s4_p1: ethernet-phy@1c {
3780 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
3783 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3785 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3787 + * Mingkai Hu <Mingkai.hu@freescale.com>
3789 + * This file is dual-licensed: you can use it either under the terms
3790 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3791 + * licensing only applies to this file, and not this project as a
3794 + * a) This library is free software; you can redistribute it and/or
3795 + * modify it under the terms of the GNU General Public License as
3796 + * published by the Free Software Foundation; either version 2 of the
3797 + * License, or (at your option) any later version.
3799 + * This library is distributed in the hope that it will be useful,
3800 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3801 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3802 + * GNU General Public License for more details.
3804 + * Or, alternatively,
3806 + * b) Permission is hereby granted, free of charge, to any person
3807 + * obtaining a copy of this software and associated documentation
3808 + * files (the "Software"), to deal in the Software without
3809 + * restriction, including without limitation the rights to use,
3810 + * copy, modify, merge, publish, distribute, sublicense, and/or
3811 + * sell copies of the Software, and to permit persons to whom the
3812 + * Software is furnished to do so, subject to the following
3815 + * The above copyright notice and this permission notice shall be
3816 + * included in all copies or substantial portions of the Software.
3818 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3819 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3820 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3821 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3822 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3823 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3824 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3825 + * OTHER DEALINGS IN THE SOFTWARE.
3828 +#include "fsl-ls1046a-rdb.dts"
3831 + compatible = "fsl,bman-fbpr";
3832 + alloc-ranges = <0 0 0x10000 0>;
3835 + compatible = "fsl,qman-fqd";
3836 + alloc-ranges = <0 0 0x10000 0>;
3839 + compatible = "fsl,qman-pfdr";
3840 + alloc-ranges = <0 0 0x10000 0>;
3844 +#include "qoriq-dpaa-eth.dtsi"
3845 +#include "qoriq-fman3-0-6oh.dtsi"
3850 + status = "disabled";
3853 + status = "disabled";
3856 + compatible = "fsl,dpa-ethernet";
3857 + fsl,fman-mac = <&enet7>;
3863 + compatible = "fsl,fman", "simple-bus";
3866 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
3869 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3871 + * Copyright 2016 Freescale Semiconductor, Inc.
3873 + * This file is licensed under the terms of the GNU General Public
3874 + * License version 2. This program is licensed "as is" without any
3875 + * warranty of any kind, whether express or implied.
3878 +#include "fsl-ls1046a-rdb-sdk.dts"
3881 + bp7: buffer-pool@7 {
3882 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
3884 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
3885 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
3888 + bp8: buffer-pool@8 {
3889 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
3891 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
3892 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
3895 + bp9: buffer-pool@9 {
3896 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
3898 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
3899 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
3903 + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
3906 + compatible = "fsl,dpa-ethernet-init";
3907 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3908 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
3909 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
3913 + compatible = "fsl,dpa-ethernet-init";
3914 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3915 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
3916 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
3920 + compatible = "fsl,dpa-ethernet-init";
3921 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3922 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
3923 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
3927 + compatible = "fsl,dpa-ethernet-init";
3928 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3929 + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
3930 + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
3934 + compatible = "fsl,dpa-ethernet-init";
3935 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3936 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
3937 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
3941 + compatible = "fsl,dpa-ethernet-init";
3942 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3943 + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
3944 + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
3948 + compatible = "fsl,dpa-oh";
3949 + /* Define frame queues for the OH port*/
3950 + /* <OH Rx error, OH Rx default> */
3951 + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
3952 + fsl,fman-oh-port = <&fman0_oh2>;
3958 + #address-cells = <2>;
3959 + #size-cells = <2>;
3962 + usdpaa_mem: usdpaa_mem {
3963 + compatible = "fsl,usdpaa-mem";
3964 + alloc-ranges = <0 0 0x10000 0>;
3965 + size = <0 0x10000000>;
3966 + alignment = <0 0x10000000>;
3972 + fman0_oh2: port@83000 {
3974 + compatible = "fsl,fman-port-oh";
3975 + reg = <0x83000 0x1000>;
3979 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
3982 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3984 + * Copyright 2016 Freescale Semiconductor, Inc.
3986 + * Mingkai Hu <mingkai.hu@nxp.com>
3988 + * This file is dual-licensed: you can use it either under the terms
3989 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3990 + * licensing only applies to this file, and not this project as a
3993 + * a) This library is free software; you can redistribute it and/or
3994 + * modify it under the terms of the GNU General Public License as
3995 + * published by the Free Software Foundation; either version 2 of the
3996 + * License, or (at your option) any later version.
3998 + * This library is distributed in the hope that it will be useful,
3999 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4000 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4001 + * GNU General Public License for more details.
4003 + * Or, alternatively,
4005 + * b) Permission is hereby granted, free of charge, to any person
4006 + * obtaining a copy of this software and associated documentation
4007 + * files (the "Software"), to deal in the Software without
4008 + * restriction, including without limitation the rights to use,
4009 + * copy, modify, merge, publish, distribute, sublicense, and/or
4010 + * sell copies of the Software, and to permit persons to whom the
4011 + * Software is furnished to do so, subject to the following
4014 + * The above copyright notice and this permission notice shall be
4015 + * included in all copies or substantial portions of the Software.
4017 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4018 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4019 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4020 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4021 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4022 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4023 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4024 + * OTHER DEALINGS IN THE SOFTWARE.
4029 +#include "fsl-ls1046a.dtsi"
4032 + model = "LS1046A RDB Board";
4033 + compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
4036 + serial0 = &duart0;
4037 + serial1 = &duart1;
4038 + serial2 = &duart2;
4039 + serial3 = &duart3;
4043 + stdout-path = "serial0:115200n8";
4067 + compatible = "ti,ina220";
4069 + shunt-resistor = <1000>;
4073 + compatible = "adi,adt7461";
4078 + compatible = "atmel,24c512";
4083 + compatible = "atmel,24c512";
4092 + compatible = "nxp,pcf2129";
4098 + #address-cells = <2>;
4099 + #size-cells = <1>;
4100 + /* NAND Flashe and CPLD on board */
4101 + ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
4102 + 0x2 0x0 0x0 0x7fb00000 0x00000100>;
4106 + compatible = "fsl,ifc-nand";
4107 + #address-cells = <1>;
4108 + #size-cells = <1>;
4109 + reg = <0x0 0x0 0x10000>;
4112 + cpld: board-control@2,0 {
4113 + compatible = "fsl,ls1046ardb-cpld";
4114 + reg = <0x2 0x0 0x0000100>;
4123 + qflash0: s25fs512s@0 {
4124 + compatible = "spansion,m25p80";
4125 + #address-cells = <1>;
4126 + #size-cells = <1>;
4127 + spi-max-frequency = <20000000>;
4131 + qflash1: s25fs512s@1 {
4132 + compatible = "spansion,m25p80";
4133 + #address-cells = <1>;
4134 + #size-cells = <1>;
4135 + spi-max-frequency = <20000000>;
4140 +#include "fsl-ls1046-post.dtsi"
4144 + phy-handle = <&rgmii_phy1>;
4145 + phy-connection-type = "rgmii";
4149 + phy-handle = <&rgmii_phy2>;
4150 + phy-connection-type = "rgmii";
4154 + phy-handle = <&sgmii_phy1>;
4155 + phy-connection-type = "sgmii";
4159 + phy-handle = <&sgmii_phy2>;
4160 + phy-connection-type = "sgmii";
4163 + ethernet@f0000 { /* 10GEC1 */
4164 + phy-handle = <&aqr106_phy>;
4165 + phy-connection-type = "xgmii";
4168 + ethernet@f2000 { /* 10GEC2 */
4169 + fixed-link = <0 1 1000 0 0>;
4170 + phy-connection-type = "xgmii";
4174 + rgmii_phy1: ethernet-phy@1 {
4178 + rgmii_phy2: ethernet-phy@2 {
4182 + sgmii_phy1: ethernet-phy@3 {
4186 + sgmii_phy2: ethernet-phy@4 {
4192 + aqr106_phy: ethernet-phy@0 {
4193 + compatible = "ethernet-phy-ieee802.3-c45";
4194 + interrupts = <0 131 4>;
4200 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
4203 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4205 + * Copyright 2016 Freescale Semiconductor, Inc.
4207 + * Mingkai Hu <mingkai.hu@nxp.com>
4209 + * This file is dual-licensed: you can use it either under the terms
4210 + * of the GPLv2 or the X11 license, at your option. Note that this dual
4211 + * licensing only applies to this file, and not this project as a
4214 + * a) This library is free software; you can redistribute it and/or
4215 + * modify it under the terms of the GNU General Public License as
4216 + * published by the Free Software Foundation; either version 2 of the
4217 + * License, or (at your option) any later version.
4219 + * This library is distributed in the hope that it will be useful,
4220 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4221 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4222 + * GNU General Public License for more details.
4224 + * Or, alternatively,
4226 + * b) Permission is hereby granted, free of charge, to any person
4227 + * obtaining a copy of this software and associated documentation
4228 + * files (the "Software"), to deal in the Software without
4229 + * restriction, including without limitation the rights to use,
4230 + * copy, modify, merge, publish, distribute, sublicense, and/or
4231 + * sell copies of the Software, and to permit persons to whom the
4232 + * Software is furnished to do so, subject to the following
4235 + * The above copyright notice and this permission notice shall be
4236 + * included in all copies or substantial portions of the Software.
4238 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4239 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4240 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4241 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4242 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4243 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4244 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4245 + * OTHER DEALINGS IN THE SOFTWARE.
4248 +#include <dt-bindings/interrupt-controller/arm-gic.h>
4249 +#include <dt-bindings/thermal/thermal.h>
4252 + compatible = "fsl,ls1046a";
4253 + interrupt-parent = <&gic>;
4254 + #address-cells = <2>;
4255 + #size-cells = <2>;
4260 + ethernet0 = &enet0;
4261 + ethernet1 = &enet1;
4262 + ethernet2 = &enet2;
4263 + ethernet3 = &enet3;
4264 + ethernet4 = &enet4;
4265 + ethernet5 = &enet5;
4266 + ethernet6 = &enet6;
4267 + ethernet7 = &enet7;
4271 + #address-cells = <1>;
4272 + #size-cells = <0>;
4275 + device_type = "cpu";
4276 + compatible = "arm,cortex-a72";
4278 + clocks = <&clockgen 1 0>;
4279 + next-level-cache = <&l2>;
4280 + cpu-idle-states = <&CPU_PH20>;
4281 + #cooling-cells = <2>;
4285 + device_type = "cpu";
4286 + compatible = "arm,cortex-a72";
4288 + clocks = <&clockgen 1 0>;
4289 + next-level-cache = <&l2>;
4290 + cpu-idle-states = <&CPU_PH20>;
4294 + device_type = "cpu";
4295 + compatible = "arm,cortex-a72";
4297 + clocks = <&clockgen 1 0>;
4298 + next-level-cache = <&l2>;
4299 + cpu-idle-states = <&CPU_PH20>;
4303 + device_type = "cpu";
4304 + compatible = "arm,cortex-a72";
4306 + clocks = <&clockgen 1 0>;
4307 + next-level-cache = <&l2>;
4308 + cpu-idle-states = <&CPU_PH20>;
4312 + compatible = "cache";
4318 + * PSCI node is not added default, U-boot will add missing
4319 + * parts if it determines to use PSCI.
4321 + entry-method = "arm,psci";
4323 + CPU_PH20: cpu-ph20 {
4324 + compatible = "arm,idle-state";
4325 + idle-state-name = "PH20";
4326 + arm,psci-suspend-param = <0x0>;
4327 + entry-latency-us = <1000>;
4328 + exit-latency-us = <1000>;
4329 + min-residency-us = <3000>;
4334 + device_type = "memory";
4338 + compatible = "fixed-clock";
4339 + #clock-cells = <0>;
4340 + clock-frequency = <100000000>;
4341 + clock-output-names = "sysclk";
4345 + compatible ="syscon-reboot";
4352 + compatible = "arm,armv8-timer";
4353 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xf) |
4354 + IRQ_TYPE_LEVEL_LOW)>,
4355 + <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xf) |
4356 + IRQ_TYPE_LEVEL_LOW)>,
4357 + <GIC_PPI 11 (GIC_CPU_MASK_RAW(0xf) |
4358 + IRQ_TYPE_LEVEL_LOW)>,
4359 + <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xf) |
4360 + IRQ_TYPE_LEVEL_LOW)>;
4364 + compatible = "arm,cortex-a72-pmu";
4365 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
4366 + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
4367 + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
4368 + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
4369 + interrupt-affinity = <&cpu0>,
4375 + gic: interrupt-controller@1400000 {
4376 + compatible = "arm,gic-400";
4377 + #interrupt-cells = <3>;
4378 + interrupt-controller;
4379 + reg = <0x0 0x1410000 0 0x10000>, /* GICD */
4380 + <0x0 0x1420000 0 0x20000>, /* GICC */
4381 + <0x0 0x1440000 0 0x20000>, /* GICH */
4382 + <0x0 0x1460000 0 0x20000>; /* GICV */
4383 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
4384 + IRQ_TYPE_LEVEL_LOW)>;
4388 + compatible = "simple-bus";
4389 + #address-cells = <2>;
4390 + #size-cells = <2>;
4393 + ddr: memory-controller@1080000 {
4394 + compatible = "fsl,qoriq-memory-controller";
4395 + reg = <0x0 0x1080000 0x0 0x1000>;
4396 + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
4400 + ifc: ifc@1530000 {
4401 + compatible = "fsl,ifc", "simple-bus";
4402 + reg = <0x0 0x1530000 0x0 0x10000>;
4404 + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
4407 + qspi: quadspi@1550000 {
4408 + compatible = "fsl,ls1021a-qspi";
4409 + #address-cells = <1>;
4410 + #size-cells = <0>;
4411 + reg = <0x0 0x1550000 0x0 0x10000>,
4412 + <0x0 0x40000000 0x0 0x10000000>;
4413 + reg-names = "QuadSPI", "QuadSPI-memory";
4414 + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
4415 + clock-names = "qspi_en", "qspi";
4416 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
4418 + fsl,qspi-has-second-chip;
4419 + status = "disabled";
4422 + esdhc: esdhc@1560000 {
4423 + compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
4424 + reg = <0x0 0x1560000 0x0 0x10000>;
4425 + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
4426 + clocks = <&clockgen 2 1>;
4427 + voltage-ranges = <1800 1800 3300 3300>;
4433 + scfg: scfg@1570000 {
4434 + compatible = "fsl,ls1046a-scfg", "syscon";
4435 + reg = <0x0 0x1570000 0x0 0x10000>;
4439 + crypto: crypto@1700000 {
4440 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
4442 + fsl,sec-era = <8>;
4443 + #address-cells = <1>;
4444 + #size-cells = <1>;
4445 + ranges = <0x0 0x00 0x1700000 0x100000>;
4446 + reg = <0x00 0x1700000 0x0 0x100000>;
4447 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
4449 + sec_jr0: jr@10000 {
4450 + compatible = "fsl,sec-v5.4-job-ring",
4451 + "fsl,sec-v5.0-job-ring",
4452 + "fsl,sec-v4.0-job-ring";
4453 + reg = <0x10000 0x10000>;
4454 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
4457 + sec_jr1: jr@20000 {
4458 + compatible = "fsl,sec-v5.4-job-ring",
4459 + "fsl,sec-v5.0-job-ring",
4460 + "fsl,sec-v4.0-job-ring";
4461 + reg = <0x20000 0x10000>;
4462 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
4465 + sec_jr2: jr@30000 {
4466 + compatible = "fsl,sec-v5.4-job-ring",
4467 + "fsl,sec-v5.0-job-ring",
4468 + "fsl,sec-v4.0-job-ring";
4469 + reg = <0x30000 0x10000>;
4470 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
4473 + sec_jr3: jr@40000 {
4474 + compatible = "fsl,sec-v5.4-job-ring",
4475 + "fsl,sec-v5.0-job-ring",
4476 + "fsl,sec-v4.0-job-ring";
4477 + reg = <0x40000 0x10000>;
4478 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
4482 + qman: qman@1880000 {
4483 + compatible = "fsl,qman";
4484 + reg = <0x00 0x1880000 0x0 0x10000>;
4485 + interrupts = <0 45 0x4>;
4486 + memory-region = <&qman_fqd &qman_pfdr>;
4490 + bman: bman@1890000 {
4491 + compatible = "fsl,bman";
4492 + reg = <0x00 0x1890000 0x0 0x10000>;
4493 + interrupts = <0 45 0x4>;
4494 + memory-region = <&bman_fbpr>;
4498 + qportals: qman-portals@500000000 {
4499 + ranges = <0x0 0x5 0x00000000 0x8000000>;
4502 + bportals: bman-portals@508000000 {
4503 + ranges = <0x0 0x5 0x08000000 0x8000000>;
4506 + dcfg: dcfg@1ee0000 {
4507 + compatible = "fsl,ls1046a-dcfg", "syscon";
4508 + reg = <0x0 0x1ee0000 0x0 0x1000>;
4512 + clockgen: clocking@1ee1000 {
4513 + compatible = "fsl,ls1046a-clockgen";
4514 + reg = <0x0 0x1ee1000 0x0 0x1000>;
4515 + #clock-cells = <2>;
4516 + clocks = <&sysclk>;
4519 + tmu: tmu@1f00000 {
4520 + compatible = "fsl,qoriq-tmu";
4521 + reg = <0x0 0x1f00000 0x0 0x10000>;
4522 + interrupts = <0 33 0x4>;
4523 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
4524 + fsl,tmu-calibration =
4525 + /* Calibration data group 1 */
4526 + <0x00000000 0x00000026
4527 + 0x00000001 0x0000002d
4528 + 0x00000002 0x00000032
4529 + 0x00000003 0x00000039
4530 + 0x00000004 0x0000003f
4531 + 0x00000005 0x00000046
4532 + 0x00000006 0x0000004d
4533 + 0x00000007 0x00000054
4534 + 0x00000008 0x0000005a
4535 + 0x00000009 0x00000061
4536 + 0x0000000a 0x0000006a
4537 + 0x0000000b 0x00000071
4538 + /* Calibration data group 2 */
4539 + 0x00010000 0x00000025
4540 + 0x00010001 0x0000002c
4541 + 0x00010002 0x00000035
4542 + 0x00010003 0x0000003d
4543 + 0x00010004 0x00000045
4544 + 0x00010005 0x0000004e
4545 + 0x00010006 0x00000057
4546 + 0x00010007 0x00000061
4547 + 0x00010008 0x0000006b
4548 + 0x00010009 0x00000076
4549 + /* Calibration data group 3 */
4550 + 0x00020000 0x00000029
4551 + 0x00020001 0x00000033
4552 + 0x00020002 0x0000003d
4553 + 0x00020003 0x00000049
4554 + 0x00020004 0x00000056
4555 + 0x00020005 0x00000061
4556 + 0x00020006 0x0000006d
4557 + /* Calibration data group 4 */
4558 + 0x00030000 0x00000021
4559 + 0x00030001 0x0000002a
4560 + 0x00030002 0x0000003c
4561 + 0x00030003 0x0000004e>;
4563 + #thermal-sensor-cells = <1>;
4567 + cpu_thermal: cpu-thermal {
4568 + polling-delay-passive = <1000>;
4569 + polling-delay = <5000>;
4570 + thermal-sensors = <&tmu 3>;
4573 + cpu_alert: cpu-alert {
4574 + temperature = <85000>;
4575 + hysteresis = <2000>;
4579 + cpu_crit: cpu-crit {
4580 + temperature = <95000>;
4581 + hysteresis = <2000>;
4582 + type = "critical";
4588 + trip = <&cpu_alert>;
4590 + <&cpu0 THERMAL_NO_LIMIT
4591 + THERMAL_NO_LIMIT>;
4597 + dspi: dspi@2100000 {
4598 + compatible = "fsl,ls1021a-v1.0-dspi";
4599 + #address-cells = <1>;
4600 + #size-cells = <0>;
4601 + reg = <0x0 0x2100000 0x0 0x10000>;
4602 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
4603 + clock-names = "dspi";
4604 + clocks = <&clockgen 4 1>;
4605 + spi-num-chipselects = <5>;
4607 + status = "disabled";
4610 + i2c0: i2c@2180000 {
4611 + compatible = "fsl,vf610-i2c";
4612 + #address-cells = <1>;
4613 + #size-cells = <0>;
4614 + reg = <0x0 0x2180000 0x0 0x10000>;
4615 + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
4616 + clocks = <&clockgen 4 1>;
4617 + dmas = <&edma0 1 39>,
4619 + dma-names = "tx", "rx";
4620 + status = "disabled";
4623 + i2c1: i2c@2190000 {
4624 + compatible = "fsl,vf610-i2c";
4625 + #address-cells = <1>;
4626 + #size-cells = <0>;
4627 + reg = <0x0 0x2190000 0x0 0x10000>;
4628 + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
4629 + clocks = <&clockgen 4 1>;
4630 + status = "disabled";
4633 + i2c2: i2c@21a0000 {
4634 + compatible = "fsl,vf610-i2c";
4635 + #address-cells = <1>;
4636 + #size-cells = <0>;
4637 + reg = <0x0 0x21a0000 0x0 0x10000>;
4638 + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
4639 + clocks = <&clockgen 4 1>;
4640 + status = "disabled";
4643 + i2c3: i2c@21b0000 {
4644 + compatible = "fsl,vf610-i2c";
4645 + #address-cells = <1>;
4646 + #size-cells = <0>;
4647 + reg = <0x0 0x21b0000 0x0 0x10000>;
4648 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
4649 + clocks = <&clockgen 4 1>;
4650 + status = "disabled";
4653 + duart0: serial@21c0500 {
4654 + compatible = "fsl,ns16550", "ns16550a";
4655 + reg = <0x00 0x21c0500 0x0 0x100>;
4656 + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
4657 + clocks = <&clockgen 4 1>;
4660 + duart1: serial@21c0600 {
4661 + compatible = "fsl,ns16550", "ns16550a";
4662 + reg = <0x00 0x21c0600 0x0 0x100>;
4663 + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
4664 + clocks = <&clockgen 4 1>;
4667 + duart2: serial@21d0500 {
4668 + compatible = "fsl,ns16550", "ns16550a";
4669 + reg = <0x0 0x21d0500 0x0 0x100>;
4670 + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
4671 + clocks = <&clockgen 4 1>;
4674 + duart3: serial@21d0600 {
4675 + compatible = "fsl,ns16550", "ns16550a";
4676 + reg = <0x0 0x21d0600 0x0 0x100>;
4677 + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
4678 + clocks = <&clockgen 4 1>;
4681 + gpio0: gpio@2300000 {
4682 + compatible = "fsl,qoriq-gpio";
4683 + reg = <0x0 0x2300000 0x0 0x10000>;
4684 + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
4686 + #gpio-cells = <2>;
4687 + interrupt-controller;
4688 + #interrupt-cells = <2>;
4691 + gpio1: gpio@2310000 {
4692 + compatible = "fsl,qoriq-gpio";
4693 + reg = <0x0 0x2310000 0x0 0x10000>;
4694 + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
4696 + #gpio-cells = <2>;
4697 + interrupt-controller;
4698 + #interrupt-cells = <2>;
4701 + gpio2: gpio@2320000 {
4702 + compatible = "fsl,qoriq-gpio";
4703 + reg = <0x0 0x2320000 0x0 0x10000>;
4704 + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
4706 + #gpio-cells = <2>;
4707 + interrupt-controller;
4708 + #interrupt-cells = <2>;
4711 + gpio3: gpio@2330000 {
4712 + compatible = "fsl,qoriq-gpio";
4713 + reg = <0x0 0x2330000 0x0 0x10000>;
4714 + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
4716 + #gpio-cells = <2>;
4717 + interrupt-controller;
4718 + #interrupt-cells = <2>;
4721 + lpuart0: serial@2950000 {
4722 + compatible = "fsl,ls1021a-lpuart";
4723 + reg = <0x0 0x2950000 0x0 0x1000>;
4724 + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
4725 + clocks = <&clockgen 4 0>;
4726 + clock-names = "ipg";
4727 + status = "disabled";
4730 + lpuart1: serial@2960000 {
4731 + compatible = "fsl,ls1021a-lpuart";
4732 + reg = <0x0 0x2960000 0x0 0x1000>;
4733 + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
4734 + clocks = <&clockgen 4 1>;
4735 + clock-names = "ipg";
4736 + status = "disabled";
4739 + lpuart2: serial@2970000 {
4740 + compatible = "fsl,ls1021a-lpuart";
4741 + reg = <0x0 0x2970000 0x0 0x1000>;
4742 + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
4743 + clocks = <&clockgen 4 1>;
4744 + clock-names = "ipg";
4745 + status = "disabled";
4748 + lpuart3: serial@2980000 {
4749 + compatible = "fsl,ls1021a-lpuart";
4750 + reg = <0x0 0x2980000 0x0 0x1000>;
4751 + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
4752 + clocks = <&clockgen 4 1>;
4753 + clock-names = "ipg";
4754 + status = "disabled";
4757 + lpuart4: serial@2990000 {
4758 + compatible = "fsl,ls1021a-lpuart";
4759 + reg = <0x0 0x2990000 0x0 0x1000>;
4760 + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
4761 + clocks = <&clockgen 4 1>;
4762 + clock-names = "ipg";
4763 + status = "disabled";
4766 + lpuart5: serial@29a0000 {
4767 + compatible = "fsl,ls1021a-lpuart";
4768 + reg = <0x0 0x29a0000 0x0 0x1000>;
4769 + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
4770 + clocks = <&clockgen 4 1>;
4771 + clock-names = "ipg";
4772 + status = "disabled";
4775 + ftm0: ftm0@29d0000 {
4776 + compatible = "fsl,ls1046a-ftm";
4777 + reg = <0x0 0x29d0000 0x0 0x10000>,
4778 + <0x0 0x1ee2140 0x0 0x4>;
4779 + reg-names = "ftm", "FlexTimer1";
4780 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
4784 + wdog0: watchdog@2ad0000 {
4785 + compatible = "fsl,imx21-wdt";
4786 + reg = <0x0 0x2ad0000 0x0 0x10000>;
4787 + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
4788 + clocks = <&clockgen 4 1>;
4792 + edma0: edma@2c00000 {
4794 + compatible = "fsl,vf610-edma";
4795 + reg = <0x0 0x2c00000 0x0 0x10000>,
4796 + <0x0 0x2c10000 0x0 0x10000>,
4797 + <0x0 0x2c20000 0x0 0x10000>;
4798 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
4799 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
4800 + interrupt-names = "edma-tx", "edma-err";
4801 + dma-channels = <32>;
4803 + clock-names = "dmamux0", "dmamux1";
4804 + clocks = <&clockgen 4 1>,
4808 + usb0: usb@2f00000 {
4809 + compatible = "snps,dwc3";
4810 + reg = <0x0 0x2f00000 0x0 0x10000>;
4811 + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4813 + snps,quirk-frame-length-adjustment = <0x20>;
4814 + snps,dis_rxdet_inp3_quirk;
4817 + usb1: usb@3000000 {
4818 + compatible = "snps,dwc3";
4819 + reg = <0x0 0x3000000 0x0 0x10000>;
4820 + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4822 + snps,quirk-frame-length-adjustment = <0x20>;
4823 + snps,dis_rxdet_inp3_quirk;
4826 + usb2: usb@3100000 {
4827 + compatible = "snps,dwc3";
4828 + reg = <0x0 0x3100000 0x0 0x10000>;
4829 + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4831 + snps,quirk-frame-length-adjustment = <0x20>;
4832 + snps,dis_rxdet_inp3_quirk;
4835 + sata: sata@3200000 {
4836 + compatible = "fsl,ls1046a-ahci";
4837 + reg = <0x0 0x3200000 0x0 0x10000>,
4838 + <0x0 0x20140520 0x0 0x4>;
4839 + reg-names = "ahci", "sata-ecc";
4840 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4841 + clocks = <&clockgen 4 1>;
4845 + qdma: qdma@8380000 {
4846 + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
4847 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
4848 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
4849 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
4850 + interrupts = <0 153 0x4>,
4852 + interrupt-names = "qdma-error", "qdma-queue";
4855 + status-sizes = <64>;
4856 + queue-sizes = <64 64>;
4860 + msi1: msi-controller@1580000 {
4861 + compatible = "fsl,ls1046a-msi";
4863 + reg = <0x0 0x1580000 0x0 0x10000>;
4864 + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
4865 + <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
4866 + <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
4867 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
4870 + msi2: msi-controller@1590000 {
4871 + compatible = "fsl,ls1046a-msi";
4873 + reg = <0x0 0x1590000 0x0 0x10000>;
4874 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
4875 + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
4876 + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
4877 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
4880 + msi3: msi-controller@15a0000 {
4881 + compatible = "fsl,ls1046a-msi";
4883 + reg = <0x0 0x15a0000 0x0 0x10000>;
4884 + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
4885 + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
4886 + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
4887 + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
4891 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4892 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
4893 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
4894 + reg-names = "regs", "config";
4895 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
4896 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
4897 + interrupt-names = "pme", "aer";
4898 + #address-cells = <3>;
4899 + #size-cells = <2>;
4900 + device_type = "pci";
4903 + bus-range = <0x0 0xff>;
4904 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
4905 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4906 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4907 + #interrupt-cells = <1>;
4908 + interrupt-map-mask = <0 0 0 7>;
4909 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4910 + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4911 + <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4912 + <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
4916 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4917 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
4918 + 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
4919 + reg-names = "regs", "config";
4920 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
4921 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
4922 + interrupt-names = "pme", "aer";
4923 + #address-cells = <3>;
4924 + #size-cells = <2>;
4925 + device_type = "pci";
4928 + bus-range = <0x0 0xff>;
4929 + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
4930 + 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4931 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4932 + #interrupt-cells = <1>;
4933 + interrupt-map-mask = <0 0 0 7>;
4934 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4935 + <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4936 + <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4937 + <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
4941 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4942 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
4943 + 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
4944 + reg-names = "regs", "config";
4945 + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
4946 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
4947 + interrupt-names = "pme", "aer";
4948 + #address-cells = <3>;
4949 + #size-cells = <2>;
4950 + device_type = "pci";
4953 + bus-range = <0x0 0xff>;
4954 + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
4955 + 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4956 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4957 + #interrupt-cells = <1>;
4958 + interrupt-map-mask = <0 0 0 7>;
4959 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4960 + <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4961 + <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4962 + <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
4968 + #address-cells = <2>;
4969 + #size-cells = <2>;
4972 + bman_fbpr: bman-fbpr {
4973 + compatible = "shared-dma-pool";
4974 + size = <0 0x1000000>;
4975 + alignment = <0 0x1000000>;
4978 + qman_fqd: qman-fqd {
4979 + compatible = "shared-dma-pool";
4980 + size = <0 0x800000>;
4981 + alignment = <0 0x800000>;
4984 + qman_pfdr: qman-pfdr {
4985 + compatible = "shared-dma-pool";
4986 + size = <0 0x2000000>;
4987 + alignment = <0 0x2000000>;
4994 + compatible = "linaro,optee-tz";
5000 +#include "qoriq-qman1-portals.dtsi"
5001 +#include "qoriq-bman1-portals.dtsi"
5003 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
5006 + * Device Tree file for NXP LS1088A QDS Board.
5008 + * Copyright 2017 NXP
5010 + * Harninder Rai <harninder.rai@nxp.com>
5012 + * This file is dual-licensed: you can use it either under the terms
5013 + * of the GPLv2 or the X11 license, at your option. Note that this dual
5014 + * licensing only applies to this file, and not this project as a
5017 + * a) This library is free software; you can redistribute it and/or
5018 + * modify it under the terms of the GNU General Public License as
5019 + * published by the Free Software Foundation; either version 2 of the
5020 + * License, or (at your option) any later version.
5022 + * This library is distributed in the hope that it will be useful,
5023 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5024 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5025 + * GNU General Public License for more details.
5027 + * Or, alternatively,
5029 + * b) Permission is hereby granted, free of charge, to any person
5030 + * obtaining a copy of this software and associated documentation
5031 + * files (the "Software"), to deal in the Software without
5032 + * restriction, including without limitation the rights to use,
5033 + * copy, modify, merge, publish, distribute, sublicense, and/or
5034 + * sell copies of the Software, and to permit persons to whom the
5035 + * Software is furnished to do so, subject to the following
5038 + * The above copyright notice and this permission notice shall be
5039 + * included in all copies or substantial portions of the Software.
5041 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5042 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5043 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5044 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5045 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5046 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5047 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5048 + * OTHER DEALINGS IN THE SOFTWARE.
5053 +#include "fsl-ls1088a.dtsi"
5056 + model = "LS1088A QDS Board";
5057 + compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
5064 + compatible = "nxp,pca9547";
5066 + #address-cells = <1>;
5067 + #size-cells = <0>;
5070 + #address-cells = <1>;
5071 + #size-cells = <0>;
5075 + compatible = "ti,ina220";
5077 + shunt-resistor = <1000>;
5081 + compatible = "ti,ina220";
5083 + shunt-resistor = <1000>;
5088 + #address-cells = <1>;
5089 + #size-cells = <0>;
5093 + compatible = "adi,adt7461a";
5098 + compatible = "nxp,pcf2129";
5101 + interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
5105 + compatible = "atmel,24c512";
5110 + compatible = "atmel,24c512";
5119 + qflash0: s25fs512s@0 {
5120 + compatible = "spansion,m25p80";
5121 + #address-cells = <1>;
5122 + #size-cells = <1>;
5123 + spi-max-frequency = <20000000>;
5128 + qflash1: s25fs512s@1 {
5129 + compatible = "spansion,m25p80";
5130 + #address-cells = <1>;
5131 + #size-cells = <1>;
5132 + spi-max-frequency = <20000000>;
5141 + ranges = <0 0 0x5 0x80000000 0x08000000
5142 + 2 0 0x5 0x30000000 0x00010000
5143 + 3 0 0x5 0x20000000 0x00010000>;
5146 + compatible = "cfi-flash";
5147 + reg = <0x0 0x0 0x8000000>;
5149 + device-width = <1>;
5153 + compatible = "fsl,ifc-nand";
5154 + reg = <0x2 0x0 0x10000>;
5157 + fpga: board-control@3,0 {
5158 + compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
5159 + reg = <0x3 0x0 0x0000100>;
5179 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
5182 + * Device Tree file for NXP LS1088A RDB Board.
5184 + * Copyright 2017 NXP
5186 + * Harninder Rai <harninder.rai@nxp.com>
5188 + * This file is dual-licensed: you can use it either under the terms
5189 + * of the GPLv2 or the X11 license, at your option. Note that this dual
5190 + * licensing only applies to this file, and not this project as a
5193 + * a) This library is free software; you can redistribute it and/or
5194 + * modify it under the terms of the GNU General Public License as
5195 + * published by the Free Software Foundation; either version 2 of the
5196 + * License, or (at your option) any later version.
5198 + * This library is distributed in the hope that it will be useful,
5199 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5200 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5201 + * GNU General Public License for more details.
5203 + * Or, alternatively,
5205 + * b) Permission is hereby granted, free of charge, to any person
5206 + * obtaining a copy of this software and associated documentation
5207 + * files (the "Software"), to deal in the Software without
5208 + * restriction, including without limitation the rights to use,
5209 + * copy, modify, merge, publish, distribute, sublicense, and/or
5210 + * sell copies of the Software, and to permit persons to whom the
5211 + * Software is furnished to do so, subject to the following
5214 + * The above copyright notice and this permission notice shall be
5215 + * included in all copies or substantial portions of the Software.
5217 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5218 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5219 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5220 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5221 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5222 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5223 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5224 + * OTHER DEALINGS IN THE SOFTWARE.
5229 +#include "fsl-ls1088a.dtsi"
5232 + model = "L1088A RDB Board";
5233 + compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
5240 + compatible = "nxp,pca9547";
5242 + #address-cells = <1>;
5243 + #size-cells = <0>;
5246 + #address-cells = <1>;
5247 + #size-cells = <0>;
5251 + compatible = "ti,ina220";
5253 + shunt-resistor = <1000>;
5258 + #address-cells = <1>;
5259 + #size-cells = <0>;
5263 + compatible = "adi,adt7461a";
5268 + compatible = "nxp,pcf2129";
5271 + interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
5279 + qflash0: s25fs512s@0 {
5280 + compatible = "spansion,m25p80";
5281 + #address-cells = <1>;
5282 + #size-cells = <1>;
5284 + spi-max-frequency = <20000000>;
5288 + qflash1: s25fs512s@1 {
5289 + compatible = "spansion,m25p80";
5290 + #address-cells = <1>;
5291 + #size-cells = <1>;
5293 + spi-max-frequency = <20000000>;
5301 + ranges = <0 0 0x5 0x30000000 0x00010000
5302 + 2 0 0x5 0x20000000 0x00010000>;
5305 + compatible = "fsl,ifc-nand";
5306 + reg = <0x0 0x0 0x10000>;
5309 + fpga: board-control@2,0 {
5310 + compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
5311 + reg = <0x2 0x0 0x0000100>;
5340 + /* Freescale F104 PHY1 */
5341 + mdio1_phy1: emdio1_phy@1 {
5343 + phy-connection-type = "qsgmii";
5345 + mdio1_phy2: emdio1_phy@2 {
5347 + phy-connection-type = "qsgmii";
5349 + mdio1_phy3: emdio1_phy@3 {
5351 + phy-connection-type = "qsgmii";
5353 + mdio1_phy4: emdio1_phy@4 {
5355 + phy-connection-type = "qsgmii";
5358 + mdio1_phy5: emdio1_phy@5 {
5360 + phy-connection-type = "qsgmii";
5362 + mdio1_phy6: emdio1_phy@6 {
5364 + phy-connection-type = "qsgmii";
5366 + mdio1_phy7: emdio1_phy@7 {
5368 + phy-connection-type = "qsgmii";
5370 + mdio1_phy8: emdio1_phy@8 {
5372 + phy-connection-type = "qsgmii";
5377 + /* Aquantia AQR105 10G PHY */
5378 + mdio2_phy1: emdio2_phy@1 {
5379 + compatible = "ethernet-phy-ieee802.3-c45";
5380 + interrupts = <0 2 0x4>;
5382 + phy-connection-type = "xfi";
5386 +/* DPMAC connections to external PHYs
5387 + * based on LS1088A RM RevC - $24.1.2 SerDes Options
5389 +/* DPMAC1 is 10G SFP+, fixed link */
5391 + phy-handle = <&mdio2_phy1>;
5394 + phy-handle = <&mdio1_phy5>;
5397 + phy-handle = <&mdio1_phy6>;
5400 + phy-handle = <&mdio1_phy7>;
5403 + phy-handle = <&mdio1_phy8>;
5406 + phy-handle = <&mdio1_phy1>;
5409 + phy-handle = <&mdio1_phy2>;
5412 + phy-handle = <&mdio1_phy3>;
5415 + phy-handle = <&mdio1_phy4>;
5418 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5421 + * Device Tree Include file for NXP Layerscape-1088A family SoC.
5423 + * Copyright 2017 NXP
5425 + * Harninder Rai <harninder.rai@nxp.com>
5427 + * This file is dual-licensed: you can use it either under the terms
5428 + * of the GPLv2 or the X11 license, at your option. Note that this dual
5429 + * licensing only applies to this file, and not this project as a
5432 + * a) This library is free software; you can redistribute it and/or
5433 + * modify it under the terms of the GNU General Public License as
5434 + * published by the Free Software Foundation; either version 2 of the
5435 + * License, or (at your option) any later version.
5437 + * This library is distributed in the hope that it will be useful,
5438 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5439 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5440 + * GNU General Public License for more details.
5442 + * Or, alternatively,
5444 + * b) Permission is hereby granted, free of charge, to any person
5445 + * obtaining a copy of this software and associated documentation
5446 + * files (the "Software"), to deal in the Software without
5447 + * restriction, including without limitation the rights to use,
5448 + * copy, modify, merge, publish, distribute, sublicense, and/or
5449 + * sell copies of the Software, and to permit persons to whom the
5450 + * Software is furnished to do so, subject to the following
5453 + * The above copyright notice and this permission notice shall be
5454 + * included in all copies or substantial portions of the Software.
5456 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5457 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5458 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5459 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5460 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5461 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5462 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5463 + * OTHER DEALINGS IN THE SOFTWARE.
5465 +#include <dt-bindings/interrupt-controller/arm-gic.h>
5466 +#include <dt-bindings/thermal/thermal.h>
5469 + compatible = "fsl,ls1088a";
5470 + interrupt-parent = <&gic>;
5471 + #address-cells = <2>;
5472 + #size-cells = <2>;
5479 + #address-cells = <1>;
5480 + #size-cells = <0>;
5482 + /* We have 2 clusters having 4 Cortex-A53 cores each */
5484 + device_type = "cpu";
5485 + compatible = "arm,cortex-a53";
5487 + clocks = <&clockgen 1 0>;
5488 + #cooling-cells = <2>;
5489 + cpu-idle-states = <&CPU_PH20>;
5493 + device_type = "cpu";
5494 + compatible = "arm,cortex-a53";
5496 + clocks = <&clockgen 1 0>;
5497 + cpu-idle-states = <&CPU_PH20>;
5501 + device_type = "cpu";
5502 + compatible = "arm,cortex-a53";
5504 + clocks = <&clockgen 1 0>;
5505 + cpu-idle-states = <&CPU_PH20>;
5509 + device_type = "cpu";
5510 + compatible = "arm,cortex-a53";
5512 + clocks = <&clockgen 1 0>;
5513 + cpu-idle-states = <&CPU_PH20>;
5517 + device_type = "cpu";
5518 + compatible = "arm,cortex-a53";
5520 + clocks = <&clockgen 1 1>;
5521 + #cooling-cells = <2>;
5522 + cpu-idle-states = <&CPU_PH20>;
5526 + device_type = "cpu";
5527 + compatible = "arm,cortex-a53";
5529 + clocks = <&clockgen 1 1>;
5530 + cpu-idle-states = <&CPU_PH20>;
5534 + device_type = "cpu";
5535 + compatible = "arm,cortex-a53";
5537 + clocks = <&clockgen 1 1>;
5538 + cpu-idle-states = <&CPU_PH20>;
5542 + device_type = "cpu";
5543 + compatible = "arm,cortex-a53";
5545 + clocks = <&clockgen 1 1>;
5546 + cpu-idle-states = <&CPU_PH20>;
5552 + * PSCI node is not added default, U-boot will add missing
5553 + * parts if it determines to use PSCI.
5555 + entry-method = "arm,psci";
5557 + CPU_PH20: cpu-ph20 {
5558 + compatible = "arm,idle-state";
5559 + idle-state-name = "PH20";
5560 + arm,psci-suspend-param = <0x0>;
5561 + entry-latency-us = <1000>;
5562 + exit-latency-us = <1000>;
5563 + min-residency-us = <3000>;
5567 + gic: interrupt-controller@6000000 {
5568 + compatible = "arm,gic-v3";
5569 + #interrupt-cells = <3>;
5570 + #address-cells = <2>;
5571 + #size-cells = <2>;
5573 + interrupt-controller;
5574 + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
5575 + <0x0 0x06100000 0 0x100000>, /* GICR(RD_base+SGI_base)*/
5576 + <0x0 0x0c0c0000 0 0x2000>, /* GICC */
5577 + <0x0 0x0c0d0000 0 0x1000>, /* GICH */
5578 + <0x0 0x0c0e0000 0 0x20000>; /* GICV */
5579 + interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>;
5581 + its: gic-its@6020000 {
5582 + compatible = "arm,gic-v3-its";
5584 + reg = <0x0 0x6020000 0 0x20000>;
5589 + compatible = "arm,armv8-timer";
5590 + interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
5591 + <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
5592 + <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
5593 + <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
5596 + fsl_mc: fsl-mc@80c000000 {
5597 + compatible = "fsl,qoriq-mc";
5598 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
5599 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
5600 + msi-parent = <&its>;
5601 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
5602 + #address-cells = <3>;
5603 + #size-cells = <1>;
5606 + * Region type 0x0 - MC portals
5607 + * Region type 0x1 - QBMAN portals
5609 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
5610 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
5613 + #address-cells = <1>;
5614 + #size-cells = <0>;
5617 + compatible = "fsl,qoriq-mc-dpmac";
5621 + compatible = "fsl,qoriq-mc-dpmac";
5625 + compatible = "fsl,qoriq-mc-dpmac";
5629 + compatible = "fsl,qoriq-mc-dpmac";
5633 + compatible = "fsl,qoriq-mc-dpmac";
5637 + compatible = "fsl,qoriq-mc-dpmac";
5641 + compatible = "fsl,qoriq-mc-dpmac";
5645 + compatible = "fsl,qoriq-mc-dpmac";
5649 + compatible = "fsl,qoriq-mc-dpmac";
5652 + dpmac10: dpmac@10 {
5653 + compatible = "fsl,qoriq-mc-dpmac";
5661 + compatible = "fixed-clock";
5662 + #clock-cells = <0>;
5663 + clock-frequency = <100000000>;
5664 + clock-output-names = "sysclk";
5667 + dcfg: dcfg@1e00000 {
5668 + compatible = "fsl,ls1088a-dcfg", "syscon";
5669 + reg = <0x0 0x1e00000 0x0 0x10000>;
5673 + rstcr: syscon@1e60000 {
5674 + compatible = "fsl,ls1088a-rstcr", "syscon";
5675 + reg = <0x0 0x1e60000 0x0 0x4>;
5679 + compatible = "syscon-reboot";
5680 + regmap = <&rstcr>;
5687 + compatible = "simple-bus";
5688 + #address-cells = <2>;
5689 + #size-cells = <2>;
5692 + clockgen: clocking@1300000 {
5693 + compatible = "fsl,ls1088a-clockgen";
5694 + reg = <0 0x1300000 0 0xa0000>;
5695 + #clock-cells = <2>;
5696 + clocks = <&sysclk>;
5699 + tmu: tmu@1f80000 {
5700 + compatible = "fsl,qoriq-tmu";
5701 + reg = <0x0 0x1f80000 0x0 0x10000>;
5702 + interrupts = <0 23 0x4>;
5703 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
5704 + fsl,tmu-calibration =
5705 + /* Calibration data group 1 */
5706 + <0x00000000 0x00000026
5707 + 0x00000001 0x0000002d
5708 + 0x00000002 0x00000032
5709 + 0x00000003 0x00000039
5710 + 0x00000004 0x0000003f
5711 + 0x00000005 0x00000046
5712 + 0x00000006 0x0000004d
5713 + 0x00000007 0x00000054
5714 + 0x00000008 0x0000005a
5715 + 0x00000009 0x00000061
5716 + 0x0000000a 0x0000006a
5717 + 0x0000000b 0x00000071
5718 + /* Calibration data group 2 */
5719 + 0x00010000 0x00000025
5720 + 0x00010001 0x0000002c
5721 + 0x00010002 0x00000035
5722 + 0x00010003 0x0000003d
5723 + 0x00010004 0x00000045
5724 + 0x00010005 0x0000004e
5725 + 0x00010006 0x00000057
5726 + 0x00010007 0x00000061
5727 + 0x00010008 0x0000006b
5728 + 0x00010009 0x00000076
5729 + /* Calibration data group 3 */
5730 + 0x00020000 0x00000029
5731 + 0x00020001 0x00000033
5732 + 0x00020002 0x0000003d
5733 + 0x00020003 0x00000049
5734 + 0x00020004 0x00000056
5735 + 0x00020005 0x00000061
5736 + 0x00020006 0x0000006d
5737 + /* Calibration data group 4 */
5738 + 0x00030000 0x00000021
5739 + 0x00030001 0x0000002a
5740 + 0x00030002 0x0000003c
5741 + 0x00030003 0x0000004e>;
5743 + #thermal-sensor-cells = <1>;
5747 + cpu_thermal: cpu-thermal {
5748 + polling-delay-passive = <1000>;
5749 + polling-delay = <5000>;
5750 + thermal-sensors = <&tmu 0>;
5753 + cpu_alert: cpu-alert {
5754 + temperature = <85000>;
5755 + hysteresis = <2000>;
5759 + cpu_crit: cpu-crit {
5760 + temperature = <95000>;
5761 + hysteresis = <2000>;
5762 + type = "critical";
5768 + trip = <&cpu_alert>;
5770 + <&cpu0 THERMAL_NO_LIMIT
5771 + THERMAL_NO_LIMIT>;
5774 + trip = <&cpu_alert>;
5776 + <&cpu4 THERMAL_NO_LIMIT
5777 + THERMAL_NO_LIMIT>;
5783 + duart0: serial@21c0500 {
5784 + compatible = "fsl,ns16550", "ns16550a";
5785 + reg = <0x0 0x21c0500 0x0 0x100>;
5786 + clocks = <&clockgen 4 3>;
5787 + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
5788 + status = "disabled";
5791 + duart1: serial@21c0600 {
5792 + compatible = "fsl,ns16550", "ns16550a";
5793 + reg = <0x0 0x21c0600 0x0 0x100>;
5794 + clocks = <&clockgen 4 3>;
5795 + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
5796 + status = "disabled";
5799 + cluster1_core0_watchdog: wdt@c000000 {
5800 + compatible = "arm,sp805-wdt", "arm,primecell";
5801 + reg = <0x0 0xc000000 0x0 0x1000>;
5802 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5803 + clock-names = "apb_pclk", "wdog_clk";
5806 + cluster1_core1_watchdog: wdt@c010000 {
5807 + compatible = "arm,sp805-wdt", "arm,primecell";
5808 + reg = <0x0 0xc010000 0x0 0x1000>;
5809 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5810 + clock-names = "apb_pclk", "wdog_clk";
5813 + cluster1_core2_watchdog: wdt@c020000 {
5814 + compatible = "arm,sp805-wdt", "arm,primecell";
5815 + reg = <0x0 0xc020000 0x0 0x1000>;
5816 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5817 + clock-names = "apb_pclk", "wdog_clk";
5820 + cluster1_core3_watchdog: wdt@c030000 {
5821 + compatible = "arm,sp805-wdt", "arm,primecell";
5822 + reg = <0x0 0xc030000 0x0 0x1000>;
5823 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5824 + clock-names = "apb_pclk", "wdog_clk";
5827 + cluster2_core0_watchdog: wdt@c100000 {
5828 + compatible = "arm,sp805-wdt", "arm,primecell";
5829 + reg = <0x0 0xc100000 0x0 0x1000>;
5830 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5831 + clock-names = "apb_pclk", "wdog_clk";
5834 + cluster2_core1_watchdog: wdt@c110000 {
5835 + compatible = "arm,sp805-wdt", "arm,primecell";
5836 + reg = <0x0 0xc110000 0x0 0x1000>;
5837 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5838 + clock-names = "apb_pclk", "wdog_clk";
5841 + cluster2_core2_watchdog: wdt@c120000 {
5842 + compatible = "arm,sp805-wdt", "arm,primecell";
5843 + reg = <0x0 0xc120000 0x0 0x1000>;
5844 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5845 + clock-names = "apb_pclk", "wdog_clk";
5848 + cluster2_core3_watchdog: wdt@c130000 {
5849 + compatible = "arm,sp805-wdt", "arm,primecell";
5850 + reg = <0x0 0xc130000 0x0 0x1000>;
5851 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5852 + clock-names = "apb_pclk", "wdog_clk";
5855 + gpio0: gpio@2300000 {
5856 + compatible = "fsl,qoriq-gpio";
5857 + reg = <0x0 0x2300000 0x0 0x10000>;
5858 + interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
5860 + #gpio-cells = <2>;
5861 + interrupt-controller;
5862 + #interrupt-cells = <2>;
5865 + gpio1: gpio@2310000 {
5866 + compatible = "fsl,qoriq-gpio";
5867 + reg = <0x0 0x2310000 0x0 0x10000>;
5868 + interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
5870 + #gpio-cells = <2>;
5871 + interrupt-controller;
5872 + #interrupt-cells = <2>;
5875 + gpio2: gpio@2320000 {
5876 + compatible = "fsl,qoriq-gpio";
5877 + reg = <0x0 0x2320000 0x0 0x10000>;
5878 + interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
5880 + #gpio-cells = <2>;
5881 + interrupt-controller;
5882 + #interrupt-cells = <2>;
5885 + gpio3: gpio@2330000 {
5886 + compatible = "fsl,qoriq-gpio";
5887 + reg = <0x0 0x2330000 0x0 0x10000>;
5888 + interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
5890 + #gpio-cells = <2>;
5891 + interrupt-controller;
5892 + #interrupt-cells = <2>;
5895 + /* TODO: WRIOP (CCSR?) */
5896 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
5897 + * E-MDIO1: 0x1_6000
5899 + compatible = "fsl,fman-memac-mdio";
5900 + reg = <0x0 0x8B96000 0x0 0x1000>;
5901 + device_type = "mdio";
5902 + little-endian; /* force the driver in LE mode */
5904 + /* Not necessary on the QDS, but needed on the RDB */
5905 + #address-cells = <1>;
5906 + #size-cells = <0>;
5909 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
5910 + * E-MDIO2: 0x1_7000
5912 + compatible = "fsl,fman-memac-mdio";
5913 + reg = <0x0 0x8B97000 0x0 0x1000>;
5914 + device_type = "mdio";
5915 + little-endian; /* force the driver in LE mode */
5917 + #address-cells = <1>;
5918 + #size-cells = <0>;
5921 + ifc: ifc@2240000 {
5922 + compatible = "fsl,ifc", "simple-bus";
5923 + reg = <0x0 0x2240000 0x0 0x20000>;
5924 + interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
5926 + #address-cells = <2>;
5927 + #size-cells = <1>;
5931 + ftm0: ftm0@2800000 {
5932 + compatible = "fsl,ls1088a-ftm";
5933 + reg = <0x0 0x2800000 0x0 0x10000>,
5934 + <0x0 0x1e34050 0x0 0x4>;
5935 + interrupts = <0 44 4>;
5936 + reg-names = "ftm", "FlexTimer1";
5939 + i2c0: i2c@2000000 {
5940 + compatible = "fsl,vf610-i2c";
5941 + #address-cells = <1>;
5942 + #size-cells = <0>;
5943 + reg = <0x0 0x2000000 0x0 0x10000>;
5944 + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5945 + clocks = <&clockgen 4 7>;
5946 + status = "disabled";
5949 + i2c1: i2c@2010000 {
5950 + compatible = "fsl,vf610-i2c";
5951 + #address-cells = <1>;
5952 + #size-cells = <0>;
5953 + reg = <0x0 0x2010000 0x0 0x10000>;
5954 + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5955 + clocks = <&clockgen 4 7>;
5956 + status = "disabled";
5959 + i2c2: i2c@2020000 {
5960 + compatible = "fsl,vf610-i2c";
5961 + #address-cells = <1>;
5962 + #size-cells = <0>;
5963 + reg = <0x0 0x2020000 0x0 0x10000>;
5964 + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5965 + clocks = <&clockgen 4 7>;
5966 + status = "disabled";
5969 + i2c3: i2c@2030000 {
5970 + compatible = "fsl,vf610-i2c";
5971 + #address-cells = <1>;
5972 + #size-cells = <0>;
5973 + reg = <0x0 0x2030000 0x0 0x10000>;
5974 + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5975 + clocks = <&clockgen 4 7>;
5976 + status = "disabled";
5979 + qspi: quadspi@20c0000 {
5980 + compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
5981 + #address-cells = <1>;
5982 + #size-cells = <0>;
5983 + reg = <0x0 0x20c0000 0x0 0x10000>,
5984 + <0x0 0x20000000 0x0 0x10000000>;
5985 + reg-names = "QuadSPI", "QuadSPI-memory";
5986 + interrupts = <0 25 0x4>; /* Level high type */
5987 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5988 + clock-names = "qspi_en", "qspi";
5989 + fsl,qspi-has-second-chip;
5992 + esdhc: esdhc@2140000 {
5993 + compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
5994 + reg = <0x0 0x2140000 0x0 0x10000>;
5995 + interrupts = <0 28 0x4>; /* Level high type */
5996 + clock-frequency = <0>;
5997 + voltage-ranges = <1800 1800 3300 3300>;
6001 + status = "disabled";
6004 + usb0: usb3@3100000 {
6005 + compatible = "snps,dwc3";
6006 + reg = <0x0 0x3100000 0x0 0x10000>;
6007 + interrupts = <0 80 0x4>; /* Level high type */
6010 + snps,dis_rxdet_inp3_quirk;
6013 + usb1: usb3@3110000 {
6014 + compatible = "snps,dwc3";
6015 + reg = <0x0 0x3110000 0x0 0x10000>;
6016 + interrupts = <0 81 0x4>; /* Level high type */
6019 + snps,dis_rxdet_inp3_quirk;
6022 + sata: sata@3200000 {
6023 + compatible = "fsl,ls1088a-ahci";
6024 + reg = <0x0 0x3200000 0x0 0x10000>,
6025 + <0x7 0x100520 0x0 0x4>;
6026 + reg-names = "ahci", "sata-ecc";
6027 + interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
6028 + clocks = <&clockgen 4 3>;
6030 + status = "disabled";
6034 + compatible = "fsl,ls2088a-pcie", "fsl,ls1088a-pcie",
6036 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6037 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
6038 + reg-names = "regs", "config";
6039 + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
6040 + interrupt-names = "aer";
6041 + #address-cells = <3>;
6042 + #size-cells = <2>;
6043 + device_type = "pci";
6046 + bus-range = <0x0 0xff>;
6047 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
6048 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
6049 + msi-parent = <&its>;
6050 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
6051 + #interrupt-cells = <1>;
6052 + interrupt-map-mask = <0 0 0 7>;
6053 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
6054 + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
6055 + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
6056 + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
6060 + compatible = "fsl,ls2088a-pcie", "fsl,ls1088a-pcie",
6062 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
6063 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
6064 + reg-names = "regs", "config";
6065 + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
6066 + interrupt-names = "aer";
6067 + #address-cells = <3>;
6068 + #size-cells = <2>;
6069 + device_type = "pci";
6072 + bus-range = <0x0 0xff>;
6073 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
6074 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
6075 + msi-parent = <&its>;
6076 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
6077 + #interrupt-cells = <1>;
6078 + interrupt-map-mask = <0 0 0 7>;
6079 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
6080 + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
6081 + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
6082 + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
6086 + compatible = "fsl,ls2088a-pcie", "fsl,ls1088a-pcie",
6088 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
6089 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
6090 + reg-names = "regs", "config";
6091 + interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
6092 + interrupt-names = "aer";
6093 + #address-cells = <3>;
6094 + #size-cells = <2>;
6095 + device_type = "pci";
6098 + bus-range = <0x0 0xff>;
6099 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
6100 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
6101 + msi-parent = <&its>;
6102 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
6103 + #interrupt-cells = <1>;
6104 + interrupt-map-mask = <0 0 0 7>;
6105 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
6106 + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
6107 + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
6108 + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
6111 + smmu: iommu@5000000 {
6112 + compatible = "arm,mmu-500";
6113 + reg = <0 0x5000000 0 0x800000>;
6114 + #global-interrupts = <12>;
6115 + #iommu-cells = <1>;
6116 + stream-match-mask = <0x7C00>;
6117 + interrupts = <0 13 4>, /* global secure fault */
6118 + <0 14 4>, /* combined secure interrupt */
6119 + <0 15 4>, /* global non-secure fault */
6120 + <0 16 4>, /* combined non-secure interrupt */
6121 + /* performance counter interrupts 0-7 */
6130 + /* per context interrupt, 64 interrupts */
6197 + crypto: crypto@8000000 {
6198 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
6199 + fsl,sec-era = <8>;
6200 + #address-cells = <1>;
6201 + #size-cells = <1>;
6202 + ranges = <0x0 0x00 0x8000000 0x100000>;
6203 + reg = <0x00 0x8000000 0x0 0x100000>;
6204 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
6207 + sec_jr0: jr@10000 {
6208 + compatible = "fsl,sec-v5.0-job-ring",
6209 + "fsl,sec-v4.0-job-ring";
6210 + reg = <0x10000 0x10000>;
6211 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
6214 + sec_jr1: jr@20000 {
6215 + compatible = "fsl,sec-v5.0-job-ring",
6216 + "fsl,sec-v4.0-job-ring";
6217 + reg = <0x20000 0x10000>;
6218 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
6221 + sec_jr2: jr@30000 {
6222 + compatible = "fsl,sec-v5.0-job-ring",
6223 + "fsl,sec-v4.0-job-ring";
6224 + reg = <0x30000 0x10000>;
6225 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
6228 + sec_jr3: jr@40000 {
6229 + compatible = "fsl,sec-v5.0-job-ring",
6230 + "fsl,sec-v4.0-job-ring";
6231 + reg = <0x40000 0x10000>;
6232 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
6239 + compatible = "linaro,optee-tz";
6245 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
6246 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
6249 * Device Tree file for Freescale LS2080a QDS Board.
6251 - * Copyright (C) 2015, Freescale Semiconductor
6252 + * Copyright 2015-2016 Freescale Semiconductor, Inc.
6253 + * Copyright 2017 NXP
6255 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6256 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6258 * This file is dual-licensed: you can use it either under the terms
6259 @@ -46,169 +48,76 @@
6263 -/include/ "fsl-ls2080a.dtsi"
6264 +#include "fsl-ls2080a.dtsi"
6265 +#include "fsl-ls208xa-qds.dtsi"
6268 model = "Freescale Layerscape 2080a QDS Board";
6269 compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
6272 - serial0 = &serial0;
6273 - serial1 = &serial1;
6277 stdout-path = "serial0:115200n8";
6287 - #address-cells = <2>;
6288 - #size-cells = <1>;
6289 - ranges = <0x0 0x0 0x5 0x80000000 0x08000000
6290 - 0x2 0x0 0x5 0x30000000 0x00010000
6291 - 0x3 0x0 0x5 0x20000000 0x00010000>;
6294 + boardctrl: board-control@3,0 {
6295 #address-cells = <1>;
6297 - compatible = "cfi-flash";
6298 - reg = <0x0 0x0 0x8000000>;
6300 - device-width = <1>;
6302 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
6303 + reg = <3 0 0x300>; /* TODO check address */
6304 + ranges = <0 3 0 0x300>;
6307 - compatible = "fsl,ifc-nand";
6308 - reg = <0x2 0x0 0x10000>;
6311 + compatible = "mdio-mux-mmioreg", "mdio-mux";
6312 + mdio-parent-bus = <&emdio1>;
6313 + reg = <0x54 1>; /* BRDCFG4 */
6314 + mux-mask = <0xe0>; /* EMI1_MDIO */
6317 - reg = <0x3 0x0 0x10000>;
6318 - compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
6325 - compatible = "nxp,pca9547";
6327 - #address-cells = <1>;
6328 - #size-cells = <0>;
6330 - #address-cells = <1>;
6331 + #address-cells=<1>;
6335 - compatible = "dallas,ds3232";
6341 - #address-cells = <1>;
6342 - #size-cells = <0>;
6346 - compatible = "ti,ina220";
6348 - shunt-resistor = <500>;
6352 - compatible = "ti,ina220";
6354 - shunt-resistor = <1000>;
6359 - #address-cells = <1>;
6360 - #size-cells = <0>;
6364 - compatible = "adi,adt7461";
6366 + /* Child MDIO buses, one for each riser card:
6367 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6368 + * VSC8234 PHYs on the riser cards.
6371 + mdio_mux3: mdio@60 {
6373 + #address-cells = <1>;
6374 + #size-cells = <0>;
6376 + mdio0_phy12: mdio_phy0@1c {
6378 + phy-connection-type = "sgmii";
6380 + mdio0_phy13: mdio_phy1@1d {
6382 + phy-connection-type = "sgmii";
6384 + mdio0_phy14: mdio_phy2@1e {
6386 + phy-connection-type = "sgmii";
6388 + mdio0_phy15: mdio_phy3@1f {
6390 + phy-connection-type = "sgmii";
6398 - status = "disabled";
6402 - status = "disabled";
6406 - status = "disabled";
6411 - dflash0: n25q128a {
6412 - #address-cells = <1>;
6413 - #size-cells = <1>;
6414 - compatible = "st,m25p80";
6415 - spi-max-frequency = <3000000>;
6418 - dflash1: sst25wf040b {
6419 - #address-cells = <1>;
6420 - #size-cells = <1>;
6421 - compatible = "st,m25p80";
6422 - spi-max-frequency = <3000000>;
6425 - dflash2: en25s64 {
6426 - #address-cells = <1>;
6427 - #size-cells = <1>;
6428 - compatible = "st,m25p80";
6429 - spi-max-frequency = <3000000>;
6436 - flash0: s25fl256s1@0 {
6437 - #address-cells = <1>;
6438 - #size-cells = <1>;
6439 - compatible = "st,m25p80";
6440 - spi-max-frequency = <20000000>;
6443 - flash2: s25fl256s1@2 {
6444 - #address-cells = <1>;
6445 - #size-cells = <1>;
6446 - compatible = "st,m25p80";
6447 - spi-max-frequency = <20000000>;
6454 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6456 + phy-handle = <&mdio0_phy12>;
6462 + phy-handle = <&mdio0_phy13>;
6468 + phy-handle = <&mdio0_phy14>;
6474 + phy-handle = <&mdio0_phy15>;
6476 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6477 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6480 * Device Tree file for Freescale LS2080a RDB Board.
6482 - * Copyright (C) 2015, Freescale Semiconductor
6483 + * Copyright 2016 Freescale Semiconductor, Inc.
6484 + * Copyright 2017 NXP
6486 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6487 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6489 * This file is dual-licensed: you can use it either under the terms
6490 @@ -46,125 +48,94 @@
6494 -/include/ "fsl-ls2080a.dtsi"
6495 +#include "fsl-ls2080a.dtsi"
6496 +#include "fsl-ls208xa-rdb.dtsi"
6499 model = "Freescale Layerscape 2080a RDB Board";
6500 compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
6503 - serial0 = &serial0;
6504 - serial1 = &serial1;
6508 stdout-path = "serial1:115200n8";
6518 - #address-cells = <2>;
6519 - #size-cells = <1>;
6520 - ranges = <0x0 0x0 0x5 0x80000000 0x08000000
6521 - 0x2 0x0 0x5 0x30000000 0x00010000
6522 - 0x3 0x0 0x5 0x20000000 0x00010000>;
6525 - #address-cells = <1>;
6526 - #size-cells = <1>;
6527 - compatible = "cfi-flash";
6528 - reg = <0x0 0x0 0x8000000>;
6530 - device-width = <1>;
6534 - compatible = "fsl,ifc-nand";
6535 - reg = <0x2 0x0 0x10000>;
6539 - reg = <0x3 0x0 0x10000>;
6540 - compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
6548 - compatible = "nxp,pca9547";
6550 - #address-cells = <1>;
6551 - #size-cells = <0>;
6552 - status = "disabled";
6554 - #address-cells = <1>;
6555 - #size-cells = <0>;
6558 - compatible = "dallas,ds3232";
6564 - #address-cells = <1>;
6565 - #size-cells = <0>;
6569 - compatible = "adi,adt7461";
6577 - status = "disabled";
6581 - status = "disabled";
6586 status = "disabled";
6588 + mdio1_phy1: emdio1_phy@1 {
6590 + phy-connection-type = "xfi";
6592 + mdio1_phy2: emdio1_phy@2 {
6594 + phy-connection-type = "xfi";
6596 + mdio1_phy3: emdio1_phy@3 {
6598 + phy-connection-type = "xfi";
6600 + mdio1_phy4: emdio1_phy@4 {
6602 + phy-connection-type = "xfi";
6608 - dflash0: n25q512a {
6609 - #address-cells = <1>;
6610 - #size-cells = <1>;
6611 - compatible = "st,m25p80";
6612 - spi-max-frequency = <3000000>;
6616 + mdio2_phy1: emdio2_phy@1 {
6617 + compatible = "ethernet-phy-ieee802.3-c45";
6618 + interrupts = <0 1 0x4>; /* Level high type */
6620 + phy-connection-type = "xfi";
6622 + mdio2_phy2: emdio2_phy@2 {
6623 + compatible = "ethernet-phy-ieee802.3-c45";
6624 + interrupts = <0 2 0x4>; /* Level high type */
6626 + phy-connection-type = "xfi";
6628 + mdio2_phy3: emdio2_phy@3 {
6629 + compatible = "ethernet-phy-ieee802.3-c45";
6630 + interrupts = <0 4 0x4>; /* Level high type */
6632 + phy-connection-type = "xfi";
6634 + mdio2_phy4: emdio2_phy@4 {
6635 + compatible = "ethernet-phy-ieee802.3-c45";
6636 + interrupts = <0 5 0x4>; /* Level high type */
6638 + phy-connection-type = "xfi";
6643 - status = "disabled";
6645 +/* Update DPMAC connections to external PHYs, under the assumption of
6646 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6648 +/* Leave Cortina nodes commented out until driver is integrated
6650 + * phy-handle = <&mdio1_phy1>;
6653 + * phy-handle = <&mdio1_phy2>;
6656 + * phy-handle = <&mdio1_phy3>;
6659 + * phy-handle = <&mdio1_phy4>;
6666 + phy-handle = <&mdio2_phy1>;
6672 + phy-handle = <&mdio2_phy2>;
6678 + phy-handle = <&mdio2_phy3>;
6684 + phy-handle = <&mdio2_phy4>;
6686 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6687 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6690 * Device Tree file for Freescale LS2080a software Simulator model
6692 - * Copyright (C) 2014-2015, Freescale Semiconductor
6693 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
6695 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6701 -/include/ "fsl-ls2080a.dtsi"
6702 +#include "fsl-ls2080a.dtsi"
6705 model = "Freescale Layerscape 2080a software Simulator model";
6706 compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
6709 - serial0 = &serial0;
6710 - serial1 = &serial1;
6714 compatible = "smsc,lan91c111";
6715 reg = <0x0 0x2210000 0x0 0x100>;
6716 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6717 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6720 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6722 - * Copyright (C) 2014-2015, Freescale Semiconductor
6723 + * Copyright 2014-2016 Freescale Semiconductor, Inc.
6725 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6726 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6728 * This file is dual-licensed: you can use it either under the terms
6729 @@ -44,696 +45,132 @@
6730 * OTHER DEALINGS IN THE SOFTWARE.
6734 - compatible = "fsl,ls2080a";
6735 - interrupt-parent = <&gic>;
6736 - #address-cells = <2>;
6737 - #size-cells = <2>;
6740 - #address-cells = <1>;
6741 - #size-cells = <0>;
6744 - * We expect the enable-method for cpu's to be "psci", but this
6745 - * is dependent on the SoC FW, which will fill this in.
6747 - * Currently supported enable-method is psci v0.2
6750 - /* We have 4 clusters having 2 Cortex-A57 cores each */
6752 - device_type = "cpu";
6753 - compatible = "arm,cortex-a57";
6755 - clocks = <&clockgen 1 0>;
6756 - next-level-cache = <&cluster0_l2>;
6760 - device_type = "cpu";
6761 - compatible = "arm,cortex-a57";
6763 - clocks = <&clockgen 1 0>;
6764 - next-level-cache = <&cluster0_l2>;
6768 - device_type = "cpu";
6769 - compatible = "arm,cortex-a57";
6771 - clocks = <&clockgen 1 1>;
6772 - next-level-cache = <&cluster1_l2>;
6776 - device_type = "cpu";
6777 - compatible = "arm,cortex-a57";
6779 - clocks = <&clockgen 1 1>;
6780 - next-level-cache = <&cluster1_l2>;
6784 - device_type = "cpu";
6785 - compatible = "arm,cortex-a57";
6787 - clocks = <&clockgen 1 2>;
6788 - next-level-cache = <&cluster2_l2>;
6792 - device_type = "cpu";
6793 - compatible = "arm,cortex-a57";
6795 - clocks = <&clockgen 1 2>;
6796 - next-level-cache = <&cluster2_l2>;
6800 - device_type = "cpu";
6801 - compatible = "arm,cortex-a57";
6803 - clocks = <&clockgen 1 3>;
6804 - next-level-cache = <&cluster3_l2>;
6808 - device_type = "cpu";
6809 - compatible = "arm,cortex-a57";
6811 - clocks = <&clockgen 1 3>;
6812 - next-level-cache = <&cluster3_l2>;
6815 - cluster0_l2: l2-cache0 {
6816 - compatible = "cache";
6819 - cluster1_l2: l2-cache1 {
6820 - compatible = "cache";
6823 - cluster2_l2: l2-cache2 {
6824 - compatible = "cache";
6827 - cluster3_l2: l2-cache3 {
6828 - compatible = "cache";
6833 - device_type = "memory";
6834 - reg = <0x00000000 0x80000000 0 0x80000000>;
6835 - /* DRAM space - 1, size : 2 GB DRAM */
6839 - compatible = "fixed-clock";
6840 - #clock-cells = <0>;
6841 - clock-frequency = <100000000>;
6842 - clock-output-names = "sysclk";
6845 - gic: interrupt-controller@6000000 {
6846 - compatible = "arm,gic-v3";
6847 - reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
6848 - <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
6849 - <0x0 0x0c0c0000 0 0x2000>, /* GICC */
6850 - <0x0 0x0c0d0000 0 0x1000>, /* GICH */
6851 - <0x0 0x0c0e0000 0 0x20000>; /* GICV */
6852 - #interrupt-cells = <3>;
6853 - #address-cells = <2>;
6854 - #size-cells = <2>;
6856 - interrupt-controller;
6857 - interrupts = <1 9 0x4>;
6859 - its: gic-its@6020000 {
6860 - compatible = "arm,gic-v3-its";
6862 - reg = <0x0 0x6020000 0 0x20000>;
6866 - rstcr: syscon@1e60000 {
6867 - compatible = "fsl,ls2080a-rstcr", "syscon";
6868 - reg = <0x0 0x1e60000 0x0 0x4>;
6872 - compatible ="syscon-reboot";
6873 - regmap = <&rstcr>;
6879 - compatible = "arm,armv8-timer";
6880 - interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
6881 - <1 14 4>, /* Physical Non-Secure PPI, active-low */
6882 - <1 11 4>, /* Virtual PPI, active-low */
6883 - <1 10 4>; /* Hypervisor PPI, active-low */
6884 - fsl,erratum-a008585;
6888 - compatible = "arm,armv8-pmuv3";
6889 - interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
6893 - compatible = "simple-bus";
6894 - #address-cells = <2>;
6895 - #size-cells = <2>;
6898 - clockgen: clocking@1300000 {
6899 - compatible = "fsl,ls2080a-clockgen";
6900 - reg = <0 0x1300000 0 0xa0000>;
6901 - #clock-cells = <2>;
6902 - clocks = <&sysclk>;
6905 - serial0: serial@21c0500 {
6906 - compatible = "fsl,ns16550", "ns16550a";
6907 - reg = <0x0 0x21c0500 0x0 0x100>;
6908 - clocks = <&clockgen 4 3>;
6909 - interrupts = <0 32 0x4>; /* Level high type */
6912 - serial1: serial@21c0600 {
6913 - compatible = "fsl,ns16550", "ns16550a";
6914 - reg = <0x0 0x21c0600 0x0 0x100>;
6915 - clocks = <&clockgen 4 3>;
6916 - interrupts = <0 32 0x4>; /* Level high type */
6919 - cluster1_core0_watchdog: wdt@c000000 {
6920 - compatible = "arm,sp805-wdt", "arm,primecell";
6921 - reg = <0x0 0xc000000 0x0 0x1000>;
6922 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6923 - clock-names = "apb_pclk", "wdog_clk";
6926 - cluster1_core1_watchdog: wdt@c010000 {
6927 - compatible = "arm,sp805-wdt", "arm,primecell";
6928 - reg = <0x0 0xc010000 0x0 0x1000>;
6929 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6930 - clock-names = "apb_pclk", "wdog_clk";
6933 - cluster2_core0_watchdog: wdt@c100000 {
6934 - compatible = "arm,sp805-wdt", "arm,primecell";
6935 - reg = <0x0 0xc100000 0x0 0x1000>;
6936 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6937 - clock-names = "apb_pclk", "wdog_clk";
6940 - cluster2_core1_watchdog: wdt@c110000 {
6941 - compatible = "arm,sp805-wdt", "arm,primecell";
6942 - reg = <0x0 0xc110000 0x0 0x1000>;
6943 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6944 - clock-names = "apb_pclk", "wdog_clk";
6947 - cluster3_core0_watchdog: wdt@c200000 {
6948 - compatible = "arm,sp805-wdt", "arm,primecell";
6949 - reg = <0x0 0xc200000 0x0 0x1000>;
6950 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6951 - clock-names = "apb_pclk", "wdog_clk";
6954 - cluster3_core1_watchdog: wdt@c210000 {
6955 - compatible = "arm,sp805-wdt", "arm,primecell";
6956 - reg = <0x0 0xc210000 0x0 0x1000>;
6957 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6958 - clock-names = "apb_pclk", "wdog_clk";
6961 - cluster4_core0_watchdog: wdt@c300000 {
6962 - compatible = "arm,sp805-wdt", "arm,primecell";
6963 - reg = <0x0 0xc300000 0x0 0x1000>;
6964 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6965 - clock-names = "apb_pclk", "wdog_clk";
6968 - cluster4_core1_watchdog: wdt@c310000 {
6969 - compatible = "arm,sp805-wdt", "arm,primecell";
6970 - reg = <0x0 0xc310000 0x0 0x1000>;
6971 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6972 - clock-names = "apb_pclk", "wdog_clk";
6975 - fsl_mc: fsl-mc@80c000000 {
6976 - compatible = "fsl,qoriq-mc";
6977 - reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
6978 - <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
6979 - msi-parent = <&its>;
6980 - #address-cells = <3>;
6981 - #size-cells = <1>;
6984 - * Region type 0x0 - MC portals
6985 - * Region type 0x1 - QBMAN portals
6987 - ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
6988 - 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
6991 - * Define the maximum number of MACs present on the SoC.
6994 - #address-cells = <1>;
6995 - #size-cells = <0>;
6998 - compatible = "fsl,qoriq-mc-dpmac";
7003 - compatible = "fsl,qoriq-mc-dpmac";
7008 - compatible = "fsl,qoriq-mc-dpmac";
7013 - compatible = "fsl,qoriq-mc-dpmac";
7018 - compatible = "fsl,qoriq-mc-dpmac";
7023 - compatible = "fsl,qoriq-mc-dpmac";
7028 - compatible = "fsl,qoriq-mc-dpmac";
7033 - compatible = "fsl,qoriq-mc-dpmac";
7038 - compatible = "fsl,qoriq-mc-dpmac";
7042 - dpmac10: dpmac@a {
7043 - compatible = "fsl,qoriq-mc-dpmac";
7047 - dpmac11: dpmac@b {
7048 - compatible = "fsl,qoriq-mc-dpmac";
7052 - dpmac12: dpmac@c {
7053 - compatible = "fsl,qoriq-mc-dpmac";
7057 - dpmac13: dpmac@d {
7058 - compatible = "fsl,qoriq-mc-dpmac";
7062 - dpmac14: dpmac@e {
7063 - compatible = "fsl,qoriq-mc-dpmac";
7067 - dpmac15: dpmac@f {
7068 - compatible = "fsl,qoriq-mc-dpmac";
7072 - dpmac16: dpmac@10 {
7073 - compatible = "fsl,qoriq-mc-dpmac";
7079 - smmu: iommu@5000000 {
7080 - compatible = "arm,mmu-500";
7081 - reg = <0 0x5000000 0 0x800000>;
7082 - #global-interrupts = <12>;
7083 - interrupts = <0 13 4>, /* global secure fault */
7084 - <0 14 4>, /* combined secure interrupt */
7085 - <0 15 4>, /* global non-secure fault */
7086 - <0 16 4>, /* combined non-secure interrupt */
7087 - /* performance counter interrupts 0-7 */
7088 - <0 211 4>, <0 212 4>,
7089 - <0 213 4>, <0 214 4>,
7090 - <0 215 4>, <0 216 4>,
7091 - <0 217 4>, <0 218 4>,
7092 - /* per context interrupt, 64 interrupts */
7093 - <0 146 4>, <0 147 4>,
7094 - <0 148 4>, <0 149 4>,
7095 - <0 150 4>, <0 151 4>,
7096 - <0 152 4>, <0 153 4>,
7097 - <0 154 4>, <0 155 4>,
7098 - <0 156 4>, <0 157 4>,
7099 - <0 158 4>, <0 159 4>,
7100 - <0 160 4>, <0 161 4>,
7101 - <0 162 4>, <0 163 4>,
7102 - <0 164 4>, <0 165 4>,
7103 - <0 166 4>, <0 167 4>,
7104 - <0 168 4>, <0 169 4>,
7105 - <0 170 4>, <0 171 4>,
7106 - <0 172 4>, <0 173 4>,
7107 - <0 174 4>, <0 175 4>,
7108 - <0 176 4>, <0 177 4>,
7109 - <0 178 4>, <0 179 4>,
7110 - <0 180 4>, <0 181 4>,
7111 - <0 182 4>, <0 183 4>,
7112 - <0 184 4>, <0 185 4>,
7113 - <0 186 4>, <0 187 4>,
7114 - <0 188 4>, <0 189 4>,
7115 - <0 190 4>, <0 191 4>,
7116 - <0 192 4>, <0 193 4>,
7117 - <0 194 4>, <0 195 4>,
7118 - <0 196 4>, <0 197 4>,
7119 - <0 198 4>, <0 199 4>,
7120 - <0 200 4>, <0 201 4>,
7121 - <0 202 4>, <0 203 4>,
7122 - <0 204 4>, <0 205 4>,
7123 - <0 206 4>, <0 207 4>,
7124 - <0 208 4>, <0 209 4>;
7125 - mmu-masters = <&fsl_mc 0x300 0>;
7128 - dspi: dspi@2100000 {
7129 - status = "disabled";
7130 - compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
7131 - #address-cells = <1>;
7132 - #size-cells = <0>;
7133 - reg = <0x0 0x2100000 0x0 0x10000>;
7134 - interrupts = <0 26 0x4>; /* Level high type */
7135 - clocks = <&clockgen 4 3>;
7136 - clock-names = "dspi";
7137 - spi-num-chipselects = <5>;
7141 - esdhc: esdhc@2140000 {
7142 - status = "disabled";
7143 - compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
7144 - reg = <0x0 0x2140000 0x0 0x10000>;
7145 - interrupts = <0 28 0x4>; /* Level high type */
7146 - clock-frequency = <0>; /* Updated by bootloader */
7147 - voltage-ranges = <1800 1800 3300 3300>;
7153 - gpio0: gpio@2300000 {
7154 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
7155 - reg = <0x0 0x2300000 0x0 0x10000>;
7156 - interrupts = <0 36 0x4>; /* Level high type */
7159 - #gpio-cells = <2>;
7160 - interrupt-controller;
7161 - #interrupt-cells = <2>;
7164 - gpio1: gpio@2310000 {
7165 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
7166 - reg = <0x0 0x2310000 0x0 0x10000>;
7167 - interrupts = <0 36 0x4>; /* Level high type */
7170 - #gpio-cells = <2>;
7171 - interrupt-controller;
7172 - #interrupt-cells = <2>;
7175 - gpio2: gpio@2320000 {
7176 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
7177 - reg = <0x0 0x2320000 0x0 0x10000>;
7178 - interrupts = <0 37 0x4>; /* Level high type */
7181 - #gpio-cells = <2>;
7182 - interrupt-controller;
7183 - #interrupt-cells = <2>;
7186 - gpio3: gpio@2330000 {
7187 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
7188 - reg = <0x0 0x2330000 0x0 0x10000>;
7189 - interrupts = <0 37 0x4>; /* Level high type */
7192 - #gpio-cells = <2>;
7193 - interrupt-controller;
7194 - #interrupt-cells = <2>;
7197 - i2c0: i2c@2000000 {
7198 - status = "disabled";
7199 - compatible = "fsl,vf610-i2c";
7200 - #address-cells = <1>;
7201 - #size-cells = <0>;
7202 - reg = <0x0 0x2000000 0x0 0x10000>;
7203 - interrupts = <0 34 0x4>; /* Level high type */
7204 - clock-names = "i2c";
7205 - clocks = <&clockgen 4 3>;
7208 - i2c1: i2c@2010000 {
7209 - status = "disabled";
7210 - compatible = "fsl,vf610-i2c";
7211 - #address-cells = <1>;
7212 - #size-cells = <0>;
7213 - reg = <0x0 0x2010000 0x0 0x10000>;
7214 - interrupts = <0 34 0x4>; /* Level high type */
7215 - clock-names = "i2c";
7216 - clocks = <&clockgen 4 3>;
7219 - i2c2: i2c@2020000 {
7220 - status = "disabled";
7221 - compatible = "fsl,vf610-i2c";
7222 - #address-cells = <1>;
7223 - #size-cells = <0>;
7224 - reg = <0x0 0x2020000 0x0 0x10000>;
7225 - interrupts = <0 35 0x4>; /* Level high type */
7226 - clock-names = "i2c";
7227 - clocks = <&clockgen 4 3>;
7230 - i2c3: i2c@2030000 {
7231 - status = "disabled";
7232 - compatible = "fsl,vf610-i2c";
7233 - #address-cells = <1>;
7234 - #size-cells = <0>;
7235 - reg = <0x0 0x2030000 0x0 0x10000>;
7236 - interrupts = <0 35 0x4>; /* Level high type */
7237 - clock-names = "i2c";
7238 - clocks = <&clockgen 4 3>;
7241 - ifc: ifc@2240000 {
7242 - compatible = "fsl,ifc", "simple-bus";
7243 - reg = <0x0 0x2240000 0x0 0x20000>;
7244 - interrupts = <0 21 0x4>; /* Level high type */
7246 - #address-cells = <2>;
7247 - #size-cells = <1>;
7249 - ranges = <0 0 0x5 0x80000000 0x08000000
7250 - 2 0 0x5 0x30000000 0x00010000
7251 - 3 0 0x5 0x20000000 0x00010000>;
7254 - qspi: quadspi@20c0000 {
7255 - status = "disabled";
7256 - compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
7257 - #address-cells = <1>;
7258 - #size-cells = <0>;
7259 - reg = <0x0 0x20c0000 0x0 0x10000>,
7260 - <0x0 0x20000000 0x0 0x10000000>;
7261 - reg-names = "QuadSPI", "QuadSPI-memory";
7262 - interrupts = <0 25 0x4>; /* Level high type */
7263 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
7264 - clock-names = "qspi_en", "qspi";
7268 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7270 - reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
7271 - 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
7272 - reg-names = "regs", "config";
7273 - interrupts = <0 108 0x4>; /* Level high type */
7274 - interrupt-names = "intr";
7275 - #address-cells = <3>;
7276 - #size-cells = <2>;
7277 - device_type = "pci";
7280 - bus-range = <0x0 0xff>;
7281 - ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
7282 - 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7283 - msi-parent = <&its>;
7284 - #interrupt-cells = <1>;
7285 - interrupt-map-mask = <0 0 0 7>;
7286 - interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
7287 - <0000 0 0 2 &gic 0 0 0 110 4>,
7288 - <0000 0 0 3 &gic 0 0 0 111 4>,
7289 - <0000 0 0 4 &gic 0 0 0 112 4>;
7293 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7295 - reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
7296 - 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
7297 - reg-names = "regs", "config";
7298 - interrupts = <0 113 0x4>; /* Level high type */
7299 - interrupt-names = "intr";
7300 - #address-cells = <3>;
7301 - #size-cells = <2>;
7302 - device_type = "pci";
7305 - bus-range = <0x0 0xff>;
7306 - ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
7307 - 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7308 - msi-parent = <&its>;
7309 - #interrupt-cells = <1>;
7310 - interrupt-map-mask = <0 0 0 7>;
7311 - interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
7312 - <0000 0 0 2 &gic 0 0 0 115 4>,
7313 - <0000 0 0 3 &gic 0 0 0 116 4>,
7314 - <0000 0 0 4 &gic 0 0 0 117 4>;
7318 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7320 - reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
7321 - 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
7322 - reg-names = "regs", "config";
7323 - interrupts = <0 118 0x4>; /* Level high type */
7324 - interrupt-names = "intr";
7325 - #address-cells = <3>;
7326 - #size-cells = <2>;
7327 - device_type = "pci";
7330 - bus-range = <0x0 0xff>;
7331 - ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
7332 - 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7333 - msi-parent = <&its>;
7334 - #interrupt-cells = <1>;
7335 - interrupt-map-mask = <0 0 0 7>;
7336 - interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
7337 - <0000 0 0 2 &gic 0 0 0 120 4>,
7338 - <0000 0 0 3 &gic 0 0 0 121 4>,
7339 - <0000 0 0 4 &gic 0 0 0 122 4>;
7343 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7345 - reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
7346 - 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
7347 - reg-names = "regs", "config";
7348 - interrupts = <0 123 0x4>; /* Level high type */
7349 - interrupt-names = "intr";
7350 - #address-cells = <3>;
7351 - #size-cells = <2>;
7352 - device_type = "pci";
7355 - bus-range = <0x0 0xff>;
7356 - ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
7357 - 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7358 - msi-parent = <&its>;
7359 - #interrupt-cells = <1>;
7360 - interrupt-map-mask = <0 0 0 7>;
7361 - interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
7362 - <0000 0 0 2 &gic 0 0 0 125 4>,
7363 - <0000 0 0 3 &gic 0 0 0 126 4>,
7364 - <0000 0 0 4 &gic 0 0 0 127 4>;
7367 - sata0: sata@3200000 {
7368 - status = "disabled";
7369 - compatible = "fsl,ls2080a-ahci";
7370 - reg = <0x0 0x3200000 0x0 0x10000>;
7371 - interrupts = <0 133 0x4>; /* Level high type */
7372 - clocks = <&clockgen 4 3>;
7376 - sata1: sata@3210000 {
7377 - status = "disabled";
7378 - compatible = "fsl,ls2080a-ahci";
7379 - reg = <0x0 0x3210000 0x0 0x10000>;
7380 - interrupts = <0 136 0x4>; /* Level high type */
7381 - clocks = <&clockgen 4 3>;
7385 - usb0: usb3@3100000 {
7386 - status = "disabled";
7387 - compatible = "snps,dwc3";
7388 - reg = <0x0 0x3100000 0x0 0x10000>;
7389 - interrupts = <0 80 0x4>; /* Level high type */
7391 - snps,quirk-frame-length-adjustment = <0x20>;
7392 - snps,dis_rxdet_inp3_quirk;
7395 - usb1: usb3@3110000 {
7396 - status = "disabled";
7397 - compatible = "snps,dwc3";
7398 - reg = <0x0 0x3110000 0x0 0x10000>;
7399 - interrupts = <0 81 0x4>; /* Level high type */
7401 - snps,quirk-frame-length-adjustment = <0x20>;
7402 - snps,dis_rxdet_inp3_quirk;
7406 - compatible = "arm,ccn-504";
7407 - reg = <0x0 0x04000000 0x0 0x01000000>;
7408 - interrupts = <0 12 4>;
7412 - ddr1: memory-controller@1080000 {
7413 - compatible = "fsl,qoriq-memory-controller";
7414 - reg = <0x0 0x1080000 0x0 0x1000>;
7415 - interrupts = <0 17 0x4>;
7419 - ddr2: memory-controller@1090000 {
7420 - compatible = "fsl,qoriq-memory-controller";
7421 - reg = <0x0 0x1090000 0x0 0x1000>;
7422 - interrupts = <0 18 0x4>;
7424 +#include "fsl-ls208xa.dtsi"
7428 + device_type = "cpu";
7429 + compatible = "arm,cortex-a57";
7431 + clocks = <&clockgen 1 0>;
7432 + next-level-cache = <&cluster0_l2>;
7433 + #cooling-cells = <2>;
7437 + device_type = "cpu";
7438 + compatible = "arm,cortex-a57";
7440 + clocks = <&clockgen 1 0>;
7441 + next-level-cache = <&cluster0_l2>;
7445 + device_type = "cpu";
7446 + compatible = "arm,cortex-a57";
7448 + clocks = <&clockgen 1 1>;
7449 + next-level-cache = <&cluster1_l2>;
7450 + #cooling-cells = <2>;
7454 + device_type = "cpu";
7455 + compatible = "arm,cortex-a57";
7457 + clocks = <&clockgen 1 1>;
7458 + next-level-cache = <&cluster1_l2>;
7462 + device_type = "cpu";
7463 + compatible = "arm,cortex-a57";
7465 + clocks = <&clockgen 1 2>;
7466 + next-level-cache = <&cluster2_l2>;
7467 + #cooling-cells = <2>;
7471 + device_type = "cpu";
7472 + compatible = "arm,cortex-a57";
7474 + clocks = <&clockgen 1 2>;
7475 + next-level-cache = <&cluster2_l2>;
7479 + device_type = "cpu";
7480 + compatible = "arm,cortex-a57";
7482 + clocks = <&clockgen 1 3>;
7483 + next-level-cache = <&cluster3_l2>;
7484 + #cooling-cells = <2>;
7488 + device_type = "cpu";
7489 + compatible = "arm,cortex-a57";
7491 + clocks = <&clockgen 1 3>;
7492 + next-level-cache = <&cluster3_l2>;
7495 + cluster0_l2: l2-cache0 {
7496 + compatible = "cache";
7499 + cluster1_l2: l2-cache1 {
7500 + compatible = "cache";
7503 + cluster2_l2: l2-cache2 {
7504 + compatible = "cache";
7507 + cluster3_l2: l2-cache3 {
7508 + compatible = "cache";
7513 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7514 + snps,dma-snooping;
7518 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7519 + snps,dma-snooping;
7523 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
7524 + 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
7526 + ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
7527 + 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7531 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
7532 + 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
7534 + ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
7535 + 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7539 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
7540 + 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
7542 + ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
7543 + 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7547 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
7548 + 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
7550 + ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
7551 + 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7554 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
7557 + * Device Tree file for NXP LS2081A RDB Board.
7559 + * Copyright 2017 NXP
7561 + * Priyanka Jain <priyanka.jain@nxp.com>
7563 + * This file is dual-licensed: you can use it either under the terms
7564 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7565 + * licensing only applies to this file, and not this project as a
7568 + * a) This library is free software; you can redistribute it and/or
7569 + * modify it under the terms of the GNU General Public License as
7570 + * published by the Free Software Foundation; either version 2 of the
7571 + * License, or (at your option) any later version.
7573 + * This library is distributed in the hope that it will be useful,
7574 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7575 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7576 + * GNU General Public License for more details.
7578 + * Or, alternatively,
7580 + * b) Permission is hereby granted, free of charge, to any person
7581 + * obtaining a copy of this software and associated documentation
7582 + * files (the "Software"), to deal in the Software without
7583 + * restriction, including without limitation the rights to use,
7584 + * copy, modify, merge, publish, distribute, sublicense, and/or
7585 + * sell copies of the Software, and to permit persons to whom the
7586 + * Software is furnished to do so, subject to the following
7589 + * The above copyright notice and this permission notice shall be
7590 + * included in all copies or substantial portions of the Software.
7592 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7593 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7594 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7595 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7596 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7597 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7598 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7599 + * OTHER DEALINGS IN THE SOFTWARE.
7604 +#include "fsl-ls2088a.dtsi"
7607 + model = "NXP Layerscape 2081A RDB Board";
7608 + compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
7611 + serial0 = &serial0;
7612 + serial1 = &serial1;
7616 + stdout-path = "serial1:115200n8";
7625 + status = "disabled";
7631 + compatible = "nxp,pca9547";
7633 + #address-cells = <1>;
7634 + #size-cells = <0>;
7636 + #address-cells = <1>;
7637 + #size-cells = <0>;
7640 + compatible = "nxp,pcf2129";
7646 + #address-cells = <1>;
7647 + #size-cells = <0>;
7651 + compatible = "ti,ina220";
7653 + shunt-resistor = <500>;
7658 + #address-cells = <1>;
7659 + #size-cells = <0>;
7663 + compatible = "adi,adt7461";
7672 + dflash0: n25q512a {
7673 + #address-cells = <1>;
7674 + #size-cells = <1>;
7675 + compatible = "st,m25p80";
7676 + spi-max-frequency = <3000000>;
7683 + fsl,qspi-has-second-chip;
7684 + flash0: s25fs512s@0 {
7685 + #address-cells = <1>;
7686 + #size-cells = <1>;
7687 + compatible = "spansion,m25p80";
7689 + spi-max-frequency = <20000000>;
7692 + flash1: s25fs512s@1 {
7693 + #address-cells = <1>;
7694 + #size-cells = <1>;
7695 + compatible = "spansion,m25p80";
7697 + spi-max-frequency = <20000000>;
7718 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
7721 + * Device Tree file for Freescale LS2088A QDS Board.
7723 + * Copyright 2016 Freescale Semiconductor, Inc.
7724 + * Copyright 2017 NXP
7726 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7728 + * This file is dual-licensed: you can use it either under the terms
7729 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7730 + * licensing only applies to this file, and not this project as a
7733 + * a) This library is free software; you can redistribute it and/or
7734 + * modify it under the terms of the GNU General Public License as
7735 + * published by the Free Software Foundation; either version 2 of the
7736 + * License, or (at your option) any later version.
7738 + * This library is distributed in the hope that it will be useful,
7739 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7740 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7741 + * GNU General Public License for more details.
7743 + * Or, alternatively,
7745 + * b) Permission is hereby granted, free of charge, to any person
7746 + * obtaining a copy of this software and associated documentation
7747 + * files (the "Software"), to deal in the Software without
7748 + * restriction, including without limitation the rights to use,
7749 + * copy, modify, merge, publish, distribute, sublicense, and/or
7750 + * sell copies of the Software, and to permit persons to whom the
7751 + * Software is furnished to do so, subject to the following
7754 + * The above copyright notice and this permission notice shall be
7755 + * included in all copies or substantial portions of the Software.
7757 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7758 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7759 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7760 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7761 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7762 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7763 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7764 + * OTHER DEALINGS IN THE SOFTWARE.
7769 +#include "fsl-ls2088a.dtsi"
7770 +#include "fsl-ls208xa-qds.dtsi"
7773 + model = "Freescale Layerscape 2088A QDS Board";
7774 + compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
7777 + stdout-path = "serial0:115200n8";
7782 + boardctrl: board-control@3,0 {
7783 + #address-cells = <1>;
7784 + #size-cells = <1>;
7785 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
7786 + reg = <3 0 0x300>; /* TODO check address */
7787 + ranges = <0 3 0 0x300>;
7790 + compatible = "mdio-mux-mmioreg", "mdio-mux";
7791 + mdio-parent-bus = <&emdio1>;
7792 + reg = <0x54 1>; /* BRDCFG4 */
7793 + mux-mask = <0xe0>; /* EMI1_MDIO */
7795 + #address-cells=<1>;
7796 + #size-cells = <0>;
7798 + /* Child MDIO buses, one for each riser card:
7799 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
7800 + * VSC8234 PHYs on the riser cards.
7803 + mdio_mux3: mdio@60 {
7805 + #address-cells = <1>;
7806 + #size-cells = <0>;
7808 + mdio0_phy12: mdio_phy0@1c {
7810 + phy-connection-type = "sgmii";
7812 + mdio0_phy13: mdio_phy1@1d {
7814 + phy-connection-type = "sgmii";
7816 + mdio0_phy14: mdio_phy2@1e {
7818 + phy-connection-type = "sgmii";
7820 + mdio0_phy15: mdio_phy3@1f {
7822 + phy-connection-type = "sgmii";
7830 + pcs_phy1: ethernet-phy@0 {
7831 + backplane-mode = "10gbase-kr";
7832 + compatible = "ethernet-phy-ieee802.3-c45";
7834 + fsl,lane-handle = <&serdes1>;
7835 + fsl,lane-reg = <0x9C0 0x40>;/* lane H */
7840 + pcs_phy2: ethernet-phy@0 {
7841 + backplane-mode = "10gbase-kr";
7842 + compatible = "ethernet-phy-ieee802.3-c45";
7844 + fsl,lane-handle = <&serdes1>;
7845 + fsl,lane-reg = <0x980 0x40>;/* lane G */
7850 + pcs_phy3: ethernet-phy@0 {
7851 + backplane-mode = "10gbase-kr";
7852 + compatible = "ethernet-phy-ieee802.3-c45";
7854 + fsl,lane-handle = <&serdes1>;
7855 + fsl,lane-reg = <0x940 0x40>;/* lane F */
7860 + pcs_phy4: ethernet-phy@0 {
7861 + backplane-mode = "10gbase-kr";
7862 + compatible = "ethernet-phy-ieee802.3-c45";
7864 + fsl,lane-handle = <&serdes1>;
7865 + fsl,lane-reg = <0x900 0x40>;/* lane E */
7869 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
7871 + phy-handle = <&mdio0_phy12>;
7874 + phy-handle = <&mdio0_phy13>;
7877 + phy-handle = <&mdio0_phy14>;
7880 + phy-handle = <&mdio0_phy15>;
7883 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
7886 + * Device Tree file for Freescale LS2088A RDB Board.
7888 + * Copyright 2016 Freescale Semiconductor, Inc.
7889 + * Copyright 2017 NXP
7891 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7893 + * This file is dual-licensed: you can use it either under the terms
7894 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7895 + * licensing only applies to this file, and not this project as a
7898 + * a) This library is free software; you can redistribute it and/or
7899 + * modify it under the terms of the GNU General Public License as
7900 + * published by the Free Software Foundation; either version 2 of the
7901 + * License, or (at your option) any later version.
7903 + * This library is distributed in the hope that it will be useful,
7904 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7905 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7906 + * GNU General Public License for more details.
7908 + * Or, alternatively,
7910 + * b) Permission is hereby granted, free of charge, to any person
7911 + * obtaining a copy of this software and associated documentation
7912 + * files (the "Software"), to deal in the Software without
7913 + * restriction, including without limitation the rights to use,
7914 + * copy, modify, merge, publish, distribute, sublicense, and/or
7915 + * sell copies of the Software, and to permit persons to whom the
7916 + * Software is furnished to do so, subject to the following
7919 + * The above copyright notice and this permission notice shall be
7920 + * included in all copies or substantial portions of the Software.
7922 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7923 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7924 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7925 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7926 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7927 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7928 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7929 + * OTHER DEALINGS IN THE SOFTWARE.
7934 +#include "fsl-ls2088a.dtsi"
7935 +#include "fsl-ls208xa-rdb.dtsi"
7938 + model = "Freescale Layerscape 2088A RDB Board";
7939 + compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
7942 + stdout-path = "serial1:115200n8";
7947 + status = "disabled";
7949 + mdio1_phy1: emdio1_phy@1 {
7951 + phy-connection-type = "xfi";
7953 + mdio1_phy2: emdio1_phy@2 {
7955 + phy-connection-type = "xfi";
7957 + mdio1_phy3: emdio1_phy@3 {
7959 + phy-connection-type = "xfi";
7961 + mdio1_phy4: emdio1_phy@4 {
7963 + phy-connection-type = "xfi";
7969 + mdio2_phy1: emdio2_phy@1 {
7970 + compatible = "ethernet-phy-ieee802.3-c45";
7971 + interrupts = <0 1 0x4>; /* Level high type */
7973 + phy-connection-type = "xfi";
7975 + mdio2_phy2: emdio2_phy@2 {
7976 + compatible = "ethernet-phy-ieee802.3-c45";
7977 + interrupts = <0 2 0x4>; /* Level high type */
7979 + phy-connection-type = "xfi";
7981 + mdio2_phy3: emdio2_phy@3 {
7982 + compatible = "ethernet-phy-ieee802.3-c45";
7983 + interrupts = <0 4 0x4>; /* Level high type */
7985 + phy-connection-type = "xfi";
7987 + mdio2_phy4: emdio2_phy@4 {
7988 + compatible = "ethernet-phy-ieee802.3-c45";
7989 + interrupts = <0 5 0x4>; /* Level high type */
7991 + phy-connection-type = "xfi";
7995 +/* Update DPMAC connections to external PHYs, under the assumption of
7996 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
7998 +/* Leave Cortina PHYs commented out until proper driver is integrated
8000 + * phy-handle = <&mdio1_phy1>;
8003 + * phy-handle = <&mdio1_phy2>;
8006 + * phy-handle = <&mdio1_phy3>;
8009 + * phy-handle = <&mdio1_phy4>;
8014 + phy-handle = <&mdio2_phy1>;
8017 + phy-handle = <&mdio2_phy2>;
8020 + phy-handle = <&mdio2_phy3>;
8023 + phy-handle = <&mdio2_phy4>;
8026 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
8029 + * Device Tree Include file for Freescale Layerscape-2088A family SoC.
8031 + * Copyright 2016 Freescale Semiconductor, Inc.
8032 + * Copyright 2017 NXP
8034 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
8036 + * This file is dual-licensed: you can use it either under the terms
8037 + * of the GPLv2 or the X11 license, at your option. Note that this dual
8038 + * licensing only applies to this file, and not this project as a
8041 + * a) This library is free software; you can redistribute it and/or
8042 + * modify it under the terms of the GNU General Public License as
8043 + * published by the Free Software Foundation; either version 2 of the
8044 + * License, or (at your option) any later version.
8046 + * This library is distributed in the hope that it will be useful,
8047 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8048 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8049 + * GNU General Public License for more details.
8051 + * Or, alternatively,
8053 + * b) Permission is hereby granted, free of charge, to any person
8054 + * obtaining a copy of this software and associated documentation
8055 + * files (the "Software"), to deal in the Software without
8056 + * restriction, including without limitation the rights to use,
8057 + * copy, modify, merge, publish, distribute, sublicense, and/or
8058 + * sell copies of the Software, and to permit persons to whom the
8059 + * Software is furnished to do so, subject to the following
8062 + * The above copyright notice and this permission notice shall be
8063 + * included in all copies or substantial portions of the Software.
8065 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
8066 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
8067 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8068 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
8069 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
8070 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
8071 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
8072 + * OTHER DEALINGS IN THE SOFTWARE.
8075 +#include "fsl-ls208xa.dtsi"
8079 + device_type = "cpu";
8080 + compatible = "arm,cortex-a72";
8082 + clocks = <&clockgen 1 0>;
8083 + next-level-cache = <&cluster0_l2>;
8084 + #cooling-cells = <2>;
8085 + cpu-idle-states = <&CPU_PH20>;
8089 + device_type = "cpu";
8090 + compatible = "arm,cortex-a72";
8092 + clocks = <&clockgen 1 0>;
8093 + next-level-cache = <&cluster0_l2>;
8094 + cpu-idle-states = <&CPU_PH20>;
8098 + device_type = "cpu";
8099 + compatible = "arm,cortex-a72";
8101 + clocks = <&clockgen 1 1>;
8102 + next-level-cache = <&cluster1_l2>;
8103 + #cooling-cells = <2>;
8104 + cpu-idle-states = <&CPU_PH20>;
8108 + device_type = "cpu";
8109 + compatible = "arm,cortex-a72";
8111 + clocks = <&clockgen 1 1>;
8112 + next-level-cache = <&cluster1_l2>;
8113 + cpu-idle-states = <&CPU_PH20>;
8117 + device_type = "cpu";
8118 + compatible = "arm,cortex-a72";
8120 + clocks = <&clockgen 1 2>;
8121 + next-level-cache = <&cluster2_l2>;
8122 + #cooling-cells = <2>;
8123 + cpu-idle-states = <&CPU_PH20>;
8127 + device_type = "cpu";
8128 + compatible = "arm,cortex-a72";
8130 + clocks = <&clockgen 1 2>;
8131 + next-level-cache = <&cluster2_l2>;
8132 + cpu-idle-states = <&CPU_PH20>;
8136 + device_type = "cpu";
8137 + compatible = "arm,cortex-a72";
8139 + clocks = <&clockgen 1 3>;
8140 + next-level-cache = <&cluster3_l2>;
8141 + #cooling-cells = <2>;
8142 + cpu-idle-states = <&CPU_PH20>;
8146 + device_type = "cpu";
8147 + compatible = "arm,cortex-a72";
8149 + clocks = <&clockgen 1 3>;
8150 + next-level-cache = <&cluster3_l2>;
8151 + cpu-idle-states = <&CPU_PH20>;
8156 + * PSCI node is not added default, U-boot will add missing
8157 + * parts if it determines to use PSCI.
8159 + entry-method = "arm,psci";
8161 + CPU_PH20: cpu-ph20 {
8162 + compatible = "arm,idle-state";
8163 + idle-state-name = "PH20";
8164 + arm,psci-suspend-param = <0x0>;
8165 + entry-latency-us = <1000>;
8166 + exit-latency-us = <1000>;
8167 + min-residency-us = <3000>;
8171 + cluster0_l2: l2-cache0 {
8172 + compatible = "cache";
8175 + cluster1_l2: l2-cache1 {
8176 + compatible = "cache";
8179 + cluster2_l2: l2-cache2 {
8180 + compatible = "cache";
8183 + cluster3_l2: l2-cache3 {
8184 + compatible = "cache";
8189 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
8190 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
8191 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
8193 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000
8194 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>;
8198 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
8199 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
8200 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
8202 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000
8203 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>;
8207 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
8208 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
8209 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
8211 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000
8212 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>;
8216 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
8217 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
8218 + 0x38 0x00000000 0x0 0x00002000>; /* configuration space */
8220 + ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000
8221 + 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>;
8224 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
8227 + * Device Tree file for Freescale LS2080A QDS Board.
8229 + * Copyright 2016 Freescale Semiconductor, Inc.
8230 + * Copyright 2017 NXP
8232 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
8234 + * This file is dual-licensed: you can use it either under the terms
8235 + * of the GPLv2 or the X11 license, at your option. Note that this dual
8236 + * licensing only applies to this file, and not this project as a
8239 + * a) This library is free software; you can redistribute it and/or
8240 + * modify it under the terms of the GNU General Public License as
8241 + * published by the Free Software Foundation; either version 2 of the
8242 + * License, or (at your option) any later version.
8244 + * This library is distributed in the hope that it will be useful,
8245 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8246 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8247 + * GNU General Public License for more details.
8249 + * Or, alternatively,
8251 + * b) Permission is hereby granted, free of charge, to any person
8252 + * obtaining a copy of this software and associated documentation
8253 + * files (the "Software"), to deal in the Software without
8254 + * restriction, including without limitation the rights to use,
8255 + * copy, modify, merge, publish, distribute, sublicense, and/or
8256 + * sell copies of the Software, and to permit persons to whom the
8257 + * Software is furnished to do so, subject to the following
8260 + * The above copyright notice and this permission notice shall be
8261 + * included in all copies or substantial portions of the Software.
8263 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
8264 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
8265 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8266 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
8267 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
8268 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
8269 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
8270 + * OTHER DEALINGS IN THE SOFTWARE.
8280 + #address-cells = <2>;
8281 + #size-cells = <1>;
8282 + ranges = <0x0 0x0 0x5 0x80000000 0x08000000
8283 + 0x2 0x0 0x5 0x30000000 0x00010000
8284 + 0x3 0x0 0x5 0x20000000 0x00010000>;
8287 + #address-cells = <1>;
8288 + #size-cells = <1>;
8289 + compatible = "cfi-flash";
8290 + reg = <0x0 0x0 0x8000000>;
8292 + device-width = <1>;
8296 + compatible = "fsl,ifc-nand";
8297 + reg = <0x2 0x0 0x10000>;
8301 + reg = <0x3 0x0 0x10000>;
8302 + compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
8309 + compatible = "nxp,pca9547";
8311 + #address-cells = <1>;
8312 + #size-cells = <0>;
8314 + #address-cells = <1>;
8315 + #size-cells = <0>;
8318 + compatible = "dallas,ds3232";
8324 + #address-cells = <1>;
8325 + #size-cells = <0>;
8329 + compatible = "ti,ina220";
8331 + shunt-resistor = <500>;
8335 + compatible = "ti,ina220";
8337 + shunt-resistor = <1000>;
8342 + #address-cells = <1>;
8343 + #size-cells = <0>;
8347 + compatible = "adi,adt7461";
8355 + status = "disabled";
8359 + status = "disabled";
8363 + status = "disabled";
8368 + dflash0: n25q128a {
8369 + #address-cells = <1>;
8370 + #size-cells = <1>;
8371 + compatible = "st,m25p80";
8372 + spi-max-frequency = <3000000>;
8375 + dflash1: sst25wf040b {
8376 + #address-cells = <1>;
8377 + #size-cells = <1>;
8378 + compatible = "st,m25p80";
8379 + spi-max-frequency = <3000000>;
8382 + dflash2: en25s64 {
8383 + #address-cells = <1>;
8384 + #size-cells = <1>;
8385 + compatible = "st,m25p80";
8386 + spi-max-frequency = <3000000>;
8393 + flash0: s25fl256s1@0 {
8394 + #address-cells = <1>;
8395 + #size-cells = <1>;
8396 + compatible = "st,m25p80";
8397 + spi-max-frequency = <20000000>;
8400 + flash2: s25fl256s1@2 {
8401 + #address-cells = <1>;
8402 + #size-cells = <1>;
8403 + compatible = "st,m25p80";
8404 + spi-max-frequency = <20000000>;
8425 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
8428 + * Device Tree file for Freescale LS2080A RDB Board.
8430 + * Copyright 2016 Freescale Semiconductor, Inc.
8431 + * Copyright 2017 NXP
8433 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
8435 + * This file is dual-licensed: you can use it either under the terms
8436 + * of the GPLv2 or the X11 license, at your option. Note that this dual
8437 + * licensing only applies to this file, and not this project as a
8440 + * a) This library is free software; you can redistribute it and/or
8441 + * modify it under the terms of the GNU General Public License as
8442 + * published by the Free Software Foundation; either version 2 of the
8443 + * License, or (at your option) any later version.
8445 + * This library is distributed in the hope that it will be useful,
8446 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8447 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8448 + * GNU General Public License for more details.
8450 + * Or, alternatively,
8452 + * b) Permission is hereby granted, free of charge, to any person
8453 + * obtaining a copy of this software and associated documentation
8454 + * files (the "Software"), to deal in the Software without
8455 + * restriction, including without limitation the rights to use,
8456 + * copy, modify, merge, publish, distribute, sublicense, and/or
8457 + * sell copies of the Software, and to permit persons to whom the
8458 + * Software is furnished to do so, subject to the following
8461 + * The above copyright notice and this permission notice shall be
8462 + * included in all copies or substantial portions of the Software.
8464 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
8465 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
8466 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8467 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
8468 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
8469 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
8470 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
8471 + * OTHER DEALINGS IN THE SOFTWARE.
8480 + #address-cells = <2>;
8481 + #size-cells = <1>;
8482 + ranges = <0x0 0x0 0x5 0x80000000 0x08000000
8483 + 0x2 0x0 0x5 0x30000000 0x00010000
8484 + 0x3 0x0 0x5 0x20000000 0x00010000>;
8487 + #address-cells = <1>;
8488 + #size-cells = <1>;
8489 + compatible = "cfi-flash";
8490 + reg = <0x0 0x0 0x8000000>;
8492 + device-width = <1>;
8496 + compatible = "fsl,ifc-nand";
8497 + reg = <0x2 0x0 0x10000>;
8501 + reg = <0x3 0x0 0x10000>;
8502 + compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
8510 + compatible = "nxp,pca9547";
8512 + #address-cells = <1>;
8513 + #size-cells = <0>;
8514 + i2c-mux-never-disable;
8516 + #address-cells = <1>;
8517 + #size-cells = <0>;
8520 + compatible = "dallas,ds3232";
8526 + #address-cells = <1>;
8527 + #size-cells = <0>;
8531 + compatible = "adi,adt7461";
8539 + status = "disabled";
8543 + status = "disabled";
8547 + status = "disabled";
8552 + dflash0: n25q512a {
8553 + #address-cells = <1>;
8554 + #size-cells = <1>;
8555 + compatible = "st,m25p80";
8556 + spi-max-frequency = <3000000>;
8563 + flash0: s25fs512s@0 {
8564 + #address-cells = <1>;
8565 + #size-cells = <1>;
8566 + compatible = "spansion,m25p80";
8568 + spi-max-frequency = <20000000>;
8589 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
8592 + * Device Tree Include file for Freescale Layerscape-2080A family SoC.
8594 + * Copyright 2016 Freescale Semiconductor, Inc.
8595 + * Copyright 2017 NXP
8597 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
8599 + * This file is dual-licensed: you can use it either under the terms
8600 + * of the GPLv2 or the X11 license, at your option. Note that this dual
8601 + * licensing only applies to this file, and not this project as a
8604 + * a) This library is free software; you can redistribute it and/or
8605 + * modify it under the terms of the GNU General Public License as
8606 + * published by the Free Software Foundation; either version 2 of the
8607 + * License, or (at your option) any later version.
8609 + * This library is distributed in the hope that it will be useful,
8610 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8611 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8612 + * GNU General Public License for more details.
8614 + * Or, alternatively,
8616 + * b) Permission is hereby granted, free of charge, to any person
8617 + * obtaining a copy of this software and associated documentation
8618 + * files (the "Software"), to deal in the Software without
8619 + * restriction, including without limitation the rights to use,
8620 + * copy, modify, merge, publish, distribute, sublicense, and/or
8621 + * sell copies of the Software, and to permit persons to whom the
8622 + * Software is furnished to do so, subject to the following
8625 + * The above copyright notice and this permission notice shall be
8626 + * included in all copies or substantial portions of the Software.
8628 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
8629 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
8630 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8631 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
8632 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
8633 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
8634 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
8635 + * OTHER DEALINGS IN THE SOFTWARE.
8638 +#include <dt-bindings/thermal/thermal.h>
8639 +#include <dt-bindings/interrupt-controller/arm-gic.h>
8642 + compatible = "fsl,ls2080a";
8643 + interrupt-parent = <&gic>;
8644 + #address-cells = <2>;
8645 + #size-cells = <2>;
8649 + serial0 = &serial0;
8650 + serial1 = &serial1;
8654 + #address-cells = <1>;
8655 + #size-cells = <0>;
8659 + device_type = "memory";
8660 + reg = <0x00000000 0x80000000 0 0x80000000>;
8661 + /* DRAM space - 1, size : 2 GB DRAM */
8665 + compatible = "fixed-clock";
8666 + #clock-cells = <0>;
8667 + clock-frequency = <100000000>;
8668 + clock-output-names = "sysclk";
8671 + gic: interrupt-controller@6000000 {
8672 + compatible = "arm,gic-v3";
8673 + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
8674 + <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
8675 + <0x0 0x0c0c0000 0 0x2000>, /* GICC */
8676 + <0x0 0x0c0d0000 0 0x1000>, /* GICH */
8677 + <0x0 0x0c0e0000 0 0x20000>; /* GICV */
8678 + #interrupt-cells = <3>;
8679 + #address-cells = <2>;
8680 + #size-cells = <2>;
8682 + interrupt-controller;
8683 + interrupts = <1 9 0x4>;
8685 + its: gic-its@6020000 {
8686 + compatible = "arm,gic-v3-its";
8688 + reg = <0x0 0x6020000 0 0x20000>;
8692 + rstcr: syscon@1e60000 {
8693 + compatible = "fsl,ls2080a-rstcr", "syscon";
8694 + reg = <0x0 0x1e60000 0x0 0x4>;
8698 + compatible ="syscon-reboot";
8699 + regmap = <&rstcr>;
8705 + compatible = "arm,armv8-timer";
8706 + interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
8707 + <1 14 4>, /* Physical Non-Secure PPI, active-low */
8708 + <1 11 4>, /* Virtual PPI, active-low */
8709 + <1 10 4>; /* Hypervisor PPI, active-low */
8710 + fsl,erratum-a008585;
8714 + compatible = "arm,armv8-pmuv3";
8715 + interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
8719 + compatible = "simple-bus";
8720 + #address-cells = <2>;
8721 + #size-cells = <2>;
8724 + clockgen: clocking@1300000 {
8725 + compatible = "fsl,ls2080a-clockgen";
8726 + reg = <0 0x1300000 0 0xa0000>;
8727 + #clock-cells = <2>;
8728 + clocks = <&sysclk>;
8731 + dcfg: dcfg@1e00000 {
8732 + compatible = "fsl,ls2080a-dcfg", "syscon";
8733 + reg = <0x0 0x1e00000 0x0 0x10000>;
8737 + tmu: tmu@1f80000 {
8738 + compatible = "fsl,qoriq-tmu";
8739 + reg = <0x0 0x1f80000 0x0 0x10000>;
8740 + interrupts = <0 23 0x4>;
8741 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
8742 + fsl,tmu-calibration = <0x00000000 0x00000026
8743 + 0x00000001 0x0000002d
8744 + 0x00000002 0x00000032
8745 + 0x00000003 0x00000039
8746 + 0x00000004 0x0000003f
8747 + 0x00000005 0x00000046
8748 + 0x00000006 0x0000004d
8749 + 0x00000007 0x00000054
8750 + 0x00000008 0x0000005a
8751 + 0x00000009 0x00000061
8752 + 0x0000000a 0x0000006a
8753 + 0x0000000b 0x00000071
8755 + 0x00010000 0x00000025
8756 + 0x00010001 0x0000002c
8757 + 0x00010002 0x00000035
8758 + 0x00010003 0x0000003d
8759 + 0x00010004 0x00000045
8760 + 0x00010005 0x0000004e
8761 + 0x00010006 0x00000057
8762 + 0x00010007 0x00000061
8763 + 0x00010008 0x0000006b
8764 + 0x00010009 0x00000076
8766 + 0x00020000 0x00000029
8767 + 0x00020001 0x00000033
8768 + 0x00020002 0x0000003d
8769 + 0x00020003 0x00000049
8770 + 0x00020004 0x00000056
8771 + 0x00020005 0x00000061
8772 + 0x00020006 0x0000006d
8774 + 0x00030000 0x00000021
8775 + 0x00030001 0x0000002a
8776 + 0x00030002 0x0000003c
8777 + 0x00030003 0x0000004e>;
8779 + #thermal-sensor-cells = <1>;
8783 + cpu_thermal: cpu-thermal {
8784 + polling-delay-passive = <1000>;
8785 + polling-delay = <5000>;
8787 + thermal-sensors = <&tmu 4>;
8790 + cpu_alert: cpu-alert {
8791 + temperature = <75000>;
8792 + hysteresis = <2000>;
8795 + cpu_crit: cpu-crit {
8796 + temperature = <85000>;
8797 + hysteresis = <2000>;
8798 + type = "critical";
8804 + trip = <&cpu_alert>;
8806 + <&cpu0 THERMAL_NO_LIMIT
8807 + THERMAL_NO_LIMIT>;
8810 + trip = <&cpu_alert>;
8812 + <&cpu2 THERMAL_NO_LIMIT
8813 + THERMAL_NO_LIMIT>;
8816 + trip = <&cpu_alert>;
8818 + <&cpu4 THERMAL_NO_LIMIT
8819 + THERMAL_NO_LIMIT>;
8822 + trip = <&cpu_alert>;
8824 + <&cpu6 THERMAL_NO_LIMIT
8825 + THERMAL_NO_LIMIT>;
8831 + serial0: serial@21c0500 {
8832 + compatible = "fsl,ns16550", "ns16550a";
8833 + reg = <0x0 0x21c0500 0x0 0x100>;
8834 + clocks = <&clockgen 4 3>;
8835 + interrupts = <0 32 0x4>; /* Level high type */
8838 + serial1: serial@21c0600 {
8839 + compatible = "fsl,ns16550", "ns16550a";
8840 + reg = <0x0 0x21c0600 0x0 0x100>;
8841 + clocks = <&clockgen 4 3>;
8842 + interrupts = <0 32 0x4>; /* Level high type */
8845 + cluster1_core0_watchdog: wdt@c000000 {
8846 + compatible = "arm,sp805-wdt", "arm,primecell";
8847 + reg = <0x0 0xc000000 0x0 0x1000>;
8848 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8849 + clock-names = "apb_pclk", "wdog_clk";
8852 + cluster1_core1_watchdog: wdt@c010000 {
8853 + compatible = "arm,sp805-wdt", "arm,primecell";
8854 + reg = <0x0 0xc010000 0x0 0x1000>;
8855 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8856 + clock-names = "apb_pclk", "wdog_clk";
8859 + cluster2_core0_watchdog: wdt@c100000 {
8860 + compatible = "arm,sp805-wdt", "arm,primecell";
8861 + reg = <0x0 0xc100000 0x0 0x1000>;
8862 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8863 + clock-names = "apb_pclk", "wdog_clk";
8866 + cluster2_core1_watchdog: wdt@c110000 {
8867 + compatible = "arm,sp805-wdt", "arm,primecell";
8868 + reg = <0x0 0xc110000 0x0 0x1000>;
8869 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8870 + clock-names = "apb_pclk", "wdog_clk";
8873 + cluster3_core0_watchdog: wdt@c200000 {
8874 + compatible = "arm,sp805-wdt", "arm,primecell";
8875 + reg = <0x0 0xc200000 0x0 0x1000>;
8876 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8877 + clock-names = "apb_pclk", "wdog_clk";
8880 + cluster3_core1_watchdog: wdt@c210000 {
8881 + compatible = "arm,sp805-wdt", "arm,primecell";
8882 + reg = <0x0 0xc210000 0x0 0x1000>;
8883 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8884 + clock-names = "apb_pclk", "wdog_clk";
8887 + cluster4_core0_watchdog: wdt@c300000 {
8888 + compatible = "arm,sp805-wdt", "arm,primecell";
8889 + reg = <0x0 0xc300000 0x0 0x1000>;
8890 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8891 + clock-names = "apb_pclk", "wdog_clk";
8894 + cluster4_core1_watchdog: wdt@c310000 {
8895 + compatible = "arm,sp805-wdt", "arm,primecell";
8896 + reg = <0x0 0xc310000 0x0 0x1000>;
8897 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8898 + clock-names = "apb_pclk", "wdog_clk";
8901 + crypto: crypto@8000000 {
8902 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
8903 + fsl,sec-era = <8>;
8904 + #address-cells = <1>;
8905 + #size-cells = <1>;
8906 + ranges = <0x0 0x00 0x8000000 0x100000>;
8907 + reg = <0x00 0x8000000 0x0 0x100000>;
8908 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
8911 + sec_jr0: jr@10000 {
8912 + compatible = "fsl,sec-v5.0-job-ring",
8913 + "fsl,sec-v4.0-job-ring";
8914 + reg = <0x10000 0x10000>;
8915 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
8918 + sec_jr1: jr@20000 {
8919 + compatible = "fsl,sec-v5.0-job-ring",
8920 + "fsl,sec-v4.0-job-ring";
8921 + reg = <0x20000 0x10000>;
8922 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
8925 + sec_jr2: jr@30000 {
8926 + compatible = "fsl,sec-v5.0-job-ring",
8927 + "fsl,sec-v4.0-job-ring";
8928 + reg = <0x30000 0x10000>;
8929 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
8932 + sec_jr3: jr@40000 {
8933 + compatible = "fsl,sec-v5.0-job-ring",
8934 + "fsl,sec-v4.0-job-ring";
8935 + reg = <0x40000 0x10000>;
8936 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
8940 + fsl_mc: fsl-mc@80c000000 {
8941 + compatible = "fsl,qoriq-mc";
8942 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
8943 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
8944 + msi-parent = <&its>;
8945 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
8946 + #address-cells = <3>;
8947 + #size-cells = <1>;
8950 + * Region type 0x0 - MC portals
8951 + * Region type 0x1 - QBMAN portals
8953 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
8954 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
8957 + * Define the maximum number of MACs present on the SoC.
8960 + #address-cells = <1>;
8961 + #size-cells = <0>;
8964 + compatible = "fsl,qoriq-mc-dpmac";
8969 + compatible = "fsl,qoriq-mc-dpmac";
8974 + compatible = "fsl,qoriq-mc-dpmac";
8979 + compatible = "fsl,qoriq-mc-dpmac";
8984 + compatible = "fsl,qoriq-mc-dpmac";
8989 + compatible = "fsl,qoriq-mc-dpmac";
8994 + compatible = "fsl,qoriq-mc-dpmac";
8999 + compatible = "fsl,qoriq-mc-dpmac";
9004 + compatible = "fsl,qoriq-mc-dpmac";
9008 + dpmac10: dpmac@a {
9009 + compatible = "fsl,qoriq-mc-dpmac";
9013 + dpmac11: dpmac@b {
9014 + compatible = "fsl,qoriq-mc-dpmac";
9018 + dpmac12: dpmac@c {
9019 + compatible = "fsl,qoriq-mc-dpmac";
9023 + dpmac13: dpmac@d {
9024 + compatible = "fsl,qoriq-mc-dpmac";
9028 + dpmac14: dpmac@e {
9029 + compatible = "fsl,qoriq-mc-dpmac";
9033 + dpmac15: dpmac@f {
9034 + compatible = "fsl,qoriq-mc-dpmac";
9038 + dpmac16: dpmac@10 {
9039 + compatible = "fsl,qoriq-mc-dpmac";
9045 + smmu: iommu@5000000 {
9046 + compatible = "arm,mmu-500";
9047 + reg = <0 0x5000000 0 0x800000>;
9048 + #global-interrupts = <12>;
9049 + #iommu-cells = <1>;
9050 + stream-match-mask = <0x7C00>;
9051 + interrupts = <0 13 4>, /* global secure fault */
9052 + <0 14 4>, /* combined secure interrupt */
9053 + <0 15 4>, /* global non-secure fault */
9054 + <0 16 4>, /* combined non-secure interrupt */
9055 + /* performance counter interrupts 0-7 */
9056 + <0 211 4>, <0 212 4>,
9057 + <0 213 4>, <0 214 4>,
9058 + <0 215 4>, <0 216 4>,
9059 + <0 217 4>, <0 218 4>,
9060 + /* per context interrupt, 64 interrupts */
9061 + <0 146 4>, <0 147 4>,
9062 + <0 148 4>, <0 149 4>,
9063 + <0 150 4>, <0 151 4>,
9064 + <0 152 4>, <0 153 4>,
9065 + <0 154 4>, <0 155 4>,
9066 + <0 156 4>, <0 157 4>,
9067 + <0 158 4>, <0 159 4>,
9068 + <0 160 4>, <0 161 4>,
9069 + <0 162 4>, <0 163 4>,
9070 + <0 164 4>, <0 165 4>,
9071 + <0 166 4>, <0 167 4>,
9072 + <0 168 4>, <0 169 4>,
9073 + <0 170 4>, <0 171 4>,
9074 + <0 172 4>, <0 173 4>,
9075 + <0 174 4>, <0 175 4>,
9076 + <0 176 4>, <0 177 4>,
9077 + <0 178 4>, <0 179 4>,
9078 + <0 180 4>, <0 181 4>,
9079 + <0 182 4>, <0 183 4>,
9080 + <0 184 4>, <0 185 4>,
9081 + <0 186 4>, <0 187 4>,
9082 + <0 188 4>, <0 189 4>,
9083 + <0 190 4>, <0 191 4>,
9084 + <0 192 4>, <0 193 4>,
9085 + <0 194 4>, <0 195 4>,
9086 + <0 196 4>, <0 197 4>,
9087 + <0 198 4>, <0 199 4>,
9088 + <0 200 4>, <0 201 4>,
9089 + <0 202 4>, <0 203 4>,
9090 + <0 204 4>, <0 205 4>,
9091 + <0 206 4>, <0 207 4>,
9092 + <0 208 4>, <0 209 4>;
9095 + dspi: dspi@2100000 {
9096 + status = "disabled";
9097 + compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
9098 + #address-cells = <1>;
9099 + #size-cells = <0>;
9100 + reg = <0x0 0x2100000 0x0 0x10000>;
9101 + interrupts = <0 26 0x4>; /* Level high type */
9102 + clocks = <&clockgen 4 3>;
9103 + clock-names = "dspi";
9104 + spi-num-chipselects = <5>;
9108 + esdhc: esdhc@2140000 {
9109 + status = "disabled";
9110 + compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
9111 + reg = <0x0 0x2140000 0x0 0x10000>;
9112 + interrupts = <0 28 0x4>; /* Level high type */
9113 + clocks = <&clockgen 4 1>;
9114 + voltage-ranges = <1800 1800 3300 3300>;
9120 + gpio0: gpio@2300000 {
9121 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
9122 + reg = <0x0 0x2300000 0x0 0x10000>;
9123 + interrupts = <0 36 0x4>; /* Level high type */
9126 + #gpio-cells = <2>;
9127 + interrupt-controller;
9128 + #interrupt-cells = <2>;
9131 + gpio1: gpio@2310000 {
9132 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
9133 + reg = <0x0 0x2310000 0x0 0x10000>;
9134 + interrupts = <0 36 0x4>; /* Level high type */
9137 + #gpio-cells = <2>;
9138 + interrupt-controller;
9139 + #interrupt-cells = <2>;
9142 + gpio2: gpio@2320000 {
9143 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
9144 + reg = <0x0 0x2320000 0x0 0x10000>;
9145 + interrupts = <0 37 0x4>; /* Level high type */
9148 + #gpio-cells = <2>;
9149 + interrupt-controller;
9150 + #interrupt-cells = <2>;
9153 + gpio3: gpio@2330000 {
9154 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
9155 + reg = <0x0 0x2330000 0x0 0x10000>;
9156 + interrupts = <0 37 0x4>; /* Level high type */
9159 + #gpio-cells = <2>;
9160 + interrupt-controller;
9161 + #interrupt-cells = <2>;
9164 + /* TODO: WRIOP (CCSR?) */
9165 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
9166 + * E-MDIO1: 0x1_6000
9168 + compatible = "fsl,fman-memac-mdio";
9169 + reg = <0x0 0x8B96000 0x0 0x1000>;
9170 + device_type = "mdio"; /* TODO: is this necessary? */
9171 + little-endian; /* force the driver in LE mode */
9173 + /* Not necessary on the QDS, but needed on the RDB */
9174 + #address-cells = <1>;
9175 + #size-cells = <0>;
9178 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
9179 + * E-MDIO2: 0x1_7000
9181 + compatible = "fsl,fman-memac-mdio";
9182 + reg = <0x0 0x8B97000 0x0 0x1000>;
9183 + device_type = "mdio"; /* TODO: is this necessary? */
9184 + little-endian; /* force the driver in LE mode */
9186 + #address-cells = <1>;
9187 + #size-cells = <0>;
9190 + pcs_mdio1: mdio@0x8c07000 {
9191 + compatible = "fsl,fman-memac-mdio";
9192 + reg = <0x0 0x8c07000 0x0 0x1000>;
9193 + device_type = "mdio";
9196 + #address-cells = <1>;
9197 + #size-cells = <0>;
9200 + pcs_mdio2: mdio@0x8c0b000 {
9201 + compatible = "fsl,fman-memac-mdio";
9202 + reg = <0x0 0x8c0b000 0x0 0x1000>;
9203 + device_type = "mdio";
9206 + #address-cells = <1>;
9207 + #size-cells = <0>;
9210 + pcs_mdio3: mdio@0x8c0f000 {
9211 + compatible = "fsl,fman-memac-mdio";
9212 + reg = <0x0 0x8c0f000 0x0 0x1000>;
9213 + device_type = "mdio";
9216 + #address-cells = <1>;
9217 + #size-cells = <0>;
9220 + pcs_mdio4: mdio@0x8c13000 {
9221 + compatible = "fsl,fman-memac-mdio";
9222 + reg = <0x0 0x8c13000 0x0 0x1000>;
9223 + device_type = "mdio";
9226 + #address-cells = <1>;
9227 + #size-cells = <0>;
9230 + pcs_mdio5: mdio@0x8c17000 {
9231 + status = "disabled";
9232 + compatible = "fsl,fman-memac-mdio";
9233 + reg = <0x0 0x8c17000 0x0 0x1000>;
9234 + device_type = "mdio";
9237 + #address-cells = <1>;
9238 + #size-cells = <0>;
9241 + pcs_mdio6: mdio@0x8c1b000 {
9242 + status = "disabled";
9243 + compatible = "fsl,fman-memac-mdio";
9244 + reg = <0x0 0x8c1b000 0x0 0x1000>;
9245 + device_type = "mdio";
9248 + #address-cells = <1>;
9249 + #size-cells = <0>;
9252 + pcs_mdio7: mdio@0x8c1f000 {
9253 + status = "disabled";
9254 + compatible = "fsl,fman-memac-mdio";
9255 + reg = <0x0 0x8c1f000 0x0 0x1000>;
9256 + device_type = "mdio";
9259 + #address-cells = <1>;
9260 + #size-cells = <0>;
9263 + pcs_mdio8: mdio@0x8c23000 {
9264 + status = "disabled";
9265 + compatible = "fsl,fman-memac-mdio";
9266 + reg = <0x0 0x8c23000 0x0 0x1000>;
9267 + device_type = "mdio";
9270 + #address-cells = <1>;
9271 + #size-cells = <0>;
9274 + i2c0: i2c@2000000 {
9275 + status = "disabled";
9276 + compatible = "fsl,vf610-i2c";
9277 + #address-cells = <1>;
9278 + #size-cells = <0>;
9279 + reg = <0x0 0x2000000 0x0 0x10000>;
9280 + interrupts = <0 34 0x4>; /* Level high type */
9281 + clock-names = "i2c";
9282 + clocks = <&clockgen 4 1>;
9285 + i2c1: i2c@2010000 {
9286 + status = "disabled";
9287 + compatible = "fsl,vf610-i2c";
9288 + #address-cells = <1>;
9289 + #size-cells = <0>;
9290 + reg = <0x0 0x2010000 0x0 0x10000>;
9291 + interrupts = <0 34 0x4>; /* Level high type */
9292 + clock-names = "i2c";
9293 + clocks = <&clockgen 4 1>;
9296 + i2c2: i2c@2020000 {
9297 + status = "disabled";
9298 + compatible = "fsl,vf610-i2c";
9299 + #address-cells = <1>;
9300 + #size-cells = <0>;
9301 + reg = <0x0 0x2020000 0x0 0x10000>;
9302 + interrupts = <0 35 0x4>; /* Level high type */
9303 + clock-names = "i2c";
9304 + clocks = <&clockgen 4 1>;
9307 + i2c3: i2c@2030000 {
9308 + status = "disabled";
9309 + compatible = "fsl,vf610-i2c";
9310 + #address-cells = <1>;
9311 + #size-cells = <0>;
9312 + reg = <0x0 0x2030000 0x0 0x10000>;
9313 + interrupts = <0 35 0x4>; /* Level high type */
9314 + clock-names = "i2c";
9315 + clocks = <&clockgen 4 1>;
9318 + ifc: ifc@2240000 {
9319 + compatible = "fsl,ifc", "simple-bus";
9320 + reg = <0x0 0x2240000 0x0 0x20000>;
9321 + interrupts = <0 21 0x4>; /* Level high type */
9323 + #address-cells = <2>;
9324 + #size-cells = <1>;
9326 + ranges = <0 0 0x5 0x80000000 0x08000000
9327 + 2 0 0x5 0x30000000 0x00010000
9328 + 3 0 0x5 0x20000000 0x00010000>;
9331 + qspi: quadspi@20c0000 {
9332 + status = "disabled";
9333 + compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
9334 + #address-cells = <1>;
9335 + #size-cells = <0>;
9336 + reg = <0x0 0x20c0000 0x0 0x10000>,
9337 + <0x0 0x20000000 0x0 0x10000000>;
9338 + reg-names = "QuadSPI", "QuadSPI-memory";
9339 + interrupts = <0 25 0x4>; /* Level high type */
9340 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
9341 + clock-names = "qspi_en", "qspi";
9344 + pcie1: pcie@3400000 {
9345 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
9347 + reg-names = "regs", "config";
9348 + interrupts = <0 108 0x4>; /* aer interrupt */
9349 + interrupt-names = "aer";
9350 + #address-cells = <3>;
9351 + #size-cells = <2>;
9352 + device_type = "pci";
9355 + bus-range = <0x0 0xff>;
9356 + msi-parent = <&its>;
9357 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9358 + #interrupt-cells = <1>;
9359 + interrupt-map-mask = <0 0 0 7>;
9360 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
9361 + <0000 0 0 2 &gic 0 0 0 110 4>,
9362 + <0000 0 0 3 &gic 0 0 0 111 4>,
9363 + <0000 0 0 4 &gic 0 0 0 112 4>;
9366 + pcie2: pcie@3500000 {
9367 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
9369 + reg-names = "regs", "config";
9370 + interrupts = <0 113 0x4>; /* aer interrupt */
9371 + interrupt-names = "aer";
9372 + #address-cells = <3>;
9373 + #size-cells = <2>;
9374 + device_type = "pci";
9377 + bus-range = <0x0 0xff>;
9378 + msi-parent = <&its>;
9379 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9380 + #interrupt-cells = <1>;
9381 + interrupt-map-mask = <0 0 0 7>;
9382 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
9383 + <0000 0 0 2 &gic 0 0 0 115 4>,
9384 + <0000 0 0 3 &gic 0 0 0 116 4>,
9385 + <0000 0 0 4 &gic 0 0 0 117 4>;
9388 + pcie3: pcie@3600000 {
9389 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
9391 + reg-names = "regs", "config";
9392 + interrupts = <0 118 0x4>; /* aer interrupt */
9393 + interrupt-names = "aer";
9394 + #address-cells = <3>;
9395 + #size-cells = <2>;
9396 + device_type = "pci";
9399 + bus-range = <0x0 0xff>;
9400 + msi-parent = <&its>;
9401 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9402 + #interrupt-cells = <1>;
9403 + interrupt-map-mask = <0 0 0 7>;
9404 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
9405 + <0000 0 0 2 &gic 0 0 0 120 4>,
9406 + <0000 0 0 3 &gic 0 0 0 121 4>,
9407 + <0000 0 0 4 &gic 0 0 0 122 4>;
9410 + pcie4: pcie@3700000 {
9411 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
9413 + reg-names = "regs", "config";
9414 + interrupts = <0 123 0x4>; /* aer interrupt */
9415 + interrupt-names = "aer";
9416 + #address-cells = <3>;
9417 + #size-cells = <2>;
9418 + device_type = "pci";
9421 + bus-range = <0x0 0xff>;
9422 + msi-parent = <&its>;
9423 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9424 + #interrupt-cells = <1>;
9425 + interrupt-map-mask = <0 0 0 7>;
9426 + interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
9427 + <0000 0 0 2 &gic 0 0 0 125 4>,
9428 + <0000 0 0 3 &gic 0 0 0 126 4>,
9429 + <0000 0 0 4 &gic 0 0 0 127 4>;
9432 + sata0: sata@3200000 {
9433 + status = "disabled";
9434 + compatible = "fsl,ls2080a-ahci";
9435 + reg = <0x0 0x3200000 0x0 0x10000>;
9436 + interrupts = <0 133 0x4>; /* Level high type */
9437 + clocks = <&clockgen 4 3>;
9441 + sata1: sata@3210000 {
9442 + status = "disabled";
9443 + compatible = "fsl,ls2080a-ahci";
9444 + reg = <0x0 0x3210000 0x0 0x10000>;
9445 + interrupts = <0 136 0x4>; /* Level high type */
9446 + clocks = <&clockgen 4 3>;
9450 + usb0: usb3@3100000 {
9451 + status = "disabled";
9452 + compatible = "snps,dwc3";
9453 + reg = <0x0 0x3100000 0x0 0x10000>;
9454 + interrupts = <0 80 0x4>; /* Level high type */
9456 + snps,quirk-frame-length-adjustment = <0x20>;
9457 + snps,dis_rxdet_inp3_quirk;
9460 + usb1: usb3@3110000 {
9461 + status = "disabled";
9462 + compatible = "snps,dwc3";
9463 + reg = <0x0 0x3110000 0x0 0x10000>;
9464 + interrupts = <0 81 0x4>; /* Level high type */
9466 + snps,quirk-frame-length-adjustment = <0x20>;
9467 + snps,dis_rxdet_inp3_quirk;
9470 + serdes1: serdes@1ea0000 {
9471 + reg = <0x0 0x1ea0000 0 0x00002000>;
9475 + compatible = "arm,ccn-504";
9476 + reg = <0x0 0x04000000 0x0 0x01000000>;
9477 + interrupts = <0 12 4>;
9480 + ftm0: ftm0@2800000 {
9481 + compatible = "fsl,ls208xa-ftm";
9482 + reg = <0x0 0x2800000 0x0 0x10000>,
9483 + <0x0 0x1e34050 0x0 0x4>;
9484 + interrupts = <0 44 4>;
9485 + reg-names = "ftm", "FlexTimer1";
9489 + ddr1: memory-controller@1080000 {
9490 + compatible = "fsl,qoriq-memory-controller";
9491 + reg = <0x0 0x1080000 0x0 0x1000>;
9492 + interrupts = <0 17 0x4>;
9496 + ddr2: memory-controller@1090000 {
9497 + compatible = "fsl,qoriq-memory-controller";
9498 + reg = <0x0 0x1090000 0x0 0x1000>;
9499 + interrupts = <0 18 0x4>;
9505 + compatible = "linaro,optee-tz";
9511 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
9514 + * QorIQ BMan Portals device tree
9516 + * Copyright 2011-2016 Freescale Semiconductor Inc.
9518 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9522 + #address-cells = <1>;
9523 + #size-cells = <1>;
9524 + compatible = "simple-bus";
9528 + compatible = "fsl,bman-portal";
9529 + reg = <0x0 0x4000 0x4000000 0x4000>;
9530 + interrupts = <0 173 0x4>;
9533 + bman-portal@10000 {
9535 + compatible = "fsl,bman-portal";
9536 + reg = <0x10000 0x4000 0x4010000 0x4000>;
9537 + interrupts = <0 175 0x4>;
9540 + bman-portal@20000 {
9542 + compatible = "fsl,bman-portal";
9543 + reg = <0x20000 0x4000 0x4020000 0x4000>;
9544 + interrupts = <0 177 0x4>;
9547 + bman-portal@30000 {
9549 + compatible = "fsl,bman-portal";
9550 + reg = <0x30000 0x4000 0x4030000 0x4000>;
9551 + interrupts = <0 179 0x4>;
9554 + bman-portal@40000 {
9556 + compatible = "fsl,bman-portal";
9557 + reg = <0x40000 0x4000 0x4040000 0x4000>;
9558 + interrupts = <0 181 0x4>;
9561 + bman-portal@50000 {
9563 + compatible = "fsl,bman-portal";
9564 + reg = <0x50000 0x4000 0x4050000 0x4000>;
9565 + interrupts = <0 183 0x4>;
9568 + bman-portal@60000 {
9570 + compatible = "fsl,bman-portal";
9571 + reg = <0x60000 0x4000 0x4060000 0x4000>;
9572 + interrupts = <0 185 0x4>;
9575 + bman-portal@70000 {
9577 + compatible = "fsl,bman-portal";
9578 + reg = <0x70000 0x4000 0x4070000 0x4000>;
9579 + interrupts = <0 187 0x4>;
9582 + bman-portal@80000 {
9584 + compatible = "fsl,bman-portal";
9585 + reg = <0x80000 0x4000 0x4080000 0x4000>;
9586 + interrupts = <0 189 0x4>;
9590 + compatible = "fsl,bpid-range";
9591 + fsl,bpid-range = <32 32>;
9595 +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
9598 + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
9600 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
9602 + * Redistribution and use in source and binary forms, with or without
9603 + * modification, are permitted provided that the following conditions are met:
9604 + * * Redistributions of source code must retain the above copyright
9605 + * notice, this list of conditions and the following disclaimer.
9606 + * * Redistributions in binary form must reproduce the above copyright
9607 + * notice, this list of conditions and the following disclaimer in the
9608 + * documentation and/or other materials provided with the distribution.
9609 + * * Neither the name of Freescale Semiconductor nor the
9610 + * names of its contributors may be used to endorse or promote products
9611 + * derived from this software without specific prior written permission.
9614 + * ALTERNATIVELY, this software may be distributed under the terms of the
9615 + * GNU General Public License ("GPL") as published by the Free Software
9616 + * Foundation, either version 2 of that License or (at your option) any
9619 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9620 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9621 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9622 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9623 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9624 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9625 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9626 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9627 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9628 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9631 +fsldpaa: fsl,dpaa {
9632 + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa";
9634 + compatible = "fsl,dpa-ethernet";
9635 + fsl,fman-mac = <&enet0>;
9639 + compatible = "fsl,dpa-ethernet";
9640 + fsl,fman-mac = <&enet1>;
9644 + compatible = "fsl,dpa-ethernet";
9645 + fsl,fman-mac = <&enet2>;
9649 + compatible = "fsl,dpa-ethernet";
9650 + fsl,fman-mac = <&enet3>;
9654 + compatible = "fsl,dpa-ethernet";
9655 + fsl,fman-mac = <&enet4>;
9659 + compatible = "fsl,dpa-ethernet";
9660 + fsl,fman-mac = <&enet5>;
9664 + compatible = "fsl,dpa-ethernet";
9665 + fsl,fman-mac = <&enet6>;
9671 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
9674 + * QorIQ FMan v3 10g port #0 device tree
9676 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9678 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9682 + fman0_rx_0x10: port@90000 {
9683 + cell-index = <0x10>;
9684 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
9685 + reg = <0x90000 0x1000>;
9686 + fsl,fman-10g-port;
9689 + fman0_tx_0x30: port@b0000 {
9690 + cell-index = <0x30>;
9691 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
9692 + reg = <0xb0000 0x1000>;
9693 + fsl,fman-10g-port;
9694 + fsl,qman-channel-id = <0x800>;
9698 + cell-index = <0x8>;
9699 + compatible = "fsl,fman-memac";
9700 + reg = <0xf0000 0x1000>;
9701 + fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
9702 + pcsphy-handle = <&pcsphy6>;
9706 + #address-cells = <1>;
9707 + #size-cells = <0>;
9708 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9709 + reg = <0xf1000 0x1000>;
9711 + pcsphy6: ethernet-phy@0 {
9717 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
9720 + * QorIQ FMan v3 10g port #1 device tree
9722 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9724 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9728 + fman0_rx_0x11: port@91000 {
9729 + cell-index = <0x11>;
9730 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
9731 + reg = <0x91000 0x1000>;
9732 + fsl,fman-10g-port;
9735 + fman0_tx_0x31: port@b1000 {
9736 + cell-index = <0x31>;
9737 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
9738 + reg = <0xb1000 0x1000>;
9739 + fsl,fman-10g-port;
9740 + fsl,qman-channel-id = <0x801>;
9744 + cell-index = <0x9>;
9745 + compatible = "fsl,fman-memac";
9746 + reg = <0xf2000 0x1000>;
9747 + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
9748 + pcsphy-handle = <&pcsphy7>;
9752 + #address-cells = <1>;
9753 + #size-cells = <0>;
9754 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9755 + reg = <0xf3000 0x1000>;
9757 + pcsphy7: ethernet-phy@0 {
9763 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
9766 + * QorIQ FMan v3 1g port #0 device tree
9768 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9770 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9774 + fman0_rx_0x08: port@88000 {
9775 + cell-index = <0x8>;
9776 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9777 + reg = <0x88000 0x1000>;
9780 + fman0_tx_0x28: port@a8000 {
9781 + cell-index = <0x28>;
9782 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9783 + reg = <0xa8000 0x1000>;
9784 + fsl,qman-channel-id = <0x802>;
9789 + compatible = "fsl,fman-memac";
9790 + reg = <0xe0000 0x1000>;
9791 + fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
9792 + ptp-timer = <&ptp_timer0>;
9793 + pcsphy-handle = <&pcsphy0>;
9797 + #address-cells = <1>;
9798 + #size-cells = <0>;
9799 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9800 + reg = <0xe1000 0x1000>;
9802 + pcsphy0: ethernet-phy@0 {
9808 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
9811 + * QorIQ FMan v3 1g port #1 device tree
9813 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9815 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9819 + fman0_rx_0x09: port@89000 {
9820 + cell-index = <0x9>;
9821 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9822 + reg = <0x89000 0x1000>;
9825 + fman0_tx_0x29: port@a9000 {
9826 + cell-index = <0x29>;
9827 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9828 + reg = <0xa9000 0x1000>;
9829 + fsl,qman-channel-id = <0x803>;
9834 + compatible = "fsl,fman-memac";
9835 + reg = <0xe2000 0x1000>;
9836 + fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
9837 + ptp-timer = <&ptp_timer0>;
9838 + pcsphy-handle = <&pcsphy1>;
9842 + #address-cells = <1>;
9843 + #size-cells = <0>;
9844 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9845 + reg = <0xe3000 0x1000>;
9847 + pcsphy1: ethernet-phy@0 {
9853 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
9856 + * QorIQ FMan v3 1g port #2 device tree
9858 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9860 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9864 + fman0_rx_0x0a: port@8a000 {
9865 + cell-index = <0xa>;
9866 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9867 + reg = <0x8a000 0x1000>;
9870 + fman0_tx_0x2a: port@aa000 {
9871 + cell-index = <0x2a>;
9872 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9873 + reg = <0xaa000 0x1000>;
9874 + fsl,qman-channel-id = <0x804>;
9879 + compatible = "fsl,fman-memac";
9880 + reg = <0xe4000 0x1000>;
9881 + fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
9882 + ptp-timer = <&ptp_timer0>;
9883 + pcsphy-handle = <&pcsphy2>;
9887 + #address-cells = <1>;
9888 + #size-cells = <0>;
9889 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9890 + reg = <0xe5000 0x1000>;
9892 + pcsphy2: ethernet-phy@0 {
9898 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
9901 + * QorIQ FMan v3 1g port #3 device tree
9903 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9905 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9909 + fman0_rx_0x0b: port@8b000 {
9910 + cell-index = <0xb>;
9911 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9912 + reg = <0x8b000 0x1000>;
9915 + fman0_tx_0x2b: port@ab000 {
9916 + cell-index = <0x2b>;
9917 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9918 + reg = <0xab000 0x1000>;
9919 + fsl,qman-channel-id = <0x805>;
9924 + compatible = "fsl,fman-memac";
9925 + reg = <0xe6000 0x1000>;
9926 + fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
9927 + ptp-timer = <&ptp_timer0>;
9928 + pcsphy-handle = <&pcsphy3>;
9932 + #address-cells = <1>;
9933 + #size-cells = <0>;
9934 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9935 + reg = <0xe7000 0x1000>;
9937 + pcsphy3: ethernet-phy@0 {
9943 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
9946 + * QorIQ FMan v3 1g port #4 device tree
9948 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9950 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9954 + fman0_rx_0x0c: port@8c000 {
9955 + cell-index = <0xc>;
9956 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9957 + reg = <0x8c000 0x1000>;
9960 + fman0_tx_0x2c: port@ac000 {
9961 + cell-index = <0x2c>;
9962 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9963 + reg = <0xac000 0x1000>;
9964 + fsl,qman-channel-id = <0x806>;
9969 + compatible = "fsl,fman-memac";
9970 + reg = <0xe8000 0x1000>;
9971 + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
9972 + ptp-timer = <&ptp_timer0>;
9973 + pcsphy-handle = <&pcsphy4>;
9977 + #address-cells = <1>;
9978 + #size-cells = <0>;
9979 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9980 + reg = <0xe9000 0x1000>;
9982 + pcsphy4: ethernet-phy@0 {
9988 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
9991 + * QorIQ FMan v3 1g port #5 device tree
9993 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9995 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9999 + fman0_rx_0x0d: port@8d000 {
10000 + cell-index = <0xd>;
10001 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
10002 + reg = <0x8d000 0x1000>;
10005 + fman0_tx_0x2d: port@ad000 {
10006 + cell-index = <0x2d>;
10007 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
10008 + reg = <0xad000 0x1000>;
10009 + fsl,qman-channel-id = <0x807>;
10013 + cell-index = <5>;
10014 + compatible = "fsl,fman-memac";
10015 + reg = <0xea000 0x1000>;
10016 + fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
10017 + ptp-timer = <&ptp_timer0>;
10018 + pcsphy-handle = <&pcsphy5>;
10022 + #address-cells = <1>;
10023 + #size-cells = <0>;
10024 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10025 + reg = <0xeb000 0x1000>;
10027 + pcsphy5: ethernet-phy@0 {
10033 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
10036 + * QorIQ FMan v3 OH ports device tree
10038 + * Copyright 2012-2015 Freescale Semiconductor Inc.
10040 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10045 + fman0_oh1: port@82000 {
10046 + cell-index = <0>;
10047 + compatible = "fsl,fman-port-oh";
10048 + reg = <0x82000 0x1000>;
10051 + fman0_oh2: port@83000 {
10052 + cell-index = <1>;
10053 + compatible = "fsl,fman-port-oh";
10054 + reg = <0x83000 0x1000>;
10057 + fman0_oh3: port@84000 {
10058 + cell-index = <2>;
10059 + compatible = "fsl,fman-port-oh";
10060 + reg = <0x84000 0x1000>;
10063 + fman0_oh4: port@85000 {
10064 + cell-index = <3>;
10065 + compatible = "fsl,fman-port-oh";
10066 + reg = <0x85000 0x1000>;
10069 + fman0_oh5: port@86000 {
10070 + cell-index = <4>;
10071 + compatible = "fsl,fman-port-oh";
10072 + reg = <0x86000 0x1000>;
10075 + fman0_oh6: port@87000 {
10076 + cell-index = <5>;
10077 + compatible = "fsl,fman-port-oh";
10078 + reg = <0x87000 0x1000>;
10083 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
10086 + * QorIQ FMan v3 device tree
10088 + * Copyright 2012-2015 Freescale Semiconductor Inc.
10090 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10093 +fman0: fman@1a00000 {
10094 + #address-cells = <1>;
10095 + #size-cells = <1>;
10096 + cell-index = <0>;
10097 + compatible = "fsl,fman";
10098 + ranges = <0x0 0x00 0x1a00000 0x100000>;
10099 + reg = <0x0 0x1a00000 0x0 0x100000>;
10100 + interrupts = <0 44 0x4>, <0 45 0x4>;
10101 + clocks = <&clockgen 3 0>;
10102 + clock-names = "fmanclk";
10103 + fsl,qman-channel-range = <0x800 0x10>;
10106 + compatible = "fsl,fman-cc";
10110 + compatible = "fsl,fman-muram";
10111 + reg = <0x0 0x60000>;
10115 + compatible = "fsl,fman-bmi";
10116 + reg = <0x80000 0x400>;
10120 + compatible = "fsl,fman-qmi";
10121 + reg = <0x80400 0x400>;
10124 + fman0_oh_0x2: port@82000 {
10125 + cell-index = <0x2>;
10126 + compatible = "fsl,fman-v3-port-oh";
10127 + reg = <0x82000 0x1000>;
10128 + fsl,qman-channel-id = <0x809>;
10131 + fman0_oh_0x3: port@83000 {
10132 + cell-index = <0x3>;
10133 + compatible = "fsl,fman-v3-port-oh";
10134 + reg = <0x83000 0x1000>;
10135 + fsl,qman-channel-id = <0x80a>;
10138 + fman0_oh_0x4: port@84000 {
10139 + cell-index = <0x4>;
10140 + compatible = "fsl,fman-v3-port-oh";
10141 + reg = <0x84000 0x1000>;
10142 + fsl,qman-channel-id = <0x80b>;
10145 + fman0_oh_0x5: port@85000 {
10146 + cell-index = <0x5>;
10147 + compatible = "fsl,fman-v3-port-oh";
10148 + reg = <0x85000 0x1000>;
10149 + fsl,qman-channel-id = <0x80c>;
10152 + fman0_oh_0x6: port@86000 {
10153 + cell-index = <0x6>;
10154 + compatible = "fsl,fman-v3-port-oh";
10155 + reg = <0x86000 0x1000>;
10156 + fsl,qman-channel-id = <0x80d>;
10159 + fman0_oh_0x7: port@87000 {
10160 + cell-index = <0x7>;
10161 + compatible = "fsl,fman-v3-port-oh";
10162 + reg = <0x87000 0x1000>;
10163 + fsl,qman-channel-id = <0x80e>;
10167 + compatible = "fsl,fman-policer";
10168 + reg = <0xc0000 0x1000>;
10172 + compatible = "fsl,fman-keygen";
10173 + reg = <0xc1000 0x1000>;
10177 + compatible = "fsl,fman-dma";
10178 + reg = <0xc2000 0x1000>;
10182 + compatible = "fsl,fman-fpm";
10183 + reg = <0xc3000 0x1000>;
10187 + compatible = "fsl,fman-parser";
10188 + reg = <0xc7000 0x1000>;
10192 + compatible = "fsl,fman-vsps";
10193 + reg = <0xdc000 0x1000>;
10196 + mdio0: mdio@fc000 {
10197 + #address-cells = <1>;
10198 + #size-cells = <0>;
10199 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10200 + reg = <0xfc000 0x1000>;
10203 + xmdio0: mdio@fd000 {
10204 + #address-cells = <1>;
10205 + #size-cells = <0>;
10206 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
10207 + reg = <0xfd000 0x1000>;
10210 + ptp_timer0: ptp-timer@fe000 {
10211 + compatible = "fsl,fman-ptp-timer", "fsl,fman-rtc";
10212 + reg = <0xfe000 0x1000>;
10216 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
10219 + * QorIQ QMan Portals device tree
10221 + * Copyright 2011-2016 Freescale Semiconductor Inc.
10223 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
10227 + #address-cells = <1>;
10228 + #size-cells = <1>;
10229 + compatible = "simple-bus";
10231 + qportal0: qman-portal@0 {
10232 + compatible = "fsl,qman-portal";
10233 + reg = <0x0 0x4000 0x4000000 0x4000>;
10234 + interrupts = <0 172 0x4>;
10235 + cell-index = <0>;
10238 + qportal1: qman-portal@10000 {
10239 + compatible = "fsl,qman-portal";
10240 + reg = <0x10000 0x4000 0x4010000 0x4000>;
10241 + interrupts = <0 174 0x4>;
10242 + cell-index = <1>;
10245 + qportal2: qman-portal@20000 {
10246 + compatible = "fsl,qman-portal";
10247 + reg = <0x20000 0x4000 0x4020000 0x4000>;
10248 + interrupts = <0 176 0x4>;
10249 + cell-index = <2>;
10252 + qportal3: qman-portal@30000 {
10253 + compatible = "fsl,qman-portal";
10254 + reg = <0x30000 0x4000 0x4030000 0x4000>;
10255 + interrupts = <0 178 0x4>;
10256 + cell-index = <3>;
10259 + qportal4: qman-portal@40000 {
10260 + compatible = "fsl,qman-portal";
10261 + reg = <0x40000 0x4000 0x4040000 0x4000>;
10262 + interrupts = <0 180 0x4>;
10263 + cell-index = <4>;
10266 + qportal5: qman-portal@50000 {
10267 + compatible = "fsl,qman-portal";
10268 + reg = <0x50000 0x4000 0x4050000 0x4000>;
10269 + interrupts = <0 182 0x4>;
10270 + cell-index = <5>;
10273 + qportal6: qman-portal@60000 {
10274 + compatible = "fsl,qman-portal";
10275 + reg = <0x60000 0x4000 0x4060000 0x4000>;
10276 + interrupts = <0 184 0x4>;
10277 + cell-index = <6>;
10280 + qportal7: qman-portal@70000 {
10281 + compatible = "fsl,qman-portal";
10282 + reg = <0x70000 0x4000 0x4070000 0x4000>;
10283 + interrupts = <0 186 0x4>;
10284 + cell-index = <7>;
10287 + qportal8: qman-portal@80000 {
10288 + compatible = "fsl,qman-portal";
10289 + reg = <0x80000 0x4000 0x4080000 0x4000>;
10290 + interrupts = <0 188 0x4>;
10291 + cell-index = <8>;
10295 + compatible = "fsl,fqid-range";
10296 + fsl,fqid-range = <256 256>;
10300 + compatible = "fsl,fqid-range";
10301 + fsl,fqid-range = <32768 32768>;
10305 + compatible = "fsl,pool-channel-range";
10306 + fsl,pool-channel-range = <0x401 0xf>;
10310 + compatible = "fsl,cgrid-range";
10311 + fsl,cgrid-range = <0 256>;
10315 + compatible = "fsl,qman-ceetm";
10316 + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
10317 + fsl,ceetm-sp-range = <0 12>;
10318 + fsl,ceetm-lni-range = <0 8>;
10319 + fsl,ceetm-channel-range = <0 32>;
10322 --- a/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
10323 +++ b/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
10324 @@ -38,51 +38,61 @@
10325 compatible = "simple-bus";
10328 + cell-index = <0>;
10329 compatible = "fsl,bman-portal";
10330 reg = <0x0 0x4000>, <0x100000 0x1000>;
10331 interrupts = <105 2 0 0>;
10334 + cell-index = <1>;
10335 compatible = "fsl,bman-portal";
10336 reg = <0x4000 0x4000>, <0x101000 0x1000>;
10337 interrupts = <107 2 0 0>;
10340 + cell-index = <2>;
10341 compatible = "fsl,bman-portal";
10342 reg = <0x8000 0x4000>, <0x102000 0x1000>;
10343 interrupts = <109 2 0 0>;
10346 + cell-index = <3>;
10347 compatible = "fsl,bman-portal";
10348 reg = <0xc000 0x4000>, <0x103000 0x1000>;
10349 interrupts = <111 2 0 0>;
10351 bman-portal@10000 {
10352 + cell-index = <4>;
10353 compatible = "fsl,bman-portal";
10354 reg = <0x10000 0x4000>, <0x104000 0x1000>;
10355 interrupts = <113 2 0 0>;
10357 bman-portal@14000 {
10358 + cell-index = <5>;
10359 compatible = "fsl,bman-portal";
10360 reg = <0x14000 0x4000>, <0x105000 0x1000>;
10361 interrupts = <115 2 0 0>;
10363 bman-portal@18000 {
10364 + cell-index = <6>;
10365 compatible = "fsl,bman-portal";
10366 reg = <0x18000 0x4000>, <0x106000 0x1000>;
10367 interrupts = <117 2 0 0>;
10369 bman-portal@1c000 {
10370 + cell-index = <7>;
10371 compatible = "fsl,bman-portal";
10372 reg = <0x1c000 0x4000>, <0x107000 0x1000>;
10373 interrupts = <119 2 0 0>;
10375 bman-portal@20000 {
10376 + cell-index = <8>;
10377 compatible = "fsl,bman-portal";
10378 reg = <0x20000 0x4000>, <0x108000 0x1000>;
10379 interrupts = <121 2 0 0>;
10381 bman-portal@24000 {
10382 + cell-index = <9>;
10383 compatible = "fsl,bman-portal";
10384 reg = <0x24000 0x4000>, <0x109000 0x1000>;
10385 interrupts = <123 2 0 0>;
10386 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
10387 +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
10388 @@ -35,14 +35,14 @@
10390 fman0_rx_0x10: port@90000 {
10391 cell-index = <0x10>;
10392 - compatible = "fsl,fman-v3-port-rx";
10393 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10394 reg = <0x90000 0x1000>;
10398 fman0_tx_0x30: port@b0000 {
10399 cell-index = <0x30>;
10400 - compatible = "fsl,fman-v3-port-tx";
10401 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10402 reg = <0xb0000 0x1000>;
10405 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
10406 +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
10407 @@ -35,14 +35,14 @@
10409 fman0_rx_0x11: port@91000 {
10410 cell-index = <0x11>;
10411 - compatible = "fsl,fman-v3-port-rx";
10412 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10413 reg = <0x91000 0x1000>;
10417 fman0_tx_0x31: port@b1000 {
10418 cell-index = <0x31>;
10419 - compatible = "fsl,fman-v3-port-tx";
10420 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10421 reg = <0xb1000 0x1000>;