1 From 2b2e3b9a0d2abf276b40843f75d97b623e4ee109 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Mon, 25 Sep 2017 10:02:10 +0800
4 Subject: [PATCH] dts: support layercape
6 This is a integrated patch for layerscape dts support.
8 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
9 Signed-off-by: Alison Wang <b18965@freescale.com>
10 Signed-off-by: Li Yang <leoyang.li@nxp.com>
11 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
12 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
13 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
14 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
15 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
16 Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
17 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
18 Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
19 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
20 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
21 Signed-off-by: Changming Huang <jerry.huang@nxp.com>
22 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
23 Signed-off-by: Meng Yi <meng.yi@nxp.com>
24 Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
25 Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
26 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
27 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
28 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
30 arch/arm/boot/dts/alpine.dtsi | 2 +-
31 arch/arm/boot/dts/axm55xx.dtsi | 2 +-
32 arch/arm/boot/dts/ecx-2000.dts | 2 +-
33 arch/arm/boot/dts/imx6ul.dtsi | 4 +-
34 arch/arm/boot/dts/keystone.dtsi | 4 +-
35 arch/arm/boot/dts/ls1021a-qds.dts | 13 +
36 arch/arm/boot/dts/ls1021a-twr.dts | 13 +
37 arch/arm/boot/dts/ls1021a.dtsi | 155 ++--
38 arch/arm/boot/dts/mt6580.dtsi | 2 +-
39 arch/arm/boot/dts/mt6589.dtsi | 2 +-
40 arch/arm/boot/dts/mt8127.dtsi | 2 +-
41 arch/arm/boot/dts/mt8135.dtsi | 2 +-
42 arch/arm/boot/dts/rk3288.dtsi | 2 +-
43 arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
44 arch/arm/boot/dts/sun7i-a20.dtsi | 4 +-
45 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
46 arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
47 arch/arm64/boot/dts/freescale/Makefile | 16 +
48 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 134 +++
49 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 155 ++++
50 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 91 +++
51 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 517 ++++++++++++
52 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 +
53 .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++
54 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++-
55 .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts | 69 ++
56 .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++
57 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 113 ++-
58 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 302 ++++++-
59 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 48 ++
60 .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 109 +++
61 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 363 ++++++++
62 .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 76 ++
63 .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 +++
64 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 218 +++++
65 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 793 ++++++++++++++++++
66 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++
67 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++
68 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 816 ++++++++++++++++++
69 arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++---
70 arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++--
71 arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +-
72 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 763 +++--------------
73 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts | 161 ++++
74 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 162 ++++
75 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 140 ++++
76 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++
77 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
78 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
79 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 910 +++++++++++++++++++++
80 .../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++
81 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 66 ++
82 .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 +
83 .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 43 +
84 .../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi | 42 +
85 .../boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi | 42 +
86 .../boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi | 42 +
87 .../boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi | 42 +
88 .../boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi | 42 +
89 .../boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi | 42 +
90 .../boot/dts/freescale/qoriq-fman3-0-6oh.dtsi | 47 ++
91 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi | 130 +++
92 .../boot/dts/freescale/qoriq-qman1-portals.dtsi | 104 +++
93 arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 +
94 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +-
95 arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +-
96 66 files changed, 7778 insertions(+), 1021 deletions(-)
97 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
98 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
99 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
100 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
101 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
102 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
103 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
104 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
105 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
106 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
107 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
108 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
109 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
110 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
111 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
112 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
113 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
114 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
115 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
116 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
117 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
118 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
119 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
120 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
121 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
122 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
123 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
124 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
125 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
126 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
127 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
128 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
129 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
130 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
131 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
132 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
133 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
134 create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
136 diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
137 index db8752fc..d0eefc3b 100644
138 --- a/arch/arm/boot/dts/alpine.dtsi
139 +++ b/arch/arm/boot/dts/alpine.dtsi
141 interrupt-controller;
142 reg = <0x0 0xfb001000 0x0 0x1000>,
143 <0x0 0xfb002000 0x0 0x2000>,
144 - <0x0 0xfb004000 0x0 0x1000>,
145 + <0x0 0xfb004000 0x0 0x2000>,
146 <0x0 0xfb006000 0x0 0x2000>;
148 <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
149 diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
150 index a9d6d593..47799f59 100644
151 --- a/arch/arm/boot/dts/axm55xx.dtsi
152 +++ b/arch/arm/boot/dts/axm55xx.dtsi
154 #address-cells = <0>;
155 interrupt-controller;
156 reg = <0x20 0x01001000 0 0x1000>,
157 - <0x20 0x01002000 0 0x1000>,
158 + <0x20 0x01002000 0 0x2000>,
159 <0x20 0x01004000 0 0x2000>,
160 <0x20 0x01006000 0 0x2000>;
161 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
162 diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
163 index 2ccbb57f..c15e7e0c 100644
164 --- a/arch/arm/boot/dts/ecx-2000.dts
165 +++ b/arch/arm/boot/dts/ecx-2000.dts
167 interrupt-controller;
168 interrupts = <1 9 0xf04>;
169 reg = <0xfff11000 0x1000>,
170 - <0xfff12000 0x1000>,
171 + <0xfff12000 0x2000>,
175 diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
176 index c5c05fdc..c1396873 100644
177 --- a/arch/arm/boot/dts/imx6ul.dtsi
178 +++ b/arch/arm/boot/dts/imx6ul.dtsi
182 intc: interrupt-controller@00a01000 {
183 - compatible = "arm,cortex-a7-gic";
184 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
185 #interrupt-cells = <3>;
186 interrupt-controller;
187 reg = <0x00a01000 0x1000>,
188 - <0x00a02000 0x1000>,
189 + <0x00a02000 0x2000>,
193 diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
194 index 02708ba2..e30c83fc 100644
195 --- a/arch/arm/boot/dts/keystone.dtsi
196 +++ b/arch/arm/boot/dts/keystone.dtsi
200 gic: interrupt-controller {
201 - compatible = "arm,cortex-a15-gic";
202 + compatible = "arm,gic-400", "arm,cortex-a15-gic";
203 #interrupt-cells = <3>;
204 interrupt-controller;
205 reg = <0x0 0x02561000 0x0 0x1000>,
206 <0x0 0x02562000 0x0 0x2000>,
207 - <0x0 0x02564000 0x0 0x1000>,
208 + <0x0 0x02564000 0x0 0x2000>,
209 <0x0 0x02566000 0x0 0x2000>;
210 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
211 IRQ_TYPE_LEVEL_HIGH)>;
212 diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
213 index 94087531..5611a9c9 100644
214 --- a/arch/arm/boot/dts/ls1021a-qds.dts
215 +++ b/arch/arm/boot/dts/ls1021a-qds.dts
224 + qflash0: s25fl128s@0 {
225 + compatible = "spansion,m25p80";
226 + #address-cells = <1>;
228 + spi-max-frequency = <20000000>;
234 tbi-handle = <&tbi0>;
235 phy-handle = <&sgmii_phy1c>;
236 diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
237 index a8b148ad..907e5392 100644
238 --- a/arch/arm/boot/dts/ls1021a-twr.dts
239 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
248 + qflash0: n25q128a13@0 {
249 + compatible = "n25q128a13", "jedec,spi-nor";
250 + #address-cells = <1>;
252 + spi-max-frequency = <20000000>;
258 tbi-handle = <&tbi1>;
259 phy-handle = <&sgmii_phy2>;
260 diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
261 index 368e2193..def82fef 100644
262 --- a/arch/arm/boot/dts/ls1021a.dtsi
263 +++ b/arch/arm/boot/dts/ls1021a.dtsi
265 compatible = "arm,cortex-a7";
268 - clocks = <&cluster1_clk>;
269 + clocks = <&clockgen 1 0>;
273 compatible = "arm,cortex-a7";
276 - clocks = <&cluster1_clk>;
277 + clocks = <&clockgen 1 0>;
282 + compatible = "fixed-clock";
283 + #clock-cells = <0>;
284 + clock-frequency = <100000000>;
285 + clock-output-names = "sysclk";
289 compatible = "arm,armv7-timer";
290 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
291 @@ -108,11 +115,11 @@
294 gic: interrupt-controller@1400000 {
295 - compatible = "arm,cortex-a7-gic";
296 + compatible = "arm,gic-400", "arm,cortex-a7-gic";
297 #interrupt-cells = <3>;
298 interrupt-controller;
299 reg = <0x0 0x1401000 0x0 0x1000>,
300 - <0x0 0x1402000 0x0 0x1000>,
301 + <0x0 0x1402000 0x0 0x2000>,
302 <0x0 0x1404000 0x0 0x2000>,
303 <0x0 0x1406000 0x0 0x2000>;
304 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
305 @@ -120,14 +127,14 @@
308 msi1: msi-controller@1570e00 {
309 - compatible = "fsl,1s1021a-msi";
310 + compatible = "fsl,ls1021a-msi";
311 reg = <0x0 0x1570e00 0x0 0x8>;
313 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
316 msi2: msi-controller@1570e08 {
317 - compatible = "fsl,1s1021a-msi";
318 + compatible = "fsl,ls1021a-msi";
319 reg = <0x0 0x1570e08 0x0 0x8>;
321 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
322 @@ -137,11 +144,12 @@
323 compatible = "fsl,ifc", "simple-bus";
324 reg = <0x0 0x1530000 0x0 0x10000>;
325 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
330 compatible = "fsl,ls1021a-dcfg", "syscon";
331 - reg = <0x0 0x1ee0000 0x0 0x10000>;
332 + reg = <0x0 0x1ee0000 0x0 0x1000>;
337 <0x0 0x20220520 0x0 0x4>;
338 reg-names = "ahci", "sata-ecc";
339 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
340 - clocks = <&platform_clk 1>;
341 + clocks = <&clockgen 4 1>;
345 @@ -214,41 +222,10 @@
348 clockgen: clocking@1ee1000 {
349 - #address-cells = <1>;
351 - ranges = <0x0 0x0 0x1ee1000 0x10000>;
354 - compatible = "fixed-clock";
355 - #clock-cells = <0>;
356 - clock-output-names = "sysclk";
359 - cga_pll1: pll@800 {
360 - compatible = "fsl,qoriq-core-pll-2.0";
361 - #clock-cells = <1>;
362 - reg = <0x800 0x10>;
363 - clocks = <&sysclk>;
364 - clock-output-names = "cga-pll1", "cga-pll1-div2",
368 - platform_clk: pll@c00 {
369 - compatible = "fsl,qoriq-core-pll-2.0";
370 - #clock-cells = <1>;
371 - reg = <0xc00 0x10>;
372 - clocks = <&sysclk>;
373 - clock-output-names = "platform-clk", "platform-clk-div2";
376 - cluster1_clk: clk0c0@0 {
377 - compatible = "fsl,qoriq-core-mux-2.0";
378 - #clock-cells = <0>;
380 - clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";
381 - clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>;
382 - clock-output-names = "cluster1-clk";
384 + compatible = "fsl,ls1021a-clockgen";
385 + reg = <0x0 0x1ee1000 0x0 0x1000>;
386 + #clock-cells = <2>;
387 + clocks = <&sysclk>;
390 dspi0: dspi@2100000 {
392 reg = <0x0 0x2100000 0x0 0x10000>;
393 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
394 clock-names = "dspi";
395 - clocks = <&platform_clk 1>;
396 + clocks = <&clockgen 4 1>;
397 spi-num-chipselects = <6>;
400 @@ -271,12 +248,27 @@
401 reg = <0x0 0x2110000 0x0 0x10000>;
402 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
403 clock-names = "dspi";
404 - clocks = <&platform_clk 1>;
405 + clocks = <&clockgen 4 1>;
406 spi-num-chipselects = <6>;
411 + qspi: quadspi@1550000 {
412 + compatible = "fsl,ls1021a-qspi";
413 + #address-cells = <1>;
415 + reg = <0x0 0x1550000 0x0 0x10000>,
416 + <0x0 0x40000000 0x0 0x4000000>;
417 + reg-names = "QuadSPI", "QuadSPI-memory";
418 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
419 + clock-names = "qspi_en", "qspi";
420 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
422 + amba-base = <0x40000000>;
423 + status = "disabled";
427 compatible = "fsl,vf610-i2c";
428 #address-cells = <1>;
430 reg = <0x0 0x2180000 0x0 0x10000>;
431 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
433 - clocks = <&platform_clk 1>;
434 + clocks = <&clockgen 4 1>;
439 reg = <0x0 0x2190000 0x0 0x10000>;
440 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
442 - clocks = <&platform_clk 1>;
443 + clocks = <&clockgen 4 1>;
448 reg = <0x0 0x21a0000 0x0 0x10000>;
449 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
451 - clocks = <&platform_clk 1>;
452 + clocks = <&clockgen 4 1>;
457 compatible = "fsl,ls1021a-lpuart";
458 reg = <0x0 0x2960000 0x0 0x1000>;
459 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
460 - clocks = <&platform_clk 1>;
461 + clocks = <&clockgen 4 1>;
466 compatible = "fsl,ls1021a-lpuart";
467 reg = <0x0 0x2970000 0x0 0x1000>;
468 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
469 - clocks = <&platform_clk 1>;
470 + clocks = <&clockgen 4 1>;
475 compatible = "fsl,ls1021a-lpuart";
476 reg = <0x0 0x2980000 0x0 0x1000>;
477 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
478 - clocks = <&platform_clk 1>;
479 + clocks = <&clockgen 4 1>;
484 compatible = "fsl,ls1021a-lpuart";
485 reg = <0x0 0x2990000 0x0 0x1000>;
486 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
487 - clocks = <&platform_clk 1>;
488 + clocks = <&clockgen 4 1>;
492 @@ -435,16 +427,26 @@
493 compatible = "fsl,ls1021a-lpuart";
494 reg = <0x0 0x29a0000 0x0 0x1000>;
495 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
496 - clocks = <&platform_clk 1>;
497 + clocks = <&clockgen 4 1>;
502 + ftm0: ftm0@29d0000 {
503 + compatible = "fsl,ftm-alarm";
504 + reg = <0x0 0x29d0000 0x0 0x10000>,
505 + <0x0 0x1ee2140 0x0 0x4>;
506 + reg-names = "ftm", "FlexTimer1";
507 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
512 wdog0: watchdog@2ad0000 {
513 compatible = "fsl,imx21-wdt";
514 reg = <0x0 0x2ad0000 0x0 0x10000>;
515 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
516 - clocks = <&platform_clk 1>;
517 + clocks = <&clockgen 4 1>;
518 clock-names = "wdog-en";
522 compatible = "fsl,vf610-sai";
523 reg = <0x0 0x2b50000 0x0 0x10000>;
524 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
525 - clocks = <&platform_clk 1>, <&platform_clk 1>,
526 - <&platform_clk 1>, <&platform_clk 1>;
527 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
528 + <&clockgen 4 1>, <&clockgen 4 1>;
529 clock-names = "bus", "mclk1", "mclk2", "mclk3";
530 dma-names = "tx", "rx";
531 dmas = <&edma0 1 47>,
533 compatible = "fsl,vf610-sai";
534 reg = <0x0 0x2b60000 0x0 0x10000>;
535 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
536 - clocks = <&platform_clk 1>, <&platform_clk 1>,
537 - <&platform_clk 1>, <&platform_clk 1>;
538 + clocks = <&clockgen 4 1>, <&clockgen 4 1>,
539 + <&clockgen 4 1>, <&clockgen 4 1>;
540 clock-names = "bus", "mclk1", "mclk2", "mclk3";
541 dma-names = "tx", "rx";
542 dmas = <&edma0 1 45>,
543 @@ -489,16 +491,31 @@
546 clock-names = "dmamux0", "dmamux1";
547 - clocks = <&platform_clk 1>,
549 + clocks = <&clockgen 4 1>,
553 + qdma: qdma@8390000 {
554 + compatible = "fsl,ls1021a-qdma";
555 + reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
556 + <0x0 0x8389000 0x0 0x1000>, /* Status regs */
557 + <0x0 0x838a000 0x0 0x2000>; /* Block regs */
558 + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
559 + <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
560 + interrupt-names = "qdma-error", "qdma-queue";
563 + status-sizes = <64>;
564 + queue-sizes = <64 64>;
569 compatible = "fsl,ls1021a-dcu";
570 reg = <0x0 0x2ce0000 0x0 0x10000>;
571 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
572 - clocks = <&platform_clk 0>,
574 + clocks = <&clockgen 4 0>,
576 clock-names = "dcu", "pix";
580 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
582 snps,quirk-frame-length-adjustment = <0x20>;
585 snps,dis_rxdet_inp3_quirk;
589 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
590 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
591 reg-names = "regs", "config";
592 - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
593 + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
594 + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
595 + interrupt-names = "pme", "aer";
596 fsl,pcie-scfg = <&scfg 0>;
597 #address-cells = <3>;
600 bus-range = <0x0 0xff>;
601 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
602 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
603 - msi-parent = <&msi1>;
604 + msi-parent = <&msi1>, <&msi2>;
605 #interrupt-cells = <1>;
606 interrupt-map-mask = <0 0 0 7>;
607 interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
609 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
610 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
611 reg-names = "regs", "config";
612 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
613 + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
614 + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
615 + interrupt-names = "pme", "aer";
616 fsl,pcie-scfg = <&scfg 1>;
617 #address-cells = <3>;
620 bus-range = <0x0 0xff>;
621 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
622 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
623 - msi-parent = <&msi2>;
624 + msi-parent = <&msi1>, <&msi2>;
625 #interrupt-cells = <1>;
626 interrupt-map-mask = <0 0 0 7>;
627 interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
628 diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
629 index 06fdf6c2..a349dba5 100644
630 --- a/arch/arm/boot/dts/mt6580.dtsi
631 +++ b/arch/arm/boot/dts/mt6580.dtsi
633 #interrupt-cells = <3>;
634 interrupt-parent = <&gic>;
635 reg = <0x10211000 0x1000>,
636 - <0x10212000 0x1000>,
637 + <0x10212000 0x2000>,
641 diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
642 index 88b3cb12..0d6f60af 100644
643 --- a/arch/arm/boot/dts/mt6589.dtsi
644 +++ b/arch/arm/boot/dts/mt6589.dtsi
646 #interrupt-cells = <3>;
647 interrupt-parent = <&gic>;
648 reg = <0x10211000 0x1000>,
649 - <0x10212000 0x1000>,
650 + <0x10212000 0x2000>,
654 diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
655 index 52086c80..916c095d 100644
656 --- a/arch/arm/boot/dts/mt8127.dtsi
657 +++ b/arch/arm/boot/dts/mt8127.dtsi
659 #interrupt-cells = <3>;
660 interrupt-parent = <&gic>;
661 reg = <0 0x10211000 0 0x1000>,
662 - <0 0x10212000 0 0x1000>,
663 + <0 0x10212000 0 0x2000>,
664 <0 0x10214000 0 0x2000>,
665 <0 0x10216000 0 0x2000>;
667 diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
668 index 1d7f92bd..a97b4ee4 100644
669 --- a/arch/arm/boot/dts/mt8135.dtsi
670 +++ b/arch/arm/boot/dts/mt8135.dtsi
672 #interrupt-cells = <3>;
673 interrupt-parent = <&gic>;
674 reg = <0 0x10211000 0 0x1000>,
675 - <0 0x10212000 0 0x1000>,
676 + <0 0x10212000 0 0x2000>,
677 <0 0x10214000 0 0x2000>,
678 <0 0x10216000 0 0x2000>;
680 diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
681 index 17ec2e2d..559fc549 100644
682 --- a/arch/arm/boot/dts/rk3288.dtsi
683 +++ b/arch/arm/boot/dts/rk3288.dtsi
684 @@ -1109,7 +1109,7 @@
685 #address-cells = <0>;
687 reg = <0xffc01000 0x1000>,
688 - <0xffc02000 0x1000>,
689 + <0xffc02000 0x2000>,
692 interrupts = <GIC_PPI 9 0xf04>;
693 diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
694 index ce196045..97f28399 100644
695 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
696 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
698 gic: interrupt-controller@01c81000 {
699 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
700 reg = <0x01c81000 0x1000>,
701 - <0x01c82000 0x1000>,
702 + <0x01c82000 0x2000>,
705 interrupt-controller;
706 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
707 index 94cf5a1c..81e5a44c 100644
708 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
709 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
710 @@ -1685,9 +1685,9 @@
713 gic: interrupt-controller@01c81000 {
714 - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
715 + compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
716 reg = <0x01c81000 0x1000>,
717 - <0x01c82000 0x1000>,
718 + <0x01c82000 0x2000>,
721 interrupt-controller;
722 diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
723 index 300a1bd5..cdff5888 100644
724 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
725 +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
727 gic: interrupt-controller@01c81000 {
728 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
729 reg = <0x01c81000 0x1000>,
730 - <0x01c82000 0x1000>,
731 + <0x01c82000 0x2000>,
734 interrupt-controller;
735 diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
736 index 3c5214cb..ba7e7c71 100644
737 --- a/arch/arm/boot/dts/sun9i-a80.dtsi
738 +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
740 gic: interrupt-controller@01c41000 {
741 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
742 reg = <0x01c41000 0x1000>,
743 - <0x01c42000 0x1000>,
744 + <0x01c42000 0x2000>,
747 interrupt-controller;
748 diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
749 index 1b7783db..2d7986a1 100644
750 --- a/arch/arm64/boot/dts/freescale/Makefile
751 +++ b/arch/arm64/boot/dts/freescale/Makefile
753 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
754 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
755 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
756 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
757 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
758 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
759 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
760 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
761 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
762 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
763 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
764 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb
765 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb
766 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
767 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
768 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
769 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
770 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
771 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
772 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
773 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
776 subdir-y := $(dts-dirs)
777 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
779 index 00000000..e1274c18
781 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
784 + * Device Tree file for Freescale LS1012A Freedom Board.
786 + * Copyright 2016 Freescale Semiconductor, Inc.
788 + * This file is dual-licensed: you can use it either under the terms
789 + * of the GPLv2 or the X11 license, at your option. Note that this dual
790 + * licensing only applies to this file, and not this project as a
793 + * a) This library is free software; you can redistribute it and/or
794 + * modify it under the terms of the GNU General Public License as
795 + * published by the Free Software Foundation; either version 2 of the
796 + * License, or (at your option) any later version.
798 + * This library is distributed in the hope that it will be useful,
799 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
800 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
801 + * GNU General Public License for more details.
803 + * Or, alternatively,
805 + * b) Permission is hereby granted, free of charge, to any person
806 + * obtaining a copy of this software and associated documentation
807 + * files (the "Software"), to deal in the Software without
808 + * restriction, including without limitation the rights to use,
809 + * copy, modify, merge, publish, distribute, sublicense, and/or
810 + * sell copies of the Software, and to permit persons to whom the
811 + * Software is furnished to do so, subject to the following
814 + * The above copyright notice and this permission notice shall be
815 + * included in all copies or substantial portions of the Software.
817 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
818 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
819 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
820 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
821 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
822 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
823 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
824 + * OTHER DEALINGS IN THE SOFTWARE.
828 +#include "fsl-ls1012a.dtsi"
831 + model = "LS1012A Freedom Board";
832 + compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
834 + sys_mclk: clock-mclk {
835 + compatible = "fixed-clock";
836 + #clock-cells = <0>;
837 + clock-frequency = <25000000>;
840 + reg_1p8v: regulator-1p8v {
841 + compatible = "regulator-fixed";
842 + regulator-name = "1P8V";
843 + regulator-min-microvolt = <1800000>;
844 + regulator-max-microvolt = <1800000>;
845 + regulator-always-on;
849 + compatible = "simple-audio-card";
850 + simple-audio-card,format = "i2s";
851 + simple-audio-card,widgets =
852 + "Microphone", "Microphone Jack",
853 + "Headphone", "Headphone Jack",
854 + "Speaker", "Speaker Ext",
855 + "Line", "Line In Jack";
856 + simple-audio-card,routing =
857 + "MIC_IN", "Microphone Jack",
858 + "Microphone Jack", "Mic Bias",
859 + "LINE_IN", "Line In Jack",
860 + "Headphone Jack", "HP_OUT",
861 + "Speaker Ext", "LINE_OUT";
863 + simple-audio-card,cpu {
864 + sound-dai = <&sai2>;
869 + simple-audio-card,codec {
870 + sound-dai = <&codec>;
873 + system-clock-frequency = <25000000>;
885 + codec: sgtl5000@a {
886 + #sound-dai-cells = <0>;
887 + compatible = "fsl,sgtl5000";
889 + VDDA-supply = <®_1p8v>;
890 + VDDIO-supply = <®_1p8v>;
891 + clocks = <&sys_mclk>;
900 + qflash0: s25fs512s@0 {
901 + compatible = "spansion,m25p80";
902 + #address-cells = <1>;
905 + spi-max-frequency = <20000000>;
917 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
919 index 00000000..1e1b2802
921 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
924 + * Device Tree file for Freescale LS1012A QDS Board.
926 + * Copyright 2016 Freescale Semiconductor, Inc.
928 + * This file is dual-licensed: you can use it either under the terms
929 + * of the GPLv2 or the X11 license, at your option. Note that this dual
930 + * licensing only applies to this file, and not this project as a
933 + * a) This library is free software; you can redistribute it and/or
934 + * modify it under the terms of the GNU General Public License as
935 + * published by the Free Software Foundation; either version 2 of the
936 + * License, or (at your option) any later version.
938 + * This library is distributed in the hope that it will be useful,
939 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
940 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
941 + * GNU General Public License for more details.
943 + * Or, alternatively,
945 + * b) Permission is hereby granted, free of charge, to any person
946 + * obtaining a copy of this software and associated documentation
947 + * files (the "Software"), to deal in the Software without
948 + * restriction, including without limitation the rights to use,
949 + * copy, modify, merge, publish, distribute, sublicense, and/or
950 + * sell copies of the Software, and to permit persons to whom the
951 + * Software is furnished to do so, subject to the following
954 + * The above copyright notice and this permission notice shall be
955 + * included in all copies or substantial portions of the Software.
957 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
958 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
959 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
960 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
961 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
962 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
963 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
964 + * OTHER DEALINGS IN THE SOFTWARE.
968 +#include "fsl-ls1012a.dtsi"
971 + model = "LS1012A QDS Board";
972 + compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
974 + sys_mclk: clock-mclk {
975 + compatible = "fixed-clock";
976 + #clock-cells = <0>;
977 + clock-frequency = <24576000>;
980 + reg_3p3v: regulator-3p3v {
981 + compatible = "regulator-fixed";
982 + regulator-name = "3P3V";
983 + regulator-min-microvolt = <3300000>;
984 + regulator-max-microvolt = <3300000>;
985 + regulator-always-on;
989 + compatible = "simple-audio-card";
990 + simple-audio-card,format = "i2s";
991 + simple-audio-card,widgets =
992 + "Microphone", "Microphone Jack",
993 + "Headphone", "Headphone Jack",
994 + "Speaker", "Speaker Ext",
995 + "Line", "Line In Jack";
996 + simple-audio-card,routing =
997 + "MIC_IN", "Microphone Jack",
998 + "Microphone Jack", "Mic Bias",
999 + "LINE_IN", "Line In Jack",
1000 + "Headphone Jack", "HP_OUT",
1001 + "Speaker Ext", "LINE_OUT";
1003 + simple-audio-card,cpu {
1004 + sound-dai = <&sai2>;
1009 + simple-audio-card,codec {
1010 + sound-dai = <&codec>;
1013 + system-clock-frequency = <24576000>;
1026 + compatible = "nxp,pca9547";
1028 + #address-cells = <1>;
1029 + #size-cells = <0>;
1032 + #address-cells = <1>;
1033 + #size-cells = <0>;
1036 + codec: sgtl5000@a {
1037 + #sound-dai-cells = <0>;
1038 + compatible = "fsl,sgtl5000";
1040 + VDDA-supply = <®_3p3v>;
1041 + VDDIO-supply = <®_3p3v>;
1042 + clocks = <&sys_mclk>;
1053 + qflash0: s25fs512s@0 {
1054 + compatible = "spansion,m25p80";
1055 + #address-cells = <1>;
1056 + #size-cells = <1>;
1057 + spi-max-frequency = <20000000>;
1078 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1079 new file mode 100644
1080 index 00000000..90bd2307
1082 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
1085 + * Device Tree file for Freescale LS1012A RDB Board.
1087 + * Copyright 2016 Freescale Semiconductor, Inc.
1089 + * This file is dual-licensed: you can use it either under the terms
1090 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1091 + * licensing only applies to this file, and not this project as a
1094 + * a) This library is free software; you can redistribute it and/or
1095 + * modify it under the terms of the GNU General Public License as
1096 + * published by the Free Software Foundation; either version 2 of the
1097 + * License, or (at your option) any later version.
1099 + * This library is distributed in the hope that it will be useful,
1100 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1101 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1102 + * GNU General Public License for more details.
1104 + * Or, alternatively,
1106 + * b) Permission is hereby granted, free of charge, to any person
1107 + * obtaining a copy of this software and associated documentation
1108 + * files (the "Software"), to deal in the Software without
1109 + * restriction, including without limitation the rights to use,
1110 + * copy, modify, merge, publish, distribute, sublicense, and/or
1111 + * sell copies of the Software, and to permit persons to whom the
1112 + * Software is furnished to do so, subject to the following
1115 + * The above copyright notice and this permission notice shall be
1116 + * included in all copies or substantial portions of the Software.
1118 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1119 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1120 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1121 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1122 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1123 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1124 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1125 + * OTHER DEALINGS IN THE SOFTWARE.
1129 +#include "fsl-ls1012a.dtsi"
1132 + model = "LS1012A RDB Board";
1133 + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
1149 + qflash0: s25fs512s@0 {
1150 + compatible = "spansion,m25p80";
1151 + #address-cells = <1>;
1152 + #size-cells = <1>;
1153 + spi-max-frequency = <20000000>;
1175 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1176 new file mode 100644
1177 index 00000000..9ede9d52
1179 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
1182 + * Device Tree Include file for Freescale Layerscape-1012A family SoC.
1184 + * Copyright 2016 Freescale Semiconductor, Inc.
1186 + * This file is dual-licensed: you can use it either under the terms
1187 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1188 + * licensing only applies to this file, and not this project as a
1191 + * a) This library is free software; you can redistribute it and/or
1192 + * modify it under the terms of the GNU General Public License as
1193 + * published by the Free Software Foundation; either version 2 of the
1194 + * License, or (at your option) any later version.
1196 + * This library is distributed in the hope that it will be useful,
1197 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1198 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1199 + * GNU General Public License for more details.
1201 + * Or, alternatively,
1203 + * b) Permission is hereby granted, free of charge, to any person
1204 + * obtaining a copy of this software and associated documentation
1205 + * files (the "Software"), to deal in the Software without
1206 + * restriction, including without limitation the rights to use,
1207 + * copy, modify, merge, publish, distribute, sublicense, and/or
1208 + * sell copies of the Software, and to permit persons to whom the
1209 + * Software is furnished to do so, subject to the following
1212 + * The above copyright notice and this permission notice shall be
1213 + * included in all copies or substantial portions of the Software.
1215 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1216 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1217 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1218 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1219 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1220 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1221 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1222 + * OTHER DEALINGS IN THE SOFTWARE.
1225 +#include <dt-bindings/interrupt-controller/arm-gic.h>
1226 +#include <dt-bindings/thermal/thermal.h>
1229 + compatible = "fsl,ls1012a";
1230 + interrupt-parent = <&gic>;
1231 + #address-cells = <2>;
1232 + #size-cells = <2>;
1240 + sec_mon = &sec_mon;
1244 + #address-cells = <1>;
1245 + #size-cells = <0>;
1248 + device_type = "cpu";
1249 + compatible = "arm,cortex-a53";
1251 + clocks = <&clockgen 1 0>;
1252 + #cooling-cells = <2>;
1253 + cpu-idle-states = <&CPU_PH20>;
1259 + * PSCI node is not added default, U-boot will add missing
1260 + * parts if it determines to use PSCI.
1262 + entry-method = "arm,psci";
1264 + CPU_PH20: cpu-ph20 {
1265 + compatible = "arm,idle-state";
1266 + idle-state-name = "PH20";
1267 + arm,psci-suspend-param = <0x0>;
1268 + entry-latency-us = <1000>;
1269 + exit-latency-us = <1000>;
1270 + min-residency-us = <3000>;
1275 + compatible = "fixed-clock";
1276 + #clock-cells = <0>;
1277 + clock-frequency = <125000000>;
1278 + clock-output-names = "sysclk";
1281 + coreclk: coreclk {
1282 + compatible = "fixed-clock";
1283 + #clock-cells = <0>;
1284 + clock-frequency = <100000000>;
1285 + clock-output-names = "coreclk";
1289 + compatible = "arm,armv8-timer";
1290 + interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
1291 + <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
1292 + <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
1293 + <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
1297 + compatible = "arm,armv8-pmuv3";
1298 + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
1301 + gic: interrupt-controller@1400000 {
1302 + compatible = "arm,gic-400";
1303 + #interrupt-cells = <3>;
1304 + interrupt-controller;
1305 + reg = <0x0 0x1401000 0 0x1000>, /* GICD */
1306 + <0x0 0x1402000 0 0x2000>, /* GICC */
1307 + <0x0 0x1404000 0 0x2000>, /* GICH */
1308 + <0x0 0x1406000 0 0x2000>; /* GICV */
1309 + interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
1313 + compatible = "syscon-reboot";
1320 + compatible = "simple-bus";
1321 + #address-cells = <2>;
1322 + #size-cells = <2>;
1325 + scfg: scfg@1570000 {
1326 + compatible = "fsl,ls1012a-scfg", "syscon";
1327 + reg = <0x0 0x1570000 0x0 0x10000>;
1331 + crypto: crypto@1700000 {
1332 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
1334 + fsl,sec-era = <8>;
1335 + #address-cells = <1>;
1336 + #size-cells = <1>;
1337 + ranges = <0x0 0x00 0x1700000 0x100000>;
1338 + reg = <0x00 0x1700000 0x0 0x100000>;
1339 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
1341 + sec_jr0: jr@10000 {
1342 + compatible = "fsl,sec-v5.4-job-ring",
1343 + "fsl,sec-v5.0-job-ring",
1344 + "fsl,sec-v4.0-job-ring";
1345 + reg = <0x10000 0x10000>;
1346 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1349 + sec_jr1: jr@20000 {
1350 + compatible = "fsl,sec-v5.4-job-ring",
1351 + "fsl,sec-v5.0-job-ring",
1352 + "fsl,sec-v4.0-job-ring";
1353 + reg = <0x20000 0x10000>;
1354 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1357 + sec_jr2: jr@30000 {
1358 + compatible = "fsl,sec-v5.4-job-ring",
1359 + "fsl,sec-v5.0-job-ring",
1360 + "fsl,sec-v4.0-job-ring";
1361 + reg = <0x30000 0x10000>;
1362 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1365 + sec_jr3: jr@40000 {
1366 + compatible = "fsl,sec-v5.4-job-ring",
1367 + "fsl,sec-v5.0-job-ring",
1368 + "fsl,sec-v4.0-job-ring";
1369 + reg = <0x40000 0x10000>;
1370 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1374 + compatible = "fsl,sec-v5.4-rtic",
1375 + "fsl,sec-v5.0-rtic",
1376 + "fsl,sec-v4.0-rtic";
1377 + #address-cells = <1>;
1378 + #size-cells = <1>;
1379 + reg = <0x60000 0x100 0x60e00 0x18>;
1380 + ranges = <0x0 0x60100 0x500>;
1382 + rtic_a: rtic-a@0 {
1383 + compatible = "fsl,sec-v5.4-rtic-memory",
1384 + "fsl,sec-v5.0-rtic-memory",
1385 + "fsl,sec-v4.0-rtic-memory";
1386 + reg = <0x00 0x20 0x100 0x100>;
1389 + rtic_b: rtic-b@20 {
1390 + compatible = "fsl,sec-v5.4-rtic-memory",
1391 + "fsl,sec-v5.0-rtic-memory",
1392 + "fsl,sec-v4.0-rtic-memory";
1393 + reg = <0x20 0x20 0x200 0x100>;
1396 + rtic_c: rtic-c@40 {
1397 + compatible = "fsl,sec-v5.4-rtic-memory",
1398 + "fsl,sec-v5.0-rtic-memory",
1399 + "fsl,sec-v4.0-rtic-memory";
1400 + reg = <0x40 0x20 0x300 0x100>;
1403 + rtic_d: rtic-d@60 {
1404 + compatible = "fsl,sec-v5.4-rtic-memory",
1405 + "fsl,sec-v5.0-rtic-memory",
1406 + "fsl,sec-v4.0-rtic-memory";
1407 + reg = <0x60 0x20 0x400 0x100>;
1412 + sec_mon: sec_mon@1e90000 {
1413 + compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
1414 + "fsl,sec-v4.0-mon";
1415 + reg = <0x0 0x1e90000 0x0 0x10000>;
1416 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
1417 + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
1420 + dcfg: dcfg@1ee0000 {
1421 + compatible = "fsl,ls1012a-dcfg",
1423 + reg = <0x0 0x1ee0000 0x0 0x10000>;
1427 + clockgen: clocking@1ee1000 {
1428 + compatible = "fsl,ls1012a-clockgen";
1429 + reg = <0x0 0x1ee1000 0x0 0x1000>;
1430 + #clock-cells = <2>;
1431 + clocks = <&sysclk &coreclk>;
1432 + clock-names = "sysclk", "coreclk";
1435 + tmu: tmu@1f00000 {
1436 + compatible = "fsl,qoriq-tmu";
1437 + reg = <0x0 0x1f00000 0x0 0x10000>;
1438 + interrupts = <0 33 0x4>;
1439 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
1440 + fsl,tmu-calibration = <0x00000000 0x00000026
1441 + 0x00000001 0x0000002d
1442 + 0x00000002 0x00000032
1443 + 0x00000003 0x00000039
1444 + 0x00000004 0x0000003f
1445 + 0x00000005 0x00000046
1446 + 0x00000006 0x0000004d
1447 + 0x00000007 0x00000054
1448 + 0x00000008 0x0000005a
1449 + 0x00000009 0x00000061
1450 + 0x0000000a 0x0000006a
1451 + 0x0000000b 0x00000071
1453 + 0x00010000 0x00000025
1454 + 0x00010001 0x0000002c
1455 + 0x00010002 0x00000035
1456 + 0x00010003 0x0000003d
1457 + 0x00010004 0x00000045
1458 + 0x00010005 0x0000004e
1459 + 0x00010006 0x00000057
1460 + 0x00010007 0x00000061
1461 + 0x00010008 0x0000006b
1462 + 0x00010009 0x00000076
1464 + 0x00020000 0x00000029
1465 + 0x00020001 0x00000033
1466 + 0x00020002 0x0000003d
1467 + 0x00020003 0x00000049
1468 + 0x00020004 0x00000056
1469 + 0x00020005 0x00000061
1470 + 0x00020006 0x0000006d
1472 + 0x00030000 0x00000021
1473 + 0x00030001 0x0000002a
1474 + 0x00030002 0x0000003c
1475 + 0x00030003 0x0000004e>;
1477 + #thermal-sensor-cells = <1>;
1481 + cpu_thermal: cpu-thermal {
1482 + polling-delay-passive = <1000>;
1483 + polling-delay = <5000>;
1484 + thermal-sensors = <&tmu 0>;
1487 + cpu_alert: cpu-alert {
1488 + temperature = <85000>;
1489 + hysteresis = <2000>;
1493 + cpu_crit: cpu-crit {
1494 + temperature = <95000>;
1495 + hysteresis = <2000>;
1496 + type = "critical";
1502 + trip = <&cpu_alert>;
1504 + <&cpu0 THERMAL_NO_LIMIT
1505 + THERMAL_NO_LIMIT>;
1511 + esdhc0: esdhc@1560000 {
1512 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1513 + reg = <0x0 0x1560000 0x0 0x10000>;
1514 + interrupts = <0 62 0x4>;
1515 + clocks = <&clockgen 4 0>;
1516 + voltage-ranges = <1800 1800 3300 3300>;
1520 + status = "disabled";
1523 + esdhc1: esdhc@1580000 {
1524 + compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
1525 + reg = <0x0 0x1580000 0x0 0x10000>;
1526 + interrupts = <0 65 0x4>;
1527 + clocks = <&clockgen 4 0>;
1528 + voltage-ranges = <1800 1800 3300 3300>;
1533 + status = "disabled";
1536 + ftm0: ftm0@29d0000 {
1537 + compatible = "fsl,ftm-alarm";
1538 + reg = <0x0 0x29d0000 0x0 0x10000>,
1539 + <0x0 0x1ee2140 0x0 0x4>;
1540 + reg-names = "ftm", "FlexTimer1";
1541 + interrupts = <0 86 0x4>;
1545 + i2c0: i2c@2180000 {
1546 + compatible = "fsl,vf610-i2c";
1547 + #address-cells = <1>;
1548 + #size-cells = <0>;
1549 + reg = <0x0 0x2180000 0x0 0x10000>;
1550 + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1551 + clocks = <&clockgen 4 0>;
1552 + status = "disabled";
1555 + i2c1: i2c@2190000 {
1556 + compatible = "fsl,vf610-i2c";
1557 + #address-cells = <1>;
1558 + #size-cells = <0>;
1559 + reg = <0x0 0x2190000 0x0 0x10000>;
1560 + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
1561 + clocks = <&clockgen 4 0>;
1562 + status = "disabled";
1565 + duart0: serial@21c0500 {
1566 + compatible = "fsl,ns16550", "ns16550a";
1567 + reg = <0x00 0x21c0500 0x0 0x100>;
1568 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1569 + clocks = <&clockgen 4 0>;
1570 + status = "disabled";
1573 + duart1: serial@21c0600 {
1574 + compatible = "fsl,ns16550", "ns16550a";
1575 + reg = <0x00 0x21c0600 0x0 0x100>;
1576 + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
1577 + clocks = <&clockgen 4 0>;
1578 + status = "disabled";
1581 + gpio0: gpio@2300000 {
1582 + compatible = "fsl,qoriq-gpio";
1583 + reg = <0x0 0x2300000 0x0 0x10000>;
1584 + interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
1586 + #gpio-cells = <2>;
1587 + interrupt-controller;
1588 + #interrupt-cells = <2>;
1591 + gpio1: gpio@2310000 {
1592 + compatible = "fsl,qoriq-gpio";
1593 + reg = <0x0 0x2310000 0x0 0x10000>;
1594 + interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
1596 + #gpio-cells = <2>;
1597 + interrupt-controller;
1598 + #interrupt-cells = <2>;
1601 + qspi: quadspi@1550000 {
1602 + compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
1603 + #address-cells = <1>;
1604 + #size-cells = <0>;
1605 + reg = <0x0 0x1550000 0x0 0x10000>,
1606 + <0x0 0x40000000 0x0 0x10000000>;
1607 + reg-names = "QuadSPI", "QuadSPI-memory";
1608 + interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
1609 + clock-names = "qspi_en", "qspi";
1610 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
1612 + fsl,qspi-has-second-chip;
1613 + status = "disabled";
1616 + wdog0: wdog@2ad0000 {
1617 + compatible = "fsl,ls1012a-wdt",
1619 + reg = <0x0 0x2ad0000 0x0 0x10000>;
1620 + interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
1621 + clocks = <&clockgen 4 0>;
1625 + sai1: sai@2b50000 {
1626 + #sound-dai-cells = <0>;
1627 + compatible = "fsl,vf610-sai";
1628 + reg = <0x0 0x2b50000 0x0 0x10000>;
1629 + interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
1630 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1631 + <&clockgen 4 3>, <&clockgen 4 3>;
1632 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1633 + dma-names = "tx", "rx";
1634 + dmas = <&edma0 1 47>,
1636 + status = "disabled";
1639 + sai2: sai@2b60000 {
1640 + #sound-dai-cells = <0>;
1641 + compatible = "fsl,vf610-sai";
1642 + reg = <0x0 0x2b60000 0x0 0x10000>;
1643 + interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
1644 + clocks = <&clockgen 4 3>, <&clockgen 4 3>,
1645 + <&clockgen 4 3>, <&clockgen 4 3>;
1646 + clock-names = "bus", "mclk1", "mclk2", "mclk3";
1647 + dma-names = "tx", "rx";
1648 + dmas = <&edma0 1 45>,
1650 + status = "disabled";
1653 + edma0: edma@2c00000 {
1655 + compatible = "fsl,vf610-edma";
1656 + reg = <0x0 0x2c00000 0x0 0x10000>,
1657 + <0x0 0x2c10000 0x0 0x10000>,
1658 + <0x0 0x2c20000 0x0 0x10000>;
1659 + interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
1660 + <0 103 IRQ_TYPE_LEVEL_HIGH>;
1661 + interrupt-names = "edma-tx", "edma-err";
1662 + dma-channels = <32>;
1664 + clock-names = "dmamux0", "dmamux1";
1665 + clocks = <&clockgen 4 3>,
1669 + usb0: usb3@2f00000 {
1670 + compatible = "snps,dwc3";
1671 + reg = <0x0 0x2f00000 0x0 0x10000>;
1672 + interrupts = <0 60 0x4>;
1674 + snps,quirk-frame-length-adjustment = <0x20>;
1675 + snps,dis_rxdet_inp3_quirk;
1678 + usb1: usb2@8600000 {
1679 + compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
1680 + reg = <0x0 0x8600000 0x0 0x1000>;
1681 + interrupts = <0 139 0x4>;
1683 + phy_type = "ulpi";
1686 + sata: sata@3200000 {
1687 + compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
1688 + reg = <0x0 0x3200000 0x0 0x10000>,
1689 + <0x0 0x20140520 0x0 0x4>;
1690 + reg-names = "ahci", "sata-ecc";
1691 + interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
1692 + clocks = <&clockgen 4 0>;
1694 + status = "disabled";
1698 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1699 new file mode 100644
1700 index 00000000..169e1714
1702 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
1705 + * QorIQ FMan v3 device tree nodes for ls1043
1707 + * Copyright 2015-2016 Freescale Semiconductor Inc.
1709 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1714 +/* include used FMan blocks */
1715 +#include "qoriq-fman3-0.dtsi"
1716 +#include "qoriq-fman3-0-1g-0.dtsi"
1717 +#include "qoriq-fman3-0-1g-1.dtsi"
1718 +#include "qoriq-fman3-0-1g-2.dtsi"
1719 +#include "qoriq-fman3-0-1g-3.dtsi"
1720 +#include "qoriq-fman3-0-1g-4.dtsi"
1721 +#include "qoriq-fman3-0-1g-5.dtsi"
1722 +#include "qoriq-fman3-0-10g-0.dtsi"
1727 + /* these aliases provide the FMan ports mapping */
1728 + enet0: ethernet@e0000 {
1731 + enet1: ethernet@e2000 {
1734 + enet2: ethernet@e4000 {
1737 + enet3: ethernet@e6000 {
1740 + enet4: ethernet@e8000 {
1743 + enet5: ethernet@ea000 {
1746 + enet6: ethernet@f0000 {
1749 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
1750 new file mode 100644
1751 index 00000000..6c13b416
1753 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
1756 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
1758 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
1760 + * Mingkai Hu <Mingkai.hu@freescale.com>
1762 + * This file is dual-licensed: you can use it either under the terms
1763 + * of the GPLv2 or the X11 license, at your option. Note that this dual
1764 + * licensing only applies to this file, and not this project as a
1767 + * a) This library is free software; you can redistribute it and/or
1768 + * modify it under the terms of the GNU General Public License as
1769 + * published by the Free Software Foundation; either version 2 of the
1770 + * License, or (at your option) any later version.
1772 + * This library is distributed in the hope that it will be useful,
1773 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1774 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1775 + * GNU General Public License for more details.
1777 + * Or, alternatively,
1779 + * b) Permission is hereby granted, free of charge, to any person
1780 + * obtaining a copy of this software and associated documentation
1781 + * files (the "Software"), to deal in the Software without
1782 + * restriction, including without limitation the rights to use,
1783 + * copy, modify, merge, publish, distribute, sublicense, and/or
1784 + * sell copies of the Software, and to permit persons to whom the
1785 + * Software is furnished to do so, subject to the following
1788 + * The above copyright notice and this permission notice shall be
1789 + * included in all copies or substantial portions of the Software.
1791 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
1792 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
1793 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
1794 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
1795 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
1796 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
1797 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
1798 + * OTHER DEALINGS IN THE SOFTWARE.
1801 +#include "fsl-ls1043a-qds.dts"
1804 + compatible = "fsl,bman-fbpr";
1805 + alloc-ranges = <0 0 0x10000 0>;
1808 + compatible = "fsl,qman-fqd";
1809 + alloc-ranges = <0 0 0x10000 0>;
1812 + compatible = "fsl,qman-pfdr";
1813 + alloc-ranges = <0 0 0x10000 0>;
1817 +#include "qoriq-dpaa-eth.dtsi"
1818 +#include "qoriq-fman3-0-6oh.dtsi"
1822 + compatible = "fsl,fman", "simple-bus";
1824 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
1825 index dd9e9194..08abff73 100644
1826 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
1827 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
1830 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
1832 - * Copyright 2014-2015, Freescale Semiconductor
1833 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
1835 * Mingkai Hu <Mingkai.hu@freescale.com>
1841 -/include/ "fsl-ls1043a.dtsi"
1842 +#include "fsl-ls1043a.dtsi"
1845 model = "LS1043A QDS Board";
1850 + sgmii_riser_s1_p1 = &sgmii_phy_s1_p1;
1851 + sgmii_riser_s2_p1 = &sgmii_phy_s2_p1;
1852 + sgmii_riser_s3_p1 = &sgmii_phy_s3_p1;
1853 + sgmii_riser_s4_p1 = &sgmii_phy_s4_p1;
1854 + qsgmii_s1_p1 = &qsgmii_phy_s1_p1;
1855 + qsgmii_s1_p2 = &qsgmii_phy_s1_p2;
1856 + qsgmii_s1_p3 = &qsgmii_phy_s1_p3;
1857 + qsgmii_s1_p4 = &qsgmii_phy_s1_p4;
1858 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
1859 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
1860 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
1861 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
1862 + emi1_slot1 = &ls1043mdio_s1;
1863 + emi1_slot2 = &ls1043mdio_s2;
1864 + emi1_slot3 = &ls1043mdio_s3;
1865 + emi1_slot4 = &ls1043mdio_s4;
1872 fpga: board-control@2,0 {
1873 - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
1874 + #address-cells = <1>;
1875 + #size-cells = <1>;
1876 + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-bus";
1877 reg = <0x2 0x0 0x0000100>;
1878 + ranges = <0 2 0 0x100>;
1882 @@ -181,3 +200,149 @@
1887 +#include "fsl-ls1043-post.dtsi"
1891 + phy-handle = <&qsgmii_phy_s2_p1>;
1892 + phy-connection-type = "sgmii";
1896 + phy-handle = <&qsgmii_phy_s2_p2>;
1897 + phy-connection-type = "sgmii";
1901 + phy-handle = <&rgmii_phy1>;
1902 + phy-connection-type = "rgmii";
1906 + phy-handle = <&rgmii_phy2>;
1907 + phy-connection-type = "rgmii";
1911 + phy-handle = <&qsgmii_phy_s2_p3>;
1912 + phy-connection-type = "sgmii";
1916 + phy-handle = <&qsgmii_phy_s2_p4>;
1917 + phy-connection-type = "sgmii";
1920 + ethernet@f0000 { /* DTSEC9/10GEC1 */
1921 + fixed-link = <1 1 10000 0 0>;
1922 + phy-connection-type = "xgmii";
1928 + compatible = "mdio-mux-mmioreg", "mdio-mux";
1929 + mdio-parent-bus = <&mdio0>;
1930 + #address-cells = <1>;
1931 + #size-cells = <0>;
1932 + reg = <0x54 1>; /* BRDCFG4 */
1933 + mux-mask = <0xe0>; /* EMI1 */
1935 + /* On-board RGMII1 PHY */
1936 + ls1043mdio0: mdio@0 {
1938 + #address-cells = <1>;
1939 + #size-cells = <0>;
1941 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
1946 + /* On-board RGMII2 PHY */
1947 + ls1043mdio1: mdio@1 {
1949 + #address-cells = <1>;
1950 + #size-cells = <0>;
1952 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
1958 + ls1043mdio_s1: mdio@2 {
1960 + #address-cells = <1>;
1961 + #size-cells = <0>;
1962 + status = "disabled";
1964 + qsgmii_phy_s1_p1: ethernet-phy@4 {
1967 + qsgmii_phy_s1_p2: ethernet-phy@5 {
1970 + qsgmii_phy_s1_p3: ethernet-phy@6 {
1973 + qsgmii_phy_s1_p4: ethernet-phy@7 {
1977 + sgmii_phy_s1_p1: ethernet-phy@1c {
1983 + ls1043mdio_s2: mdio@3 {
1985 + #address-cells = <1>;
1986 + #size-cells = <0>;
1987 + status = "disabled";
1989 + qsgmii_phy_s2_p1: ethernet-phy@8 {
1992 + qsgmii_phy_s2_p2: ethernet-phy@9 {
1995 + qsgmii_phy_s2_p3: ethernet-phy@a {
1998 + qsgmii_phy_s2_p4: ethernet-phy@b {
2002 + sgmii_phy_s2_p1: ethernet-phy@1c {
2008 + ls1043mdio_s3: mdio@4 {
2010 + #address-cells = <1>;
2011 + #size-cells = <0>;
2012 + status = "disabled";
2014 + sgmii_phy_s3_p1: ethernet-phy@1c {
2020 + ls1043mdio_s4: mdio@5 {
2022 + #address-cells = <1>;
2023 + #size-cells = <0>;
2024 + status = "disabled";
2026 + sgmii_phy_s4_p1: ethernet-phy@1c {
2032 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2033 new file mode 100644
2034 index 00000000..ac4b9a41
2036 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
2039 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2041 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2043 + * Mingkai Hu <Mingkai.hu@freescale.com>
2045 + * This file is dual-licensed: you can use it either under the terms
2046 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2047 + * licensing only applies to this file, and not this project as a
2050 + * a) This library is free software; you can redistribute it and/or
2051 + * modify it under the terms of the GNU General Public License as
2052 + * published by the Free Software Foundation; either version 2 of the
2053 + * License, or (at your option) any later version.
2055 + * This library is distributed in the hope that it will be useful,
2056 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2057 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2058 + * GNU General Public License for more details.
2060 + * Or, alternatively,
2062 + * b) Permission is hereby granted, free of charge, to any person
2063 + * obtaining a copy of this software and associated documentation
2064 + * files (the "Software"), to deal in the Software without
2065 + * restriction, including without limitation the rights to use,
2066 + * copy, modify, merge, publish, distribute, sublicense, and/or
2067 + * sell copies of the Software, and to permit persons to whom the
2068 + * Software is furnished to do so, subject to the following
2071 + * The above copyright notice and this permission notice shall be
2072 + * included in all copies or substantial portions of the Software.
2074 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2075 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2076 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2077 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2078 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2079 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2080 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2081 + * OTHER DEALINGS IN THE SOFTWARE.
2084 +#include "fsl-ls1043a-rdb.dts"
2087 + compatible = "fsl,bman-fbpr";
2088 + alloc-ranges = <0 0 0x10000 0>;
2091 + compatible = "fsl,qman-fqd";
2092 + alloc-ranges = <0 0 0x10000 0>;
2095 + compatible = "fsl,qman-pfdr";
2096 + alloc-ranges = <0 0 0x10000 0>;
2100 +#include "qoriq-dpaa-eth.dtsi"
2101 +#include "qoriq-fman3-0-6oh.dtsi"
2105 + compatible = "fsl,fman", "simple-bus";
2107 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2108 new file mode 100644
2109 index 00000000..4e46a0a5
2111 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
2114 + * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2116 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2118 + * This file is licensed under the terms of the GNU General Public
2119 + * License version 2. This program is licensed "as is" without any
2120 + * warranty of any kind, whether express or implied.
2123 +#include "fsl-ls1043a-rdb-sdk.dts"
2126 + bp7: buffer-pool@7 {
2127 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2129 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
2130 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
2133 + bp8: buffer-pool@8 {
2134 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2136 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
2137 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2140 + bp9: buffer-pool@9 {
2141 + compatible = "fsl,p4080-bpool", "fsl,bpool";
2143 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
2144 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
2148 + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus";
2151 + compatible = "fsl,dpa-ethernet-init";
2152 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2153 + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
2154 + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
2158 + compatible = "fsl,dpa-ethernet-init";
2159 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2160 + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
2161 + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
2165 + compatible = "fsl,dpa-ethernet-init";
2166 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2167 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
2168 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
2172 + compatible = "fsl,dpa-ethernet-init";
2173 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2174 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
2175 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
2179 + compatible = "fsl,dpa-ethernet-init";
2180 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2181 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
2182 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
2186 + compatible = "fsl,dpa-ethernet-init";
2187 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2188 + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
2189 + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
2193 + compatible = "fsl,dpa-ethernet-init";
2194 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
2195 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
2196 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
2200 + compatible = "fsl,dpa-oh";
2201 + /* Define frame queues for the OH port*/
2202 + /* <OH Rx error, OH Rx default> */
2203 + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>;
2204 + fsl,fman-oh-port = <&fman0_oh2>;
2210 + #address-cells = <2>;
2211 + #size-cells = <2>;
2214 + usdpaa_mem: usdpaa_mem {
2215 + compatible = "fsl,usdpaa-mem";
2216 + alloc-ranges = <0 0 0x10000 0>;
2217 + size = <0 0x10000000>;
2218 + alignment = <0 0x10000000>;
2224 + fman0_oh2: port@83000 {
2226 + compatible = "fsl,fman-port-oh";
2227 + reg = <0x83000 0x1000>;
2230 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2231 index d2313e05..f92ae325 100644
2232 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2233 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
2236 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2238 - * Copyright 2014-2015, Freescale Semiconductor
2239 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2241 * Mingkai Hu <Mingkai.hu@freescale.com>
2247 -/include/ "fsl-ls1043a.dtsi"
2248 +#include "fsl-ls1043a.dtsi"
2251 model = "LS1043A RDB Board";
2253 compatible = "pericom,pt7c4338";
2257 + compatible = "nxp,pcf85263";
2263 @@ -130,6 +134,38 @@
2265 spi-max-frequency = <1000000>; /* input clock */
2269 + compatible = "maxim,ds26522";
2271 + spi-max-frequency = <2000000>;
2272 + fsl,spi-cs-sck-delay = <100>;
2273 + fsl,spi-sck-cs-delay = <50>;
2277 + compatible = "maxim,ds26522";
2279 + spi-max-frequency = <2000000>;
2280 + fsl,spi-cs-sck-delay = <100>;
2281 + fsl,spi-sck-cs-delay = <50>;
2286 + ucc_hdlc: ucc@2000 {
2287 + compatible = "fsl,ucc-hdlc";
2288 + rx-clock-name = "clk8";
2289 + tx-clock-name = "clk9";
2290 + fsl,rx-sync-clock = "rsync_pin";
2291 + fsl,tx-sync-clock = "tsync_pin";
2292 + fsl,tx-timeslot-mask = <0xfffffffe>;
2293 + fsl,rx-timeslot-mask = <0xfffffffe>;
2294 + fsl,tdm-framer-type = "e1";
2296 + fsl,siram-entry-id = <0>;
2297 + fsl,tdm-interface;
2302 @@ -139,3 +175,76 @@
2307 +#include "fsl-ls1043-post.dtsi"
2311 + phy-handle = <&qsgmii_phy1>;
2312 + phy-connection-type = "qsgmii";
2316 + phy-handle = <&qsgmii_phy2>;
2317 + phy-connection-type = "qsgmii";
2321 + phy-handle = <&rgmii_phy1>;
2322 + phy-connection-type = "rgmii-txid";
2326 + phy-handle = <&rgmii_phy2>;
2327 + phy-connection-type = "rgmii-txid";
2331 + phy-handle = <&qsgmii_phy3>;
2332 + phy-connection-type = "qsgmii";
2336 + phy-handle = <&qsgmii_phy4>;
2337 + phy-connection-type = "qsgmii";
2340 + ethernet@f0000 { /* 10GEC1 */
2341 + phy-handle = <&aqr105_phy>;
2342 + phy-connection-type = "xgmii";
2346 + rgmii_phy1: ethernet-phy@1 {
2350 + rgmii_phy2: ethernet-phy@2 {
2354 + qsgmii_phy1: ethernet-phy@4 {
2358 + qsgmii_phy2: ethernet-phy@5 {
2362 + qsgmii_phy3: ethernet-phy@6 {
2366 + qsgmii_phy4: ethernet-phy@7 {
2372 + aqr105_phy: ethernet-phy@1 {
2373 + compatible = "ethernet-phy-ieee802.3-c45";
2374 + interrupts = <0 132 4>;
2379 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2380 index 97d331ec..8b27faaf 100644
2381 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2382 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
2385 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
2387 - * Copyright 2014-2015, Freescale Semiconductor
2388 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2390 * Mingkai Hu <Mingkai.hu@freescale.com>
2393 * OTHER DEALINGS IN THE SOFTWARE.
2396 +#include <dt-bindings/thermal/thermal.h>
2399 compatible = "fsl,ls1043a";
2400 interrupt-parent = <&gic>;
2401 #address-cells = <2>;
2406 + ethernet0 = &enet0;
2407 + ethernet1 = &enet1;
2408 + ethernet2 = &enet2;
2409 + ethernet3 = &enet3;
2410 + ethernet4 = &enet4;
2411 + ethernet5 = &enet5;
2412 + ethernet6 = &enet6;
2416 #address-cells = <1>;
2420 clocks = <&clockgen 1 0>;
2421 next-level-cache = <&l2>;
2422 + #cooling-cells = <2>;
2423 + cpu-idle-states = <&CPU_PH20>;
2429 clocks = <&clockgen 1 0>;
2430 next-level-cache = <&l2>;
2431 + cpu-idle-states = <&CPU_PH20>;
2437 clocks = <&clockgen 1 0>;
2438 next-level-cache = <&l2>;
2439 + cpu-idle-states = <&CPU_PH20>;
2445 clocks = <&clockgen 1 0>;
2446 next-level-cache = <&l2>;
2447 + cpu-idle-states = <&CPU_PH20>;
2451 @@ -97,12 +115,56 @@
2457 + * PSCI node is not added default, U-boot will add missing
2458 + * parts if it determines to use PSCI.
2460 + entry-method = "arm,psci";
2462 + CPU_PH20: cpu-ph20 {
2463 + compatible = "arm,idle-state";
2464 + idle-state-name = "PH20";
2465 + arm,psci-suspend-param = <0x0>;
2466 + entry-latency-us = <1000>;
2467 + exit-latency-us = <1000>;
2468 + min-residency-us = <3000>;
2473 device_type = "memory";
2474 reg = <0x0 0x80000000 0 0x80000000>;
2475 /* DRAM space 1, size: 2GiB DRAM */
2479 + #address-cells = <2>;
2480 + #size-cells = <2>;
2483 + bman_fbpr: bman-fbpr {
2484 + compatible = "shared-dma-pool";
2485 + size = <0 0x1000000>;
2486 + alignment = <0 0x1000000>;
2490 + qman_fqd: qman-fqd {
2491 + compatible = "shared-dma-pool";
2492 + size = <0 0x400000>;
2493 + alignment = <0 0x400000>;
2497 + qman_pfdr: qman-pfdr {
2498 + compatible = "shared-dma-pool";
2499 + size = <0 0x2000000>;
2500 + alignment = <0 0x2000000>;
2506 compatible = "fixed-clock";
2509 interrupts = <1 9 0xf08>;
2514 compatible = "simple-bus";
2515 #address-cells = <2>;
2517 @@ -213,13 +275,14 @@
2519 dcfg: dcfg@1ee0000 {
2520 compatible = "fsl,ls1043a-dcfg", "syscon";
2521 - reg = <0x0 0x1ee0000 0x0 0x10000>;
2522 + reg = <0x0 0x1ee0000 0x0 0x1000>;
2527 compatible = "fsl,ifc", "simple-bus";
2528 reg = <0x0 0x1530000 0x0 0x10000>;
2530 interrupts = <0 43 0x4>;
2533 @@ -255,6 +318,103 @@
2537 + tmu: tmu@1f00000 {
2538 + compatible = "fsl,qoriq-tmu";
2539 + reg = <0x0 0x1f00000 0x0 0x10000>;
2540 + interrupts = <0 33 0x4>;
2541 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
2542 + fsl,tmu-calibration = <0x00000000 0x00000026
2543 + 0x00000001 0x0000002d
2544 + 0x00000002 0x00000032
2545 + 0x00000003 0x00000039
2546 + 0x00000004 0x0000003f
2547 + 0x00000005 0x00000046
2548 + 0x00000006 0x0000004d
2549 + 0x00000007 0x00000054
2550 + 0x00000008 0x0000005a
2551 + 0x00000009 0x00000061
2552 + 0x0000000a 0x0000006a
2553 + 0x0000000b 0x00000071
2555 + 0x00010000 0x00000025
2556 + 0x00010001 0x0000002c
2557 + 0x00010002 0x00000035
2558 + 0x00010003 0x0000003d
2559 + 0x00010004 0x00000045
2560 + 0x00010005 0x0000004e
2561 + 0x00010006 0x00000057
2562 + 0x00010007 0x00000061
2563 + 0x00010008 0x0000006b
2564 + 0x00010009 0x00000076
2566 + 0x00020000 0x00000029
2567 + 0x00020001 0x00000033
2568 + 0x00020002 0x0000003d
2569 + 0x00020003 0x00000049
2570 + 0x00020004 0x00000056
2571 + 0x00020005 0x00000061
2572 + 0x00020006 0x0000006d
2574 + 0x00030000 0x00000021
2575 + 0x00030001 0x0000002a
2576 + 0x00030002 0x0000003c
2577 + 0x00030003 0x0000004e>;
2578 + #thermal-sensor-cells = <1>;
2582 + cpu_thermal: cpu-thermal {
2583 + polling-delay-passive = <1000>;
2584 + polling-delay = <5000>;
2586 + thermal-sensors = <&tmu 3>;
2589 + cpu_alert: cpu-alert {
2590 + temperature = <85000>;
2591 + hysteresis = <2000>;
2594 + cpu_crit: cpu-crit {
2595 + temperature = <95000>;
2596 + hysteresis = <2000>;
2597 + type = "critical";
2603 + trip = <&cpu_alert>;
2605 + <&cpu0 THERMAL_NO_LIMIT
2606 + THERMAL_NO_LIMIT>;
2612 + qman: qman@1880000 {
2613 + compatible = "fsl,qman";
2614 + reg = <0x00 0x1880000 0x0 0x10000>;
2615 + interrupts = <0 45 0x4>;
2616 + memory-region = <&qman_fqd &qman_pfdr>;
2619 + bman: bman@1890000 {
2620 + compatible = "fsl,bman";
2621 + reg = <0x00 0x1890000 0x0 0x10000>;
2622 + interrupts = <0 45 0x4>;
2623 + memory-region = <&bman_fbpr>;
2626 + bportals: bman-portals@508000000 {
2627 + ranges = <0x0 0x5 0x08000000 0x8000000>;
2630 + qportals: qman-portals@500000000 {
2631 + ranges = <0x0 0x5 0x00000000 0x8000000>;
2634 dspi0: dspi@2100000 {
2635 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
2636 #address-cells = <1>;
2637 @@ -396,6 +556,72 @@
2638 #interrupt-cells = <2>;
2641 + uqe: uqe@2400000 {
2642 + #address-cells = <1>;
2643 + #size-cells = <1>;
2644 + device_type = "qe";
2645 + compatible = "fsl,qe", "simple-bus";
2646 + ranges = <0x0 0x0 0x2400000 0x40000>;
2647 + reg = <0x0 0x2400000 0x0 0x480>;
2648 + brg-frequency = <100000000>;
2649 + bus-frequency = <200000000>;
2651 + fsl,qe-num-riscs = <1>;
2652 + fsl,qe-num-snums = <28>;
2655 + compatible = "fsl,qe-ic";
2656 + reg = <0x80 0x80>;
2657 + #address-cells = <0>;
2658 + interrupt-controller;
2659 + #interrupt-cells = <1>;
2660 + interrupts = <0 77 0x04 0 77 0x04>;
2664 + #address-cells = <1>;
2665 + #size-cells = <0>;
2666 + compatible = "fsl,ls1043-qe-si",
2667 + "fsl,t1040-qe-si";
2668 + reg = <0x700 0x80>;
2671 + siram1: siram@1000 {
2672 + #address-cells = <1>;
2673 + #size-cells = <1>;
2674 + compatible = "fsl,ls1043-qe-siram",
2675 + "fsl,t1040-qe-siram";
2676 + reg = <0x1000 0x800>;
2681 + reg = <0x2000 0x200>;
2682 + interrupts = <32>;
2683 + interrupt-parent = <&qeic>;
2688 + reg = <0x2200 0x200>;
2689 + interrupts = <34>;
2690 + interrupt-parent = <&qeic>;
2694 + #address-cells = <1>;
2695 + #size-cells = <1>;
2696 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
2697 + ranges = <0x0 0x10000 0x6000>;
2700 + compatible = "fsl,qe-muram-data",
2701 + "fsl,cpm-muram-data";
2702 + reg = <0x0 0x6000>;
2707 lpuart0: serial@2950000 {
2708 compatible = "fsl,ls1021a-lpuart";
2709 reg = <0x0 0x2950000 0x0 0x1000>;
2710 @@ -450,6 +676,16 @@
2711 status = "disabled";
2714 + ftm0: ftm0@29d0000 {
2715 + compatible = "fsl,ftm-alarm";
2716 + reg = <0x0 0x29d0000 0x0 0x10000>,
2717 + <0x0 0x1ee2140 0x0 0x4>;
2718 + reg-names = "ftm", "FlexTimer1";
2719 + interrupts = <0 86 0x4>;
2724 wdog0: wdog@2ad0000 {
2725 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
2726 reg = <0x0 0x2ad0000 0x0 0x10000>;
2729 snps,quirk-frame-length-adjustment = <0x20>;
2730 snps,dis_rxdet_inp3_quirk;
2731 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
2732 + snps,dma-snooping;
2735 usb1: usb3@3000000 {
2738 snps,quirk-frame-length-adjustment = <0x20>;
2739 snps,dis_rxdet_inp3_quirk;
2740 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
2741 + snps,dma-snooping;
2745 usb2: usb3@3100000 {
2746 @@ -500,32 +741,52 @@
2748 snps,quirk-frame-length-adjustment = <0x20>;
2749 snps,dis_rxdet_inp3_quirk;
2750 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
2751 + snps,dma-snooping;
2755 sata: sata@3200000 {
2756 compatible = "fsl,ls1043a-ahci";
2757 - reg = <0x0 0x3200000 0x0 0x10000>;
2758 + reg = <0x0 0x3200000 0x0 0x10000>,
2759 + <0x0 0x20140520 0x0 0x4>;
2760 + reg-names = "ahci", "sata-ecc";
2761 interrupts = <0 69 0x4>;
2762 clocks = <&clockgen 4 0>;
2766 + qdma: qdma@8380000 {
2767 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
2768 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
2769 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
2770 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
2771 + interrupts = <0 152 0x4>,
2773 + interrupt-names = "qdma-error", "qdma-queue";
2776 + status-sizes = <64>;
2777 + queue-sizes = <64 64>;
2781 msi1: msi-controller1@1571000 {
2782 - compatible = "fsl,1s1043a-msi";
2783 + compatible = "fsl,ls1043a-msi";
2784 reg = <0x0 0x1571000 0x0 0x8>;
2786 interrupts = <0 116 0x4>;
2789 msi2: msi-controller2@1572000 {
2790 - compatible = "fsl,1s1043a-msi";
2791 + compatible = "fsl,ls1043a-msi";
2792 reg = <0x0 0x1572000 0x0 0x8>;
2794 interrupts = <0 126 0x4>;
2797 msi3: msi-controller3@1573000 {
2798 - compatible = "fsl,1s1043a-msi";
2799 + compatible = "fsl,ls1043a-msi";
2800 reg = <0x0 0x1573000 0x0 0x8>;
2802 interrupts = <0 160 0x4>;
2804 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
2805 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
2806 reg-names = "regs", "config";
2807 - interrupts = <0 118 0x4>, /* controller interrupt */
2808 - <0 117 0x4>; /* PME interrupt */
2809 - interrupt-names = "intr", "pme";
2810 + interrupts = <0 117 0x4>, /* PME interrupt */
2811 + <0 118 0x4>; /* aer interrupt */
2812 + interrupt-names = "pme", "aer";
2813 #address-cells = <3>;
2815 device_type = "pci";
2817 bus-range = <0x0 0xff>;
2818 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
2819 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
2820 - msi-parent = <&msi1>;
2821 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
2822 #interrupt-cells = <1>;
2823 interrupt-map-mask = <0 0 0 7>;
2824 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
2826 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
2827 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
2828 reg-names = "regs", "config";
2829 - interrupts = <0 128 0x4>,
2831 - interrupt-names = "intr", "pme";
2832 + interrupts = <0 127 0x4>,
2834 + interrupt-names = "pme", "aer";
2835 #address-cells = <3>;
2837 device_type = "pci";
2839 bus-range = <0x0 0xff>;
2840 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
2841 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
2842 - msi-parent = <&msi2>;
2843 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
2844 #interrupt-cells = <1>;
2845 interrupt-map-mask = <0 0 0 7>;
2846 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
2848 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
2849 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
2850 reg-names = "regs", "config";
2851 - interrupts = <0 162 0x4>,
2853 - interrupt-names = "intr", "pme";
2854 + interrupts = <0 161 0x4>,
2856 + interrupt-names = "pme", "aer";
2857 #address-cells = <3>;
2859 device_type = "pci";
2861 bus-range = <0x0 0xff>;
2862 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
2863 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
2864 - msi-parent = <&msi3>;
2865 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
2866 #interrupt-cells = <1>;
2867 interrupt-map-mask = <0 0 0 7>;
2868 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
2874 +#include "qoriq-qman1-portals.dtsi"
2875 +#include "qoriq-bman1-portals.dtsi"
2876 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
2877 new file mode 100644
2878 index 00000000..f5017dba
2880 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
2883 + * QorIQ FMan v3 device tree nodes for ls1046
2885 + * Copyright 2015-2016 Freescale Semiconductor Inc.
2887 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2892 +/* include used FMan blocks */
2893 +#include "qoriq-fman3-0.dtsi"
2894 +#include "qoriq-fman3-0-1g-0.dtsi"
2895 +#include "qoriq-fman3-0-1g-1.dtsi"
2896 +#include "qoriq-fman3-0-1g-2.dtsi"
2897 +#include "qoriq-fman3-0-1g-3.dtsi"
2898 +#include "qoriq-fman3-0-1g-4.dtsi"
2899 +#include "qoriq-fman3-0-1g-5.dtsi"
2900 +#include "qoriq-fman3-0-10g-0.dtsi"
2901 +#include "qoriq-fman3-0-10g-1.dtsi"
2905 + /* these aliases provide the FMan ports mapping */
2906 + enet0: ethernet@e0000 {
2909 + enet1: ethernet@e2000 {
2912 + enet2: ethernet@e4000 {
2915 + enet3: ethernet@e6000 {
2918 + enet4: ethernet@e8000 {
2921 + enet5: ethernet@ea000 {
2924 + enet6: ethernet@f0000 {
2927 + enet7: ethernet@f2000 {
2930 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
2931 new file mode 100644
2932 index 00000000..c375af47
2934 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
2937 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
2939 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
2941 + * Mingkai Hu <Mingkai.hu@freescale.com>
2943 + * This file is dual-licensed: you can use it either under the terms
2944 + * of the GPLv2 or the X11 license, at your option. Note that this dual
2945 + * licensing only applies to this file, and not this project as a
2948 + * a) This library is free software; you can redistribute it and/or
2949 + * modify it under the terms of the GNU General Public License as
2950 + * published by the Free Software Foundation; either version 2 of the
2951 + * License, or (at your option) any later version.
2953 + * This library is distributed in the hope that it will be useful,
2954 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2955 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2956 + * GNU General Public License for more details.
2958 + * Or, alternatively,
2960 + * b) Permission is hereby granted, free of charge, to any person
2961 + * obtaining a copy of this software and associated documentation
2962 + * files (the "Software"), to deal in the Software without
2963 + * restriction, including without limitation the rights to use,
2964 + * copy, modify, merge, publish, distribute, sublicense, and/or
2965 + * sell copies of the Software, and to permit persons to whom the
2966 + * Software is furnished to do so, subject to the following
2969 + * The above copyright notice and this permission notice shall be
2970 + * included in all copies or substantial portions of the Software.
2972 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2973 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
2974 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2975 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
2976 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
2977 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2978 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2979 + * OTHER DEALINGS IN THE SOFTWARE.
2982 +#include "fsl-ls1046a-qds.dts"
2985 + compatible = "fsl,bman-fbpr";
2986 + alloc-ranges = <0 0 0x10000 0>;
2989 + compatible = "fsl,qman-fqd";
2990 + alloc-ranges = <0 0 0x10000 0>;
2993 + compatible = "fsl,qman-pfdr";
2994 + alloc-ranges = <0 0 0x10000 0>;
2998 +#include "qoriq-dpaa-eth.dtsi"
2999 +#include "qoriq-fman3-0-6oh.dtsi"
3004 + compatible = "fsl,dpa-ethernet";
3005 + fsl,fman-mac = <&enet7>;
3010 + compatible = "fsl,fman", "simple-bus";
3018 + #address-cells = <1>;
3019 + #size-cells = <1>;
3020 + compatible = "n25q128a11", "jedec,spi-nor";
3022 + spi-max-frequency = <10000000>;
3026 + #address-cells = <1>;
3027 + #size-cells = <1>;
3028 + compatible = "sst25wf040b", "jedec,spi-nor";
3032 + spi-max-frequency = <10000000>;
3036 + #address-cells = <1>;
3037 + #size-cells = <1>;
3038 + compatible = "en25s64", "jedec,spi-nor";
3042 + spi-max-frequency = <10000000>;
3045 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3046 new file mode 100644
3047 index 00000000..3b8e9b7e
3049 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
3052 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3054 + * Copyright 2016 Freescale Semiconductor, Inc.
3056 + * Shaohui Xie <Shaohui.Xie@nxp.com>
3058 + * This file is dual-licensed: you can use it either under the terms
3059 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3060 + * licensing only applies to this file, and not this project as a
3063 + * a) This library is free software; you can redistribute it and/or
3064 + * modify it under the terms of the GNU General Public License as
3065 + * published by the Free Software Foundation; either version 2 of the
3066 + * License, or (at your option) any later version.
3068 + * This library is distributed in the hope that it will be useful,
3069 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3070 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3071 + * GNU General Public License for more details.
3073 + * Or, alternatively,
3075 + * b) Permission is hereby granted, free of charge, to any person
3076 + * obtaining a copy of this software and associated documentation
3077 + * files (the "Software"), to deal in the Software without
3078 + * restriction, including without limitation the rights to use,
3079 + * copy, modify, merge, publish, distribute, sublicense, and/or
3080 + * sell copies of the Software, and to permit persons to whom the
3081 + * Software is furnished to do so, subject to the following
3084 + * The above copyright notice and this permission notice shall be
3085 + * included in all copies or substantial portions of the Software.
3087 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3088 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3089 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3090 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3091 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3092 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3093 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3094 + * OTHER DEALINGS IN THE SOFTWARE.
3099 +#include "fsl-ls1046a.dtsi"
3102 + model = "LS1046A QDS Board";
3103 + compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
3110 + serial0 = &duart0;
3111 + serial1 = &duart1;
3112 + serial2 = &duart2;
3113 + serial3 = &duart3;
3115 + emi1_slot1 = &ls1046mdio_s1;
3116 + emi1_slot2 = &ls1046mdio_s2;
3117 + emi1_slot4 = &ls1046mdio_s4;
3119 + sgmii_s1_p1 = &sgmii_phy_s1_p1;
3120 + sgmii_s1_p2 = &sgmii_phy_s1_p2;
3121 + sgmii_s1_p3 = &sgmii_phy_s1_p3;
3122 + sgmii_s1_p4 = &sgmii_phy_s1_p4;
3123 + sgmii_s4_p1 = &sgmii_phy_s4_p1;
3124 + qsgmii_s2_p1 = &qsgmii_phy_s2_p1;
3125 + qsgmii_s2_p2 = &qsgmii_phy_s2_p2;
3126 + qsgmii_s2_p3 = &qsgmii_phy_s2_p3;
3127 + qsgmii_s2_p4 = &qsgmii_phy_s2_p4;
3131 + stdout-path = "serial0:115200n8";
3140 + #address-cells = <1>;
3141 + #size-cells = <1>;
3142 + compatible = "n25q128a11", "jedec,spi-nor";
3144 + spi-max-frequency = <10000000>;
3148 + #address-cells = <1>;
3149 + #size-cells = <1>;
3150 + compatible = "sst25wf040b", "jedec,spi-nor";
3154 + spi-max-frequency = <10000000>;
3158 + #address-cells = <1>;
3159 + #size-cells = <1>;
3160 + compatible = "en25s64", "jedec,spi-nor";
3164 + spi-max-frequency = <10000000>;
3180 + compatible = "nxp,pca9547";
3182 + #address-cells = <1>;
3183 + #size-cells = <0>;
3186 + #address-cells = <1>;
3187 + #size-cells = <0>;
3191 + compatible = "ti,ina220";
3193 + shunt-resistor = <1000>;
3197 + compatible = "ti,ina220";
3199 + shunt-resistor = <1000>;
3204 + #address-cells = <1>;
3205 + #size-cells = <0>;
3209 + compatible = "nxp,pcf2129";
3212 + interrupts = <0 150 0x4>;
3216 + compatible = "atmel,24c512";
3221 + compatible = "atmel,24c512";
3226 + compatible = "adi,adt7461a";
3234 + #address-cells = <2>;
3235 + #size-cells = <1>;
3236 + /* NOR, NAND Flashes and FPGA on board */
3237 + ranges = <0x0 0x0 0x0 0x60000000 0x08000000
3238 + 0x1 0x0 0x0 0x7e800000 0x00010000
3239 + 0x2 0x0 0x0 0x7fb00000 0x00000100>;
3243 + compatible = "cfi-flash";
3244 + reg = <0x0 0x0 0x8000000>;
3246 + device-width = <1>;
3250 + compatible = "fsl,ifc-nand";
3251 + reg = <0x1 0x0 0x10000>;
3254 + fpga: board-control@2,0 {
3255 + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-bus";
3256 + reg = <0x2 0x0 0x0000100>;
3257 + ranges = <0 2 0 0x100>;
3270 + qflash0: s25fl128s@0 {
3271 + compatible = "spansion,m25p80";
3272 + #address-cells = <1>;
3273 + #size-cells = <1>;
3274 + spi-max-frequency = <20000000>;
3279 +#include "fsl-ls1046-post.dtsi"
3283 + phy-handle = <&qsgmii_phy_s2_p1>;
3284 + phy-connection-type = "sgmii";
3288 + phy-handle = <&sgmii_phy_s4_p1>;
3289 + phy-connection-type = "sgmii";
3293 + phy-handle = <&rgmii_phy1>;
3294 + phy-connection-type = "rgmii";
3298 + phy-handle = <&rgmii_phy2>;
3299 + phy-connection-type = "rgmii";
3303 + phy-handle = <&sgmii_phy_s1_p3>;
3304 + phy-connection-type = "sgmii";
3308 + phy-handle = <&sgmii_phy_s1_p4>;
3309 + phy-connection-type = "sgmii";
3312 + ethernet@f0000 { /* DTSEC9/10GEC1 */
3313 + phy-handle = <&sgmii_phy_s1_p1>;
3314 + phy-connection-type = "xgmii";
3317 + ethernet@f2000 { /* DTSEC10/10GEC2 */
3318 + phy-handle = <&sgmii_phy_s1_p2>;
3319 + phy-connection-type = "xgmii";
3324 + #address-cells = <1>;
3325 + #size-cells = <1>;
3327 + compatible = "mdio-mux-mmioreg", "mdio-mux";
3328 + mdio-parent-bus = <&mdio0>;
3329 + #address-cells = <1>;
3330 + #size-cells = <0>;
3331 + reg = <0x54 1>; /* BRDCFG4 */
3332 + mux-mask = <0xe0>; /* EMI1 */
3334 + /* On-board RGMII1 PHY */
3335 + ls1046mdio0: mdio@0 {
3337 + #address-cells = <1>;
3338 + #size-cells = <0>;
3340 + rgmii_phy1: ethernet-phy@1 { /* MAC3 */
3345 + /* On-board RGMII2 PHY */
3346 + ls1046mdio1: mdio@1 {
3348 + #address-cells = <1>;
3349 + #size-cells = <0>;
3351 + rgmii_phy2: ethernet-phy@2 { /* MAC4 */
3357 + ls1046mdio_s1: mdio@2 {
3359 + #address-cells = <1>;
3360 + #size-cells = <0>;
3361 + status = "disabled";
3363 + sgmii_phy_s1_p1: ethernet-phy@1c {
3367 + sgmii_phy_s1_p2: ethernet-phy@1d {
3371 + sgmii_phy_s1_p3: ethernet-phy@1e {
3375 + sgmii_phy_s1_p4: ethernet-phy@1f {
3381 + ls1046mdio_s2: mdio@3 {
3383 + #address-cells = <1>;
3384 + #size-cells = <0>;
3385 + status = "disabled";
3387 + qsgmii_phy_s2_p1: ethernet-phy@8 {
3390 + qsgmii_phy_s2_p2: ethernet-phy@9 {
3393 + qsgmii_phy_s2_p3: ethernet-phy@a {
3396 + qsgmii_phy_s2_p4: ethernet-phy@b {
3402 + ls1046mdio_s4: mdio@5 {
3404 + #address-cells = <1>;
3405 + #size-cells = <0>;
3406 + status = "disabled";
3408 + sgmii_phy_s4_p1: ethernet-phy@1c {
3414 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
3415 new file mode 100644
3416 index 00000000..bfe2f36c
3418 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
3421 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3423 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
3425 + * Mingkai Hu <Mingkai.hu@freescale.com>
3427 + * This file is dual-licensed: you can use it either under the terms
3428 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3429 + * licensing only applies to this file, and not this project as a
3432 + * a) This library is free software; you can redistribute it and/or
3433 + * modify it under the terms of the GNU General Public License as
3434 + * published by the Free Software Foundation; either version 2 of the
3435 + * License, or (at your option) any later version.
3437 + * This library is distributed in the hope that it will be useful,
3438 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3439 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3440 + * GNU General Public License for more details.
3442 + * Or, alternatively,
3444 + * b) Permission is hereby granted, free of charge, to any person
3445 + * obtaining a copy of this software and associated documentation
3446 + * files (the "Software"), to deal in the Software without
3447 + * restriction, including without limitation the rights to use,
3448 + * copy, modify, merge, publish, distribute, sublicense, and/or
3449 + * sell copies of the Software, and to permit persons to whom the
3450 + * Software is furnished to do so, subject to the following
3453 + * The above copyright notice and this permission notice shall be
3454 + * included in all copies or substantial portions of the Software.
3456 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3457 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3458 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3459 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3460 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3461 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3462 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3463 + * OTHER DEALINGS IN THE SOFTWARE.
3466 +#include "fsl-ls1046a-rdb.dts"
3469 + compatible = "fsl,bman-fbpr";
3470 + alloc-ranges = <0 0 0x10000 0>;
3473 + compatible = "fsl,qman-fqd";
3474 + alloc-ranges = <0 0 0x10000 0>;
3477 + compatible = "fsl,qman-pfdr";
3478 + alloc-ranges = <0 0 0x10000 0>;
3482 +#include "qoriq-dpaa-eth.dtsi"
3483 +#include "qoriq-fman3-0-6oh.dtsi"
3488 + compatible = "fsl,dpa-ethernet";
3489 + fsl,fman-mac = <&enet7>;
3494 + compatible = "fsl,fman", "simple-bus";
3496 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
3497 new file mode 100644
3498 index 00000000..54336aa6
3500 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
3503 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3505 + * Copyright 2016 Freescale Semiconductor, Inc.
3507 + * This file is licensed under the terms of the GNU General Public
3508 + * License version 2. This program is licensed "as is" without any
3509 + * warranty of any kind, whether express or implied.
3512 +#include "fsl-ls1046a-rdb-sdk.dts"
3515 + bp7: buffer-pool@7 {
3516 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
3518 + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
3519 + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
3522 + bp8: buffer-pool@8 {
3523 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
3525 + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
3526 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
3529 + bp9: buffer-pool@9 {
3530 + compatible = "fsl,ls1046a-bpool", "fsl,bpool";
3532 + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
3533 + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
3537 + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
3540 + compatible = "fsl,dpa-ethernet-init";
3541 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3542 + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
3543 + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
3547 + compatible = "fsl,dpa-ethernet-init";
3548 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3549 + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
3550 + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
3554 + compatible = "fsl,dpa-ethernet-init";
3555 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3556 + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
3557 + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>;
3561 + compatible = "fsl,dpa-ethernet-init";
3562 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3563 + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
3564 + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
3568 + compatible = "fsl,dpa-ethernet-init";
3569 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3570 + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
3571 + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
3575 + compatible = "fsl,dpa-ethernet-init";
3576 + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
3577 + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
3578 + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
3582 + compatible = "fsl,dpa-oh";
3583 + /* Define frame queues for the OH port*/
3584 + /* <OH Rx error, OH Rx default> */
3585 + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
3586 + fsl,fman-oh-port = <&fman0_oh2>;
3592 + #address-cells = <2>;
3593 + #size-cells = <2>;
3596 + usdpaa_mem: usdpaa_mem {
3597 + compatible = "fsl,usdpaa-mem";
3598 + alloc-ranges = <0 0 0x10000 0>;
3599 + size = <0 0x10000000>;
3600 + alignment = <0 0x10000000>;
3606 + fman0_oh2: port@83000 {
3608 + compatible = "fsl,fman-port-oh";
3609 + reg = <0x83000 0x1000>;
3612 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
3613 new file mode 100644
3614 index 00000000..be9b62ca
3616 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
3619 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3621 + * Copyright 2016 Freescale Semiconductor, Inc.
3623 + * Mingkai Hu <mingkai.hu@nxp.com>
3625 + * This file is dual-licensed: you can use it either under the terms
3626 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3627 + * licensing only applies to this file, and not this project as a
3630 + * a) This library is free software; you can redistribute it and/or
3631 + * modify it under the terms of the GNU General Public License as
3632 + * published by the Free Software Foundation; either version 2 of the
3633 + * License, or (at your option) any later version.
3635 + * This library is distributed in the hope that it will be useful,
3636 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3637 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3638 + * GNU General Public License for more details.
3640 + * Or, alternatively,
3642 + * b) Permission is hereby granted, free of charge, to any person
3643 + * obtaining a copy of this software and associated documentation
3644 + * files (the "Software"), to deal in the Software without
3645 + * restriction, including without limitation the rights to use,
3646 + * copy, modify, merge, publish, distribute, sublicense, and/or
3647 + * sell copies of the Software, and to permit persons to whom the
3648 + * Software is furnished to do so, subject to the following
3651 + * The above copyright notice and this permission notice shall be
3652 + * included in all copies or substantial portions of the Software.
3654 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3655 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3656 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3657 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3658 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3659 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3660 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3661 + * OTHER DEALINGS IN THE SOFTWARE.
3666 +#include "fsl-ls1046a.dtsi"
3669 + model = "LS1046A RDB Board";
3670 + compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
3673 + serial0 = &duart0;
3674 + serial1 = &duart1;
3675 + serial2 = &duart2;
3676 + serial3 = &duart3;
3680 + stdout-path = "serial0:115200n8";
3704 + compatible = "ti,ina220";
3706 + shunt-resistor = <1000>;
3710 + compatible = "adi,adt7461";
3715 + compatible = "atmel,24c512";
3720 + compatible = "atmel,24c512";
3729 + compatible = "nxp,pcf2129";
3735 + #address-cells = <2>;
3736 + #size-cells = <1>;
3737 + /* NAND Flashe and CPLD on board */
3738 + ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
3739 + 0x2 0x0 0x0 0x7fb00000 0x00000100>;
3743 + compatible = "fsl,ifc-nand";
3744 + #address-cells = <1>;
3745 + #size-cells = <1>;
3746 + reg = <0x0 0x0 0x10000>;
3749 + cpld: board-control@2,0 {
3750 + compatible = "fsl,ls1046ardb-cpld";
3751 + reg = <0x2 0x0 0x0000100>;
3760 + qflash0: s25fs512s@0 {
3761 + compatible = "spansion,m25p80";
3762 + #address-cells = <1>;
3763 + #size-cells = <1>;
3764 + spi-max-frequency = <20000000>;
3768 + qflash1: s25fs512s@1 {
3769 + compatible = "spansion,m25p80";
3770 + #address-cells = <1>;
3771 + #size-cells = <1>;
3772 + spi-max-frequency = <20000000>;
3777 +#include "fsl-ls1046-post.dtsi"
3781 + phy-handle = <&rgmii_phy1>;
3782 + phy-connection-type = "rgmii";
3786 + phy-handle = <&rgmii_phy2>;
3787 + phy-connection-type = "rgmii";
3791 + phy-handle = <&sgmii_phy1>;
3792 + phy-connection-type = "sgmii";
3796 + phy-handle = <&sgmii_phy2>;
3797 + phy-connection-type = "sgmii";
3800 + ethernet@f0000 { /* 10GEC1 */
3801 + phy-handle = <&aqr106_phy>;
3802 + phy-connection-type = "xgmii";
3805 + ethernet@f2000 { /* 10GEC2 */
3806 + fixed-link = <0 1 1000 0 0>;
3807 + phy-connection-type = "xgmii";
3811 + rgmii_phy1: ethernet-phy@1 {
3815 + rgmii_phy2: ethernet-phy@2 {
3819 + sgmii_phy1: ethernet-phy@3 {
3823 + sgmii_phy2: ethernet-phy@4 {
3829 + aqr106_phy: ethernet-phy@0 {
3830 + compatible = "ethernet-phy-ieee802.3-c45";
3831 + interrupts = <0 131 4>;
3836 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
3837 new file mode 100644
3838 index 00000000..6b87266f
3840 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
3843 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
3845 + * Copyright 2016 Freescale Semiconductor, Inc.
3847 + * Mingkai Hu <mingkai.hu@nxp.com>
3849 + * This file is dual-licensed: you can use it either under the terms
3850 + * of the GPLv2 or the X11 license, at your option. Note that this dual
3851 + * licensing only applies to this file, and not this project as a
3854 + * a) This library is free software; you can redistribute it and/or
3855 + * modify it under the terms of the GNU General Public License as
3856 + * published by the Free Software Foundation; either version 2 of the
3857 + * License, or (at your option) any later version.
3859 + * This library is distributed in the hope that it will be useful,
3860 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3861 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3862 + * GNU General Public License for more details.
3864 + * Or, alternatively,
3866 + * b) Permission is hereby granted, free of charge, to any person
3867 + * obtaining a copy of this software and associated documentation
3868 + * files (the "Software"), to deal in the Software without
3869 + * restriction, including without limitation the rights to use,
3870 + * copy, modify, merge, publish, distribute, sublicense, and/or
3871 + * sell copies of the Software, and to permit persons to whom the
3872 + * Software is furnished to do so, subject to the following
3875 + * The above copyright notice and this permission notice shall be
3876 + * included in all copies or substantial portions of the Software.
3878 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3879 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3880 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3881 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3882 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3883 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3884 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3885 + * OTHER DEALINGS IN THE SOFTWARE.
3888 +#include <dt-bindings/interrupt-controller/arm-gic.h>
3889 +#include <dt-bindings/thermal/thermal.h>
3892 + compatible = "fsl,ls1046a";
3893 + interrupt-parent = <&gic>;
3894 + #address-cells = <2>;
3895 + #size-cells = <2>;
3900 + ethernet0 = &enet0;
3901 + ethernet1 = &enet1;
3902 + ethernet2 = &enet2;
3903 + ethernet3 = &enet3;
3904 + ethernet4 = &enet4;
3905 + ethernet5 = &enet5;
3906 + ethernet6 = &enet6;
3907 + ethernet7 = &enet7;
3911 + #address-cells = <1>;
3912 + #size-cells = <0>;
3915 + device_type = "cpu";
3916 + compatible = "arm,cortex-a72";
3918 + clocks = <&clockgen 1 0>;
3919 + next-level-cache = <&l2>;
3920 + cpu-idle-states = <&CPU_PH20>;
3921 + #cooling-cells = <2>;
3925 + device_type = "cpu";
3926 + compatible = "arm,cortex-a72";
3928 + clocks = <&clockgen 1 0>;
3929 + next-level-cache = <&l2>;
3930 + cpu-idle-states = <&CPU_PH20>;
3934 + device_type = "cpu";
3935 + compatible = "arm,cortex-a72";
3937 + clocks = <&clockgen 1 0>;
3938 + next-level-cache = <&l2>;
3939 + cpu-idle-states = <&CPU_PH20>;
3943 + device_type = "cpu";
3944 + compatible = "arm,cortex-a72";
3946 + clocks = <&clockgen 1 0>;
3947 + next-level-cache = <&l2>;
3948 + cpu-idle-states = <&CPU_PH20>;
3952 + compatible = "cache";
3958 + * PSCI node is not added default, U-boot will add missing
3959 + * parts if it determines to use PSCI.
3961 + entry-method = "arm,psci";
3963 + CPU_PH20: cpu-ph20 {
3964 + compatible = "arm,idle-state";
3965 + idle-state-name = "PH20";
3966 + arm,psci-suspend-param = <0x0>;
3967 + entry-latency-us = <1000>;
3968 + exit-latency-us = <1000>;
3969 + min-residency-us = <3000>;
3974 + device_type = "memory";
3978 + compatible = "fixed-clock";
3979 + #clock-cells = <0>;
3980 + clock-frequency = <100000000>;
3981 + clock-output-names = "sysclk";
3985 + compatible ="syscon-reboot";
3992 + compatible = "arm,armv8-timer";
3993 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xf) |
3994 + IRQ_TYPE_LEVEL_LOW)>,
3995 + <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xf) |
3996 + IRQ_TYPE_LEVEL_LOW)>,
3997 + <GIC_PPI 11 (GIC_CPU_MASK_RAW(0xf) |
3998 + IRQ_TYPE_LEVEL_LOW)>,
3999 + <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xf) |
4000 + IRQ_TYPE_LEVEL_LOW)>;
4004 + compatible = "arm,cortex-a72-pmu";
4005 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
4006 + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
4007 + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
4008 + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
4009 + interrupt-affinity = <&cpu0>,
4015 + gic: interrupt-controller@1400000 {
4016 + compatible = "arm,gic-400";
4017 + #interrupt-cells = <3>;
4018 + interrupt-controller;
4019 + reg = <0x0 0x1410000 0 0x10000>, /* GICD */
4020 + <0x0 0x1420000 0 0x20000>, /* GICC */
4021 + <0x0 0x1440000 0 0x20000>, /* GICH */
4022 + <0x0 0x1460000 0 0x20000>; /* GICV */
4023 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
4024 + IRQ_TYPE_LEVEL_LOW)>;
4028 + compatible = "simple-bus";
4029 + #address-cells = <2>;
4030 + #size-cells = <2>;
4033 + ddr: memory-controller@1080000 {
4034 + compatible = "fsl,qoriq-memory-controller";
4035 + reg = <0x0 0x1080000 0x0 0x1000>;
4036 + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
4040 + ifc: ifc@1530000 {
4041 + compatible = "fsl,ifc", "simple-bus";
4042 + reg = <0x0 0x1530000 0x0 0x10000>;
4044 + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
4047 + qspi: quadspi@1550000 {
4048 + compatible = "fsl,ls1021a-qspi";
4049 + #address-cells = <1>;
4050 + #size-cells = <0>;
4051 + reg = <0x0 0x1550000 0x0 0x10000>,
4052 + <0x0 0x40000000 0x0 0x10000000>;
4053 + reg-names = "QuadSPI", "QuadSPI-memory";
4054 + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
4055 + clock-names = "qspi_en", "qspi";
4056 + clocks = <&clockgen 4 1>, <&clockgen 4 1>;
4058 + fsl,qspi-has-second-chip;
4059 + status = "disabled";
4062 + esdhc: esdhc@1560000 {
4063 + compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
4064 + reg = <0x0 0x1560000 0x0 0x10000>;
4065 + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
4066 + clocks = <&clockgen 2 1>;
4067 + voltage-ranges = <1800 1800 3300 3300>;
4073 + scfg: scfg@1570000 {
4074 + compatible = "fsl,ls1046a-scfg", "syscon";
4075 + reg = <0x0 0x1570000 0x0 0x10000>;
4079 + crypto: crypto@1700000 {
4080 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
4082 + fsl,sec-era = <8>;
4083 + #address-cells = <1>;
4084 + #size-cells = <1>;
4085 + ranges = <0x0 0x00 0x1700000 0x100000>;
4086 + reg = <0x00 0x1700000 0x0 0x100000>;
4087 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
4089 + sec_jr0: jr@10000 {
4090 + compatible = "fsl,sec-v5.4-job-ring",
4091 + "fsl,sec-v5.0-job-ring",
4092 + "fsl,sec-v4.0-job-ring";
4093 + reg = <0x10000 0x10000>;
4094 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
4097 + sec_jr1: jr@20000 {
4098 + compatible = "fsl,sec-v5.4-job-ring",
4099 + "fsl,sec-v5.0-job-ring",
4100 + "fsl,sec-v4.0-job-ring";
4101 + reg = <0x20000 0x10000>;
4102 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
4105 + sec_jr2: jr@30000 {
4106 + compatible = "fsl,sec-v5.4-job-ring",
4107 + "fsl,sec-v5.0-job-ring",
4108 + "fsl,sec-v4.0-job-ring";
4109 + reg = <0x30000 0x10000>;
4110 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
4113 + sec_jr3: jr@40000 {
4114 + compatible = "fsl,sec-v5.4-job-ring",
4115 + "fsl,sec-v5.0-job-ring",
4116 + "fsl,sec-v4.0-job-ring";
4117 + reg = <0x40000 0x10000>;
4118 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
4122 + qman: qman@1880000 {
4123 + compatible = "fsl,qman";
4124 + reg = <0x00 0x1880000 0x0 0x10000>;
4125 + interrupts = <0 45 0x4>;
4126 + memory-region = <&qman_fqd &qman_pfdr>;
4130 + bman: bman@1890000 {
4131 + compatible = "fsl,bman";
4132 + reg = <0x00 0x1890000 0x0 0x10000>;
4133 + interrupts = <0 45 0x4>;
4134 + memory-region = <&bman_fbpr>;
4138 + qportals: qman-portals@500000000 {
4139 + ranges = <0x0 0x5 0x00000000 0x8000000>;
4142 + bportals: bman-portals@508000000 {
4143 + ranges = <0x0 0x5 0x08000000 0x8000000>;
4146 + dcfg: dcfg@1ee0000 {
4147 + compatible = "fsl,ls1046a-dcfg", "syscon";
4148 + reg = <0x0 0x1ee0000 0x0 0x1000>;
4152 + clockgen: clocking@1ee1000 {
4153 + compatible = "fsl,ls1046a-clockgen";
4154 + reg = <0x0 0x1ee1000 0x0 0x1000>;
4155 + #clock-cells = <2>;
4156 + clocks = <&sysclk>;
4159 + tmu: tmu@1f00000 {
4160 + compatible = "fsl,qoriq-tmu";
4161 + reg = <0x0 0x1f00000 0x0 0x10000>;
4162 + interrupts = <0 33 0x4>;
4163 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
4164 + fsl,tmu-calibration =
4165 + /* Calibration data group 1 */
4166 + <0x00000000 0x00000026
4167 + 0x00000001 0x0000002d
4168 + 0x00000002 0x00000032
4169 + 0x00000003 0x00000039
4170 + 0x00000004 0x0000003f
4171 + 0x00000005 0x00000046
4172 + 0x00000006 0x0000004d
4173 + 0x00000007 0x00000054
4174 + 0x00000008 0x0000005a
4175 + 0x00000009 0x00000061
4176 + 0x0000000a 0x0000006a
4177 + 0x0000000b 0x00000071
4178 + /* Calibration data group 2 */
4179 + 0x00010000 0x00000025
4180 + 0x00010001 0x0000002c
4181 + 0x00010002 0x00000035
4182 + 0x00010003 0x0000003d
4183 + 0x00010004 0x00000045
4184 + 0x00010005 0x0000004e
4185 + 0x00010006 0x00000057
4186 + 0x00010007 0x00000061
4187 + 0x00010008 0x0000006b
4188 + 0x00010009 0x00000076
4189 + /* Calibration data group 3 */
4190 + 0x00020000 0x00000029
4191 + 0x00020001 0x00000033
4192 + 0x00020002 0x0000003d
4193 + 0x00020003 0x00000049
4194 + 0x00020004 0x00000056
4195 + 0x00020005 0x00000061
4196 + 0x00020006 0x0000006d
4197 + /* Calibration data group 4 */
4198 + 0x00030000 0x00000021
4199 + 0x00030001 0x0000002a
4200 + 0x00030002 0x0000003c
4201 + 0x00030003 0x0000004e>;
4203 + #thermal-sensor-cells = <1>;
4207 + cpu_thermal: cpu-thermal {
4208 + polling-delay-passive = <1000>;
4209 + polling-delay = <5000>;
4210 + thermal-sensors = <&tmu 3>;
4213 + cpu_alert: cpu-alert {
4214 + temperature = <85000>;
4215 + hysteresis = <2000>;
4219 + cpu_crit: cpu-crit {
4220 + temperature = <95000>;
4221 + hysteresis = <2000>;
4222 + type = "critical";
4228 + trip = <&cpu_alert>;
4230 + <&cpu0 THERMAL_NO_LIMIT
4231 + THERMAL_NO_LIMIT>;
4237 + dspi: dspi@2100000 {
4238 + compatible = "fsl,ls1021a-v1.0-dspi";
4239 + #address-cells = <1>;
4240 + #size-cells = <0>;
4241 + reg = <0x0 0x2100000 0x0 0x10000>;
4242 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
4243 + clock-names = "dspi";
4244 + clocks = <&clockgen 4 1>;
4245 + spi-num-chipselects = <5>;
4247 + status = "disabled";
4250 + i2c0: i2c@2180000 {
4251 + compatible = "fsl,vf610-i2c";
4252 + #address-cells = <1>;
4253 + #size-cells = <0>;
4254 + reg = <0x0 0x2180000 0x0 0x10000>;
4255 + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
4256 + clocks = <&clockgen 4 1>;
4257 + dmas = <&edma0 1 39>,
4259 + dma-names = "tx", "rx";
4260 + status = "disabled";
4263 + i2c1: i2c@2190000 {
4264 + compatible = "fsl,vf610-i2c";
4265 + #address-cells = <1>;
4266 + #size-cells = <0>;
4267 + reg = <0x0 0x2190000 0x0 0x10000>;
4268 + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
4269 + clocks = <&clockgen 4 1>;
4270 + status = "disabled";
4273 + i2c2: i2c@21a0000 {
4274 + compatible = "fsl,vf610-i2c";
4275 + #address-cells = <1>;
4276 + #size-cells = <0>;
4277 + reg = <0x0 0x21a0000 0x0 0x10000>;
4278 + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
4279 + clocks = <&clockgen 4 1>;
4280 + status = "disabled";
4283 + i2c3: i2c@21b0000 {
4284 + compatible = "fsl,vf610-i2c";
4285 + #address-cells = <1>;
4286 + #size-cells = <0>;
4287 + reg = <0x0 0x21b0000 0x0 0x10000>;
4288 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
4289 + clocks = <&clockgen 4 1>;
4290 + status = "disabled";
4293 + duart0: serial@21c0500 {
4294 + compatible = "fsl,ns16550", "ns16550a";
4295 + reg = <0x00 0x21c0500 0x0 0x100>;
4296 + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
4297 + clocks = <&clockgen 4 1>;
4300 + duart1: serial@21c0600 {
4301 + compatible = "fsl,ns16550", "ns16550a";
4302 + reg = <0x00 0x21c0600 0x0 0x100>;
4303 + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
4304 + clocks = <&clockgen 4 1>;
4307 + duart2: serial@21d0500 {
4308 + compatible = "fsl,ns16550", "ns16550a";
4309 + reg = <0x0 0x21d0500 0x0 0x100>;
4310 + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
4311 + clocks = <&clockgen 4 1>;
4314 + duart3: serial@21d0600 {
4315 + compatible = "fsl,ns16550", "ns16550a";
4316 + reg = <0x0 0x21d0600 0x0 0x100>;
4317 + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
4318 + clocks = <&clockgen 4 1>;
4321 + gpio0: gpio@2300000 {
4322 + compatible = "fsl,qoriq-gpio";
4323 + reg = <0x0 0x2300000 0x0 0x10000>;
4324 + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
4326 + #gpio-cells = <2>;
4327 + interrupt-controller;
4328 + #interrupt-cells = <2>;
4331 + gpio1: gpio@2310000 {
4332 + compatible = "fsl,qoriq-gpio";
4333 + reg = <0x0 0x2310000 0x0 0x10000>;
4334 + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
4336 + #gpio-cells = <2>;
4337 + interrupt-controller;
4338 + #interrupt-cells = <2>;
4341 + gpio2: gpio@2320000 {
4342 + compatible = "fsl,qoriq-gpio";
4343 + reg = <0x0 0x2320000 0x0 0x10000>;
4344 + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
4346 + #gpio-cells = <2>;
4347 + interrupt-controller;
4348 + #interrupt-cells = <2>;
4351 + gpio3: gpio@2330000 {
4352 + compatible = "fsl,qoriq-gpio";
4353 + reg = <0x0 0x2330000 0x0 0x10000>;
4354 + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
4356 + #gpio-cells = <2>;
4357 + interrupt-controller;
4358 + #interrupt-cells = <2>;
4361 + lpuart0: serial@2950000 {
4362 + compatible = "fsl,ls1021a-lpuart";
4363 + reg = <0x0 0x2950000 0x0 0x1000>;
4364 + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
4365 + clocks = <&clockgen 4 0>;
4366 + clock-names = "ipg";
4367 + status = "disabled";
4370 + lpuart1: serial@2960000 {
4371 + compatible = "fsl,ls1021a-lpuart";
4372 + reg = <0x0 0x2960000 0x0 0x1000>;
4373 + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
4374 + clocks = <&clockgen 4 1>;
4375 + clock-names = "ipg";
4376 + status = "disabled";
4379 + lpuart2: serial@2970000 {
4380 + compatible = "fsl,ls1021a-lpuart";
4381 + reg = <0x0 0x2970000 0x0 0x1000>;
4382 + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
4383 + clocks = <&clockgen 4 1>;
4384 + clock-names = "ipg";
4385 + status = "disabled";
4388 + lpuart3: serial@2980000 {
4389 + compatible = "fsl,ls1021a-lpuart";
4390 + reg = <0x0 0x2980000 0x0 0x1000>;
4391 + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
4392 + clocks = <&clockgen 4 1>;
4393 + clock-names = "ipg";
4394 + status = "disabled";
4397 + lpuart4: serial@2990000 {
4398 + compatible = "fsl,ls1021a-lpuart";
4399 + reg = <0x0 0x2990000 0x0 0x1000>;
4400 + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
4401 + clocks = <&clockgen 4 1>;
4402 + clock-names = "ipg";
4403 + status = "disabled";
4406 + lpuart5: serial@29a0000 {
4407 + compatible = "fsl,ls1021a-lpuart";
4408 + reg = <0x0 0x29a0000 0x0 0x1000>;
4409 + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
4410 + clocks = <&clockgen 4 1>;
4411 + clock-names = "ipg";
4412 + status = "disabled";
4415 + ftm0: ftm0@29d0000 {
4416 + compatible = "fsl,ftm-alarm";
4417 + reg = <0x0 0x29d0000 0x0 0x10000>,
4418 + <0x0 0x1ee2140 0x0 0x4>;
4419 + reg-names = "ftm", "FlexTimer1";
4420 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
4424 + wdog0: watchdog@2ad0000 {
4425 + compatible = "fsl,imx21-wdt";
4426 + reg = <0x0 0x2ad0000 0x0 0x10000>;
4427 + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
4428 + clocks = <&clockgen 4 1>;
4432 + edma0: edma@2c00000 {
4434 + compatible = "fsl,vf610-edma";
4435 + reg = <0x0 0x2c00000 0x0 0x10000>,
4436 + <0x0 0x2c10000 0x0 0x10000>,
4437 + <0x0 0x2c20000 0x0 0x10000>;
4438 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
4439 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
4440 + interrupt-names = "edma-tx", "edma-err";
4441 + dma-channels = <32>;
4443 + clock-names = "dmamux0", "dmamux1";
4444 + clocks = <&clockgen 4 1>,
4448 + usb0: usb@2f00000 {
4449 + compatible = "snps,dwc3";
4450 + reg = <0x0 0x2f00000 0x0 0x10000>;
4451 + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
4453 + snps,quirk-frame-length-adjustment = <0x20>;
4454 + snps,dis_rxdet_inp3_quirk;
4457 + usb1: usb@3000000 {
4458 + compatible = "snps,dwc3";
4459 + reg = <0x0 0x3000000 0x0 0x10000>;
4460 + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
4462 + snps,quirk-frame-length-adjustment = <0x20>;
4463 + snps,dis_rxdet_inp3_quirk;
4466 + usb2: usb@3100000 {
4467 + compatible = "snps,dwc3";
4468 + reg = <0x0 0x3100000 0x0 0x10000>;
4469 + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
4471 + snps,quirk-frame-length-adjustment = <0x20>;
4472 + snps,dis_rxdet_inp3_quirk;
4475 + sata: sata@3200000 {
4476 + compatible = "fsl,ls1046a-ahci";
4477 + reg = <0x0 0x3200000 0x0 0x10000>,
4478 + <0x0 0x20140520 0x0 0x4>;
4479 + reg-names = "ahci", "sata-ecc";
4480 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
4481 + clocks = <&clockgen 4 1>;
4485 + qdma: qdma@8380000 {
4486 + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
4487 + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
4488 + <0x0 0x8390000 0x0 0x10000>, /* Status regs */
4489 + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
4490 + interrupts = <0 153 0x4>,
4492 + interrupt-names = "qdma-error", "qdma-queue";
4495 + status-sizes = <64>;
4496 + queue-sizes = <64 64>;
4500 + msi1: msi-controller@1580000 {
4501 + compatible = "fsl,ls1046a-msi";
4503 + reg = <0x0 0x1580000 0x0 0x10000>;
4504 + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
4505 + <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
4506 + <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
4507 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
4510 + msi2: msi-controller@1590000 {
4511 + compatible = "fsl,ls1046a-msi";
4513 + reg = <0x0 0x1590000 0x0 0x10000>;
4514 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
4515 + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
4516 + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
4517 + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
4520 + msi3: msi-controller@15a0000 {
4521 + compatible = "fsl,ls1046a-msi";
4523 + reg = <0x0 0x15a0000 0x0 0x10000>;
4524 + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
4525 + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
4526 + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
4527 + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
4531 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4532 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
4533 + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
4534 + reg-names = "regs", "config";
4535 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
4536 + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
4537 + interrupt-names = "pme", "aer";
4538 + #address-cells = <3>;
4539 + #size-cells = <2>;
4540 + device_type = "pci";
4543 + bus-range = <0x0 0xff>;
4544 + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
4545 + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4546 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4547 + #interrupt-cells = <1>;
4548 + interrupt-map-mask = <0 0 0 7>;
4549 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4550 + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4551 + <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
4552 + <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
4556 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4557 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
4558 + 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
4559 + reg-names = "regs", "config";
4560 + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
4561 + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
4562 + interrupt-names = "pme", "aer";
4563 + #address-cells = <3>;
4564 + #size-cells = <2>;
4565 + device_type = "pci";
4568 + bus-range = <0x0 0xff>;
4569 + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
4570 + 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4571 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4572 + #interrupt-cells = <1>;
4573 + interrupt-map-mask = <0 0 0 7>;
4574 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4575 + <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4576 + <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
4577 + <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
4581 + compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
4582 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
4583 + 0x50 0x00000000 0x0 0x00002000>; /* configuration space */
4584 + reg-names = "regs", "config";
4585 + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
4586 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
4587 + interrupt-names = "pme", "aer";
4588 + #address-cells = <3>;
4589 + #size-cells = <2>;
4590 + device_type = "pci";
4593 + bus-range = <0x0 0xff>;
4594 + ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
4595 + 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
4596 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
4597 + #interrupt-cells = <1>;
4598 + interrupt-map-mask = <0 0 0 7>;
4599 + interrupt-map = <0000 0 0 1 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4600 + <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4601 + <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
4602 + <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
4608 + #address-cells = <2>;
4609 + #size-cells = <2>;
4612 + bman_fbpr: bman-fbpr {
4613 + compatible = "shared-dma-pool";
4614 + size = <0 0x1000000>;
4615 + alignment = <0 0x1000000>;
4618 + qman_fqd: qman-fqd {
4619 + compatible = "shared-dma-pool";
4620 + size = <0 0x800000>;
4621 + alignment = <0 0x800000>;
4624 + qman_pfdr: qman-pfdr {
4625 + compatible = "shared-dma-pool";
4626 + size = <0 0x2000000>;
4627 + alignment = <0 0x2000000>;
4633 +#include "qoriq-qman1-portals.dtsi"
4634 +#include "qoriq-bman1-portals.dtsi"
4635 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
4636 new file mode 100644
4637 index 00000000..f61ec261
4639 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
4642 + * Device Tree file for NXP LS1088A QDS Board.
4644 + * Copyright 2017 NXP
4646 + * Harninder Rai <harninder.rai@nxp.com>
4648 + * This file is dual-licensed: you can use it either under the terms
4649 + * of the GPLv2 or the X11 license, at your option. Note that this dual
4650 + * licensing only applies to this file, and not this project as a
4653 + * a) This library is free software; you can redistribute it and/or
4654 + * modify it under the terms of the GNU General Public License as
4655 + * published by the Free Software Foundation; either version 2 of the
4656 + * License, or (at your option) any later version.
4658 + * This library is distributed in the hope that it will be useful,
4659 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4660 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4661 + * GNU General Public License for more details.
4663 + * Or, alternatively,
4665 + * b) Permission is hereby granted, free of charge, to any person
4666 + * obtaining a copy of this software and associated documentation
4667 + * files (the "Software"), to deal in the Software without
4668 + * restriction, including without limitation the rights to use,
4669 + * copy, modify, merge, publish, distribute, sublicense, and/or
4670 + * sell copies of the Software, and to permit persons to whom the
4671 + * Software is furnished to do so, subject to the following
4674 + * The above copyright notice and this permission notice shall be
4675 + * included in all copies or substantial portions of the Software.
4677 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4678 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4679 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4680 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4681 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4682 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4683 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4684 + * OTHER DEALINGS IN THE SOFTWARE.
4689 +#include "fsl-ls1088a.dtsi"
4692 + model = "LS1088A QDS Board";
4693 + compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
4700 + compatible = "nxp,pca9547";
4702 + #address-cells = <1>;
4703 + #size-cells = <0>;
4706 + #address-cells = <1>;
4707 + #size-cells = <0>;
4711 + compatible = "ti,ina220";
4713 + shunt-resistor = <1000>;
4717 + compatible = "ti,ina220";
4719 + shunt-resistor = <1000>;
4724 + #address-cells = <1>;
4725 + #size-cells = <0>;
4729 + compatible = "adi,adt7461a";
4734 + compatible = "nxp,pcf2129";
4737 + interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
4741 + compatible = "atmel,24c512";
4746 + compatible = "atmel,24c512";
4755 + qflash0: s25fs512s@0 {
4756 + compatible = "spansion,m25p80";
4757 + #address-cells = <1>;
4758 + #size-cells = <1>;
4759 + spi-max-frequency = <20000000>;
4764 + qflash1: s25fs512s@1 {
4765 + compatible = "spansion,m25p80";
4766 + #address-cells = <1>;
4767 + #size-cells = <1>;
4768 + spi-max-frequency = <20000000>;
4777 + ranges = <0 0 0x5 0x80000000 0x08000000
4778 + 2 0 0x5 0x30000000 0x00010000
4779 + 3 0 0x5 0x20000000 0x00010000>;
4782 + compatible = "cfi-flash";
4783 + reg = <0x0 0x0 0x8000000>;
4785 + device-width = <1>;
4789 + compatible = "fsl,ifc-nand";
4790 + reg = <0x2 0x0 0x10000>;
4793 + fpga: board-control@3,0 {
4794 + compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
4795 + reg = <0x3 0x0 0x0000100>;
4814 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
4815 new file mode 100644
4816 index 00000000..a4cbc2d5
4818 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
4821 + * Device Tree file for NXP LS1088A RDB Board.
4823 + * Copyright 2017 NXP
4825 + * Harninder Rai <harninder.rai@nxp.com>
4827 + * This file is dual-licensed: you can use it either under the terms
4828 + * of the GPLv2 or the X11 license, at your option. Note that this dual
4829 + * licensing only applies to this file, and not this project as a
4832 + * a) This library is free software; you can redistribute it and/or
4833 + * modify it under the terms of the GNU General Public License as
4834 + * published by the Free Software Foundation; either version 2 of the
4835 + * License, or (at your option) any later version.
4837 + * This library is distributed in the hope that it will be useful,
4838 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4839 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4840 + * GNU General Public License for more details.
4842 + * Or, alternatively,
4844 + * b) Permission is hereby granted, free of charge, to any person
4845 + * obtaining a copy of this software and associated documentation
4846 + * files (the "Software"), to deal in the Software without
4847 + * restriction, including without limitation the rights to use,
4848 + * copy, modify, merge, publish, distribute, sublicense, and/or
4849 + * sell copies of the Software, and to permit persons to whom the
4850 + * Software is furnished to do so, subject to the following
4853 + * The above copyright notice and this permission notice shall be
4854 + * included in all copies or substantial portions of the Software.
4856 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
4857 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
4858 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
4859 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
4860 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
4861 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
4862 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
4863 + * OTHER DEALINGS IN THE SOFTWARE.
4868 +#include "fsl-ls1088a.dtsi"
4871 + model = "L1088A RDB Board";
4872 + compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
4879 + compatible = "nxp,pca9547";
4881 + #address-cells = <1>;
4882 + #size-cells = <0>;
4885 + #address-cells = <1>;
4886 + #size-cells = <0>;
4890 + compatible = "ti,ina220";
4892 + shunt-resistor = <1000>;
4897 + #address-cells = <1>;
4898 + #size-cells = <0>;
4902 + compatible = "adi,adt7461a";
4907 + compatible = "nxp,pcf2129";
4910 + interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
4918 + qflash0: s25fs512s@0 {
4919 + compatible = "spansion,m25p80";
4920 + #address-cells = <1>;
4921 + #size-cells = <1>;
4923 + spi-max-frequency = <20000000>;
4927 + qflash1: s25fs512s@1 {
4928 + compatible = "spansion,m25p80";
4929 + #address-cells = <1>;
4930 + #size-cells = <1>;
4932 + spi-max-frequency = <20000000>;
4940 + ranges = <0 0 0x5 0x30000000 0x00010000
4941 + 2 0 0x5 0x20000000 0x00010000>;
4944 + compatible = "fsl,ifc-nand";
4945 + reg = <0x0 0x0 0x10000>;
4948 + fpga: board-control@2,0 {
4949 + compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
4950 + reg = <0x2 0x0 0x0000100>;
4979 + /* Freescale F104 PHY1 */
4980 + mdio1_phy1: emdio1_phy@1 {
4982 + phy-connection-type = "qsgmii";
4984 + mdio1_phy2: emdio1_phy@2 {
4986 + phy-connection-type = "qsgmii";
4988 + mdio1_phy3: emdio1_phy@3 {
4990 + phy-connection-type = "qsgmii";
4992 + mdio1_phy4: emdio1_phy@4 {
4994 + phy-connection-type = "qsgmii";
4997 + mdio1_phy5: emdio1_phy@5 {
4999 + phy-connection-type = "qsgmii";
5001 + mdio1_phy6: emdio1_phy@6 {
5003 + phy-connection-type = "qsgmii";
5005 + mdio1_phy7: emdio1_phy@7 {
5007 + phy-connection-type = "qsgmii";
5009 + mdio1_phy8: emdio1_phy@8 {
5011 + phy-connection-type = "qsgmii";
5016 + /* Aquantia AQR105 10G PHY */
5017 + mdio2_phy1: emdio2_phy@1 {
5018 + compatible = "ethernet-phy-ieee802.3-c45";
5019 + interrupts = <0 2 0x4>;
5021 + phy-connection-type = "xfi";
5025 +/* DPMAC connections to external PHYs
5026 + * based on LS1088A RM RevC - $24.1.2 SerDes Options
5028 +/* DPMAC1 is 10G SFP+, fixed link */
5030 + phy-handle = <&mdio2_phy1>;
5033 + phy-handle = <&mdio1_phy5>;
5036 + phy-handle = <&mdio1_phy6>;
5039 + phy-handle = <&mdio1_phy7>;
5042 + phy-handle = <&mdio1_phy8>;
5045 + phy-handle = <&mdio1_phy1>;
5048 + phy-handle = <&mdio1_phy2>;
5051 + phy-handle = <&mdio1_phy3>;
5054 + phy-handle = <&mdio1_phy4>;
5056 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5057 new file mode 100644
5058 index 00000000..14585ab2
5060 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
5063 + * Device Tree Include file for NXP Layerscape-1088A family SoC.
5065 + * Copyright 2017 NXP
5067 + * Harninder Rai <harninder.rai@nxp.com>
5069 + * This file is dual-licensed: you can use it either under the terms
5070 + * of the GPLv2 or the X11 license, at your option. Note that this dual
5071 + * licensing only applies to this file, and not this project as a
5074 + * a) This library is free software; you can redistribute it and/or
5075 + * modify it under the terms of the GNU General Public License as
5076 + * published by the Free Software Foundation; either version 2 of the
5077 + * License, or (at your option) any later version.
5079 + * This library is distributed in the hope that it will be useful,
5080 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5081 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5082 + * GNU General Public License for more details.
5084 + * Or, alternatively,
5086 + * b) Permission is hereby granted, free of charge, to any person
5087 + * obtaining a copy of this software and associated documentation
5088 + * files (the "Software"), to deal in the Software without
5089 + * restriction, including without limitation the rights to use,
5090 + * copy, modify, merge, publish, distribute, sublicense, and/or
5091 + * sell copies of the Software, and to permit persons to whom the
5092 + * Software is furnished to do so, subject to the following
5095 + * The above copyright notice and this permission notice shall be
5096 + * included in all copies or substantial portions of the Software.
5098 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
5099 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
5100 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
5101 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
5102 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
5103 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
5104 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
5105 + * OTHER DEALINGS IN THE SOFTWARE.
5107 +#include <dt-bindings/interrupt-controller/arm-gic.h>
5108 +#include <dt-bindings/thermal/thermal.h>
5111 + compatible = "fsl,ls1088a";
5112 + interrupt-parent = <&gic>;
5113 + #address-cells = <2>;
5114 + #size-cells = <2>;
5121 + #address-cells = <1>;
5122 + #size-cells = <0>;
5124 + /* We have 2 clusters having 4 Cortex-A53 cores each */
5126 + device_type = "cpu";
5127 + compatible = "arm,cortex-a53";
5129 + clocks = <&clockgen 1 0>;
5130 + #cooling-cells = <2>;
5131 + cpu-idle-states = <&CPU_PH20>;
5135 + device_type = "cpu";
5136 + compatible = "arm,cortex-a53";
5138 + clocks = <&clockgen 1 0>;
5139 + cpu-idle-states = <&CPU_PH20>;
5143 + device_type = "cpu";
5144 + compatible = "arm,cortex-a53";
5146 + clocks = <&clockgen 1 0>;
5147 + cpu-idle-states = <&CPU_PH20>;
5151 + device_type = "cpu";
5152 + compatible = "arm,cortex-a53";
5154 + clocks = <&clockgen 1 0>;
5155 + cpu-idle-states = <&CPU_PH20>;
5159 + device_type = "cpu";
5160 + compatible = "arm,cortex-a53";
5162 + clocks = <&clockgen 1 1>;
5163 + #cooling-cells = <2>;
5164 + cpu-idle-states = <&CPU_PH20>;
5168 + device_type = "cpu";
5169 + compatible = "arm,cortex-a53";
5171 + clocks = <&clockgen 1 1>;
5172 + cpu-idle-states = <&CPU_PH20>;
5176 + device_type = "cpu";
5177 + compatible = "arm,cortex-a53";
5179 + clocks = <&clockgen 1 1>;
5180 + cpu-idle-states = <&CPU_PH20>;
5184 + device_type = "cpu";
5185 + compatible = "arm,cortex-a53";
5187 + clocks = <&clockgen 1 1>;
5188 + cpu-idle-states = <&CPU_PH20>;
5194 + * PSCI node is not added default, U-boot will add missing
5195 + * parts if it determines to use PSCI.
5197 + entry-method = "arm,psci";
5199 + CPU_PH20: cpu-ph20 {
5200 + compatible = "arm,idle-state";
5201 + idle-state-name = "PH20";
5202 + arm,psci-suspend-param = <0x0>;
5203 + entry-latency-us = <1000>;
5204 + exit-latency-us = <1000>;
5205 + min-residency-us = <3000>;
5209 + gic: interrupt-controller@6000000 {
5210 + compatible = "arm,gic-v3";
5211 + #interrupt-cells = <3>;
5212 + #address-cells = <2>;
5213 + #size-cells = <2>;
5215 + interrupt-controller;
5216 + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
5217 + <0x0 0x06100000 0 0x100000>, /* GICR(RD_base+SGI_base)*/
5218 + <0x0 0x0c0c0000 0 0x2000>, /* GICC */
5219 + <0x0 0x0c0d0000 0 0x1000>, /* GICH */
5220 + <0x0 0x0c0e0000 0 0x20000>; /* GICV */
5221 + interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>;
5223 + its: gic-its@6020000 {
5224 + compatible = "arm,gic-v3-its";
5226 + reg = <0x0 0x6020000 0 0x20000>;
5231 + compatible = "arm,armv8-timer";
5232 + interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
5233 + <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
5234 + <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
5235 + <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
5238 + fsl_mc: fsl-mc@80c000000 {
5239 + compatible = "fsl,qoriq-mc";
5240 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
5241 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
5242 + msi-parent = <&its>;
5243 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
5244 + #address-cells = <3>;
5245 + #size-cells = <1>;
5248 + * Region type 0x0 - MC portals
5249 + * Region type 0x1 - QBMAN portals
5251 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
5252 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
5255 + #address-cells = <1>;
5256 + #size-cells = <0>;
5259 + compatible = "fsl,qoriq-mc-dpmac";
5263 + compatible = "fsl,qoriq-mc-dpmac";
5267 + compatible = "fsl,qoriq-mc-dpmac";
5271 + compatible = "fsl,qoriq-mc-dpmac";
5275 + compatible = "fsl,qoriq-mc-dpmac";
5279 + compatible = "fsl,qoriq-mc-dpmac";
5283 + compatible = "fsl,qoriq-mc-dpmac";
5287 + compatible = "fsl,qoriq-mc-dpmac";
5291 + compatible = "fsl,qoriq-mc-dpmac";
5294 + dpmac10: dpmac@10 {
5295 + compatible = "fsl,qoriq-mc-dpmac";
5303 + compatible = "fixed-clock";
5304 + #clock-cells = <0>;
5305 + clock-frequency = <100000000>;
5306 + clock-output-names = "sysclk";
5309 + dcfg: dcfg@1e00000 {
5310 + compatible = "fsl,ls1088a-dcfg", "syscon";
5311 + reg = <0x0 0x1e00000 0x0 0x10000>;
5315 + rstcr: syscon@1e60000 {
5316 + compatible = "fsl,ls1088a-rstcr", "syscon";
5317 + reg = <0x0 0x1e60000 0x0 0x4>;
5321 + compatible = "syscon-reboot";
5322 + regmap = <&rstcr>;
5329 + compatible = "simple-bus";
5330 + #address-cells = <2>;
5331 + #size-cells = <2>;
5334 + clockgen: clocking@1300000 {
5335 + compatible = "fsl,ls1088a-clockgen";
5336 + reg = <0 0x1300000 0 0xa0000>;
5337 + #clock-cells = <2>;
5338 + clocks = <&sysclk>;
5341 + tmu: tmu@1f80000 {
5342 + compatible = "fsl,qoriq-tmu";
5343 + reg = <0x0 0x1f80000 0x0 0x10000>;
5344 + interrupts = <0 23 0x4>;
5345 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
5346 + fsl,tmu-calibration =
5347 + /* Calibration data group 1 */
5348 + <0x00000000 0x00000026
5349 + 0x00000001 0x0000002d
5350 + 0x00000002 0x00000032
5351 + 0x00000003 0x00000039
5352 + 0x00000004 0x0000003f
5353 + 0x00000005 0x00000046
5354 + 0x00000006 0x0000004d
5355 + 0x00000007 0x00000054
5356 + 0x00000008 0x0000005a
5357 + 0x00000009 0x00000061
5358 + 0x0000000a 0x0000006a
5359 + 0x0000000b 0x00000071
5360 + /* Calibration data group 2 */
5361 + 0x00010000 0x00000025
5362 + 0x00010001 0x0000002c
5363 + 0x00010002 0x00000035
5364 + 0x00010003 0x0000003d
5365 + 0x00010004 0x00000045
5366 + 0x00010005 0x0000004e
5367 + 0x00010006 0x00000057
5368 + 0x00010007 0x00000061
5369 + 0x00010008 0x0000006b
5370 + 0x00010009 0x00000076
5371 + /* Calibration data group 3 */
5372 + 0x00020000 0x00000029
5373 + 0x00020001 0x00000033
5374 + 0x00020002 0x0000003d
5375 + 0x00020003 0x00000049
5376 + 0x00020004 0x00000056
5377 + 0x00020005 0x00000061
5378 + 0x00020006 0x0000006d
5379 + /* Calibration data group 4 */
5380 + 0x00030000 0x00000021
5381 + 0x00030001 0x0000002a
5382 + 0x00030002 0x0000003c
5383 + 0x00030003 0x0000004e>;
5385 + #thermal-sensor-cells = <1>;
5389 + cpu_thermal: cpu-thermal {
5390 + polling-delay-passive = <1000>;
5391 + polling-delay = <5000>;
5392 + thermal-sensors = <&tmu 0>;
5395 + cpu_alert: cpu-alert {
5396 + temperature = <85000>;
5397 + hysteresis = <2000>;
5401 + cpu_crit: cpu-crit {
5402 + temperature = <95000>;
5403 + hysteresis = <2000>;
5404 + type = "critical";
5410 + trip = <&cpu_alert>;
5412 + <&cpu0 THERMAL_NO_LIMIT
5413 + THERMAL_NO_LIMIT>;
5416 + trip = <&cpu_alert>;
5418 + <&cpu4 THERMAL_NO_LIMIT
5419 + THERMAL_NO_LIMIT>;
5425 + duart0: serial@21c0500 {
5426 + compatible = "fsl,ns16550", "ns16550a";
5427 + reg = <0x0 0x21c0500 0x0 0x100>;
5428 + clocks = <&clockgen 4 3>;
5429 + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
5430 + status = "disabled";
5433 + duart1: serial@21c0600 {
5434 + compatible = "fsl,ns16550", "ns16550a";
5435 + reg = <0x0 0x21c0600 0x0 0x100>;
5436 + clocks = <&clockgen 4 3>;
5437 + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
5438 + status = "disabled";
5441 + cluster1_core0_watchdog: wdt@c000000 {
5442 + compatible = "arm,sp805-wdt", "arm,primecell";
5443 + reg = <0x0 0xc000000 0x0 0x1000>;
5444 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5445 + clock-names = "apb_pclk", "wdog_clk";
5448 + cluster1_core1_watchdog: wdt@c010000 {
5449 + compatible = "arm,sp805-wdt", "arm,primecell";
5450 + reg = <0x0 0xc010000 0x0 0x1000>;
5451 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5452 + clock-names = "apb_pclk", "wdog_clk";
5455 + cluster1_core2_watchdog: wdt@c020000 {
5456 + compatible = "arm,sp805-wdt", "arm,primecell";
5457 + reg = <0x0 0xc020000 0x0 0x1000>;
5458 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5459 + clock-names = "apb_pclk", "wdog_clk";
5462 + cluster1_core3_watchdog: wdt@c030000 {
5463 + compatible = "arm,sp805-wdt", "arm,primecell";
5464 + reg = <0x0 0xc030000 0x0 0x1000>;
5465 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5466 + clock-names = "apb_pclk", "wdog_clk";
5469 + cluster2_core0_watchdog: wdt@c100000 {
5470 + compatible = "arm,sp805-wdt", "arm,primecell";
5471 + reg = <0x0 0xc100000 0x0 0x1000>;
5472 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5473 + clock-names = "apb_pclk", "wdog_clk";
5476 + cluster2_core1_watchdog: wdt@c110000 {
5477 + compatible = "arm,sp805-wdt", "arm,primecell";
5478 + reg = <0x0 0xc110000 0x0 0x1000>;
5479 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5480 + clock-names = "apb_pclk", "wdog_clk";
5483 + cluster2_core2_watchdog: wdt@c120000 {
5484 + compatible = "arm,sp805-wdt", "arm,primecell";
5485 + reg = <0x0 0xc120000 0x0 0x1000>;
5486 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5487 + clock-names = "apb_pclk", "wdog_clk";
5490 + cluster2_core3_watchdog: wdt@c130000 {
5491 + compatible = "arm,sp805-wdt", "arm,primecell";
5492 + reg = <0x0 0xc130000 0x0 0x1000>;
5493 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5494 + clock-names = "apb_pclk", "wdog_clk";
5497 + gpio0: gpio@2300000 {
5498 + compatible = "fsl,qoriq-gpio";
5499 + reg = <0x0 0x2300000 0x0 0x10000>;
5500 + interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
5502 + #gpio-cells = <2>;
5503 + interrupt-controller;
5504 + #interrupt-cells = <2>;
5507 + gpio1: gpio@2310000 {
5508 + compatible = "fsl,qoriq-gpio";
5509 + reg = <0x0 0x2310000 0x0 0x10000>;
5510 + interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
5512 + #gpio-cells = <2>;
5513 + interrupt-controller;
5514 + #interrupt-cells = <2>;
5517 + gpio2: gpio@2320000 {
5518 + compatible = "fsl,qoriq-gpio";
5519 + reg = <0x0 0x2320000 0x0 0x10000>;
5520 + interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
5522 + #gpio-cells = <2>;
5523 + interrupt-controller;
5524 + #interrupt-cells = <2>;
5527 + gpio3: gpio@2330000 {
5528 + compatible = "fsl,qoriq-gpio";
5529 + reg = <0x0 0x2330000 0x0 0x10000>;
5530 + interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
5532 + #gpio-cells = <2>;
5533 + interrupt-controller;
5534 + #interrupt-cells = <2>;
5537 + /* TODO: WRIOP (CCSR?) */
5538 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
5539 + * E-MDIO1: 0x1_6000
5541 + compatible = "fsl,fman-memac-mdio";
5542 + reg = <0x0 0x8B96000 0x0 0x1000>;
5543 + device_type = "mdio";
5544 + little-endian; /* force the driver in LE mode */
5546 + /* Not necessary on the QDS, but needed on the RDB */
5547 + #address-cells = <1>;
5548 + #size-cells = <0>;
5551 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
5552 + * E-MDIO2: 0x1_7000
5554 + compatible = "fsl,fman-memac-mdio";
5555 + reg = <0x0 0x8B97000 0x0 0x1000>;
5556 + device_type = "mdio";
5557 + little-endian; /* force the driver in LE mode */
5559 + #address-cells = <1>;
5560 + #size-cells = <0>;
5563 + ifc: ifc@2240000 {
5564 + compatible = "fsl,ifc", "simple-bus";
5565 + reg = <0x0 0x2240000 0x0 0x20000>;
5566 + interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
5568 + #address-cells = <2>;
5569 + #size-cells = <1>;
5573 + ftm0: ftm0@2800000 {
5574 + compatible = "fsl,ftm-alarm";
5575 + reg = <0x0 0x2800000 0x0 0x10000>;
5576 + interrupts = <0 44 4>;
5579 + i2c0: i2c@2000000 {
5580 + compatible = "fsl,vf610-i2c";
5581 + #address-cells = <1>;
5582 + #size-cells = <0>;
5583 + reg = <0x0 0x2000000 0x0 0x10000>;
5584 + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5585 + clocks = <&clockgen 4 3>;
5586 + status = "disabled";
5589 + i2c1: i2c@2010000 {
5590 + compatible = "fsl,vf610-i2c";
5591 + #address-cells = <1>;
5592 + #size-cells = <0>;
5593 + reg = <0x0 0x2010000 0x0 0x10000>;
5594 + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
5595 + clocks = <&clockgen 4 3>;
5596 + status = "disabled";
5599 + i2c2: i2c@2020000 {
5600 + compatible = "fsl,vf610-i2c";
5601 + #address-cells = <1>;
5602 + #size-cells = <0>;
5603 + reg = <0x0 0x2020000 0x0 0x10000>;
5604 + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5605 + clocks = <&clockgen 4 3>;
5606 + status = "disabled";
5609 + i2c3: i2c@2030000 {
5610 + compatible = "fsl,vf610-i2c";
5611 + #address-cells = <1>;
5612 + #size-cells = <0>;
5613 + reg = <0x0 0x2030000 0x0 0x10000>;
5614 + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
5615 + clocks = <&clockgen 4 3>;
5616 + status = "disabled";
5619 + qspi: quadspi@20c0000 {
5620 + compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
5621 + #address-cells = <1>;
5622 + #size-cells = <0>;
5623 + reg = <0x0 0x20c0000 0x0 0x10000>,
5624 + <0x0 0x20000000 0x0 0x10000000>;
5625 + reg-names = "QuadSPI", "QuadSPI-memory";
5626 + interrupts = <0 25 0x4>; /* Level high type */
5627 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
5628 + clock-names = "qspi_en", "qspi";
5629 + fsl,qspi-has-second-chip;
5632 + esdhc: esdhc@2140000 {
5633 + compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
5634 + reg = <0x0 0x2140000 0x0 0x10000>;
5635 + interrupts = <0 28 0x4>; /* Level high type */
5636 + clock-frequency = <0>;
5637 + voltage-ranges = <1800 1800 3300 3300>;
5641 + status = "disabled";
5644 + usb0: usb3@3100000 {
5645 + compatible = "snps,dwc3";
5646 + reg = <0x0 0x3100000 0x0 0x10000>;
5647 + interrupts = <0 80 0x4>; /* Level high type */
5650 + snps,dis_rxdet_inp3_quirk;
5653 + usb1: usb3@3110000 {
5654 + compatible = "snps,dwc3";
5655 + reg = <0x0 0x3110000 0x0 0x10000>;
5656 + interrupts = <0 81 0x4>; /* Level high type */
5659 + snps,dis_rxdet_inp3_quirk;
5662 + sata: sata@3200000 {
5663 + compatible = "fsl,ls1088a-ahci";
5664 + reg = <0x0 0x3200000 0x0 0x10000>,
5665 + <0x7 0x100520 0x0 0x4>;
5666 + reg-names = "ahci", "sata-ecc";
5667 + interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
5668 + clocks = <&clockgen 4 3>;
5670 + status = "disabled";
5674 + compatible = "fsl,ls2088a-pcie", "fsl,ls1088a-pcie",
5676 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
5677 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
5678 + reg-names = "regs", "config";
5679 + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5680 + interrupt-names = "aer";
5681 + #address-cells = <3>;
5682 + #size-cells = <2>;
5683 + device_type = "pci";
5686 + bus-range = <0x0 0xff>;
5687 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
5688 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5689 + msi-parent = <&its>;
5690 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5691 + #interrupt-cells = <1>;
5692 + interrupt-map-mask = <0 0 0 7>;
5693 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
5694 + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
5695 + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
5696 + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
5700 + compatible = "fsl,ls2088a-pcie", "fsl,ls1088a-pcie",
5702 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
5703 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
5704 + reg-names = "regs", "config";
5705 + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5706 + interrupt-names = "aer";
5707 + #address-cells = <3>;
5708 + #size-cells = <2>;
5709 + device_type = "pci";
5712 + bus-range = <0x0 0xff>;
5713 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
5714 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5715 + msi-parent = <&its>;
5716 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5717 + #interrupt-cells = <1>;
5718 + interrupt-map-mask = <0 0 0 7>;
5719 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
5720 + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
5721 + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
5722 + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
5726 + compatible = "fsl,ls2088a-pcie", "fsl,ls1088a-pcie",
5728 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
5729 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
5730 + reg-names = "regs", "config";
5731 + interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
5732 + interrupt-names = "aer";
5733 + #address-cells = <3>;
5734 + #size-cells = <2>;
5735 + device_type = "pci";
5738 + bus-range = <0x0 0xff>;
5739 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
5740 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
5741 + msi-parent = <&its>;
5742 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
5743 + #interrupt-cells = <1>;
5744 + interrupt-map-mask = <0 0 0 7>;
5745 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
5746 + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
5747 + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
5748 + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
5751 + smmu: iommu@5000000 {
5752 + compatible = "arm,mmu-500";
5753 + reg = <0 0x5000000 0 0x800000>;
5754 + #global-interrupts = <12>;
5755 + #iommu-cells = <1>;
5756 + stream-match-mask = <0x7C00>;
5757 + interrupts = <0 13 4>, /* global secure fault */
5758 + <0 14 4>, /* combined secure interrupt */
5759 + <0 15 4>, /* global non-secure fault */
5760 + <0 16 4>, /* combined non-secure interrupt */
5761 + /* performance counter interrupts 0-7 */
5770 + /* per context interrupt, 64 interrupts */
5837 + crypto: crypto@8000000 {
5838 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
5839 + fsl,sec-era = <8>;
5840 + #address-cells = <1>;
5841 + #size-cells = <1>;
5842 + ranges = <0x0 0x00 0x8000000 0x100000>;
5843 + reg = <0x00 0x8000000 0x0 0x100000>;
5844 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
5847 + sec_jr0: jr@10000 {
5848 + compatible = "fsl,sec-v5.0-job-ring",
5849 + "fsl,sec-v4.0-job-ring";
5850 + reg = <0x10000 0x10000>;
5851 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
5854 + sec_jr1: jr@20000 {
5855 + compatible = "fsl,sec-v5.0-job-ring",
5856 + "fsl,sec-v4.0-job-ring";
5857 + reg = <0x20000 0x10000>;
5858 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
5861 + sec_jr2: jr@30000 {
5862 + compatible = "fsl,sec-v5.0-job-ring",
5863 + "fsl,sec-v4.0-job-ring";
5864 + reg = <0x30000 0x10000>;
5865 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
5868 + sec_jr3: jr@40000 {
5869 + compatible = "fsl,sec-v5.0-job-ring",
5870 + "fsl,sec-v4.0-job-ring";
5871 + reg = <0x40000 0x10000>;
5872 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
5878 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
5879 index b0dd0109..ba1a79dd 100644
5880 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
5881 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
5884 * Device Tree file for Freescale LS2080a QDS Board.
5886 - * Copyright (C) 2015, Freescale Semiconductor
5887 + * Copyright 2015-2016 Freescale Semiconductor, Inc.
5888 + * Copyright 2017 NXP
5890 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
5891 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
5893 * This file is dual-licensed: you can use it either under the terms
5894 @@ -46,169 +48,76 @@
5898 -/include/ "fsl-ls2080a.dtsi"
5899 +#include "fsl-ls2080a.dtsi"
5900 +#include "fsl-ls208xa-qds.dtsi"
5903 model = "Freescale Layerscape 2080a QDS Board";
5904 compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
5907 - serial0 = &serial0;
5908 - serial1 = &serial1;
5912 stdout-path = "serial0:115200n8";
5922 - #address-cells = <2>;
5923 - #size-cells = <1>;
5924 - ranges = <0x0 0x0 0x5 0x80000000 0x08000000
5925 - 0x2 0x0 0x5 0x30000000 0x00010000
5926 - 0x3 0x0 0x5 0x20000000 0x00010000>;
5929 + boardctrl: board-control@3,0 {
5930 #address-cells = <1>;
5932 - compatible = "cfi-flash";
5933 - reg = <0x0 0x0 0x8000000>;
5935 - device-width = <1>;
5937 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
5938 + reg = <3 0 0x300>; /* TODO check address */
5939 + ranges = <0 3 0 0x300>;
5942 - compatible = "fsl,ifc-nand";
5943 - reg = <0x2 0x0 0x10000>;
5946 + compatible = "mdio-mux-mmioreg", "mdio-mux";
5947 + mdio-parent-bus = <&emdio1>;
5948 + reg = <0x54 1>; /* BRDCFG4 */
5949 + mux-mask = <0xe0>; /* EMI1_MDIO */
5952 - reg = <0x3 0x0 0x10000>;
5953 - compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
5960 - compatible = "nxp,pca9547";
5962 - #address-cells = <1>;
5963 - #size-cells = <0>;
5965 - #address-cells = <1>;
5966 + #address-cells=<1>;
5970 - compatible = "dallas,ds3232";
5976 - #address-cells = <1>;
5977 - #size-cells = <0>;
5981 - compatible = "ti,ina220";
5983 - shunt-resistor = <500>;
5987 - compatible = "ti,ina220";
5989 - shunt-resistor = <1000>;
5994 - #address-cells = <1>;
5995 - #size-cells = <0>;
5999 - compatible = "adi,adt7461";
6001 + /* Child MDIO buses, one for each riser card:
6002 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
6003 + * VSC8234 PHYs on the riser cards.
6006 + mdio_mux3: mdio@60 {
6008 + #address-cells = <1>;
6009 + #size-cells = <0>;
6011 + mdio0_phy12: mdio_phy0@1c {
6013 + phy-connection-type = "sgmii";
6015 + mdio0_phy13: mdio_phy1@1d {
6017 + phy-connection-type = "sgmii";
6019 + mdio0_phy14: mdio_phy2@1e {
6021 + phy-connection-type = "sgmii";
6023 + mdio0_phy15: mdio_phy3@1f {
6025 + phy-connection-type = "sgmii";
6033 - status = "disabled";
6037 - status = "disabled";
6041 - status = "disabled";
6046 - dflash0: n25q128a {
6047 - #address-cells = <1>;
6048 - #size-cells = <1>;
6049 - compatible = "st,m25p80";
6050 - spi-max-frequency = <3000000>;
6053 - dflash1: sst25wf040b {
6054 - #address-cells = <1>;
6055 - #size-cells = <1>;
6056 - compatible = "st,m25p80";
6057 - spi-max-frequency = <3000000>;
6060 - dflash2: en25s64 {
6061 - #address-cells = <1>;
6062 - #size-cells = <1>;
6063 - compatible = "st,m25p80";
6064 - spi-max-frequency = <3000000>;
6071 - flash0: s25fl256s1@0 {
6072 - #address-cells = <1>;
6073 - #size-cells = <1>;
6074 - compatible = "st,m25p80";
6075 - spi-max-frequency = <20000000>;
6078 - flash2: s25fl256s1@2 {
6079 - #address-cells = <1>;
6080 - #size-cells = <1>;
6081 - compatible = "st,m25p80";
6082 - spi-max-frequency = <20000000>;
6089 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
6091 + phy-handle = <&mdio0_phy12>;
6097 + phy-handle = <&mdio0_phy13>;
6103 + phy-handle = <&mdio0_phy14>;
6109 + phy-handle = <&mdio0_phy15>;
6111 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6112 index ad0ebb8a..025f0f54 100644
6113 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6114 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
6117 * Device Tree file for Freescale LS2080a RDB Board.
6119 - * Copyright (C) 2015, Freescale Semiconductor
6120 + * Copyright 2016 Freescale Semiconductor, Inc.
6121 + * Copyright 2017 NXP
6123 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6124 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6126 * This file is dual-licensed: you can use it either under the terms
6127 @@ -46,125 +48,94 @@
6131 -/include/ "fsl-ls2080a.dtsi"
6132 +#include "fsl-ls2080a.dtsi"
6133 +#include "fsl-ls208xa-rdb.dtsi"
6136 model = "Freescale Layerscape 2080a RDB Board";
6137 compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
6140 - serial0 = &serial0;
6141 - serial1 = &serial1;
6145 stdout-path = "serial1:115200n8";
6155 - #address-cells = <2>;
6156 - #size-cells = <1>;
6157 - ranges = <0x0 0x0 0x5 0x80000000 0x08000000
6158 - 0x2 0x0 0x5 0x30000000 0x00010000
6159 - 0x3 0x0 0x5 0x20000000 0x00010000>;
6162 - #address-cells = <1>;
6163 - #size-cells = <1>;
6164 - compatible = "cfi-flash";
6165 - reg = <0x0 0x0 0x8000000>;
6167 - device-width = <1>;
6169 + status = "disabled";
6171 + mdio1_phy1: emdio1_phy@1 {
6173 + phy-connection-type = "xfi";
6177 - compatible = "fsl,ifc-nand";
6178 - reg = <0x2 0x0 0x10000>;
6179 + mdio1_phy2: emdio1_phy@2 {
6181 + phy-connection-type = "xfi";
6185 - reg = <0x3 0x0 0x10000>;
6186 - compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
6187 + mdio1_phy3: emdio1_phy@3 {
6189 + phy-connection-type = "xfi";
6197 - compatible = "nxp,pca9547";
6199 - #address-cells = <1>;
6200 - #size-cells = <0>;
6201 - status = "disabled";
6203 - #address-cells = <1>;
6204 - #size-cells = <0>;
6207 - compatible = "dallas,ds3232";
6213 - #address-cells = <1>;
6214 - #size-cells = <0>;
6218 - compatible = "adi,adt7461";
6222 + mdio1_phy4: emdio1_phy@4 {
6224 + phy-connection-type = "xfi";
6229 - status = "disabled";
6233 - status = "disabled";
6237 - status = "disabled";
6242 - dflash0: n25q512a {
6243 - #address-cells = <1>;
6244 - #size-cells = <1>;
6245 - compatible = "st,m25p80";
6246 - spi-max-frequency = <3000000>;
6250 + mdio2_phy1: emdio2_phy@1 {
6251 + compatible = "ethernet-phy-ieee802.3-c45";
6252 + interrupts = <0 1 0x4>; /* Level high type */
6254 + phy-connection-type = "xfi";
6256 + mdio2_phy2: emdio2_phy@2 {
6257 + compatible = "ethernet-phy-ieee802.3-c45";
6258 + interrupts = <0 2 0x4>; /* Level high type */
6260 + phy-connection-type = "xfi";
6262 + mdio2_phy3: emdio2_phy@3 {
6263 + compatible = "ethernet-phy-ieee802.3-c45";
6264 + interrupts = <0 4 0x4>; /* Level high type */
6266 + phy-connection-type = "xfi";
6268 + mdio2_phy4: emdio2_phy@4 {
6269 + compatible = "ethernet-phy-ieee802.3-c45";
6270 + interrupts = <0 5 0x4>; /* Level high type */
6272 + phy-connection-type = "xfi";
6277 - status = "disabled";
6279 +/* Update DPMAC connections to external PHYs, under the assumption of
6280 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
6282 +/* Leave Cortina nodes commented out until driver is integrated
6284 + * phy-handle = <&mdio1_phy1>;
6287 + * phy-handle = <&mdio1_phy2>;
6290 + * phy-handle = <&mdio1_phy3>;
6293 + * phy-handle = <&mdio1_phy4>;
6300 + phy-handle = <&mdio2_phy1>;
6306 + phy-handle = <&mdio2_phy2>;
6312 + phy-handle = <&mdio2_phy3>;
6318 + phy-handle = <&mdio2_phy4>;
6320 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6321 index 505d0380..fbbb73e5 100644
6322 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6323 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
6326 * Device Tree file for Freescale LS2080a software Simulator model
6328 - * Copyright (C) 2014-2015, Freescale Semiconductor
6329 + * Copyright 2014-2015 Freescale Semiconductor, Inc.
6331 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6337 -/include/ "fsl-ls2080a.dtsi"
6338 +#include "fsl-ls2080a.dtsi"
6341 model = "Freescale Layerscape 2080a software Simulator model";
6342 compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
6345 - serial0 = &serial0;
6346 - serial1 = &serial1;
6350 compatible = "smsc,lan91c111";
6351 reg = <0x0 0x2210000 0x0 0x100>;
6352 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6353 index 7f0dc13b..71f15fab 100644
6354 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6355 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
6358 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6360 - * Copyright (C) 2014-2015, Freescale Semiconductor
6361 + * Copyright 2014-2016 Freescale Semiconductor, Inc.
6363 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
6364 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
6366 * This file is dual-licensed: you can use it either under the terms
6367 @@ -44,696 +45,132 @@
6368 * OTHER DEALINGS IN THE SOFTWARE.
6372 - compatible = "fsl,ls2080a";
6373 - interrupt-parent = <&gic>;
6374 - #address-cells = <2>;
6375 - #size-cells = <2>;
6376 +#include "fsl-ls208xa.dtsi"
6379 - #address-cells = <1>;
6380 - #size-cells = <0>;
6383 - * We expect the enable-method for cpu's to be "psci", but this
6384 - * is dependent on the SoC FW, which will fill this in.
6386 - * Currently supported enable-method is psci v0.2
6389 - /* We have 4 clusters having 2 Cortex-A57 cores each */
6391 - device_type = "cpu";
6392 - compatible = "arm,cortex-a57";
6394 - clocks = <&clockgen 1 0>;
6395 - next-level-cache = <&cluster0_l2>;
6399 - device_type = "cpu";
6400 - compatible = "arm,cortex-a57";
6402 - clocks = <&clockgen 1 0>;
6403 - next-level-cache = <&cluster0_l2>;
6407 - device_type = "cpu";
6408 - compatible = "arm,cortex-a57";
6410 - clocks = <&clockgen 1 1>;
6411 - next-level-cache = <&cluster1_l2>;
6415 - device_type = "cpu";
6416 - compatible = "arm,cortex-a57";
6418 - clocks = <&clockgen 1 1>;
6419 - next-level-cache = <&cluster1_l2>;
6423 - device_type = "cpu";
6424 - compatible = "arm,cortex-a57";
6426 - clocks = <&clockgen 1 2>;
6427 - next-level-cache = <&cluster2_l2>;
6431 - device_type = "cpu";
6432 - compatible = "arm,cortex-a57";
6434 - clocks = <&clockgen 1 2>;
6435 - next-level-cache = <&cluster2_l2>;
6439 - device_type = "cpu";
6440 - compatible = "arm,cortex-a57";
6442 - clocks = <&clockgen 1 3>;
6443 - next-level-cache = <&cluster3_l2>;
6447 - device_type = "cpu";
6448 - compatible = "arm,cortex-a57";
6450 - clocks = <&clockgen 1 3>;
6451 - next-level-cache = <&cluster3_l2>;
6454 - cluster0_l2: l2-cache0 {
6455 - compatible = "cache";
6458 - cluster1_l2: l2-cache1 {
6459 - compatible = "cache";
6462 - cluster2_l2: l2-cache2 {
6463 - compatible = "cache";
6466 - cluster3_l2: l2-cache3 {
6467 - compatible = "cache";
6471 + device_type = "cpu";
6472 + compatible = "arm,cortex-a57";
6474 + clocks = <&clockgen 1 0>;
6475 + next-level-cache = <&cluster0_l2>;
6476 + #cooling-cells = <2>;
6480 - device_type = "memory";
6481 - reg = <0x00000000 0x80000000 0 0x80000000>;
6482 - /* DRAM space - 1, size : 2 GB DRAM */
6484 + device_type = "cpu";
6485 + compatible = "arm,cortex-a57";
6487 + clocks = <&clockgen 1 0>;
6488 + next-level-cache = <&cluster0_l2>;
6492 - compatible = "fixed-clock";
6493 - #clock-cells = <0>;
6494 - clock-frequency = <100000000>;
6495 - clock-output-names = "sysclk";
6497 + device_type = "cpu";
6498 + compatible = "arm,cortex-a57";
6500 + clocks = <&clockgen 1 1>;
6501 + next-level-cache = <&cluster1_l2>;
6502 + #cooling-cells = <2>;
6505 - gic: interrupt-controller@6000000 {
6506 - compatible = "arm,gic-v3";
6507 - reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
6508 - <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
6509 - <0x0 0x0c0c0000 0 0x2000>, /* GICC */
6510 - <0x0 0x0c0d0000 0 0x1000>, /* GICH */
6511 - <0x0 0x0c0e0000 0 0x20000>; /* GICV */
6512 - #interrupt-cells = <3>;
6513 - #address-cells = <2>;
6514 - #size-cells = <2>;
6516 - interrupt-controller;
6517 - interrupts = <1 9 0x4>;
6519 - its: gic-its@6020000 {
6520 - compatible = "arm,gic-v3-its";
6522 - reg = <0x0 0x6020000 0 0x20000>;
6525 + device_type = "cpu";
6526 + compatible = "arm,cortex-a57";
6528 + clocks = <&clockgen 1 1>;
6529 + next-level-cache = <&cluster1_l2>;
6532 - rstcr: syscon@1e60000 {
6533 - compatible = "fsl,ls2080a-rstcr", "syscon";
6534 - reg = <0x0 0x1e60000 0x0 0x4>;
6536 + device_type = "cpu";
6537 + compatible = "arm,cortex-a57";
6539 + clocks = <&clockgen 1 2>;
6540 + next-level-cache = <&cluster2_l2>;
6541 + #cooling-cells = <2>;
6545 - compatible ="syscon-reboot";
6546 - regmap = <&rstcr>;
6550 + device_type = "cpu";
6551 + compatible = "arm,cortex-a57";
6553 + clocks = <&clockgen 1 2>;
6554 + next-level-cache = <&cluster2_l2>;
6558 - compatible = "arm,armv8-timer";
6559 - interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
6560 - <1 14 4>, /* Physical Non-Secure PPI, active-low */
6561 - <1 11 4>, /* Virtual PPI, active-low */
6562 - <1 10 4>; /* Hypervisor PPI, active-low */
6563 - fsl,erratum-a008585;
6565 + device_type = "cpu";
6566 + compatible = "arm,cortex-a57";
6568 + clocks = <&clockgen 1 3>;
6569 + next-level-cache = <&cluster3_l2>;
6570 + #cooling-cells = <2>;
6574 - compatible = "arm,armv8-pmuv3";
6575 - interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
6577 + device_type = "cpu";
6578 + compatible = "arm,cortex-a57";
6580 + clocks = <&clockgen 1 3>;
6581 + next-level-cache = <&cluster3_l2>;
6585 - compatible = "simple-bus";
6586 - #address-cells = <2>;
6587 - #size-cells = <2>;
6590 - clockgen: clocking@1300000 {
6591 - compatible = "fsl,ls2080a-clockgen";
6592 - reg = <0 0x1300000 0 0xa0000>;
6593 - #clock-cells = <2>;
6594 - clocks = <&sysclk>;
6597 - serial0: serial@21c0500 {
6598 - compatible = "fsl,ns16550", "ns16550a";
6599 - reg = <0x0 0x21c0500 0x0 0x100>;
6600 - clocks = <&clockgen 4 3>;
6601 - interrupts = <0 32 0x4>; /* Level high type */
6604 - serial1: serial@21c0600 {
6605 - compatible = "fsl,ns16550", "ns16550a";
6606 - reg = <0x0 0x21c0600 0x0 0x100>;
6607 - clocks = <&clockgen 4 3>;
6608 - interrupts = <0 32 0x4>; /* Level high type */
6611 - cluster1_core0_watchdog: wdt@c000000 {
6612 - compatible = "arm,sp805-wdt", "arm,primecell";
6613 - reg = <0x0 0xc000000 0x0 0x1000>;
6614 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6615 - clock-names = "apb_pclk", "wdog_clk";
6618 - cluster1_core1_watchdog: wdt@c010000 {
6619 - compatible = "arm,sp805-wdt", "arm,primecell";
6620 - reg = <0x0 0xc010000 0x0 0x1000>;
6621 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6622 - clock-names = "apb_pclk", "wdog_clk";
6625 - cluster2_core0_watchdog: wdt@c100000 {
6626 - compatible = "arm,sp805-wdt", "arm,primecell";
6627 - reg = <0x0 0xc100000 0x0 0x1000>;
6628 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6629 - clock-names = "apb_pclk", "wdog_clk";
6632 - cluster2_core1_watchdog: wdt@c110000 {
6633 - compatible = "arm,sp805-wdt", "arm,primecell";
6634 - reg = <0x0 0xc110000 0x0 0x1000>;
6635 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6636 - clock-names = "apb_pclk", "wdog_clk";
6639 - cluster3_core0_watchdog: wdt@c200000 {
6640 - compatible = "arm,sp805-wdt", "arm,primecell";
6641 - reg = <0x0 0xc200000 0x0 0x1000>;
6642 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6643 - clock-names = "apb_pclk", "wdog_clk";
6646 - cluster3_core1_watchdog: wdt@c210000 {
6647 - compatible = "arm,sp805-wdt", "arm,primecell";
6648 - reg = <0x0 0xc210000 0x0 0x1000>;
6649 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6650 - clock-names = "apb_pclk", "wdog_clk";
6653 - cluster4_core0_watchdog: wdt@c300000 {
6654 - compatible = "arm,sp805-wdt", "arm,primecell";
6655 - reg = <0x0 0xc300000 0x0 0x1000>;
6656 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6657 - clock-names = "apb_pclk", "wdog_clk";
6660 - cluster4_core1_watchdog: wdt@c310000 {
6661 - compatible = "arm,sp805-wdt", "arm,primecell";
6662 - reg = <0x0 0xc310000 0x0 0x1000>;
6663 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6664 - clock-names = "apb_pclk", "wdog_clk";
6667 - fsl_mc: fsl-mc@80c000000 {
6668 - compatible = "fsl,qoriq-mc";
6669 - reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
6670 - <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
6671 - msi-parent = <&its>;
6672 - #address-cells = <3>;
6673 - #size-cells = <1>;
6676 - * Region type 0x0 - MC portals
6677 - * Region type 0x1 - QBMAN portals
6679 - ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
6680 - 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
6683 - * Define the maximum number of MACs present on the SoC.
6686 - #address-cells = <1>;
6687 - #size-cells = <0>;
6690 - compatible = "fsl,qoriq-mc-dpmac";
6695 - compatible = "fsl,qoriq-mc-dpmac";
6700 - compatible = "fsl,qoriq-mc-dpmac";
6705 - compatible = "fsl,qoriq-mc-dpmac";
6710 - compatible = "fsl,qoriq-mc-dpmac";
6715 - compatible = "fsl,qoriq-mc-dpmac";
6720 - compatible = "fsl,qoriq-mc-dpmac";
6725 - compatible = "fsl,qoriq-mc-dpmac";
6730 - compatible = "fsl,qoriq-mc-dpmac";
6734 - dpmac10: dpmac@a {
6735 - compatible = "fsl,qoriq-mc-dpmac";
6739 - dpmac11: dpmac@b {
6740 - compatible = "fsl,qoriq-mc-dpmac";
6744 - dpmac12: dpmac@c {
6745 - compatible = "fsl,qoriq-mc-dpmac";
6749 - dpmac13: dpmac@d {
6750 - compatible = "fsl,qoriq-mc-dpmac";
6754 - dpmac14: dpmac@e {
6755 - compatible = "fsl,qoriq-mc-dpmac";
6759 - dpmac15: dpmac@f {
6760 - compatible = "fsl,qoriq-mc-dpmac";
6764 - dpmac16: dpmac@10 {
6765 - compatible = "fsl,qoriq-mc-dpmac";
6771 - smmu: iommu@5000000 {
6772 - compatible = "arm,mmu-500";
6773 - reg = <0 0x5000000 0 0x800000>;
6774 - #global-interrupts = <12>;
6775 - interrupts = <0 13 4>, /* global secure fault */
6776 - <0 14 4>, /* combined secure interrupt */
6777 - <0 15 4>, /* global non-secure fault */
6778 - <0 16 4>, /* combined non-secure interrupt */
6779 - /* performance counter interrupts 0-7 */
6780 - <0 211 4>, <0 212 4>,
6781 - <0 213 4>, <0 214 4>,
6782 - <0 215 4>, <0 216 4>,
6783 - <0 217 4>, <0 218 4>,
6784 - /* per context interrupt, 64 interrupts */
6785 - <0 146 4>, <0 147 4>,
6786 - <0 148 4>, <0 149 4>,
6787 - <0 150 4>, <0 151 4>,
6788 - <0 152 4>, <0 153 4>,
6789 - <0 154 4>, <0 155 4>,
6790 - <0 156 4>, <0 157 4>,
6791 - <0 158 4>, <0 159 4>,
6792 - <0 160 4>, <0 161 4>,
6793 - <0 162 4>, <0 163 4>,
6794 - <0 164 4>, <0 165 4>,
6795 - <0 166 4>, <0 167 4>,
6796 - <0 168 4>, <0 169 4>,
6797 - <0 170 4>, <0 171 4>,
6798 - <0 172 4>, <0 173 4>,
6799 - <0 174 4>, <0 175 4>,
6800 - <0 176 4>, <0 177 4>,
6801 - <0 178 4>, <0 179 4>,
6802 - <0 180 4>, <0 181 4>,
6803 - <0 182 4>, <0 183 4>,
6804 - <0 184 4>, <0 185 4>,
6805 - <0 186 4>, <0 187 4>,
6806 - <0 188 4>, <0 189 4>,
6807 - <0 190 4>, <0 191 4>,
6808 - <0 192 4>, <0 193 4>,
6809 - <0 194 4>, <0 195 4>,
6810 - <0 196 4>, <0 197 4>,
6811 - <0 198 4>, <0 199 4>,
6812 - <0 200 4>, <0 201 4>,
6813 - <0 202 4>, <0 203 4>,
6814 - <0 204 4>, <0 205 4>,
6815 - <0 206 4>, <0 207 4>,
6816 - <0 208 4>, <0 209 4>;
6817 - mmu-masters = <&fsl_mc 0x300 0>;
6820 - dspi: dspi@2100000 {
6821 - status = "disabled";
6822 - compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
6823 - #address-cells = <1>;
6824 - #size-cells = <0>;
6825 - reg = <0x0 0x2100000 0x0 0x10000>;
6826 - interrupts = <0 26 0x4>; /* Level high type */
6827 - clocks = <&clockgen 4 3>;
6828 - clock-names = "dspi";
6829 - spi-num-chipselects = <5>;
6833 - esdhc: esdhc@2140000 {
6834 - status = "disabled";
6835 - compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
6836 - reg = <0x0 0x2140000 0x0 0x10000>;
6837 - interrupts = <0 28 0x4>; /* Level high type */
6838 - clock-frequency = <0>; /* Updated by bootloader */
6839 - voltage-ranges = <1800 1800 3300 3300>;
6845 - gpio0: gpio@2300000 {
6846 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
6847 - reg = <0x0 0x2300000 0x0 0x10000>;
6848 - interrupts = <0 36 0x4>; /* Level high type */
6851 - #gpio-cells = <2>;
6852 - interrupt-controller;
6853 - #interrupt-cells = <2>;
6856 - gpio1: gpio@2310000 {
6857 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
6858 - reg = <0x0 0x2310000 0x0 0x10000>;
6859 - interrupts = <0 36 0x4>; /* Level high type */
6862 - #gpio-cells = <2>;
6863 - interrupt-controller;
6864 - #interrupt-cells = <2>;
6867 - gpio2: gpio@2320000 {
6868 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
6869 - reg = <0x0 0x2320000 0x0 0x10000>;
6870 - interrupts = <0 37 0x4>; /* Level high type */
6873 - #gpio-cells = <2>;
6874 - interrupt-controller;
6875 - #interrupt-cells = <2>;
6878 - gpio3: gpio@2330000 {
6879 - compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
6880 - reg = <0x0 0x2330000 0x0 0x10000>;
6881 - interrupts = <0 37 0x4>; /* Level high type */
6884 - #gpio-cells = <2>;
6885 - interrupt-controller;
6886 - #interrupt-cells = <2>;
6889 - i2c0: i2c@2000000 {
6890 - status = "disabled";
6891 - compatible = "fsl,vf610-i2c";
6892 - #address-cells = <1>;
6893 - #size-cells = <0>;
6894 - reg = <0x0 0x2000000 0x0 0x10000>;
6895 - interrupts = <0 34 0x4>; /* Level high type */
6896 - clock-names = "i2c";
6897 - clocks = <&clockgen 4 3>;
6900 - i2c1: i2c@2010000 {
6901 - status = "disabled";
6902 - compatible = "fsl,vf610-i2c";
6903 - #address-cells = <1>;
6904 - #size-cells = <0>;
6905 - reg = <0x0 0x2010000 0x0 0x10000>;
6906 - interrupts = <0 34 0x4>; /* Level high type */
6907 - clock-names = "i2c";
6908 - clocks = <&clockgen 4 3>;
6911 - i2c2: i2c@2020000 {
6912 - status = "disabled";
6913 - compatible = "fsl,vf610-i2c";
6914 - #address-cells = <1>;
6915 - #size-cells = <0>;
6916 - reg = <0x0 0x2020000 0x0 0x10000>;
6917 - interrupts = <0 35 0x4>; /* Level high type */
6918 - clock-names = "i2c";
6919 - clocks = <&clockgen 4 3>;
6922 - i2c3: i2c@2030000 {
6923 - status = "disabled";
6924 - compatible = "fsl,vf610-i2c";
6925 - #address-cells = <1>;
6926 - #size-cells = <0>;
6927 - reg = <0x0 0x2030000 0x0 0x10000>;
6928 - interrupts = <0 35 0x4>; /* Level high type */
6929 - clock-names = "i2c";
6930 - clocks = <&clockgen 4 3>;
6933 - ifc: ifc@2240000 {
6934 - compatible = "fsl,ifc", "simple-bus";
6935 - reg = <0x0 0x2240000 0x0 0x20000>;
6936 - interrupts = <0 21 0x4>; /* Level high type */
6938 - #address-cells = <2>;
6939 - #size-cells = <1>;
6940 + cluster0_l2: l2-cache0 {
6941 + compatible = "cache";
6944 - ranges = <0 0 0x5 0x80000000 0x08000000
6945 - 2 0 0x5 0x30000000 0x00010000
6946 - 3 0 0x5 0x20000000 0x00010000>;
6948 + cluster1_l2: l2-cache1 {
6949 + compatible = "cache";
6952 - qspi: quadspi@20c0000 {
6953 - status = "disabled";
6954 - compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
6955 - #address-cells = <1>;
6956 - #size-cells = <0>;
6957 - reg = <0x0 0x20c0000 0x0 0x10000>,
6958 - <0x0 0x20000000 0x0 0x10000000>;
6959 - reg-names = "QuadSPI", "QuadSPI-memory";
6960 - interrupts = <0 25 0x4>; /* Level high type */
6961 - clocks = <&clockgen 4 3>, <&clockgen 4 3>;
6962 - clock-names = "qspi_en", "qspi";
6964 + cluster2_l2: l2-cache2 {
6965 + compatible = "cache";
6969 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
6971 - reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
6972 - 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
6973 - reg-names = "regs", "config";
6974 - interrupts = <0 108 0x4>; /* Level high type */
6975 - interrupt-names = "intr";
6976 - #address-cells = <3>;
6977 - #size-cells = <2>;
6978 - device_type = "pci";
6981 - bus-range = <0x0 0xff>;
6982 - ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
6983 - 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
6984 - msi-parent = <&its>;
6985 - #interrupt-cells = <1>;
6986 - interrupt-map-mask = <0 0 0 7>;
6987 - interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
6988 - <0000 0 0 2 &gic 0 0 0 110 4>,
6989 - <0000 0 0 3 &gic 0 0 0 111 4>,
6990 - <0000 0 0 4 &gic 0 0 0 112 4>;
6992 + cluster3_l2: l2-cache3 {
6993 + compatible = "cache";
6998 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7000 - reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
7001 - 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
7002 - reg-names = "regs", "config";
7003 - interrupts = <0 113 0x4>; /* Level high type */
7004 - interrupt-names = "intr";
7005 - #address-cells = <3>;
7006 - #size-cells = <2>;
7007 - device_type = "pci";
7010 - bus-range = <0x0 0xff>;
7011 - ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
7012 - 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7013 - msi-parent = <&its>;
7014 - #interrupt-cells = <1>;
7015 - interrupt-map-mask = <0 0 0 7>;
7016 - interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
7017 - <0000 0 0 2 &gic 0 0 0 115 4>,
7018 - <0000 0 0 3 &gic 0 0 0 116 4>,
7019 - <0000 0 0 4 &gic 0 0 0 117 4>;
7022 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7023 + snps,dma-snooping;
7027 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7029 - reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
7030 - 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
7031 - reg-names = "regs", "config";
7032 - interrupts = <0 118 0x4>; /* Level high type */
7033 - interrupt-names = "intr";
7034 - #address-cells = <3>;
7035 - #size-cells = <2>;
7036 - device_type = "pci";
7039 - bus-range = <0x0 0xff>;
7040 - ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
7041 - 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7042 - msi-parent = <&its>;
7043 - #interrupt-cells = <1>;
7044 - interrupt-map-mask = <0 0 0 7>;
7045 - interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
7046 - <0000 0 0 2 &gic 0 0 0 120 4>,
7047 - <0000 0 0 3 &gic 0 0 0 121 4>,
7048 - <0000 0 0 4 &gic 0 0 0 122 4>;
7051 + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
7052 + snps,dma-snooping;
7056 - compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
7058 - reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
7059 - 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
7060 - reg-names = "regs", "config";
7061 - interrupts = <0 123 0x4>; /* Level high type */
7062 - interrupt-names = "intr";
7063 - #address-cells = <3>;
7064 - #size-cells = <2>;
7065 - device_type = "pci";
7068 - bus-range = <0x0 0xff>;
7069 - ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
7070 - 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7071 - msi-parent = <&its>;
7072 - #interrupt-cells = <1>;
7073 - interrupt-map-mask = <0 0 0 7>;
7074 - interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
7075 - <0000 0 0 2 &gic 0 0 0 125 4>,
7076 - <0000 0 0 3 &gic 0 0 0 126 4>,
7077 - <0000 0 0 4 &gic 0 0 0 127 4>;
7080 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
7081 + 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
7083 - sata0: sata@3200000 {
7084 - status = "disabled";
7085 - compatible = "fsl,ls2080a-ahci";
7086 - reg = <0x0 0x3200000 0x0 0x10000>;
7087 - interrupts = <0 133 0x4>; /* Level high type */
7088 - clocks = <&clockgen 4 3>;
7091 + ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
7092 + 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7095 - sata1: sata@3210000 {
7096 - status = "disabled";
7097 - compatible = "fsl,ls2080a-ahci";
7098 - reg = <0x0 0x3210000 0x0 0x10000>;
7099 - interrupts = <0 136 0x4>; /* Level high type */
7100 - clocks = <&clockgen 4 3>;
7104 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
7105 + 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
7107 - usb0: usb3@3100000 {
7108 - status = "disabled";
7109 - compatible = "snps,dwc3";
7110 - reg = <0x0 0x3100000 0x0 0x10000>;
7111 - interrupts = <0 80 0x4>; /* Level high type */
7113 - snps,quirk-frame-length-adjustment = <0x20>;
7114 - snps,dis_rxdet_inp3_quirk;
7116 + ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
7117 + 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7120 - usb1: usb3@3110000 {
7121 - status = "disabled";
7122 - compatible = "snps,dwc3";
7123 - reg = <0x0 0x3110000 0x0 0x10000>;
7124 - interrupts = <0 81 0x4>; /* Level high type */
7126 - snps,quirk-frame-length-adjustment = <0x20>;
7127 - snps,dis_rxdet_inp3_quirk;
7130 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
7131 + 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
7134 - compatible = "arm,ccn-504";
7135 - reg = <0x0 0x04000000 0x0 0x01000000>;
7136 - interrupts = <0 12 4>;
7139 + ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
7140 + 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7143 - ddr1: memory-controller@1080000 {
7144 - compatible = "fsl,qoriq-memory-controller";
7145 - reg = <0x0 0x1080000 0x0 0x1000>;
7146 - interrupts = <0 17 0x4>;
7150 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
7151 + 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
7153 - ddr2: memory-controller@1090000 {
7154 - compatible = "fsl,qoriq-memory-controller";
7155 - reg = <0x0 0x1090000 0x0 0x1000>;
7156 - interrupts = <0 18 0x4>;
7159 + ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
7160 + 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
7162 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
7163 new file mode 100644
7164 index 00000000..c3375bf7
7166 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
7169 + * Device Tree file for NXP LS2081A RDB Board.
7171 + * Copyright 2017 NXP
7173 + * Priyanka Jain <priyanka.jain@nxp.com>
7175 + * This file is dual-licensed: you can use it either under the terms
7176 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7177 + * licensing only applies to this file, and not this project as a
7180 + * a) This library is free software; you can redistribute it and/or
7181 + * modify it under the terms of the GNU General Public License as
7182 + * published by the Free Software Foundation; either version 2 of the
7183 + * License, or (at your option) any later version.
7185 + * This library is distributed in the hope that it will be useful,
7186 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7187 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7188 + * GNU General Public License for more details.
7190 + * Or, alternatively,
7192 + * b) Permission is hereby granted, free of charge, to any person
7193 + * obtaining a copy of this software and associated documentation
7194 + * files (the "Software"), to deal in the Software without
7195 + * restriction, including without limitation the rights to use,
7196 + * copy, modify, merge, publish, distribute, sublicense, and/or
7197 + * sell copies of the Software, and to permit persons to whom the
7198 + * Software is furnished to do so, subject to the following
7201 + * The above copyright notice and this permission notice shall be
7202 + * included in all copies or substantial portions of the Software.
7204 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7205 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7206 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7207 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7208 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7209 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7210 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7211 + * OTHER DEALINGS IN THE SOFTWARE.
7216 +#include "fsl-ls2088a.dtsi"
7219 + model = "NXP Layerscape 2081A RDB Board";
7220 + compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
7223 + serial0 = &serial0;
7224 + serial1 = &serial1;
7228 + stdout-path = "serial1:115200n8";
7237 + status = "disabled";
7243 + compatible = "nxp,pca9547";
7245 + #address-cells = <1>;
7246 + #size-cells = <0>;
7248 + #address-cells = <1>;
7249 + #size-cells = <0>;
7252 + compatible = "nxp,pcf2129";
7258 + #address-cells = <1>;
7259 + #size-cells = <0>;
7263 + compatible = "ti,ina220";
7265 + shunt-resistor = <500>;
7270 + #address-cells = <1>;
7271 + #size-cells = <0>;
7275 + compatible = "adi,adt7461";
7284 + dflash0: n25q512a {
7285 + #address-cells = <1>;
7286 + #size-cells = <1>;
7287 + compatible = "st,m25p80";
7288 + spi-max-frequency = <3000000>;
7295 + fsl,qspi-has-second-chip;
7296 + flash0: s25fs512s@0 {
7297 + #address-cells = <1>;
7298 + #size-cells = <1>;
7299 + compatible = "spansion,m25p80";
7301 + spi-max-frequency = <20000000>;
7304 + flash1: s25fs512s@1 {
7305 + #address-cells = <1>;
7306 + #size-cells = <1>;
7307 + compatible = "spansion,m25p80";
7309 + spi-max-frequency = <20000000>;
7329 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
7330 new file mode 100644
7331 index 00000000..1dbc7aa8
7333 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
7336 + * Device Tree file for Freescale LS2088A QDS Board.
7338 + * Copyright 2016 Freescale Semiconductor, Inc.
7339 + * Copyright 2017 NXP
7341 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7343 + * This file is dual-licensed: you can use it either under the terms
7344 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7345 + * licensing only applies to this file, and not this project as a
7348 + * a) This library is free software; you can redistribute it and/or
7349 + * modify it under the terms of the GNU General Public License as
7350 + * published by the Free Software Foundation; either version 2 of the
7351 + * License, or (at your option) any later version.
7353 + * This library is distributed in the hope that it will be useful,
7354 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7355 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7356 + * GNU General Public License for more details.
7358 + * Or, alternatively,
7360 + * b) Permission is hereby granted, free of charge, to any person
7361 + * obtaining a copy of this software and associated documentation
7362 + * files (the "Software"), to deal in the Software without
7363 + * restriction, including without limitation the rights to use,
7364 + * copy, modify, merge, publish, distribute, sublicense, and/or
7365 + * sell copies of the Software, and to permit persons to whom the
7366 + * Software is furnished to do so, subject to the following
7369 + * The above copyright notice and this permission notice shall be
7370 + * included in all copies or substantial portions of the Software.
7372 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7373 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7374 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7375 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7376 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7377 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7378 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7379 + * OTHER DEALINGS IN THE SOFTWARE.
7384 +#include "fsl-ls2088a.dtsi"
7385 +#include "fsl-ls208xa-qds.dtsi"
7388 + model = "Freescale Layerscape 2088A QDS Board";
7389 + compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
7392 + stdout-path = "serial0:115200n8";
7397 + boardctrl: board-control@3,0 {
7398 + #address-cells = <1>;
7399 + #size-cells = <1>;
7400 + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-bus";
7401 + reg = <3 0 0x300>; /* TODO check address */
7402 + ranges = <0 3 0 0x300>;
7405 + compatible = "mdio-mux-mmioreg", "mdio-mux";
7406 + mdio-parent-bus = <&emdio1>;
7407 + reg = <0x54 1>; /* BRDCFG4 */
7408 + mux-mask = <0xe0>; /* EMI1_MDIO */
7410 + #address-cells=<1>;
7411 + #size-cells = <0>;
7413 + /* Child MDIO buses, one for each riser card:
7414 + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
7415 + * VSC8234 PHYs on the riser cards.
7418 + mdio_mux3: mdio@60 {
7420 + #address-cells = <1>;
7421 + #size-cells = <0>;
7423 + mdio0_phy12: mdio_phy0@1c {
7425 + phy-connection-type = "sgmii";
7427 + mdio0_phy13: mdio_phy1@1d {
7429 + phy-connection-type = "sgmii";
7431 + mdio0_phy14: mdio_phy2@1e {
7433 + phy-connection-type = "sgmii";
7435 + mdio0_phy15: mdio_phy3@1f {
7437 + phy-connection-type = "sgmii";
7445 + pcs_phy1: ethernet-phy@0 {
7446 + backplane-mode = "10gbase-kr";
7447 + compatible = "ethernet-phy-ieee802.3-c45";
7449 + fsl,lane-handle = <&serdes1>;
7450 + fsl,lane-reg = <0x9C0 0x40>;/* lane H */
7455 + pcs_phy2: ethernet-phy@0 {
7456 + backplane-mode = "10gbase-kr";
7457 + compatible = "ethernet-phy-ieee802.3-c45";
7459 + fsl,lane-handle = <&serdes1>;
7460 + fsl,lane-reg = <0x980 0x40>;/* lane G */
7465 + pcs_phy3: ethernet-phy@0 {
7466 + backplane-mode = "10gbase-kr";
7467 + compatible = "ethernet-phy-ieee802.3-c45";
7469 + fsl,lane-handle = <&serdes1>;
7470 + fsl,lane-reg = <0x940 0x40>;/* lane F */
7475 + pcs_phy4: ethernet-phy@0 {
7476 + backplane-mode = "10gbase-kr";
7477 + compatible = "ethernet-phy-ieee802.3-c45";
7479 + fsl,lane-handle = <&serdes1>;
7480 + fsl,lane-reg = <0x900 0x40>;/* lane E */
7484 +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
7486 + phy-handle = <&mdio0_phy12>;
7489 + phy-handle = <&mdio0_phy13>;
7492 + phy-handle = <&mdio0_phy14>;
7495 + phy-handle = <&mdio0_phy15>;
7497 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
7498 new file mode 100644
7499 index 00000000..9300119b
7501 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
7504 + * Device Tree file for Freescale LS2088A RDB Board.
7506 + * Copyright 2016 Freescale Semiconductor, Inc.
7507 + * Copyright 2017 NXP
7509 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7511 + * This file is dual-licensed: you can use it either under the terms
7512 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7513 + * licensing only applies to this file, and not this project as a
7516 + * a) This library is free software; you can redistribute it and/or
7517 + * modify it under the terms of the GNU General Public License as
7518 + * published by the Free Software Foundation; either version 2 of the
7519 + * License, or (at your option) any later version.
7521 + * This library is distributed in the hope that it will be useful,
7522 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7523 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7524 + * GNU General Public License for more details.
7526 + * Or, alternatively,
7528 + * b) Permission is hereby granted, free of charge, to any person
7529 + * obtaining a copy of this software and associated documentation
7530 + * files (the "Software"), to deal in the Software without
7531 + * restriction, including without limitation the rights to use,
7532 + * copy, modify, merge, publish, distribute, sublicense, and/or
7533 + * sell copies of the Software, and to permit persons to whom the
7534 + * Software is furnished to do so, subject to the following
7537 + * The above copyright notice and this permission notice shall be
7538 + * included in all copies or substantial portions of the Software.
7540 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7541 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7542 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7543 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7544 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7545 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7546 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7547 + * OTHER DEALINGS IN THE SOFTWARE.
7552 +#include "fsl-ls2088a.dtsi"
7553 +#include "fsl-ls208xa-rdb.dtsi"
7556 + model = "Freescale Layerscape 2088A RDB Board";
7557 + compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
7560 + stdout-path = "serial1:115200n8";
7565 + status = "disabled";
7567 + mdio1_phy1: emdio1_phy@1 {
7569 + phy-connection-type = "xfi";
7571 + mdio1_phy2: emdio1_phy@2 {
7573 + phy-connection-type = "xfi";
7575 + mdio1_phy3: emdio1_phy@3 {
7577 + phy-connection-type = "xfi";
7579 + mdio1_phy4: emdio1_phy@4 {
7581 + phy-connection-type = "xfi";
7587 + mdio2_phy1: emdio2_phy@1 {
7588 + compatible = "ethernet-phy-ieee802.3-c45";
7589 + interrupts = <0 1 0x4>; /* Level high type */
7591 + phy-connection-type = "xfi";
7593 + mdio2_phy2: emdio2_phy@2 {
7594 + compatible = "ethernet-phy-ieee802.3-c45";
7595 + interrupts = <0 2 0x4>; /* Level high type */
7597 + phy-connection-type = "xfi";
7599 + mdio2_phy3: emdio2_phy@3 {
7600 + compatible = "ethernet-phy-ieee802.3-c45";
7601 + interrupts = <0 4 0x4>; /* Level high type */
7603 + phy-connection-type = "xfi";
7605 + mdio2_phy4: emdio2_phy@4 {
7606 + compatible = "ethernet-phy-ieee802.3-c45";
7607 + interrupts = <0 5 0x4>; /* Level high type */
7609 + phy-connection-type = "xfi";
7613 +/* Update DPMAC connections to external PHYs, under the assumption of
7614 + * SerDes 0x2a_0x41. This is currently the only SerDes supported on the board.
7616 +/* Leave Cortina PHYs commented out until proper driver is integrated
7618 + * phy-handle = <&mdio1_phy1>;
7621 + * phy-handle = <&mdio1_phy2>;
7624 + * phy-handle = <&mdio1_phy3>;
7627 + * phy-handle = <&mdio1_phy4>;
7632 + phy-handle = <&mdio2_phy1>;
7635 + phy-handle = <&mdio2_phy2>;
7638 + phy-handle = <&mdio2_phy3>;
7641 + phy-handle = <&mdio2_phy4>;
7643 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
7644 new file mode 100644
7645 index 00000000..833699ea
7647 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
7650 + * Device Tree Include file for Freescale Layerscape-2088A family SoC.
7652 + * Copyright 2016 Freescale Semiconductor, Inc.
7653 + * Copyright 2017 NXP
7655 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7657 + * This file is dual-licensed: you can use it either under the terms
7658 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7659 + * licensing only applies to this file, and not this project as a
7662 + * a) This library is free software; you can redistribute it and/or
7663 + * modify it under the terms of the GNU General Public License as
7664 + * published by the Free Software Foundation; either version 2 of the
7665 + * License, or (at your option) any later version.
7667 + * This library is distributed in the hope that it will be useful,
7668 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7669 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7670 + * GNU General Public License for more details.
7672 + * Or, alternatively,
7674 + * b) Permission is hereby granted, free of charge, to any person
7675 + * obtaining a copy of this software and associated documentation
7676 + * files (the "Software"), to deal in the Software without
7677 + * restriction, including without limitation the rights to use,
7678 + * copy, modify, merge, publish, distribute, sublicense, and/or
7679 + * sell copies of the Software, and to permit persons to whom the
7680 + * Software is furnished to do so, subject to the following
7683 + * The above copyright notice and this permission notice shall be
7684 + * included in all copies or substantial portions of the Software.
7686 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7687 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7688 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7689 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7690 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7691 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7692 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7693 + * OTHER DEALINGS IN THE SOFTWARE.
7696 +#include "fsl-ls208xa.dtsi"
7700 + device_type = "cpu";
7701 + compatible = "arm,cortex-a72";
7703 + clocks = <&clockgen 1 0>;
7704 + next-level-cache = <&cluster0_l2>;
7705 + #cooling-cells = <2>;
7706 + cpu-idle-states = <&CPU_PH20>;
7710 + device_type = "cpu";
7711 + compatible = "arm,cortex-a72";
7713 + clocks = <&clockgen 1 0>;
7714 + next-level-cache = <&cluster0_l2>;
7715 + cpu-idle-states = <&CPU_PH20>;
7719 + device_type = "cpu";
7720 + compatible = "arm,cortex-a72";
7722 + clocks = <&clockgen 1 1>;
7723 + next-level-cache = <&cluster1_l2>;
7724 + #cooling-cells = <2>;
7725 + cpu-idle-states = <&CPU_PH20>;
7729 + device_type = "cpu";
7730 + compatible = "arm,cortex-a72";
7732 + clocks = <&clockgen 1 1>;
7733 + next-level-cache = <&cluster1_l2>;
7734 + cpu-idle-states = <&CPU_PH20>;
7738 + device_type = "cpu";
7739 + compatible = "arm,cortex-a72";
7741 + clocks = <&clockgen 1 2>;
7742 + next-level-cache = <&cluster2_l2>;
7743 + #cooling-cells = <2>;
7744 + cpu-idle-states = <&CPU_PH20>;
7748 + device_type = "cpu";
7749 + compatible = "arm,cortex-a72";
7751 + clocks = <&clockgen 1 2>;
7752 + next-level-cache = <&cluster2_l2>;
7753 + cpu-idle-states = <&CPU_PH20>;
7757 + device_type = "cpu";
7758 + compatible = "arm,cortex-a72";
7760 + clocks = <&clockgen 1 3>;
7761 + next-level-cache = <&cluster3_l2>;
7762 + #cooling-cells = <2>;
7763 + cpu-idle-states = <&CPU_PH20>;
7767 + device_type = "cpu";
7768 + compatible = "arm,cortex-a72";
7770 + clocks = <&clockgen 1 3>;
7771 + next-level-cache = <&cluster3_l2>;
7772 + cpu-idle-states = <&CPU_PH20>;
7777 + * PSCI node is not added default, U-boot will add missing
7778 + * parts if it determines to use PSCI.
7780 + entry-method = "arm,psci";
7782 + CPU_PH20: cpu-ph20 {
7783 + compatible = "arm,idle-state";
7784 + idle-state-name = "PH20";
7785 + arm,psci-suspend-param = <0x0>;
7786 + entry-latency-us = <1000>;
7787 + exit-latency-us = <1000>;
7788 + min-residency-us = <3000>;
7792 + cluster0_l2: l2-cache0 {
7793 + compatible = "cache";
7796 + cluster1_l2: l2-cache1 {
7797 + compatible = "cache";
7800 + cluster2_l2: l2-cache2 {
7801 + compatible = "cache";
7804 + cluster3_l2: l2-cache3 {
7805 + compatible = "cache";
7810 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
7811 + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
7812 + 0x20 0x00000000 0x0 0x00002000>; /* configuration space */
7814 + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000
7815 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>;
7819 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
7820 + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
7821 + 0x28 0x00000000 0x0 0x00002000>; /* configuration space */
7823 + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000
7824 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>;
7828 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
7829 + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
7830 + 0x30 0x00000000 0x0 0x00002000>; /* configuration space */
7832 + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000
7833 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>;
7837 + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
7838 + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
7839 + 0x38 0x00000000 0x0 0x00002000>; /* configuration space */
7841 + ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000
7842 + 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>;
7844 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
7845 new file mode 100644
7846 index 00000000..b2374469
7848 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
7851 + * Device Tree file for Freescale LS2080A QDS Board.
7853 + * Copyright 2016 Freescale Semiconductor, Inc.
7854 + * Copyright 2017 NXP
7856 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
7858 + * This file is dual-licensed: you can use it either under the terms
7859 + * of the GPLv2 or the X11 license, at your option. Note that this dual
7860 + * licensing only applies to this file, and not this project as a
7863 + * a) This library is free software; you can redistribute it and/or
7864 + * modify it under the terms of the GNU General Public License as
7865 + * published by the Free Software Foundation; either version 2 of the
7866 + * License, or (at your option) any later version.
7868 + * This library is distributed in the hope that it will be useful,
7869 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7870 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7871 + * GNU General Public License for more details.
7873 + * Or, alternatively,
7875 + * b) Permission is hereby granted, free of charge, to any person
7876 + * obtaining a copy of this software and associated documentation
7877 + * files (the "Software"), to deal in the Software without
7878 + * restriction, including without limitation the rights to use,
7879 + * copy, modify, merge, publish, distribute, sublicense, and/or
7880 + * sell copies of the Software, and to permit persons to whom the
7881 + * Software is furnished to do so, subject to the following
7884 + * The above copyright notice and this permission notice shall be
7885 + * included in all copies or substantial portions of the Software.
7887 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
7888 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
7889 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
7890 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
7891 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
7892 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
7893 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
7894 + * OTHER DEALINGS IN THE SOFTWARE.
7904 + #address-cells = <2>;
7905 + #size-cells = <1>;
7906 + ranges = <0x0 0x0 0x5 0x80000000 0x08000000
7907 + 0x2 0x0 0x5 0x30000000 0x00010000
7908 + 0x3 0x0 0x5 0x20000000 0x00010000>;
7911 + #address-cells = <1>;
7912 + #size-cells = <1>;
7913 + compatible = "cfi-flash";
7914 + reg = <0x0 0x0 0x8000000>;
7916 + device-width = <1>;
7920 + compatible = "fsl,ifc-nand";
7921 + reg = <0x2 0x0 0x10000>;
7925 + reg = <0x3 0x0 0x10000>;
7926 + compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
7933 + compatible = "nxp,pca9547";
7935 + #address-cells = <1>;
7936 + #size-cells = <0>;
7938 + #address-cells = <1>;
7939 + #size-cells = <0>;
7942 + compatible = "dallas,ds3232";
7948 + #address-cells = <1>;
7949 + #size-cells = <0>;
7953 + compatible = "ti,ina220";
7955 + shunt-resistor = <500>;
7959 + compatible = "ti,ina220";
7961 + shunt-resistor = <1000>;
7966 + #address-cells = <1>;
7967 + #size-cells = <0>;
7971 + compatible = "adi,adt7461";
7979 + status = "disabled";
7983 + status = "disabled";
7987 + status = "disabled";
7992 + dflash0: n25q128a {
7993 + #address-cells = <1>;
7994 + #size-cells = <1>;
7995 + compatible = "st,m25p80";
7996 + spi-max-frequency = <3000000>;
7999 + dflash1: sst25wf040b {
8000 + #address-cells = <1>;
8001 + #size-cells = <1>;
8002 + compatible = "st,m25p80";
8003 + spi-max-frequency = <3000000>;
8006 + dflash2: en25s64 {
8007 + #address-cells = <1>;
8008 + #size-cells = <1>;
8009 + compatible = "st,m25p80";
8010 + spi-max-frequency = <3000000>;
8017 + flash0: s25fl256s1@0 {
8018 + #address-cells = <1>;
8019 + #size-cells = <1>;
8020 + compatible = "st,m25p80";
8021 + spi-max-frequency = <20000000>;
8024 + flash2: s25fl256s1@2 {
8025 + #address-cells = <1>;
8026 + #size-cells = <1>;
8027 + compatible = "st,m25p80";
8028 + spi-max-frequency = <20000000>;
8048 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
8049 new file mode 100644
8050 index 00000000..8e919dc8
8052 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
8055 + * Device Tree file for Freescale LS2080A RDB Board.
8057 + * Copyright 2016 Freescale Semiconductor, Inc.
8058 + * Copyright 2017 NXP
8060 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
8062 + * This file is dual-licensed: you can use it either under the terms
8063 + * of the GPLv2 or the X11 license, at your option. Note that this dual
8064 + * licensing only applies to this file, and not this project as a
8067 + * a) This library is free software; you can redistribute it and/or
8068 + * modify it under the terms of the GNU General Public License as
8069 + * published by the Free Software Foundation; either version 2 of the
8070 + * License, or (at your option) any later version.
8072 + * This library is distributed in the hope that it will be useful,
8073 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8074 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8075 + * GNU General Public License for more details.
8077 + * Or, alternatively,
8079 + * b) Permission is hereby granted, free of charge, to any person
8080 + * obtaining a copy of this software and associated documentation
8081 + * files (the "Software"), to deal in the Software without
8082 + * restriction, including without limitation the rights to use,
8083 + * copy, modify, merge, publish, distribute, sublicense, and/or
8084 + * sell copies of the Software, and to permit persons to whom the
8085 + * Software is furnished to do so, subject to the following
8088 + * The above copyright notice and this permission notice shall be
8089 + * included in all copies or substantial portions of the Software.
8091 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
8092 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
8093 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8094 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
8095 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
8096 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
8097 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
8098 + * OTHER DEALINGS IN THE SOFTWARE.
8107 + #address-cells = <2>;
8108 + #size-cells = <1>;
8109 + ranges = <0x0 0x0 0x5 0x80000000 0x08000000
8110 + 0x2 0x0 0x5 0x30000000 0x00010000
8111 + 0x3 0x0 0x5 0x20000000 0x00010000>;
8114 + #address-cells = <1>;
8115 + #size-cells = <1>;
8116 + compatible = "cfi-flash";
8117 + reg = <0x0 0x0 0x8000000>;
8119 + device-width = <1>;
8123 + compatible = "fsl,ifc-nand";
8124 + reg = <0x2 0x0 0x10000>;
8128 + reg = <0x3 0x0 0x10000>;
8129 + compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
8137 + compatible = "nxp,pca9547";
8139 + #address-cells = <1>;
8140 + #size-cells = <0>;
8141 + i2c-mux-never-disable;
8143 + #address-cells = <1>;
8144 + #size-cells = <0>;
8147 + compatible = "dallas,ds3232";
8153 + #address-cells = <1>;
8154 + #size-cells = <0>;
8158 + compatible = "adi,adt7461";
8166 + status = "disabled";
8170 + status = "disabled";
8174 + status = "disabled";
8179 + dflash0: n25q512a {
8180 + #address-cells = <1>;
8181 + #size-cells = <1>;
8182 + compatible = "st,m25p80";
8183 + spi-max-frequency = <3000000>;
8190 + flash0: s25fs512s@0 {
8191 + #address-cells = <1>;
8192 + #size-cells = <1>;
8193 + compatible = "spansion,m25p80";
8195 + spi-max-frequency = <20000000>;
8215 diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
8216 new file mode 100644
8217 index 00000000..f694cac0
8219 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
8222 + * Device Tree Include file for Freescale Layerscape-2080A family SoC.
8224 + * Copyright 2016 Freescale Semiconductor, Inc.
8225 + * Copyright 2017 NXP
8227 + * Abhimanyu Saini <abhimanyu.saini@nxp.com>
8229 + * This file is dual-licensed: you can use it either under the terms
8230 + * of the GPLv2 or the X11 license, at your option. Note that this dual
8231 + * licensing only applies to this file, and not this project as a
8234 + * a) This library is free software; you can redistribute it and/or
8235 + * modify it under the terms of the GNU General Public License as
8236 + * published by the Free Software Foundation; either version 2 of the
8237 + * License, or (at your option) any later version.
8239 + * This library is distributed in the hope that it will be useful,
8240 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
8241 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
8242 + * GNU General Public License for more details.
8244 + * Or, alternatively,
8246 + * b) Permission is hereby granted, free of charge, to any person
8247 + * obtaining a copy of this software and associated documentation
8248 + * files (the "Software"), to deal in the Software without
8249 + * restriction, including without limitation the rights to use,
8250 + * copy, modify, merge, publish, distribute, sublicense, and/or
8251 + * sell copies of the Software, and to permit persons to whom the
8252 + * Software is furnished to do so, subject to the following
8255 + * The above copyright notice and this permission notice shall be
8256 + * included in all copies or substantial portions of the Software.
8258 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
8259 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
8260 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8261 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
8262 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
8263 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
8264 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
8265 + * OTHER DEALINGS IN THE SOFTWARE.
8268 +#include <dt-bindings/thermal/thermal.h>
8269 +#include <dt-bindings/interrupt-controller/arm-gic.h>
8272 + compatible = "fsl,ls2080a";
8273 + interrupt-parent = <&gic>;
8274 + #address-cells = <2>;
8275 + #size-cells = <2>;
8279 + serial0 = &serial0;
8280 + serial1 = &serial1;
8284 + #address-cells = <1>;
8285 + #size-cells = <0>;
8289 + device_type = "memory";
8290 + reg = <0x00000000 0x80000000 0 0x80000000>;
8291 + /* DRAM space - 1, size : 2 GB DRAM */
8295 + compatible = "fixed-clock";
8296 + #clock-cells = <0>;
8297 + clock-frequency = <100000000>;
8298 + clock-output-names = "sysclk";
8301 + gic: interrupt-controller@6000000 {
8302 + compatible = "arm,gic-v3";
8303 + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
8304 + <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
8305 + <0x0 0x0c0c0000 0 0x2000>, /* GICC */
8306 + <0x0 0x0c0d0000 0 0x1000>, /* GICH */
8307 + <0x0 0x0c0e0000 0 0x20000>; /* GICV */
8308 + #interrupt-cells = <3>;
8309 + #address-cells = <2>;
8310 + #size-cells = <2>;
8312 + interrupt-controller;
8313 + interrupts = <1 9 0x4>;
8315 + its: gic-its@6020000 {
8316 + compatible = "arm,gic-v3-its";
8318 + reg = <0x0 0x6020000 0 0x20000>;
8322 + rstcr: syscon@1e60000 {
8323 + compatible = "fsl,ls2080a-rstcr", "syscon";
8324 + reg = <0x0 0x1e60000 0x0 0x4>;
8328 + compatible ="syscon-reboot";
8329 + regmap = <&rstcr>;
8335 + compatible = "arm,armv8-timer";
8336 + interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
8337 + <1 14 4>, /* Physical Non-Secure PPI, active-low */
8338 + <1 11 4>, /* Virtual PPI, active-low */
8339 + <1 10 4>; /* Hypervisor PPI, active-low */
8340 + fsl,erratum-a008585;
8344 + compatible = "arm,armv8-pmuv3";
8345 + interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
8349 + compatible = "simple-bus";
8350 + #address-cells = <2>;
8351 + #size-cells = <2>;
8354 + clockgen: clocking@1300000 {
8355 + compatible = "fsl,ls2080a-clockgen";
8356 + reg = <0 0x1300000 0 0xa0000>;
8357 + #clock-cells = <2>;
8358 + clocks = <&sysclk>;
8361 + dcfg: dcfg@1e00000 {
8362 + compatible = "fsl,ls2080a-dcfg", "syscon";
8363 + reg = <0x0 0x1e00000 0x0 0x10000>;
8367 + tmu: tmu@1f80000 {
8368 + compatible = "fsl,qoriq-tmu";
8369 + reg = <0x0 0x1f80000 0x0 0x10000>;
8370 + interrupts = <0 23 0x4>;
8371 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
8372 + fsl,tmu-calibration = <0x00000000 0x00000026
8373 + 0x00000001 0x0000002d
8374 + 0x00000002 0x00000032
8375 + 0x00000003 0x00000039
8376 + 0x00000004 0x0000003f
8377 + 0x00000005 0x00000046
8378 + 0x00000006 0x0000004d
8379 + 0x00000007 0x00000054
8380 + 0x00000008 0x0000005a
8381 + 0x00000009 0x00000061
8382 + 0x0000000a 0x0000006a
8383 + 0x0000000b 0x00000071
8385 + 0x00010000 0x00000025
8386 + 0x00010001 0x0000002c
8387 + 0x00010002 0x00000035
8388 + 0x00010003 0x0000003d
8389 + 0x00010004 0x00000045
8390 + 0x00010005 0x0000004e
8391 + 0x00010006 0x00000057
8392 + 0x00010007 0x00000061
8393 + 0x00010008 0x0000006b
8394 + 0x00010009 0x00000076
8396 + 0x00020000 0x00000029
8397 + 0x00020001 0x00000033
8398 + 0x00020002 0x0000003d
8399 + 0x00020003 0x00000049
8400 + 0x00020004 0x00000056
8401 + 0x00020005 0x00000061
8402 + 0x00020006 0x0000006d
8404 + 0x00030000 0x00000021
8405 + 0x00030001 0x0000002a
8406 + 0x00030002 0x0000003c
8407 + 0x00030003 0x0000004e>;
8409 + #thermal-sensor-cells = <1>;
8413 + cpu_thermal: cpu-thermal {
8414 + polling-delay-passive = <1000>;
8415 + polling-delay = <5000>;
8417 + thermal-sensors = <&tmu 4>;
8420 + cpu_alert: cpu-alert {
8421 + temperature = <75000>;
8422 + hysteresis = <2000>;
8425 + cpu_crit: cpu-crit {
8426 + temperature = <85000>;
8427 + hysteresis = <2000>;
8428 + type = "critical";
8434 + trip = <&cpu_alert>;
8436 + <&cpu0 THERMAL_NO_LIMIT
8437 + THERMAL_NO_LIMIT>;
8440 + trip = <&cpu_alert>;
8442 + <&cpu2 THERMAL_NO_LIMIT
8443 + THERMAL_NO_LIMIT>;
8446 + trip = <&cpu_alert>;
8448 + <&cpu4 THERMAL_NO_LIMIT
8449 + THERMAL_NO_LIMIT>;
8452 + trip = <&cpu_alert>;
8454 + <&cpu6 THERMAL_NO_LIMIT
8455 + THERMAL_NO_LIMIT>;
8461 + serial0: serial@21c0500 {
8462 + compatible = "fsl,ns16550", "ns16550a";
8463 + reg = <0x0 0x21c0500 0x0 0x100>;
8464 + clocks = <&clockgen 4 3>;
8465 + interrupts = <0 32 0x4>; /* Level high type */
8468 + serial1: serial@21c0600 {
8469 + compatible = "fsl,ns16550", "ns16550a";
8470 + reg = <0x0 0x21c0600 0x0 0x100>;
8471 + clocks = <&clockgen 4 3>;
8472 + interrupts = <0 32 0x4>; /* Level high type */
8475 + cluster1_core0_watchdog: wdt@c000000 {
8476 + compatible = "arm,sp805-wdt", "arm,primecell";
8477 + reg = <0x0 0xc000000 0x0 0x1000>;
8478 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8479 + clock-names = "apb_pclk", "wdog_clk";
8482 + cluster1_core1_watchdog: wdt@c010000 {
8483 + compatible = "arm,sp805-wdt", "arm,primecell";
8484 + reg = <0x0 0xc010000 0x0 0x1000>;
8485 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8486 + clock-names = "apb_pclk", "wdog_clk";
8489 + cluster2_core0_watchdog: wdt@c100000 {
8490 + compatible = "arm,sp805-wdt", "arm,primecell";
8491 + reg = <0x0 0xc100000 0x0 0x1000>;
8492 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8493 + clock-names = "apb_pclk", "wdog_clk";
8496 + cluster2_core1_watchdog: wdt@c110000 {
8497 + compatible = "arm,sp805-wdt", "arm,primecell";
8498 + reg = <0x0 0xc110000 0x0 0x1000>;
8499 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8500 + clock-names = "apb_pclk", "wdog_clk";
8503 + cluster3_core0_watchdog: wdt@c200000 {
8504 + compatible = "arm,sp805-wdt", "arm,primecell";
8505 + reg = <0x0 0xc200000 0x0 0x1000>;
8506 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8507 + clock-names = "apb_pclk", "wdog_clk";
8510 + cluster3_core1_watchdog: wdt@c210000 {
8511 + compatible = "arm,sp805-wdt", "arm,primecell";
8512 + reg = <0x0 0xc210000 0x0 0x1000>;
8513 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8514 + clock-names = "apb_pclk", "wdog_clk";
8517 + cluster4_core0_watchdog: wdt@c300000 {
8518 + compatible = "arm,sp805-wdt", "arm,primecell";
8519 + reg = <0x0 0xc300000 0x0 0x1000>;
8520 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8521 + clock-names = "apb_pclk", "wdog_clk";
8524 + cluster4_core1_watchdog: wdt@c310000 {
8525 + compatible = "arm,sp805-wdt", "arm,primecell";
8526 + reg = <0x0 0xc310000 0x0 0x1000>;
8527 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8528 + clock-names = "apb_pclk", "wdog_clk";
8531 + crypto: crypto@8000000 {
8532 + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
8533 + fsl,sec-era = <8>;
8534 + #address-cells = <1>;
8535 + #size-cells = <1>;
8536 + ranges = <0x0 0x00 0x8000000 0x100000>;
8537 + reg = <0x00 0x8000000 0x0 0x100000>;
8538 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
8541 + sec_jr0: jr@10000 {
8542 + compatible = "fsl,sec-v5.0-job-ring",
8543 + "fsl,sec-v4.0-job-ring";
8544 + reg = <0x10000 0x10000>;
8545 + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
8548 + sec_jr1: jr@20000 {
8549 + compatible = "fsl,sec-v5.0-job-ring",
8550 + "fsl,sec-v4.0-job-ring";
8551 + reg = <0x20000 0x10000>;
8552 + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
8555 + sec_jr2: jr@30000 {
8556 + compatible = "fsl,sec-v5.0-job-ring",
8557 + "fsl,sec-v4.0-job-ring";
8558 + reg = <0x30000 0x10000>;
8559 + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
8562 + sec_jr3: jr@40000 {
8563 + compatible = "fsl,sec-v5.0-job-ring",
8564 + "fsl,sec-v4.0-job-ring";
8565 + reg = <0x40000 0x10000>;
8566 + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
8570 + fsl_mc: fsl-mc@80c000000 {
8571 + compatible = "fsl,qoriq-mc";
8572 + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
8573 + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
8574 + msi-parent = <&its>;
8575 + iommu-map = <0 &smmu 0 0>; /* This is fixed-up by u-boot */
8576 + #address-cells = <3>;
8577 + #size-cells = <1>;
8580 + * Region type 0x0 - MC portals
8581 + * Region type 0x1 - QBMAN portals
8583 + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
8584 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
8587 + * Define the maximum number of MACs present on the SoC.
8590 + #address-cells = <1>;
8591 + #size-cells = <0>;
8594 + compatible = "fsl,qoriq-mc-dpmac";
8599 + compatible = "fsl,qoriq-mc-dpmac";
8604 + compatible = "fsl,qoriq-mc-dpmac";
8609 + compatible = "fsl,qoriq-mc-dpmac";
8614 + compatible = "fsl,qoriq-mc-dpmac";
8619 + compatible = "fsl,qoriq-mc-dpmac";
8624 + compatible = "fsl,qoriq-mc-dpmac";
8629 + compatible = "fsl,qoriq-mc-dpmac";
8634 + compatible = "fsl,qoriq-mc-dpmac";
8638 + dpmac10: dpmac@a {
8639 + compatible = "fsl,qoriq-mc-dpmac";
8643 + dpmac11: dpmac@b {
8644 + compatible = "fsl,qoriq-mc-dpmac";
8648 + dpmac12: dpmac@c {
8649 + compatible = "fsl,qoriq-mc-dpmac";
8653 + dpmac13: dpmac@d {
8654 + compatible = "fsl,qoriq-mc-dpmac";
8658 + dpmac14: dpmac@e {
8659 + compatible = "fsl,qoriq-mc-dpmac";
8663 + dpmac15: dpmac@f {
8664 + compatible = "fsl,qoriq-mc-dpmac";
8668 + dpmac16: dpmac@10 {
8669 + compatible = "fsl,qoriq-mc-dpmac";
8675 + smmu: iommu@5000000 {
8676 + compatible = "arm,mmu-500";
8677 + reg = <0 0x5000000 0 0x800000>;
8678 + #global-interrupts = <12>;
8679 + #iommu-cells = <1>;
8680 + stream-match-mask = <0x7C00>;
8681 + interrupts = <0 13 4>, /* global secure fault */
8682 + <0 14 4>, /* combined secure interrupt */
8683 + <0 15 4>, /* global non-secure fault */
8684 + <0 16 4>, /* combined non-secure interrupt */
8685 + /* performance counter interrupts 0-7 */
8686 + <0 211 4>, <0 212 4>,
8687 + <0 213 4>, <0 214 4>,
8688 + <0 215 4>, <0 216 4>,
8689 + <0 217 4>, <0 218 4>,
8690 + /* per context interrupt, 64 interrupts */
8691 + <0 146 4>, <0 147 4>,
8692 + <0 148 4>, <0 149 4>,
8693 + <0 150 4>, <0 151 4>,
8694 + <0 152 4>, <0 153 4>,
8695 + <0 154 4>, <0 155 4>,
8696 + <0 156 4>, <0 157 4>,
8697 + <0 158 4>, <0 159 4>,
8698 + <0 160 4>, <0 161 4>,
8699 + <0 162 4>, <0 163 4>,
8700 + <0 164 4>, <0 165 4>,
8701 + <0 166 4>, <0 167 4>,
8702 + <0 168 4>, <0 169 4>,
8703 + <0 170 4>, <0 171 4>,
8704 + <0 172 4>, <0 173 4>,
8705 + <0 174 4>, <0 175 4>,
8706 + <0 176 4>, <0 177 4>,
8707 + <0 178 4>, <0 179 4>,
8708 + <0 180 4>, <0 181 4>,
8709 + <0 182 4>, <0 183 4>,
8710 + <0 184 4>, <0 185 4>,
8711 + <0 186 4>, <0 187 4>,
8712 + <0 188 4>, <0 189 4>,
8713 + <0 190 4>, <0 191 4>,
8714 + <0 192 4>, <0 193 4>,
8715 + <0 194 4>, <0 195 4>,
8716 + <0 196 4>, <0 197 4>,
8717 + <0 198 4>, <0 199 4>,
8718 + <0 200 4>, <0 201 4>,
8719 + <0 202 4>, <0 203 4>,
8720 + <0 204 4>, <0 205 4>,
8721 + <0 206 4>, <0 207 4>,
8722 + <0 208 4>, <0 209 4>;
8725 + dspi: dspi@2100000 {
8726 + status = "disabled";
8727 + compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
8728 + #address-cells = <1>;
8729 + #size-cells = <0>;
8730 + reg = <0x0 0x2100000 0x0 0x10000>;
8731 + interrupts = <0 26 0x4>; /* Level high type */
8732 + clocks = <&clockgen 4 3>;
8733 + clock-names = "dspi";
8734 + spi-num-chipselects = <5>;
8738 + esdhc: esdhc@2140000 {
8739 + status = "disabled";
8740 + compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
8741 + reg = <0x0 0x2140000 0x0 0x10000>;
8742 + interrupts = <0 28 0x4>; /* Level high type */
8743 + clocks = <&clockgen 4 1>;
8744 + voltage-ranges = <1800 1800 3300 3300>;
8750 + gpio0: gpio@2300000 {
8751 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
8752 + reg = <0x0 0x2300000 0x0 0x10000>;
8753 + interrupts = <0 36 0x4>; /* Level high type */
8756 + #gpio-cells = <2>;
8757 + interrupt-controller;
8758 + #interrupt-cells = <2>;
8761 + gpio1: gpio@2310000 {
8762 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
8763 + reg = <0x0 0x2310000 0x0 0x10000>;
8764 + interrupts = <0 36 0x4>; /* Level high type */
8767 + #gpio-cells = <2>;
8768 + interrupt-controller;
8769 + #interrupt-cells = <2>;
8772 + gpio2: gpio@2320000 {
8773 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
8774 + reg = <0x0 0x2320000 0x0 0x10000>;
8775 + interrupts = <0 37 0x4>; /* Level high type */
8778 + #gpio-cells = <2>;
8779 + interrupt-controller;
8780 + #interrupt-cells = <2>;
8783 + gpio3: gpio@2330000 {
8784 + compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
8785 + reg = <0x0 0x2330000 0x0 0x10000>;
8786 + interrupts = <0 37 0x4>; /* Level high type */
8789 + #gpio-cells = <2>;
8790 + interrupt-controller;
8791 + #interrupt-cells = <2>;
8794 + /* TODO: WRIOP (CCSR?) */
8795 + emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
8796 + * E-MDIO1: 0x1_6000
8798 + compatible = "fsl,fman-memac-mdio";
8799 + reg = <0x0 0x8B96000 0x0 0x1000>;
8800 + device_type = "mdio"; /* TODO: is this necessary? */
8801 + little-endian; /* force the driver in LE mode */
8803 + /* Not necessary on the QDS, but needed on the RDB */
8804 + #address-cells = <1>;
8805 + #size-cells = <0>;
8808 + emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
8809 + * E-MDIO2: 0x1_7000
8811 + compatible = "fsl,fman-memac-mdio";
8812 + reg = <0x0 0x8B97000 0x0 0x1000>;
8813 + device_type = "mdio"; /* TODO: is this necessary? */
8814 + little-endian; /* force the driver in LE mode */
8816 + #address-cells = <1>;
8817 + #size-cells = <0>;
8820 + pcs_mdio1: mdio@0x8c07000 {
8821 + compatible = "fsl,fman-memac-mdio";
8822 + reg = <0x0 0x8c07000 0x0 0x1000>;
8823 + device_type = "mdio";
8826 + #address-cells = <1>;
8827 + #size-cells = <0>;
8830 + pcs_mdio2: mdio@0x8c0b000 {
8831 + compatible = "fsl,fman-memac-mdio";
8832 + reg = <0x0 0x8c0b000 0x0 0x1000>;
8833 + device_type = "mdio";
8836 + #address-cells = <1>;
8837 + #size-cells = <0>;
8840 + pcs_mdio3: mdio@0x8c0f000 {
8841 + compatible = "fsl,fman-memac-mdio";
8842 + reg = <0x0 0x8c0f000 0x0 0x1000>;
8843 + device_type = "mdio";
8846 + #address-cells = <1>;
8847 + #size-cells = <0>;
8850 + pcs_mdio4: mdio@0x8c13000 {
8851 + compatible = "fsl,fman-memac-mdio";
8852 + reg = <0x0 0x8c13000 0x0 0x1000>;
8853 + device_type = "mdio";
8856 + #address-cells = <1>;
8857 + #size-cells = <0>;
8860 + pcs_mdio5: mdio@0x8c17000 {
8861 + status = "disabled";
8862 + compatible = "fsl,fman-memac-mdio";
8863 + reg = <0x0 0x8c17000 0x0 0x1000>;
8864 + device_type = "mdio";
8867 + #address-cells = <1>;
8868 + #size-cells = <0>;
8871 + pcs_mdio6: mdio@0x8c1b000 {
8872 + status = "disabled";
8873 + compatible = "fsl,fman-memac-mdio";
8874 + reg = <0x0 0x8c1b000 0x0 0x1000>;
8875 + device_type = "mdio";
8878 + #address-cells = <1>;
8879 + #size-cells = <0>;
8882 + pcs_mdio7: mdio@0x8c1f000 {
8883 + status = "disabled";
8884 + compatible = "fsl,fman-memac-mdio";
8885 + reg = <0x0 0x8c1f000 0x0 0x1000>;
8886 + device_type = "mdio";
8889 + #address-cells = <1>;
8890 + #size-cells = <0>;
8893 + pcs_mdio8: mdio@0x8c23000 {
8894 + status = "disabled";
8895 + compatible = "fsl,fman-memac-mdio";
8896 + reg = <0x0 0x8c23000 0x0 0x1000>;
8897 + device_type = "mdio";
8900 + #address-cells = <1>;
8901 + #size-cells = <0>;
8904 + i2c0: i2c@2000000 {
8905 + status = "disabled";
8906 + compatible = "fsl,vf610-i2c";
8907 + #address-cells = <1>;
8908 + #size-cells = <0>;
8909 + reg = <0x0 0x2000000 0x0 0x10000>;
8910 + interrupts = <0 34 0x4>; /* Level high type */
8911 + clock-names = "i2c";
8912 + clocks = <&clockgen 4 3>;
8915 + i2c1: i2c@2010000 {
8916 + status = "disabled";
8917 + compatible = "fsl,vf610-i2c";
8918 + #address-cells = <1>;
8919 + #size-cells = <0>;
8920 + reg = <0x0 0x2010000 0x0 0x10000>;
8921 + interrupts = <0 34 0x4>; /* Level high type */
8922 + clock-names = "i2c";
8923 + clocks = <&clockgen 4 3>;
8926 + i2c2: i2c@2020000 {
8927 + status = "disabled";
8928 + compatible = "fsl,vf610-i2c";
8929 + #address-cells = <1>;
8930 + #size-cells = <0>;
8931 + reg = <0x0 0x2020000 0x0 0x10000>;
8932 + interrupts = <0 35 0x4>; /* Level high type */
8933 + clock-names = "i2c";
8934 + clocks = <&clockgen 4 3>;
8937 + i2c3: i2c@2030000 {
8938 + status = "disabled";
8939 + compatible = "fsl,vf610-i2c";
8940 + #address-cells = <1>;
8941 + #size-cells = <0>;
8942 + reg = <0x0 0x2030000 0x0 0x10000>;
8943 + interrupts = <0 35 0x4>; /* Level high type */
8944 + clock-names = "i2c";
8945 + clocks = <&clockgen 4 3>;
8948 + ifc: ifc@2240000 {
8949 + compatible = "fsl,ifc", "simple-bus";
8950 + reg = <0x0 0x2240000 0x0 0x20000>;
8951 + interrupts = <0 21 0x4>; /* Level high type */
8953 + #address-cells = <2>;
8954 + #size-cells = <1>;
8956 + ranges = <0 0 0x5 0x80000000 0x08000000
8957 + 2 0 0x5 0x30000000 0x00010000
8958 + 3 0 0x5 0x20000000 0x00010000>;
8961 + qspi: quadspi@20c0000 {
8962 + status = "disabled";
8963 + compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
8964 + #address-cells = <1>;
8965 + #size-cells = <0>;
8966 + reg = <0x0 0x20c0000 0x0 0x10000>,
8967 + <0x0 0x20000000 0x0 0x10000000>;
8968 + reg-names = "QuadSPI", "QuadSPI-memory";
8969 + interrupts = <0 25 0x4>; /* Level high type */
8970 + clocks = <&clockgen 4 3>, <&clockgen 4 3>;
8971 + clock-names = "qspi_en", "qspi";
8974 + pcie1: pcie@3400000 {
8975 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
8977 + reg-names = "regs", "config";
8978 + interrupts = <0 108 0x4>; /* aer interrupt */
8979 + interrupt-names = "aer";
8980 + #address-cells = <3>;
8981 + #size-cells = <2>;
8982 + device_type = "pci";
8985 + bus-range = <0x0 0xff>;
8986 + msi-parent = <&its>;
8987 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
8988 + #interrupt-cells = <1>;
8989 + interrupt-map-mask = <0 0 0 7>;
8990 + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
8991 + <0000 0 0 2 &gic 0 0 0 110 4>,
8992 + <0000 0 0 3 &gic 0 0 0 111 4>,
8993 + <0000 0 0 4 &gic 0 0 0 112 4>;
8996 + pcie2: pcie@3500000 {
8997 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
8999 + reg-names = "regs", "config";
9000 + interrupts = <0 113 0x4>; /* aer interrupt */
9001 + interrupt-names = "aer";
9002 + #address-cells = <3>;
9003 + #size-cells = <2>;
9004 + device_type = "pci";
9007 + bus-range = <0x0 0xff>;
9008 + msi-parent = <&its>;
9009 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9010 + #interrupt-cells = <1>;
9011 + interrupt-map-mask = <0 0 0 7>;
9012 + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
9013 + <0000 0 0 2 &gic 0 0 0 115 4>,
9014 + <0000 0 0 3 &gic 0 0 0 116 4>,
9015 + <0000 0 0 4 &gic 0 0 0 117 4>;
9018 + pcie3: pcie@3600000 {
9019 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
9021 + reg-names = "regs", "config";
9022 + interrupts = <0 118 0x4>; /* aer interrupt */
9023 + interrupt-names = "aer";
9024 + #address-cells = <3>;
9025 + #size-cells = <2>;
9026 + device_type = "pci";
9029 + bus-range = <0x0 0xff>;
9030 + msi-parent = <&its>;
9031 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9032 + #interrupt-cells = <1>;
9033 + interrupt-map-mask = <0 0 0 7>;
9034 + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 4>,
9035 + <0000 0 0 2 &gic 0 0 0 120 4>,
9036 + <0000 0 0 3 &gic 0 0 0 121 4>,
9037 + <0000 0 0 4 &gic 0 0 0 122 4>;
9040 + pcie4: pcie@3700000 {
9041 + compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
9043 + reg-names = "regs", "config";
9044 + interrupts = <0 123 0x4>; /* aer interrupt */
9045 + interrupt-names = "aer";
9046 + #address-cells = <3>;
9047 + #size-cells = <2>;
9048 + device_type = "pci";
9051 + bus-range = <0x0 0xff>;
9052 + msi-parent = <&its>;
9053 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
9054 + #interrupt-cells = <1>;
9055 + interrupt-map-mask = <0 0 0 7>;
9056 + interrupt-map = <0000 0 0 1 &gic 0 0 0 124 4>,
9057 + <0000 0 0 2 &gic 0 0 0 125 4>,
9058 + <0000 0 0 3 &gic 0 0 0 126 4>,
9059 + <0000 0 0 4 &gic 0 0 0 127 4>;
9062 + sata0: sata@3200000 {
9063 + status = "disabled";
9064 + compatible = "fsl,ls2080a-ahci";
9065 + reg = <0x0 0x3200000 0x0 0x10000>;
9066 + interrupts = <0 133 0x4>; /* Level high type */
9067 + clocks = <&clockgen 4 3>;
9071 + sata1: sata@3210000 {
9072 + status = "disabled";
9073 + compatible = "fsl,ls2080a-ahci";
9074 + reg = <0x0 0x3210000 0x0 0x10000>;
9075 + interrupts = <0 136 0x4>; /* Level high type */
9076 + clocks = <&clockgen 4 3>;
9080 + usb0: usb3@3100000 {
9081 + status = "disabled";
9082 + compatible = "snps,dwc3";
9083 + reg = <0x0 0x3100000 0x0 0x10000>;
9084 + interrupts = <0 80 0x4>; /* Level high type */
9086 + snps,quirk-frame-length-adjustment = <0x20>;
9087 + snps,dis_rxdet_inp3_quirk;
9090 + usb1: usb3@3110000 {
9091 + status = "disabled";
9092 + compatible = "snps,dwc3";
9093 + reg = <0x0 0x3110000 0x0 0x10000>;
9094 + interrupts = <0 81 0x4>; /* Level high type */
9096 + snps,quirk-frame-length-adjustment = <0x20>;
9097 + snps,dis_rxdet_inp3_quirk;
9100 + serdes1: serdes@1ea0000 {
9101 + reg = <0x0 0x1ea0000 0 0x00002000>;
9105 + compatible = "arm,ccn-504";
9106 + reg = <0x0 0x04000000 0x0 0x01000000>;
9107 + interrupts = <0 12 4>;
9110 + ftm0: ftm0@2800000 {
9111 + compatible = "fsl,ftm-alarm";
9112 + reg = <0x0 0x2800000 0x0 0x10000>;
9113 + interrupts = <0 44 4>;
9117 + ddr1: memory-controller@1080000 {
9118 + compatible = "fsl,qoriq-memory-controller";
9119 + reg = <0x0 0x1080000 0x0 0x1000>;
9120 + interrupts = <0 17 0x4>;
9124 + ddr2: memory-controller@1090000 {
9125 + compatible = "fsl,qoriq-memory-controller";
9126 + reg = <0x0 0x1090000 0x0 0x1000>;
9127 + interrupts = <0 18 0x4>;
9131 diff --git a/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
9132 new file mode 100644
9133 index 00000000..14680adb
9135 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
9138 + * QorIQ BMan Portals device tree
9140 + * Copyright 2011-2016 Freescale Semiconductor Inc.
9142 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9146 + #address-cells = <1>;
9147 + #size-cells = <1>;
9148 + compatible = "simple-bus";
9152 + compatible = "fsl,bman-portal";
9153 + reg = <0x0 0x4000 0x4000000 0x4000>;
9154 + interrupts = <0 173 0x4>;
9157 + bman-portal@10000 {
9159 + compatible = "fsl,bman-portal";
9160 + reg = <0x10000 0x4000 0x4010000 0x4000>;
9161 + interrupts = <0 175 0x4>;
9164 + bman-portal@20000 {
9166 + compatible = "fsl,bman-portal";
9167 + reg = <0x20000 0x4000 0x4020000 0x4000>;
9168 + interrupts = <0 177 0x4>;
9171 + bman-portal@30000 {
9173 + compatible = "fsl,bman-portal";
9174 + reg = <0x30000 0x4000 0x4030000 0x4000>;
9175 + interrupts = <0 179 0x4>;
9178 + bman-portal@40000 {
9180 + compatible = "fsl,bman-portal";
9181 + reg = <0x40000 0x4000 0x4040000 0x4000>;
9182 + interrupts = <0 181 0x4>;
9185 + bman-portal@50000 {
9187 + compatible = "fsl,bman-portal";
9188 + reg = <0x50000 0x4000 0x4050000 0x4000>;
9189 + interrupts = <0 183 0x4>;
9192 + bman-portal@60000 {
9194 + compatible = "fsl,bman-portal";
9195 + reg = <0x60000 0x4000 0x4060000 0x4000>;
9196 + interrupts = <0 185 0x4>;
9199 + bman-portal@70000 {
9201 + compatible = "fsl,bman-portal";
9202 + reg = <0x70000 0x4000 0x4070000 0x4000>;
9203 + interrupts = <0 187 0x4>;
9206 + bman-portal@80000 {
9208 + compatible = "fsl,bman-portal";
9209 + reg = <0x80000 0x4000 0x4080000 0x4000>;
9210 + interrupts = <0 189 0x4>;
9214 + compatible = "fsl,bpid-range";
9215 + fsl,bpid-range = <32 32>;
9218 diff --git a/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
9219 new file mode 100644
9220 index 00000000..eb5af912
9222 +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
9225 + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
9227 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
9229 + * Redistribution and use in source and binary forms, with or without
9230 + * modification, are permitted provided that the following conditions are met:
9231 + * * Redistributions of source code must retain the above copyright
9232 + * notice, this list of conditions and the following disclaimer.
9233 + * * Redistributions in binary form must reproduce the above copyright
9234 + * notice, this list of conditions and the following disclaimer in the
9235 + * documentation and/or other materials provided with the distribution.
9236 + * * Neither the name of Freescale Semiconductor nor the
9237 + * names of its contributors may be used to endorse or promote products
9238 + * derived from this software without specific prior written permission.
9241 + * ALTERNATIVELY, this software may be distributed under the terms of the
9242 + * GNU General Public License ("GPL") as published by the Free Software
9243 + * Foundation, either version 2 of that License or (at your option) any
9246 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
9247 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
9248 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
9249 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
9250 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
9251 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
9252 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
9253 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
9254 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
9255 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
9258 +fsldpaa: fsl,dpaa {
9259 + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa";
9261 + compatible = "fsl,dpa-ethernet";
9262 + fsl,fman-mac = <&enet0>;
9265 + compatible = "fsl,dpa-ethernet";
9266 + fsl,fman-mac = <&enet1>;
9269 + compatible = "fsl,dpa-ethernet";
9270 + fsl,fman-mac = <&enet2>;
9273 + compatible = "fsl,dpa-ethernet";
9274 + fsl,fman-mac = <&enet3>;
9277 + compatible = "fsl,dpa-ethernet";
9278 + fsl,fman-mac = <&enet4>;
9281 + compatible = "fsl,dpa-ethernet";
9282 + fsl,fman-mac = <&enet5>;
9285 + compatible = "fsl,dpa-ethernet";
9286 + fsl,fman-mac = <&enet6>;
9290 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
9291 new file mode 100644
9292 index 00000000..474bff5e
9294 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
9297 + * QorIQ FMan v3 10g port #0 device tree
9299 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9301 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9305 + fman0_rx_0x10: port@90000 {
9306 + cell-index = <0x10>;
9307 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
9308 + reg = <0x90000 0x1000>;
9309 + fsl,fman-10g-port;
9312 + fman0_tx_0x30: port@b0000 {
9313 + cell-index = <0x30>;
9314 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
9315 + reg = <0xb0000 0x1000>;
9316 + fsl,fman-10g-port;
9317 + fsl,qman-channel-id = <0x800>;
9321 + cell-index = <0x8>;
9322 + compatible = "fsl,fman-memac";
9323 + reg = <0xf0000 0x1000>;
9324 + fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
9325 + pcsphy-handle = <&pcsphy6>;
9329 + #address-cells = <1>;
9330 + #size-cells = <0>;
9331 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9332 + reg = <0xf1000 0x1000>;
9334 + pcsphy6: ethernet-phy@0 {
9339 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
9340 new file mode 100644
9341 index 00000000..d4326f85
9343 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
9346 + * QorIQ FMan v3 10g port #1 device tree
9348 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9350 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9354 + fman0_rx_0x11: port@91000 {
9355 + cell-index = <0x11>;
9356 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
9357 + reg = <0x91000 0x1000>;
9358 + fsl,fman-10g-port;
9361 + fman0_tx_0x31: port@b1000 {
9362 + cell-index = <0x31>;
9363 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
9364 + reg = <0xb1000 0x1000>;
9365 + fsl,fman-10g-port;
9366 + fsl,qman-channel-id = <0x801>;
9370 + cell-index = <0x9>;
9371 + compatible = "fsl,fman-memac";
9372 + reg = <0xf2000 0x1000>;
9373 + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
9374 + pcsphy-handle = <&pcsphy7>;
9378 + #address-cells = <1>;
9379 + #size-cells = <0>;
9380 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9381 + reg = <0xf3000 0x1000>;
9383 + pcsphy7: ethernet-phy@0 {
9388 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
9389 new file mode 100644
9390 index 00000000..7170cab9
9392 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
9395 + * QorIQ FMan v3 1g port #0 device tree
9397 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9399 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9403 + fman0_rx_0x08: port@88000 {
9404 + cell-index = <0x8>;
9405 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9406 + reg = <0x88000 0x1000>;
9409 + fman0_tx_0x28: port@a8000 {
9410 + cell-index = <0x28>;
9411 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9412 + reg = <0xa8000 0x1000>;
9413 + fsl,qman-channel-id = <0x802>;
9418 + compatible = "fsl,fman-memac";
9419 + reg = <0xe0000 0x1000>;
9420 + fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
9421 + ptp-timer = <&ptp_timer0>;
9422 + pcsphy-handle = <&pcsphy0>;
9426 + #address-cells = <1>;
9427 + #size-cells = <0>;
9428 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9429 + reg = <0xe1000 0x1000>;
9431 + pcsphy0: ethernet-phy@0 {
9436 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
9437 new file mode 100644
9438 index 00000000..c7eb8b6e
9440 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
9443 + * QorIQ FMan v3 1g port #1 device tree
9445 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9447 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9451 + fman0_rx_0x09: port@89000 {
9452 + cell-index = <0x9>;
9453 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9454 + reg = <0x89000 0x1000>;
9457 + fman0_tx_0x29: port@a9000 {
9458 + cell-index = <0x29>;
9459 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9460 + reg = <0xa9000 0x1000>;
9461 + fsl,qman-channel-id = <0x803>;
9466 + compatible = "fsl,fman-memac";
9467 + reg = <0xe2000 0x1000>;
9468 + fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
9469 + ptp-timer = <&ptp_timer0>;
9470 + pcsphy-handle = <&pcsphy1>;
9474 + #address-cells = <1>;
9475 + #size-cells = <0>;
9476 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9477 + reg = <0xe3000 0x1000>;
9479 + pcsphy1: ethernet-phy@0 {
9484 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
9485 new file mode 100644
9486 index 00000000..56f9f0dd
9488 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
9491 + * QorIQ FMan v3 1g port #2 device tree
9493 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9495 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9499 + fman0_rx_0x0a: port@8a000 {
9500 + cell-index = <0xa>;
9501 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9502 + reg = <0x8a000 0x1000>;
9505 + fman0_tx_0x2a: port@aa000 {
9506 + cell-index = <0x2a>;
9507 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9508 + reg = <0xaa000 0x1000>;
9509 + fsl,qman-channel-id = <0x804>;
9514 + compatible = "fsl,fman-memac";
9515 + reg = <0xe4000 0x1000>;
9516 + fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
9517 + ptp-timer = <&ptp_timer0>;
9518 + pcsphy-handle = <&pcsphy2>;
9522 + #address-cells = <1>;
9523 + #size-cells = <0>;
9524 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9525 + reg = <0xe5000 0x1000>;
9527 + pcsphy2: ethernet-phy@0 {
9532 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
9533 new file mode 100644
9534 index 00000000..bbe7dbaf
9536 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
9539 + * QorIQ FMan v3 1g port #3 device tree
9541 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9543 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9547 + fman0_rx_0x0b: port@8b000 {
9548 + cell-index = <0xb>;
9549 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9550 + reg = <0x8b000 0x1000>;
9553 + fman0_tx_0x2b: port@ab000 {
9554 + cell-index = <0x2b>;
9555 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9556 + reg = <0xab000 0x1000>;
9557 + fsl,qman-channel-id = <0x805>;
9562 + compatible = "fsl,fman-memac";
9563 + reg = <0xe6000 0x1000>;
9564 + fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
9565 + ptp-timer = <&ptp_timer0>;
9566 + pcsphy-handle = <&pcsphy3>;
9570 + #address-cells = <1>;
9571 + #size-cells = <0>;
9572 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9573 + reg = <0xe7000 0x1000>;
9575 + pcsphy3: ethernet-phy@0 {
9580 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
9581 new file mode 100644
9582 index 00000000..ead4f062
9584 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
9587 + * QorIQ FMan v3 1g port #4 device tree
9589 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9591 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9595 + fman0_rx_0x0c: port@8c000 {
9596 + cell-index = <0xc>;
9597 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9598 + reg = <0x8c000 0x1000>;
9601 + fman0_tx_0x2c: port@ac000 {
9602 + cell-index = <0x2c>;
9603 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9604 + reg = <0xac000 0x1000>;
9605 + fsl,qman-channel-id = <0x806>;
9610 + compatible = "fsl,fman-memac";
9611 + reg = <0xe8000 0x1000>;
9612 + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
9613 + ptp-timer = <&ptp_timer0>;
9614 + pcsphy-handle = <&pcsphy4>;
9618 + #address-cells = <1>;
9619 + #size-cells = <0>;
9620 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9621 + reg = <0xe9000 0x1000>;
9623 + pcsphy4: ethernet-phy@0 {
9628 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
9629 new file mode 100644
9630 index 00000000..389eadaf
9632 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
9635 + * QorIQ FMan v3 1g port #5 device tree
9637 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9639 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9643 + fman0_rx_0x0d: port@8d000 {
9644 + cell-index = <0xd>;
9645 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx";
9646 + reg = <0x8d000 0x1000>;
9649 + fman0_tx_0x2d: port@ad000 {
9650 + cell-index = <0x2d>;
9651 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx";
9652 + reg = <0xad000 0x1000>;
9653 + fsl,qman-channel-id = <0x807>;
9658 + compatible = "fsl,fman-memac";
9659 + reg = <0xea000 0x1000>;
9660 + fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
9661 + ptp-timer = <&ptp_timer0>;
9662 + pcsphy-handle = <&pcsphy5>;
9666 + #address-cells = <1>;
9667 + #size-cells = <0>;
9668 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9669 + reg = <0xeb000 0x1000>;
9671 + pcsphy5: ethernet-phy@0 {
9676 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
9677 new file mode 100644
9678 index 00000000..2d0df20d
9680 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
9683 + * QorIQ FMan v3 OH ports device tree
9685 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9687 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9692 + fman0_oh1: port@82000 {
9694 + compatible = "fsl,fman-port-oh";
9695 + reg = <0x82000 0x1000>;
9698 + fman0_oh2: port@83000 {
9700 + compatible = "fsl,fman-port-oh";
9701 + reg = <0x83000 0x1000>;
9704 + fman0_oh3: port@84000 {
9706 + compatible = "fsl,fman-port-oh";
9707 + reg = <0x84000 0x1000>;
9710 + fman0_oh4: port@85000 {
9712 + compatible = "fsl,fman-port-oh";
9713 + reg = <0x85000 0x1000>;
9716 + fman0_oh5: port@86000 {
9718 + compatible = "fsl,fman-port-oh";
9719 + reg = <0x86000 0x1000>;
9722 + fman0_oh6: port@87000 {
9724 + compatible = "fsl,fman-port-oh";
9725 + reg = <0x87000 0x1000>;
9729 diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
9730 new file mode 100644
9731 index 00000000..8e089f0c
9733 +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
9736 + * QorIQ FMan v3 device tree
9738 + * Copyright 2012-2015 Freescale Semiconductor Inc.
9740 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9743 +fman0: fman@1a00000 {
9744 + #address-cells = <1>;
9745 + #size-cells = <1>;
9747 + compatible = "fsl,fman";
9748 + ranges = <0x0 0x00 0x1a00000 0x100000>;
9749 + reg = <0x0 0x1a00000 0x0 0x100000>;
9750 + interrupts = <0 44 0x4>, <0 45 0x4>;
9751 + clocks = <&clockgen 3 0>;
9752 + clock-names = "fmanclk";
9753 + fsl,qman-channel-range = <0x800 0x10>;
9756 + compatible = "fsl,fman-cc";
9760 + compatible = "fsl,fman-muram";
9761 + reg = <0x0 0x60000>;
9765 + compatible = "fsl,fman-bmi";
9766 + reg = <0x80000 0x400>;
9770 + compatible = "fsl,fman-qmi";
9771 + reg = <0x80400 0x400>;
9774 + fman0_oh_0x2: port@82000 {
9775 + cell-index = <0x2>;
9776 + compatible = "fsl,fman-v3-port-oh";
9777 + reg = <0x82000 0x1000>;
9778 + fsl,qman-channel-id = <0x809>;
9781 + fman0_oh_0x3: port@83000 {
9782 + cell-index = <0x3>;
9783 + compatible = "fsl,fman-v3-port-oh";
9784 + reg = <0x83000 0x1000>;
9785 + fsl,qman-channel-id = <0x80a>;
9788 + fman0_oh_0x4: port@84000 {
9789 + cell-index = <0x4>;
9790 + compatible = "fsl,fman-v3-port-oh";
9791 + reg = <0x84000 0x1000>;
9792 + fsl,qman-channel-id = <0x80b>;
9795 + fman0_oh_0x5: port@85000 {
9796 + cell-index = <0x5>;
9797 + compatible = "fsl,fman-v3-port-oh";
9798 + reg = <0x85000 0x1000>;
9799 + fsl,qman-channel-id = <0x80c>;
9802 + fman0_oh_0x6: port@86000 {
9803 + cell-index = <0x6>;
9804 + compatible = "fsl,fman-v3-port-oh";
9805 + reg = <0x86000 0x1000>;
9806 + fsl,qman-channel-id = <0x80d>;
9809 + fman0_oh_0x7: port@87000 {
9810 + cell-index = <0x7>;
9811 + compatible = "fsl,fman-v3-port-oh";
9812 + reg = <0x87000 0x1000>;
9813 + fsl,qman-channel-id = <0x80e>;
9817 + compatible = "fsl,fman-policer";
9818 + reg = <0xc0000 0x1000>;
9822 + compatible = "fsl,fman-keygen";
9823 + reg = <0xc1000 0x1000>;
9827 + compatible = "fsl,fman-dma";
9828 + reg = <0xc2000 0x1000>;
9832 + compatible = "fsl,fman-fpm";
9833 + reg = <0xc3000 0x1000>;
9837 + compatible = "fsl,fman-parser";
9838 + reg = <0xc7000 0x1000>;
9842 + compatible = "fsl,fman-vsps";
9843 + reg = <0xdc000 0x1000>;
9846 + mdio0: mdio@fc000 {
9847 + #address-cells = <1>;
9848 + #size-cells = <0>;
9849 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9850 + reg = <0xfc000 0x1000>;
9853 + xmdio0: mdio@fd000 {
9854 + #address-cells = <1>;
9855 + #size-cells = <0>;
9856 + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
9857 + reg = <0xfd000 0x1000>;
9860 + ptp_timer0: ptp-timer@fe000 {
9861 + compatible = "fsl,fman-ptp-timer", "fsl,fman-rtc";
9862 + reg = <0xfe000 0x1000>;
9865 diff --git a/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
9866 new file mode 100644
9867 index 00000000..4f7edf48
9869 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
9872 + * QorIQ QMan Portals device tree
9874 + * Copyright 2011-2016 Freescale Semiconductor Inc.
9876 + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
9880 + #address-cells = <1>;
9881 + #size-cells = <1>;
9882 + compatible = "simple-bus";
9884 + qportal0: qman-portal@0 {
9885 + compatible = "fsl,qman-portal";
9886 + reg = <0x0 0x4000 0x4000000 0x4000>;
9887 + interrupts = <0 172 0x4>;
9891 + qportal1: qman-portal@10000 {
9892 + compatible = "fsl,qman-portal";
9893 + reg = <0x10000 0x4000 0x4010000 0x4000>;
9894 + interrupts = <0 174 0x4>;
9898 + qportal2: qman-portal@20000 {
9899 + compatible = "fsl,qman-portal";
9900 + reg = <0x20000 0x4000 0x4020000 0x4000>;
9901 + interrupts = <0 176 0x4>;
9905 + qportal3: qman-portal@30000 {
9906 + compatible = "fsl,qman-portal";
9907 + reg = <0x30000 0x4000 0x4030000 0x4000>;
9908 + interrupts = <0 178 0x4>;
9912 + qportal4: qman-portal@40000 {
9913 + compatible = "fsl,qman-portal";
9914 + reg = <0x40000 0x4000 0x4040000 0x4000>;
9915 + interrupts = <0 180 0x4>;
9919 + qportal5: qman-portal@50000 {
9920 + compatible = "fsl,qman-portal";
9921 + reg = <0x50000 0x4000 0x4050000 0x4000>;
9922 + interrupts = <0 182 0x4>;
9926 + qportal6: qman-portal@60000 {
9927 + compatible = "fsl,qman-portal";
9928 + reg = <0x60000 0x4000 0x4060000 0x4000>;
9929 + interrupts = <0 184 0x4>;
9933 + qportal7: qman-portal@70000 {
9934 + compatible = "fsl,qman-portal";
9935 + reg = <0x70000 0x4000 0x4070000 0x4000>;
9936 + interrupts = <0 186 0x4>;
9940 + qportal8: qman-portal@80000 {
9941 + compatible = "fsl,qman-portal";
9942 + reg = <0x80000 0x4000 0x4080000 0x4000>;
9943 + interrupts = <0 188 0x4>;
9948 + compatible = "fsl,fqid-range";
9949 + fsl,fqid-range = <256 256>;
9953 + compatible = "fsl,fqid-range";
9954 + fsl,fqid-range = <32768 32768>;
9958 + compatible = "fsl,pool-channel-range";
9959 + fsl,pool-channel-range = <0x401 0xf>;
9963 + compatible = "fsl,cgrid-range";
9964 + fsl,cgrid-range = <0 256>;
9968 + compatible = "fsl,qman-ceetm";
9969 + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
9970 + fsl,ceetm-sp-range = <0 12>;
9971 + fsl,ceetm-lni-range = <0 8>;
9972 + fsl,ceetm-channel-range = <0 32>;
9975 diff --git a/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
9976 index 5022432e..65701ada 100644
9977 --- a/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
9978 +++ b/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
9980 compatible = "simple-bus";
9984 compatible = "fsl,bman-portal";
9985 reg = <0x0 0x4000>, <0x100000 0x1000>;
9986 interrupts = <105 2 0 0>;
9990 compatible = "fsl,bman-portal";
9991 reg = <0x4000 0x4000>, <0x101000 0x1000>;
9992 interrupts = <107 2 0 0>;
9996 compatible = "fsl,bman-portal";
9997 reg = <0x8000 0x4000>, <0x102000 0x1000>;
9998 interrupts = <109 2 0 0>;
10001 + cell-index = <3>;
10002 compatible = "fsl,bman-portal";
10003 reg = <0xc000 0x4000>, <0x103000 0x1000>;
10004 interrupts = <111 2 0 0>;
10006 bman-portal@10000 {
10007 + cell-index = <4>;
10008 compatible = "fsl,bman-portal";
10009 reg = <0x10000 0x4000>, <0x104000 0x1000>;
10010 interrupts = <113 2 0 0>;
10012 bman-portal@14000 {
10013 + cell-index = <5>;
10014 compatible = "fsl,bman-portal";
10015 reg = <0x14000 0x4000>, <0x105000 0x1000>;
10016 interrupts = <115 2 0 0>;
10018 bman-portal@18000 {
10019 + cell-index = <6>;
10020 compatible = "fsl,bman-portal";
10021 reg = <0x18000 0x4000>, <0x106000 0x1000>;
10022 interrupts = <117 2 0 0>;
10024 bman-portal@1c000 {
10025 + cell-index = <7>;
10026 compatible = "fsl,bman-portal";
10027 reg = <0x1c000 0x4000>, <0x107000 0x1000>;
10028 interrupts = <119 2 0 0>;
10030 bman-portal@20000 {
10031 + cell-index = <8>;
10032 compatible = "fsl,bman-portal";
10033 reg = <0x20000 0x4000>, <0x108000 0x1000>;
10034 interrupts = <121 2 0 0>;
10036 bman-portal@24000 {
10037 + cell-index = <9>;
10038 compatible = "fsl,bman-portal";
10039 reg = <0x24000 0x4000>, <0x109000 0x1000>;
10040 interrupts = <123 2 0 0>;
10041 diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
10042 index c288f3c6..dd200e28 100644
10043 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
10044 +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
10045 @@ -35,14 +35,14 @@
10047 fman0_rx_0x10: port@90000 {
10048 cell-index = <0x10>;
10049 - compatible = "fsl,fman-v3-port-rx";
10050 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10051 reg = <0x90000 0x1000>;
10055 fman0_tx_0x30: port@b0000 {
10056 cell-index = <0x30>;
10057 - compatible = "fsl,fman-v3-port-tx";
10058 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10059 reg = <0xb0000 0x1000>;
10062 diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
10063 index 94a76982..365770c9 100644
10064 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
10065 +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
10066 @@ -35,14 +35,14 @@
10068 fman0_rx_0x11: port@91000 {
10069 cell-index = <0x11>;
10070 - compatible = "fsl,fman-v3-port-rx";
10071 + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx";
10072 reg = <0x91000 0x1000>;
10076 fman0_tx_0x31: port@b1000 {
10077 cell-index = <0x31>;
10078 - compatible = "fsl,fman-v3-port-tx";
10079 + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx";
10080 reg = <0xb1000 0x1000>;