1 From 3a302437605308079db398b67000a77a4fe92da8 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Mon, 25 Sep 2017 12:07:58 +0800
4 Subject: [PATCH] dpaa2: support layerscape
6 This is a integrated patch for layerscape dpaa2 support.
8 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
9 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
10 Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
11 Signed-off-by: costi <constantin.tudor@freescale.com>
12 Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
13 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
15 drivers/soc/fsl/ls2-console/Kconfig | 4 +
16 drivers/soc/fsl/ls2-console/Makefile | 1 +
17 drivers/soc/fsl/ls2-console/ls2-console.c | 284 ++
18 drivers/staging/fsl-dpaa2/ethernet/Makefile | 11 +
19 drivers/staging/fsl-dpaa2/ethernet/README | 186 ++
20 .../staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.c | 350 +++
21 .../staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.h | 60 +
22 .../staging/fsl-dpaa2/ethernet/dpaa2-eth-trace.h | 184 ++
23 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 3155 ++++++++++++++++++++
24 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h | 460 +++
25 drivers/staging/fsl-dpaa2/ethernet/dpaa2-ethtool.c | 856 ++++++
26 drivers/staging/fsl-dpaa2/ethernet/dpkg.h | 176 ++
27 drivers/staging/fsl-dpaa2/ethernet/dpni-cmd.h | 600 ++++
28 drivers/staging/fsl-dpaa2/ethernet/dpni.c | 1770 +++++++++++
29 drivers/staging/fsl-dpaa2/ethernet/dpni.h | 989 ++++++
30 drivers/staging/fsl-dpaa2/ethernet/net.h | 480 +++
31 drivers/staging/fsl-dpaa2/ethsw/Kconfig | 6 +
32 drivers/staging/fsl-dpaa2/ethsw/Makefile | 10 +
33 drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h | 851 ++++++
34 drivers/staging/fsl-dpaa2/ethsw/dpsw.c | 2762 +++++++++++++++++
35 drivers/staging/fsl-dpaa2/ethsw/dpsw.h | 1269 ++++++++
36 drivers/staging/fsl-dpaa2/ethsw/switch.c | 1857 ++++++++++++
37 drivers/staging/fsl-dpaa2/evb/Kconfig | 7 +
38 drivers/staging/fsl-dpaa2/evb/Makefile | 10 +
39 drivers/staging/fsl-dpaa2/evb/dpdmux-cmd.h | 279 ++
40 drivers/staging/fsl-dpaa2/evb/dpdmux.c | 1112 +++++++
41 drivers/staging/fsl-dpaa2/evb/dpdmux.h | 453 +++
42 drivers/staging/fsl-dpaa2/evb/evb.c | 1350 +++++++++
43 drivers/staging/fsl-dpaa2/mac/Kconfig | 23 +
44 drivers/staging/fsl-dpaa2/mac/Makefile | 10 +
45 drivers/staging/fsl-dpaa2/mac/dpmac-cmd.h | 172 ++
46 drivers/staging/fsl-dpaa2/mac/dpmac.c | 620 ++++
47 drivers/staging/fsl-dpaa2/mac/dpmac.h | 342 +++
48 drivers/staging/fsl-dpaa2/mac/mac.c | 666 +++++
49 drivers/staging/fsl-dpaa2/rtc/Makefile | 10 +
50 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h | 160 +
51 drivers/staging/fsl-dpaa2/rtc/dprtc.c | 746 +++++
52 drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 ++
53 drivers/staging/fsl-dpaa2/rtc/rtc.c | 243 ++
54 39 files changed, 22696 insertions(+)
55 create mode 100644 drivers/soc/fsl/ls2-console/Kconfig
56 create mode 100644 drivers/soc/fsl/ls2-console/Makefile
57 create mode 100644 drivers/soc/fsl/ls2-console/ls2-console.c
58 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/Makefile
59 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/README
60 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.c
61 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.h
62 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-trace.h
63 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
64 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
65 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpaa2-ethtool.c
66 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpkg.h
67 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpni-cmd.h
68 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpni.c
69 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/dpni.h
70 create mode 100644 drivers/staging/fsl-dpaa2/ethernet/net.h
71 create mode 100644 drivers/staging/fsl-dpaa2/ethsw/Kconfig
72 create mode 100644 drivers/staging/fsl-dpaa2/ethsw/Makefile
73 create mode 100644 drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h
74 create mode 100644 drivers/staging/fsl-dpaa2/ethsw/dpsw.c
75 create mode 100644 drivers/staging/fsl-dpaa2/ethsw/dpsw.h
76 create mode 100644 drivers/staging/fsl-dpaa2/ethsw/switch.c
77 create mode 100644 drivers/staging/fsl-dpaa2/evb/Kconfig
78 create mode 100644 drivers/staging/fsl-dpaa2/evb/Makefile
79 create mode 100644 drivers/staging/fsl-dpaa2/evb/dpdmux-cmd.h
80 create mode 100644 drivers/staging/fsl-dpaa2/evb/dpdmux.c
81 create mode 100644 drivers/staging/fsl-dpaa2/evb/dpdmux.h
82 create mode 100644 drivers/staging/fsl-dpaa2/evb/evb.c
83 create mode 100644 drivers/staging/fsl-dpaa2/mac/Kconfig
84 create mode 100644 drivers/staging/fsl-dpaa2/mac/Makefile
85 create mode 100644 drivers/staging/fsl-dpaa2/mac/dpmac-cmd.h
86 create mode 100644 drivers/staging/fsl-dpaa2/mac/dpmac.c
87 create mode 100644 drivers/staging/fsl-dpaa2/mac/dpmac.h
88 create mode 100644 drivers/staging/fsl-dpaa2/mac/mac.c
89 create mode 100644 drivers/staging/fsl-dpaa2/rtc/Makefile
90 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
91 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.c
92 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.h
93 create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.c
96 +++ b/drivers/soc/fsl/ls2-console/Kconfig
98 +config FSL_LS2_CONSOLE
99 + tristate "Layerscape MC and AIOP console support"
100 + depends on ARCH_LAYERSCAPE
103 +++ b/drivers/soc/fsl/ls2-console/Makefile
105 +obj-$(CONFIG_FSL_LS2_CONSOLE) += ls2-console.o
107 +++ b/drivers/soc/fsl/ls2-console/ls2-console.c
109 +/* Copyright 2015-2016 Freescale Semiconductor Inc.
111 + * Redistribution and use in source and binary forms, with or without
112 + * modification, are permitted provided that the following conditions are met:
113 + * * Redistributions of source code must retain the above copyright
114 + * notice, this list of conditions and the following disclaimer.
115 + * * Redistributions in binary form must reproduce the above copyright
116 + * notice, this list of conditions and the following disclaimer in the
117 + * documentation and/or other materials provided with the distribution.
118 + * * Neither the name of the above-listed copyright holders nor the
119 + * names of any contributors may be used to endorse or promote products
120 + * derived from this software without specific prior written permission.
123 + * ALTERNATIVELY, this software may be distributed under the terms of the
124 + * GNU General Public License ("GPL") as published by the Free Software
125 + * Foundation, either version 2 of that License or (at your option) any
128 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
129 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
130 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
131 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
132 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
133 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
134 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
135 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
136 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
137 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
138 + * POSSIBILITY OF SUCH DAMAGE.
141 +#include <linux/miscdevice.h>
142 +#include <linux/uaccess.h>
143 +#include <linux/poll.h>
144 +#include <linux/compat.h>
145 +#include <linux/module.h>
146 +#include <linux/slab.h>
147 +#include <linux/io.h>
149 +/* SoC address for the MC firmware base low/high registers */
150 +#define SOC_CCSR_MC_FW_BASE_ADDR_REGS 0x8340020
151 +#define SOC_CCSR_MC_FW_BASE_ADDR_REGS_SIZE 2
152 +/* MC firmware base low/high registers indexes */
153 +#define MCFBALR_OFFSET 0
154 +#define MCFBAHR_OFFSET 1
156 +/* Bit mask used to obtain the most significant part of the MC base address */
157 +#define MC_FW_HIGH_ADDR_MASK 0x1FFFF
158 +/* Bit mask used to obtain the least significant part of the MC base address */
159 +#define MC_FW_LOW_ADDR_MASK 0xE0000000
161 +#define MC_BUFFER_OFFSET 0x01000000
162 +#define MC_BUFFER_SIZE (1024*1024*16)
163 +#define MC_OFFSET_DELTA (MC_BUFFER_OFFSET)
165 +#define AIOP_BUFFER_OFFSET 0x06000000
166 +#define AIOP_BUFFER_SIZE (1024*1024*16)
167 +#define AIOP_OFFSET_DELTA (0)
170 + char magic_word[8]; /* magic word */
171 + uint32_t buf_start; /* holds the 32-bit little-endian
172 + * offset of the start of the buffer
174 + uint32_t buf_length; /* holds the 32-bit little-endian
175 + * length of the buffer
177 + uint32_t last_byte; /* holds the 32-bit little-endian offset
178 + * of the byte after the last byte that
184 +#define LOG_HEADER_FLAG_BUFFER_WRAPAROUND 0x80000000
185 +#define LOG_VERSION_MAJOR 1
186 +#define LOG_VERSION_MINOR 0
189 +#define invalidate(p) { asm volatile("dc ivac, %0" : : "r" (p) : "memory"); }
191 +struct console_data {
193 + struct log_header *hdr;
194 + char *start_addr; /* Start of buffer */
195 + char *end_addr; /* End of buffer */
196 + char *end_of_data; /* Current end of data */
197 + char *cur_ptr; /* Last data sent to console */
200 +#define LAST_BYTE(a) ((a) & ~(LOG_HEADER_FLAG_BUFFER_WRAPAROUND))
202 +static inline void __adjust_end(struct console_data *cd)
204 + cd->end_of_data = cd->start_addr
205 + + LAST_BYTE(le32_to_cpu(cd->hdr->last_byte));
208 +static inline void adjust_end(struct console_data *cd)
210 + invalidate(cd->hdr);
214 +static inline uint64_t get_mc_fw_base_address(void)
216 + u32 *mcfbaregs = (u32 *) ioremap(SOC_CCSR_MC_FW_BASE_ADDR_REGS,
217 + SOC_CCSR_MC_FW_BASE_ADDR_REGS_SIZE);
218 + u64 mcfwbase = 0ULL;
220 + mcfwbase = readl(mcfbaregs + MCFBAHR_OFFSET) & MC_FW_HIGH_ADDR_MASK;
222 + mcfwbase |= readl(mcfbaregs + MCFBALR_OFFSET) & MC_FW_LOW_ADDR_MASK;
223 + iounmap(mcfbaregs);
224 + pr_info("fsl-ls2-console: MC base address at 0x%016llx\n", mcfwbase);
228 +static int fsl_ls2_generic_console_open(struct inode *node, struct file *fp,
229 + u64 offset, u64 size,
230 + uint8_t *emagic, uint8_t magic_len,
233 + struct console_data *cd;
237 + cd = kmalloc(sizeof(*cd), GFP_KERNEL);
240 + fp->private_data = cd;
241 + cd->map_addr = ioremap(get_mc_fw_base_address() + offset, size);
243 + cd->hdr = (struct log_header *) cd->map_addr;
244 + invalidate(cd->hdr);
246 + magic = cd->hdr->magic_word;
247 + if (memcmp(magic, emagic, magic_len)) {
248 + pr_info("magic didn't match!\n");
249 + pr_info("expected: %02x %02x %02x %02x %02x %02x %02x %02x\n",
250 + emagic[0], emagic[1], emagic[2], emagic[3],
251 + emagic[4], emagic[5], emagic[6], emagic[7]);
252 + pr_info(" seen: %02x %02x %02x %02x %02x %02x %02x %02x\n",
253 + magic[0], magic[1], magic[2], magic[3],
254 + magic[4], magic[5], magic[6], magic[7]);
256 + iounmap(cd->map_addr);
260 + cd->start_addr = cd->map_addr
261 + + le32_to_cpu(cd->hdr->buf_start) - offset_delta;
262 + cd->end_addr = cd->start_addr + le32_to_cpu(cd->hdr->buf_length);
264 + wrapped = le32_to_cpu(cd->hdr->last_byte)
265 + & LOG_HEADER_FLAG_BUFFER_WRAPAROUND;
268 + if (wrapped && (cd->end_of_data != cd->end_addr))
269 + cd->cur_ptr = cd->end_of_data+1;
271 + cd->cur_ptr = cd->start_addr;
276 +static int fsl_ls2_mc_console_open(struct inode *node, struct file *fp)
278 + uint8_t magic_word[] = { 0, 1, 'C', 'M' };
280 + return fsl_ls2_generic_console_open(node, fp,
281 + MC_BUFFER_OFFSET, MC_BUFFER_SIZE,
282 + magic_word, sizeof(magic_word),
286 +static int fsl_ls2_aiop_console_open(struct inode *node, struct file *fp)
288 + uint8_t magic_word[] = { 'P', 'O', 'I', 'A' };
290 + return fsl_ls2_generic_console_open(node, fp,
291 + AIOP_BUFFER_OFFSET, AIOP_BUFFER_SIZE,
292 + magic_word, sizeof(magic_word),
293 + AIOP_OFFSET_DELTA);
296 +static int fsl_ls2_console_close(struct inode *node, struct file *fp)
298 + struct console_data *cd = fp->private_data;
300 + iounmap(cd->map_addr);
305 +ssize_t fsl_ls2_console_read(struct file *fp, char __user *buf, size_t count,
308 + struct console_data *cd = fp->private_data;
312 + /* Check if we need to adjust the end of data addr */
315 + while ((count != bytes) && (cd->end_of_data != cd->cur_ptr)) {
316 + if (((u64)cd->cur_ptr) % 64 == 0)
317 + invalidate(cd->cur_ptr);
319 + data = *(cd->cur_ptr);
320 + if (copy_to_user(&buf[bytes], &data, 1))
323 + if (cd->cur_ptr >= cd->end_addr)
324 + cd->cur_ptr = cd->start_addr;
330 +static const struct file_operations fsl_ls2_mc_console_fops = {
331 + .owner = THIS_MODULE,
332 + .open = fsl_ls2_mc_console_open,
333 + .release = fsl_ls2_console_close,
334 + .read = fsl_ls2_console_read,
337 +static struct miscdevice fsl_ls2_mc_console_dev = {
338 + .minor = MISC_DYNAMIC_MINOR,
339 + .name = "fsl_mc_console",
340 + .fops = &fsl_ls2_mc_console_fops
343 +static const struct file_operations fsl_ls2_aiop_console_fops = {
344 + .owner = THIS_MODULE,
345 + .open = fsl_ls2_aiop_console_open,
346 + .release = fsl_ls2_console_close,
347 + .read = fsl_ls2_console_read,
350 +static struct miscdevice fsl_ls2_aiop_console_dev = {
351 + .minor = MISC_DYNAMIC_MINOR,
352 + .name = "fsl_aiop_console",
353 + .fops = &fsl_ls2_aiop_console_fops
356 +static int __init fsl_ls2_console_init(void)
360 + pr_info("Freescale LS2 console driver\n");
361 + err = misc_register(&fsl_ls2_mc_console_dev);
363 + pr_err("fsl_mc_console: cannot register device\n");
366 + pr_info("fsl-ls2-console: device %s registered\n",
367 + fsl_ls2_mc_console_dev.name);
369 + err = misc_register(&fsl_ls2_aiop_console_dev);
371 + pr_err("fsl_aiop_console: cannot register device\n");
374 + pr_info("fsl-ls2-console: device %s registered\n",
375 + fsl_ls2_aiop_console_dev.name);
380 +static void __exit fsl_ls2_console_exit(void)
382 + misc_deregister(&fsl_ls2_mc_console_dev);
384 + misc_deregister(&fsl_ls2_aiop_console_dev);
387 +module_init(fsl_ls2_console_init);
388 +module_exit(fsl_ls2_console_exit);
390 +MODULE_AUTHOR("Roy Pledge <roy.pledge@freescale.com>");
391 +MODULE_LICENSE("Dual BSD/GPL");
392 +MODULE_DESCRIPTION("Freescale LS2 console driver");
394 +++ b/drivers/staging/fsl-dpaa2/ethernet/Makefile
397 +# Makefile for the Freescale DPAA2 Ethernet controller
400 +obj-$(CONFIG_FSL_DPAA2_ETH) += fsl-dpaa2-eth.o
402 +fsl-dpaa2-eth-objs := dpaa2-eth.o dpaa2-ethtool.o dpni.o
403 +fsl-dpaa2-eth-${CONFIG_FSL_DPAA2_ETH_DEBUGFS} += dpaa2-eth-debugfs.o
405 +# Needed by the tracing framework
406 +CFLAGS_dpaa2-eth.o := -I$(src)
408 +++ b/drivers/staging/fsl-dpaa2/ethernet/README
410 +Freescale DPAA2 Ethernet driver
411 +===============================
413 +This file provides documentation for the Freescale DPAA2 Ethernet driver.
418 + Supported Platforms
419 + Architecture Overview
420 + Creating a Network Interface
421 + Features & Offloads
426 +This driver provides networking support for Freescale DPAA2 SoCs, e.g.
427 +LS2080A, LS2088A, LS1088A.
430 +Architecture Overview
431 +=====================
432 +Unlike regular NICs, in the DPAA2 architecture there is no single hardware block
433 +representing network interfaces; instead, several separate hardware resources
434 +concur to provide the networking functionality:
435 + - network interfaces
440 +All hardware resources are allocated and configured through the Management
441 +Complex (MC) portals. MC abstracts most of these resources as DPAA2 objects
442 +and exposes ABIs through which they can be configured and controlled. A few
443 +hardware resources, like queues, do not have a corresponding MC object and
444 +are treated as internal resources of other objects.
446 +For a more detailed description of the DPAA2 architecture and its object
448 + drivers/staging/fsl-mc/README.txt
450 +Each Linux net device is built on top of a Datapath Network Interface (DPNI)
451 +object and uses Buffer Pools (DPBPs), I/O Portals (DPIOs) and Concentrators
454 +Configuration interface:
456 + -----------------------
457 + | DPAA2 Ethernet Driver |
458 + -----------------------
461 + . . . . . . . . . . . .
464 + ---------- ---------- -----------
465 + | DPBP API | | DPNI API | | DPCON API |
466 + ---------- ---------- -----------
468 +=========== . ========== . ============ . ===================
470 + ------------------------------------------
471 + | MC hardware portals |
472 + ------------------------------------------
475 + ------ ------ -------
476 + | DPBP | | DPNI | | DPCON |
477 + ------ ------ -------
479 +The DPNIs are network interfaces without a direct one-on-one mapping to PHYs.
480 +DPBPs represent hardware buffer pools. Packet I/O is performed in the context
481 +of DPCON objects, using DPIO portals for managing and communicating with the
484 +Datapath (I/O) interface:
486 + -----------------------------------------------
487 + | DPAA2 Ethernet Driver |
488 + -----------------------------------------------
491 + enqueue| dequeue| data | dequeue| seed |
492 + (Tx) | (Rx, TxC)| avail.| request| buffers|
496 + -----------------------------------------------
498 + -----------------------------------------------
500 + | | | | | ================
502 + -----------------------------------------------
503 + | I/O hardware portals |
504 + -----------------------------------------------
508 + V | ================ V
509 + ---------------------- | -------------
510 + queues ---------------------- | | Buffer pool |
511 + ---------------------- | -------------
512 + =======================
515 +Datapath I/O (DPIO) portals provide enqueue and dequeue services, data
516 +availability notifications and buffer pool management. DPIOs are shared between
517 +all DPAA2 objects (and implicitly all DPAA2 kernel drivers) that work with data
518 +frames, but must be affine to the CPUs for the purpose of traffic distribution.
520 +Frames are transmitted and received through hardware frame queues, which can be
521 +grouped in channels for the purpose of hardware scheduling. The Ethernet driver
522 +enqueues TX frames on egress queues and after transmission is complete a TX
523 +confirmation frame is sent back to the CPU.
525 +When frames are available on ingress queues, a data availability notification
526 +is sent to the CPU; notifications are raised per channel, so even if multiple
527 +queues in the same channel have available frames, only one notification is sent.
528 +After a channel fires a notification, is must be explicitly rearmed.
530 +Each network interface can have multiple Rx, Tx and confirmation queues affined
531 +to CPUs, and one channel (DPCON) for each CPU that services at least one queue.
532 +DPCONs are used to distribute ingress traffic to different CPUs via the cores'
535 +The role of hardware buffer pools is storage of ingress frame data. Each network
536 +interface has a privately owned buffer pool which it seeds with kernel allocated
540 +DPNIs are decoupled from PHYs; a DPNI can be connected to a PHY through a DPMAC
541 +object or to another DPNI through an internal link, but the connection is
542 +managed by MC and completely transparent to the Ethernet driver.
544 + --------- --------- ---------
545 + | eth if1 | | eth if2 | | eth ifn |
546 + --------- --------- ---------
550 + ---------------------------
551 + | DPAA2 Ethernet Driver |
552 + ---------------------------
556 + ------ ------ ------ -------
557 + | DPNI | | DPNI | | DPNI | | DPMAC |----+
558 + ------ ------ ------ ------- |
561 + =========== ================== | PHY |
564 +Creating a Network Interface
565 +============================
566 +A net device is created for each DPNI object probed on the MC bus. Each DPNI has
567 +a number of properties which determine the network interface configuration
568 +options and associated hardware resources.
570 +DPNI objects (and the other DPAA2 objects needed for a network interface) can be
571 +added to a container on the MC bus in one of two ways: statically, through a
572 +Datapath Layout Binary file (DPL) that is parsed by MC at boot time; or created
573 +dynamically at runtime, via the DPAA2 objects APIs.
578 +Hardware checksum offloading is supported for TCP and UDP over IPv4/6 frames.
579 +The checksum offloads can be independently configured on RX and TX through
582 +Hardware offload of unicast and multicast MAC filtering is supported on the
583 +ingress path and permanently enabled.
585 +Scatter-gather frames are supported on both RX and TX paths. On TX, SG support
586 +is configurable via ethtool; on RX it is always enabled.
588 +The DPAA2 hardware can process jumbo Ethernet frames of up to 10K bytes.
590 +The Ethernet driver defines a static flow hashing scheme that distributes
591 +traffic based on a 5-tuple key: src IP, dst IP, IP proto, L4 src port,
592 +L4 dst port. No user configuration is supported for now.
594 +Hardware specific statistics for the network interface as well as some
595 +non-standard driver stats can be consulted through ethtool -S option.
597 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.c
600 +/* Copyright 2015 Freescale Semiconductor Inc.
602 + * Redistribution and use in source and binary forms, with or without
603 + * modification, are permitted provided that the following conditions are met:
604 + * * Redistributions of source code must retain the above copyright
605 + * notice, this list of conditions and the following disclaimer.
606 + * * Redistributions in binary form must reproduce the above copyright
607 + * notice, this list of conditions and the following disclaimer in the
608 + * documentation and/or other materials provided with the distribution.
609 + * * Neither the name of Freescale Semiconductor nor the
610 + * names of its contributors may be used to endorse or promote products
611 + * derived from this software without specific prior written permission.
614 + * ALTERNATIVELY, this software may be distributed under the terms of the
615 + * GNU General Public License ("GPL") as published by the Free Software
616 + * Foundation, either version 2 of that License or (at your option) any
619 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
620 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
621 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
622 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
623 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
624 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
625 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
626 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
627 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
628 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
631 +#include <linux/module.h>
632 +#include <linux/debugfs.h>
633 +#include "dpaa2-eth.h"
634 +#include "dpaa2-eth-debugfs.h"
636 +#define DPAA2_ETH_DBG_ROOT "dpaa2-eth"
638 +static struct dentry *dpaa2_dbg_root;
640 +static int dpaa2_dbg_cpu_show(struct seq_file *file, void *offset)
642 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)file->private;
643 + struct rtnl_link_stats64 *stats;
644 + struct dpaa2_eth_drv_stats *extras;
647 + seq_printf(file, "Per-CPU stats for %s\n", priv->net_dev->name);
648 + seq_printf(file, "%s%16s%16s%16s%16s%16s%16s%16s%16s\n",
649 + "CPU", "Rx", "Rx Err", "Rx SG", "Tx", "Tx Err", "Tx conf",
650 + "Tx SG", "Enq busy");
652 + for_each_online_cpu(i) {
653 + stats = per_cpu_ptr(priv->percpu_stats, i);
654 + extras = per_cpu_ptr(priv->percpu_extras, i);
655 + seq_printf(file, "%3d%16llu%16llu%16llu%16llu%16llu%16llu%16llu%16llu\n",
659 + extras->rx_sg_frames,
662 + extras->tx_conf_frames,
663 + extras->tx_sg_frames,
664 + extras->tx_portal_busy);
670 +static int dpaa2_dbg_cpu_open(struct inode *inode, struct file *file)
673 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)inode->i_private;
675 + err = single_open(file, dpaa2_dbg_cpu_show, priv);
677 + netdev_err(priv->net_dev, "single_open() failed\n");
682 +static const struct file_operations dpaa2_dbg_cpu_ops = {
683 + .open = dpaa2_dbg_cpu_open,
685 + .llseek = seq_lseek,
686 + .release = single_release,
689 +static char *fq_type_to_str(struct dpaa2_eth_fq *fq)
691 + switch (fq->type) {
694 + case DPAA2_TX_CONF_FQ:
696 + case DPAA2_RX_ERR_FQ:
703 +static int dpaa2_dbg_fqs_show(struct seq_file *file, void *offset)
705 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)file->private;
706 + struct dpaa2_eth_fq *fq;
710 + seq_printf(file, "FQ stats for %s:\n", priv->net_dev->name);
711 + seq_printf(file, "%s%16s%16s%16s%16s%16s\n",
712 + "VFQID", "CPU", "Type", "Frames", "Pending frames",
715 + for (i = 0; i < priv->num_fqs; i++) {
717 + err = dpaa2_io_query_fq_count(NULL, fq->fqid, &fcnt, &bcnt);
721 + seq_printf(file, "%5d%16d%16s%16llu%16u%16llu\n",
724 + fq_type_to_str(fq),
727 + fq->stats.congestion_entry);
733 +static int dpaa2_dbg_fqs_open(struct inode *inode, struct file *file)
736 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)inode->i_private;
738 + err = single_open(file, dpaa2_dbg_fqs_show, priv);
740 + netdev_err(priv->net_dev, "single_open() failed\n");
745 +static const struct file_operations dpaa2_dbg_fq_ops = {
746 + .open = dpaa2_dbg_fqs_open,
748 + .llseek = seq_lseek,
749 + .release = single_release,
752 +static int dpaa2_dbg_ch_show(struct seq_file *file, void *offset)
754 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)file->private;
755 + struct dpaa2_eth_channel *ch;
758 + seq_printf(file, "Channel stats for %s:\n", priv->net_dev->name);
759 + seq_printf(file, "%s%16s%16s%16s%16s%16s\n",
760 + "CHID", "CPU", "Deq busy", "Frames", "CDANs",
763 + for (i = 0; i < priv->num_channels; i++) {
764 + ch = priv->channel[i];
765 + seq_printf(file, "%4d%16d%16llu%16llu%16llu%16llu\n",
767 + ch->nctx.desired_cpu,
768 + ch->stats.dequeue_portal_busy,
771 + ch->stats.frames / ch->stats.cdan);
777 +static int dpaa2_dbg_ch_open(struct inode *inode, struct file *file)
780 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)inode->i_private;
782 + err = single_open(file, dpaa2_dbg_ch_show, priv);
784 + netdev_err(priv->net_dev, "single_open() failed\n");
789 +static const struct file_operations dpaa2_dbg_ch_ops = {
790 + .open = dpaa2_dbg_ch_open,
792 + .llseek = seq_lseek,
793 + .release = single_release,
796 +static ssize_t dpaa2_dbg_reset_write(struct file *file, const char __user *buf,
797 + size_t count, loff_t *offset)
799 + struct dpaa2_eth_priv *priv = file->private_data;
800 + struct rtnl_link_stats64 *percpu_stats;
801 + struct dpaa2_eth_drv_stats *percpu_extras;
802 + struct dpaa2_eth_fq *fq;
803 + struct dpaa2_eth_channel *ch;
806 + for_each_online_cpu(i) {
807 + percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
808 + memset(percpu_stats, 0, sizeof(*percpu_stats));
810 + percpu_extras = per_cpu_ptr(priv->percpu_extras, i);
811 + memset(percpu_extras, 0, sizeof(*percpu_extras));
814 + for (i = 0; i < priv->num_fqs; i++) {
816 + memset(&fq->stats, 0, sizeof(fq->stats));
819 + for (i = 0; i < priv->num_channels; i++) {
820 + ch = priv->channel[i];
821 + memset(&ch->stats, 0, sizeof(ch->stats));
827 +static const struct file_operations dpaa2_dbg_reset_ops = {
828 + .open = simple_open,
829 + .write = dpaa2_dbg_reset_write,
832 +static ssize_t dpaa2_dbg_reset_mc_write(struct file *file,
833 + const char __user *buf,
834 + size_t count, loff_t *offset)
836 + struct dpaa2_eth_priv *priv = file->private_data;
839 + err = dpni_reset_statistics(priv->mc_io, 0, priv->mc_token);
841 + netdev_err(priv->net_dev,
842 + "dpni_reset_statistics() failed %d\n", err);
847 +static const struct file_operations dpaa2_dbg_reset_mc_ops = {
848 + .open = simple_open,
849 + .write = dpaa2_dbg_reset_mc_write,
852 +void dpaa2_dbg_add(struct dpaa2_eth_priv *priv)
854 + if (!dpaa2_dbg_root)
857 + /* Create a directory for the interface */
858 + priv->dbg.dir = debugfs_create_dir(priv->net_dev->name,
860 + if (!priv->dbg.dir) {
861 + netdev_err(priv->net_dev, "debugfs_create_dir() failed\n");
865 + /* per-cpu stats file */
866 + priv->dbg.cpu_stats = debugfs_create_file("cpu_stats", 0444,
867 + priv->dbg.dir, priv,
868 + &dpaa2_dbg_cpu_ops);
869 + if (!priv->dbg.cpu_stats) {
870 + netdev_err(priv->net_dev, "debugfs_create_file() failed\n");
871 + goto err_cpu_stats;
874 + /* per-fq stats file */
875 + priv->dbg.fq_stats = debugfs_create_file("fq_stats", 0444,
876 + priv->dbg.dir, priv,
877 + &dpaa2_dbg_fq_ops);
878 + if (!priv->dbg.fq_stats) {
879 + netdev_err(priv->net_dev, "debugfs_create_file() failed\n");
883 + /* per-fq stats file */
884 + priv->dbg.ch_stats = debugfs_create_file("ch_stats", 0444,
885 + priv->dbg.dir, priv,
886 + &dpaa2_dbg_ch_ops);
887 + if (!priv->dbg.fq_stats) {
888 + netdev_err(priv->net_dev, "debugfs_create_file() failed\n");
893 + priv->dbg.reset_stats = debugfs_create_file("reset_stats", 0200,
894 + priv->dbg.dir, priv,
895 + &dpaa2_dbg_reset_ops);
896 + if (!priv->dbg.reset_stats) {
897 + netdev_err(priv->net_dev, "debugfs_create_file() failed\n");
898 + goto err_reset_stats;
901 + /* reset MC stats */
902 + priv->dbg.reset_mc_stats = debugfs_create_file("reset_mc_stats",
903 + 0222, priv->dbg.dir, priv,
904 + &dpaa2_dbg_reset_mc_ops);
905 + if (!priv->dbg.reset_mc_stats) {
906 + netdev_err(priv->net_dev, "debugfs_create_file() failed\n");
907 + goto err_reset_mc_stats;
913 + debugfs_remove(priv->dbg.reset_stats);
915 + debugfs_remove(priv->dbg.ch_stats);
917 + debugfs_remove(priv->dbg.fq_stats);
919 + debugfs_remove(priv->dbg.cpu_stats);
921 + debugfs_remove(priv->dbg.dir);
924 +void dpaa2_dbg_remove(struct dpaa2_eth_priv *priv)
926 + debugfs_remove(priv->dbg.reset_mc_stats);
927 + debugfs_remove(priv->dbg.reset_stats);
928 + debugfs_remove(priv->dbg.fq_stats);
929 + debugfs_remove(priv->dbg.ch_stats);
930 + debugfs_remove(priv->dbg.cpu_stats);
931 + debugfs_remove(priv->dbg.dir);
934 +void dpaa2_eth_dbg_init(void)
936 + dpaa2_dbg_root = debugfs_create_dir(DPAA2_ETH_DBG_ROOT, NULL);
937 + if (!dpaa2_dbg_root) {
938 + pr_err("DPAA2-ETH: debugfs create failed\n");
942 + pr_info("DPAA2-ETH: debugfs created\n");
945 +void __exit dpaa2_eth_dbg_exit(void)
947 + debugfs_remove(dpaa2_dbg_root);
950 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.h
952 +/* Copyright 2015 Freescale Semiconductor Inc.
954 + * Redistribution and use in source and binary forms, with or without
955 + * modification, are permitted provided that the following conditions are met:
956 + * * Redistributions of source code must retain the above copyright
957 + * notice, this list of conditions and the following disclaimer.
958 + * * Redistributions in binary form must reproduce the above copyright
959 + * notice, this list of conditions and the following disclaimer in the
960 + * documentation and/or other materials provided with the distribution.
961 + * * Neither the name of Freescale Semiconductor nor the
962 + * names of its contributors may be used to endorse or promote products
963 + * derived from this software without specific prior written permission.
966 + * ALTERNATIVELY, this software may be distributed under the terms of the
967 + * GNU General Public License ("GPL") as published by the Free Software
968 + * Foundation, either version 2 of that License or (at your option) any
971 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
972 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
973 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
974 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
975 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
976 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
977 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
978 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
979 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
980 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
983 +#ifndef DPAA2_ETH_DEBUGFS_H
984 +#define DPAA2_ETH_DEBUGFS_H
986 +#include <linux/dcache.h>
988 +struct dpaa2_eth_priv;
990 +struct dpaa2_debugfs {
991 + struct dentry *dir;
992 + struct dentry *fq_stats;
993 + struct dentry *ch_stats;
994 + struct dentry *cpu_stats;
995 + struct dentry *reset_stats;
996 + struct dentry *reset_mc_stats;
999 +#ifdef CONFIG_FSL_DPAA2_ETH_DEBUGFS
1000 +void dpaa2_eth_dbg_init(void);
1001 +void dpaa2_eth_dbg_exit(void);
1002 +void dpaa2_dbg_add(struct dpaa2_eth_priv *priv);
1003 +void dpaa2_dbg_remove(struct dpaa2_eth_priv *priv);
1005 +static inline void dpaa2_eth_dbg_init(void) {}
1006 +static inline void dpaa2_eth_dbg_exit(void) {}
1007 +static inline void dpaa2_dbg_add(struct dpaa2_eth_priv *priv) {}
1008 +static inline void dpaa2_dbg_remove(struct dpaa2_eth_priv *priv) {}
1009 +#endif /* CONFIG_FSL_DPAA2_ETH_DEBUGFS */
1011 +#endif /* DPAA2_ETH_DEBUGFS_H */
1013 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-trace.h
1015 +/* Copyright 2014-2015 Freescale Semiconductor Inc.
1017 + * Redistribution and use in source and binary forms, with or without
1018 + * modification, are permitted provided that the following conditions are met:
1019 + * * Redistributions of source code must retain the above copyright
1020 + * notice, this list of conditions and the following disclaimer.
1021 + * * Redistributions in binary form must reproduce the above copyright
1022 + * notice, this list of conditions and the following disclaimer in the
1023 + * documentation and/or other materials provided with the distribution.
1024 + * * Neither the name of Freescale Semiconductor nor the
1025 + * names of its contributors may be used to endorse or promote products
1026 + * derived from this software without specific prior written permission.
1029 + * ALTERNATIVELY, this software may be distributed under the terms of the
1030 + * GNU General Public License ("GPL") as published by the Free Software
1031 + * Foundation, either version 2 of that License or (at your option) any
1034 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1035 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1036 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1037 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1038 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1039 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1040 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1041 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1042 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1043 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1046 +#undef TRACE_SYSTEM
1047 +#define TRACE_SYSTEM dpaa2_eth
1049 +#if !defined(_DPAA2_ETH_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
1050 +#define _DPAA2_ETH_TRACE_H
1052 +#include <linux/skbuff.h>
1053 +#include <linux/netdevice.h>
1054 +#include <linux/tracepoint.h>
1056 +#define TR_FMT "[%s] fd: addr=0x%llx, len=%u, off=%u"
1057 +/* trace_printk format for raw buffer event class */
1058 +#define TR_BUF_FMT "[%s] vaddr=%p size=%zu dma_addr=%pad map_size=%zu bpid=%d"
1060 +/* This is used to declare a class of events.
1061 + * individual events of this type will be defined below.
1064 +/* Store details about a frame descriptor */
1065 +DECLARE_EVENT_CLASS(dpaa2_eth_fd,
1066 + /* Trace function prototype */
1067 + TP_PROTO(struct net_device *netdev,
1068 + const struct dpaa2_fd *fd),
1070 + /* Repeat argument list here */
1071 + TP_ARGS(netdev, fd),
1073 + /* A structure containing the relevant information we want
1074 + * to record. Declare name and type for each normal element,
1075 + * name, type and size for arrays. Use __string for variable
1079 + __field(u64, fd_addr)
1080 + __field(u32, fd_len)
1081 + __field(u16, fd_offset)
1082 + __string(name, netdev->name)
1085 + /* The function that assigns values to the above declared
1089 + __entry->fd_addr = dpaa2_fd_get_addr(fd);
1090 + __entry->fd_len = dpaa2_fd_get_len(fd);
1091 + __entry->fd_offset = dpaa2_fd_get_offset(fd);
1092 + __assign_str(name, netdev->name);
1095 + /* This is what gets printed when the trace event is
1102 + __entry->fd_offset)
1105 +/* Now declare events of the above type. Format is:
1106 + * DEFINE_EVENT(class, name, proto, args), with proto and args same as for class
1109 +/* Tx (egress) fd */
1110 +DEFINE_EVENT(dpaa2_eth_fd, dpaa2_tx_fd,
1111 + TP_PROTO(struct net_device *netdev,
1112 + const struct dpaa2_fd *fd),
1114 + TP_ARGS(netdev, fd)
1118 +DEFINE_EVENT(dpaa2_eth_fd, dpaa2_rx_fd,
1119 + TP_PROTO(struct net_device *netdev,
1120 + const struct dpaa2_fd *fd),
1122 + TP_ARGS(netdev, fd)
1125 +/* Tx confirmation fd */
1126 +DEFINE_EVENT(dpaa2_eth_fd, dpaa2_tx_conf_fd,
1127 + TP_PROTO(struct net_device *netdev,
1128 + const struct dpaa2_fd *fd),
1130 + TP_ARGS(netdev, fd)
1133 +/* Log data about raw buffers. Useful for tracing DPBP content. */
1134 +TRACE_EVENT(dpaa2_eth_buf_seed,
1135 + /* Trace function prototype */
1136 + TP_PROTO(struct net_device *netdev,
1137 + /* virtual address and size */
1140 + /* dma map address and size */
1141 + dma_addr_t dma_addr,
1143 + /* buffer pool id, if relevant */
1146 + /* Repeat argument list here */
1147 + TP_ARGS(netdev, vaddr, size, dma_addr, map_size, bpid),
1149 + /* A structure containing the relevant information we want
1150 + * to record. Declare name and type for each normal element,
1151 + * name, type and size for arrays. Use __string for variable
1155 + __field(void *, vaddr)
1156 + __field(size_t, size)
1157 + __field(dma_addr_t, dma_addr)
1158 + __field(size_t, map_size)
1159 + __field(u16, bpid)
1160 + __string(name, netdev->name)
1163 + /* The function that assigns values to the above declared
1167 + __entry->vaddr = vaddr;
1168 + __entry->size = size;
1169 + __entry->dma_addr = dma_addr;
1170 + __entry->map_size = map_size;
1171 + __entry->bpid = bpid;
1172 + __assign_str(name, netdev->name);
1175 + /* This is what gets printed when the trace event is
1178 + TP_printk(TR_BUF_FMT,
1182 + &__entry->dma_addr,
1183 + __entry->map_size,
1187 +/* If only one event of a certain type needs to be declared, use TRACE_EVENT().
1188 + * The syntax is the same as for DECLARE_EVENT_CLASS().
1191 +#endif /* _DPAA2_ETH_TRACE_H */
1193 +/* This must be outside ifdef _DPAA2_ETH_TRACE_H */
1194 +#undef TRACE_INCLUDE_PATH
1195 +#define TRACE_INCLUDE_PATH .
1196 +#undef TRACE_INCLUDE_FILE
1197 +#define TRACE_INCLUDE_FILE dpaa2-eth-trace
1198 +#include <trace/define_trace.h>
1200 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
1202 +/* Copyright 2014-2015 Freescale Semiconductor Inc.
1204 + * Redistribution and use in source and binary forms, with or without
1205 + * modification, are permitted provided that the following conditions are met:
1206 + * * Redistributions of source code must retain the above copyright
1207 + * notice, this list of conditions and the following disclaimer.
1208 + * * Redistributions in binary form must reproduce the above copyright
1209 + * notice, this list of conditions and the following disclaimer in the
1210 + * documentation and/or other materials provided with the distribution.
1211 + * * Neither the name of Freescale Semiconductor nor the
1212 + * names of its contributors may be used to endorse or promote products
1213 + * derived from this software without specific prior written permission.
1216 + * ALTERNATIVELY, this software may be distributed under the terms of the
1217 + * GNU General Public License ("GPL") as published by the Free Software
1218 + * Foundation, either version 2 of that License or (at your option) any
1221 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1222 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1223 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1224 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1225 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1226 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1227 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1228 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1229 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1230 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1232 +#include <linux/init.h>
1233 +#include <linux/module.h>
1234 +#include <linux/platform_device.h>
1235 +#include <linux/etherdevice.h>
1236 +#include <linux/of_net.h>
1237 +#include <linux/interrupt.h>
1238 +#include <linux/debugfs.h>
1239 +#include <linux/kthread.h>
1240 +#include <linux/msi.h>
1241 +#include <linux/net_tstamp.h>
1242 +#include <linux/iommu.h>
1244 +#include "../../fsl-mc/include/dpbp.h"
1245 +#include "../../fsl-mc/include/dpcon.h"
1246 +#include "../../fsl-mc/include/mc.h"
1247 +#include "../../fsl-mc/include/mc-sys.h"
1248 +#include "dpaa2-eth.h"
1251 +/* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
1252 + * using trace events only need to #include <trace/events/sched.h>
1254 +#define CREATE_TRACE_POINTS
1255 +#include "dpaa2-eth-trace.h"
1257 +MODULE_LICENSE("Dual BSD/GPL");
1258 +MODULE_AUTHOR("Freescale Semiconductor, Inc");
1259 +MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
1261 +const char dpaa2_eth_drv_version[] = "0.1";
1263 +void *dpaa2_eth_iova_to_virt(struct iommu_domain *domain, dma_addr_t iova_addr)
1265 + phys_addr_t phys_addr;
1267 + phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
1269 + return phys_to_virt(phys_addr);
1272 +static void validate_rx_csum(struct dpaa2_eth_priv *priv,
1274 + struct sk_buff *skb)
1276 + skb_checksum_none_assert(skb);
1278 + /* HW checksum validation is disabled, nothing to do here */
1279 + if (!(priv->net_dev->features & NETIF_F_RXCSUM))
1282 + /* Read checksum validation bits */
1283 + if (!((fd_status & DPAA2_FAS_L3CV) &&
1284 + (fd_status & DPAA2_FAS_L4CV)))
1287 + /* Inform the stack there's no need to compute L3/L4 csum anymore */
1288 + skb->ip_summed = CHECKSUM_UNNECESSARY;
1291 +/* Free a received FD.
1292 + * Not to be used for Tx conf FDs or on any other paths.
1294 +static void free_rx_fd(struct dpaa2_eth_priv *priv,
1295 + const struct dpaa2_fd *fd,
1298 + struct device *dev = priv->net_dev->dev.parent;
1299 + dma_addr_t addr = dpaa2_fd_get_addr(fd);
1300 + u8 fd_format = dpaa2_fd_get_format(fd);
1301 + struct dpaa2_sg_entry *sgt;
1305 + /* If single buffer frame, just free the data buffer */
1306 + if (fd_format == dpaa2_fd_single)
1308 + else if (fd_format != dpaa2_fd_sg)
1309 + /* we don't support any other format */
1312 + /* For S/G frames, we first need to free all SG entries */
1313 + sgt = vaddr + dpaa2_fd_get_offset(fd);
1314 + for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
1315 + addr = dpaa2_sg_get_addr(&sgt[i]);
1316 + sg_vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, addr);
1318 + dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE,
1321 + put_page(virt_to_head_page(sg_vaddr));
1323 + if (dpaa2_sg_is_final(&sgt[i]))
1328 + put_page(virt_to_head_page(vaddr));
1331 +/* Build a linear skb based on a single-buffer frame descriptor */
1332 +static struct sk_buff *build_linear_skb(struct dpaa2_eth_priv *priv,
1333 + struct dpaa2_eth_channel *ch,
1334 + const struct dpaa2_fd *fd,
1337 + struct sk_buff *skb = NULL;
1338 + u16 fd_offset = dpaa2_fd_get_offset(fd);
1339 + u32 fd_length = dpaa2_fd_get_len(fd);
1341 + skb = build_skb(fd_vaddr, DPAA2_ETH_SKB_SIZE);
1342 + if (unlikely(!skb))
1345 + skb_reserve(skb, fd_offset);
1346 + skb_put(skb, fd_length);
1353 +/* Build a non linear (fragmented) skb based on a S/G table */
1354 +static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv,
1355 + struct dpaa2_eth_channel *ch,
1356 + struct dpaa2_sg_entry *sgt)
1358 + struct sk_buff *skb = NULL;
1359 + struct device *dev = priv->net_dev->dev.parent;
1361 + dma_addr_t sg_addr;
1364 + struct page *page, *head_page;
1368 + for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
1369 + struct dpaa2_sg_entry *sge = &sgt[i];
1371 + /* NOTE: We only support SG entries in dpaa2_sg_single format,
1372 + * but this is the only format we may receive from HW anyway
1375 + /* Get the address and length from the S/G entry */
1376 + sg_addr = dpaa2_sg_get_addr(sge);
1377 + sg_vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, sg_addr);
1378 + dma_unmap_single(dev, sg_addr, DPAA2_ETH_RX_BUF_SIZE,
1381 + sg_length = dpaa2_sg_get_len(sge);
1384 + /* We build the skb around the first data buffer */
1385 + skb = build_skb(sg_vaddr, DPAA2_ETH_SKB_SIZE);
1386 + if (unlikely(!skb))
1389 + sg_offset = dpaa2_sg_get_offset(sge);
1390 + skb_reserve(skb, sg_offset);
1391 + skb_put(skb, sg_length);
1393 + /* Rest of the data buffers are stored as skb frags */
1394 + page = virt_to_page(sg_vaddr);
1395 + head_page = virt_to_head_page(sg_vaddr);
1397 + /* Offset in page (which may be compound).
1398 + * Data in subsequent SG entries is stored from the
1399 + * beginning of the buffer, so we don't need to add the
1402 + page_offset = ((unsigned long)sg_vaddr &
1403 + (PAGE_SIZE - 1)) +
1404 + (page_address(page) - page_address(head_page));
1406 + skb_add_rx_frag(skb, i - 1, head_page, page_offset,
1407 + sg_length, DPAA2_ETH_RX_BUF_SIZE);
1410 + if (dpaa2_sg_is_final(sge))
1414 + /* Count all data buffers + SG table buffer */
1415 + ch->buf_count -= i + 2;
1420 +/* Main Rx frame processing routine */
1421 +static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
1422 + struct dpaa2_eth_channel *ch,
1423 + const struct dpaa2_fd *fd,
1424 + struct napi_struct *napi,
1427 + dma_addr_t addr = dpaa2_fd_get_addr(fd);
1428 + u8 fd_format = dpaa2_fd_get_format(fd);
1430 + struct sk_buff *skb;
1431 + struct rtnl_link_stats64 *percpu_stats;
1432 + struct dpaa2_eth_drv_stats *percpu_extras;
1433 + struct device *dev = priv->net_dev->dev.parent;
1434 + struct dpaa2_fas *fas;
1438 + /* Tracing point */
1439 + trace_dpaa2_rx_fd(priv->net_dev, fd);
1441 + vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, addr);
1442 + dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE, DMA_FROM_DEVICE);
1444 + /* HWA - FAS, timestamp */
1445 + fas = dpaa2_eth_get_fas(vaddr);
1447 + /* data / SG table */
1448 + buf_data = vaddr + dpaa2_fd_get_offset(fd);
1449 + prefetch(buf_data);
1451 + percpu_stats = this_cpu_ptr(priv->percpu_stats);
1452 + percpu_extras = this_cpu_ptr(priv->percpu_extras);
1454 + switch (fd_format) {
1455 + case dpaa2_fd_single:
1456 + skb = build_linear_skb(priv, ch, fd, vaddr);
1459 + skb = build_frag_skb(priv, ch, buf_data);
1460 + put_page(virt_to_head_page(vaddr));
1461 + percpu_extras->rx_sg_frames++;
1462 + percpu_extras->rx_sg_bytes += dpaa2_fd_get_len(fd);
1465 + /* We don't support any other format */
1466 + goto err_frame_format;
1469 + if (unlikely(!skb))
1470 + goto err_build_skb;
1472 + prefetch(skb->data);
1474 + /* Get the timestamp value */
1475 + if (priv->ts_rx_en) {
1476 + struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
1477 + u64 *ns = (u64 *)dpaa2_eth_get_ts(vaddr);
1479 + *ns = DPAA2_PTP_NOMINAL_FREQ_PERIOD_NS * le64_to_cpup(ns);
1480 + memset(shhwtstamps, 0, sizeof(*shhwtstamps));
1481 + shhwtstamps->hwtstamp = ns_to_ktime(*ns);
1484 + /* Check if we need to validate the L4 csum */
1485 + if (likely(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
1486 + status = le32_to_cpu(fas->status);
1487 + validate_rx_csum(priv, status, skb);
1490 + skb->protocol = eth_type_trans(skb, priv->net_dev);
1492 + /* Record Rx queue - this will be used when picking a Tx queue to
1493 + * forward the frames. We're keeping flow affinity through the
1496 + skb_record_rx_queue(skb, queue_id);
1498 + percpu_stats->rx_packets++;
1499 + percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
1501 + napi_gro_receive(napi, skb);
1506 + free_rx_fd(priv, fd, vaddr);
1508 + percpu_stats->rx_dropped++;
1511 +#ifdef CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE
1512 +/* Processing of Rx frames received on the error FQ
1513 + * We check and print the error bits and then free the frame
1515 +static void dpaa2_eth_rx_err(struct dpaa2_eth_priv *priv,
1516 + struct dpaa2_eth_channel *ch,
1517 + const struct dpaa2_fd *fd,
1518 + struct napi_struct *napi __always_unused,
1519 + u16 queue_id __always_unused)
1521 + struct device *dev = priv->net_dev->dev.parent;
1522 + dma_addr_t addr = dpaa2_fd_get_addr(fd);
1524 + struct rtnl_link_stats64 *percpu_stats;
1525 + struct dpaa2_fas *fas;
1527 + bool check_fas_errors = false;
1529 + vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, addr);
1530 + dma_unmap_single(dev, addr, DPAA2_ETH_RX_BUF_SIZE, DMA_FROM_DEVICE);
1532 + /* check frame errors in the FD field */
1533 + if (fd->simple.ctrl & DPAA2_FD_RX_ERR_MASK) {
1534 + check_fas_errors = !!(fd->simple.ctrl & FD_CTRL_FAERR) &&
1535 + !!(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV);
1536 + if (net_ratelimit())
1537 + netdev_dbg(priv->net_dev, "Rx frame FD err: %x08\n",
1538 + fd->simple.ctrl & DPAA2_FD_RX_ERR_MASK);
1541 + /* check frame errors in the FAS field */
1542 + if (check_fas_errors) {
1543 + fas = dpaa2_eth_get_fas(vaddr);
1544 + status = le32_to_cpu(fas->status);
1545 + if (net_ratelimit())
1546 + netdev_dbg(priv->net_dev, "Rx frame FAS err: 0x%08x\n",
1547 + status & DPAA2_FAS_RX_ERR_MASK);
1549 + free_rx_fd(priv, fd, vaddr);
1551 + percpu_stats = this_cpu_ptr(priv->percpu_stats);
1552 + percpu_stats->rx_errors++;
1556 +/* Consume all frames pull-dequeued into the store. This is the simplest way to
1557 + * make sure we don't accidentally issue another volatile dequeue which would
1558 + * overwrite (leak) frames already in the store.
1560 + * The number of frames is returned using the last 2 output arguments,
1561 + * separately for Rx and Tx confirmations.
1563 + * Observance of NAPI budget is not our concern, leaving that to the caller.
1565 +static bool consume_frames(struct dpaa2_eth_channel *ch, int *rx_cleaned,
1566 + int *tx_conf_cleaned)
1568 + struct dpaa2_eth_priv *priv = ch->priv;
1569 + struct dpaa2_eth_fq *fq = NULL;
1570 + struct dpaa2_dq *dq;
1571 + const struct dpaa2_fd *fd;
1576 + dq = dpaa2_io_store_next(ch->store, &is_last);
1577 + if (unlikely(!dq)) {
1578 + /* If we're here, we *must* have placed a
1579 + * volatile dequeue comnmand, so keep reading through
1580 + * the store until we get some sort of valid response
1581 + * token (either a valid frame or an "empty dequeue")
1586 + fd = dpaa2_dq_fd(dq);
1588 + /* prefetch the frame descriptor */
1591 + fq = (struct dpaa2_eth_fq *)dpaa2_dq_fqd_ctx(dq);
1592 + fq->consume(priv, ch, fd, &ch->napi, fq->flowid);
1594 + } while (!is_last);
1599 + /* All frames brought in store by a volatile dequeue
1600 + * come from the same queue
1602 + if (fq->type == DPAA2_TX_CONF_FQ)
1603 + *tx_conf_cleaned += cleaned;
1605 + *rx_cleaned += cleaned;
1607 + fq->stats.frames += cleaned;
1608 + ch->stats.frames += cleaned;
1613 +/* Configure the egress frame annotation for timestamp update */
1614 +static void enable_tx_tstamp(struct dpaa2_fd *fd, void *buf_start)
1616 + struct dpaa2_faead *faead;
1620 + /* Mark the egress frame annotation area as valid */
1621 + frc = dpaa2_fd_get_frc(fd);
1622 + dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
1624 + /* enable UPD (update prepanded data) bit in FAEAD field of
1625 + * hardware frame annotation area
1627 + ctrl = DPAA2_FAEAD_A2V | DPAA2_FAEAD_UPDV | DPAA2_FAEAD_UPD;
1628 + faead = dpaa2_eth_get_faead(buf_start);
1629 + faead->ctrl = cpu_to_le32(ctrl);
1632 +/* Create a frame descriptor based on a fragmented skb */
1633 +static int build_sg_fd(struct dpaa2_eth_priv *priv,
1634 + struct sk_buff *skb,
1635 + struct dpaa2_fd *fd)
1637 + struct device *dev = priv->net_dev->dev.parent;
1638 + void *sgt_buf = NULL;
1640 + int nr_frags = skb_shinfo(skb)->nr_frags;
1641 + struct dpaa2_sg_entry *sgt;
1644 + struct scatterlist *scl, *crt_scl;
1647 + struct dpaa2_fas *fas;
1648 + struct dpaa2_eth_swa *swa;
1650 + /* Create and map scatterlist.
1651 + * We don't advertise NETIF_F_FRAGLIST, so skb_to_sgvec() will not have
1652 + * to go beyond nr_frags+1.
1653 + * Note: We don't support chained scatterlists
1655 + if (unlikely(PAGE_SIZE / sizeof(struct scatterlist) < nr_frags + 1))
1658 + scl = kcalloc(nr_frags + 1, sizeof(struct scatterlist), GFP_ATOMIC);
1659 + if (unlikely(!scl))
1662 + sg_init_table(scl, nr_frags + 1);
1663 + num_sg = skb_to_sgvec(skb, scl, 0, skb->len);
1664 + num_dma_bufs = dma_map_sg(dev, scl, num_sg, DMA_TO_DEVICE);
1665 + if (unlikely(!num_dma_bufs)) {
1667 + goto dma_map_sg_failed;
1670 + /* Prepare the HW SGT structure */
1671 + sgt_buf_size = priv->tx_data_offset +
1672 + sizeof(struct dpaa2_sg_entry) * (1 + num_dma_bufs);
1673 + sgt_buf = kzalloc(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN, GFP_ATOMIC);
1674 + if (unlikely(!sgt_buf)) {
1676 + goto sgt_buf_alloc_failed;
1678 + sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
1680 + /* PTA from egress side is passed as is to the confirmation side so
1681 + * we need to clear some fields here in order to find consistent values
1682 + * on TX confirmation. We are clearing FAS (Frame Annotation Status)
1683 + * field from the hardware annotation area
1685 + fas = dpaa2_eth_get_fas(sgt_buf);
1686 + memset(fas, 0, DPAA2_FAS_SIZE);
1688 + sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
1690 + /* Fill in the HW SGT structure.
1692 + * sgt_buf is zeroed out, so the following fields are implicit
1693 + * in all sgt entries:
1695 + * - format is 'dpaa2_sg_single'
1697 + for_each_sg(scl, crt_scl, num_dma_bufs, i) {
1698 + dpaa2_sg_set_addr(&sgt[i], sg_dma_address(crt_scl));
1699 + dpaa2_sg_set_len(&sgt[i], sg_dma_len(crt_scl));
1701 + dpaa2_sg_set_final(&sgt[i - 1], true);
1703 + /* Store the skb backpointer in the SGT buffer.
1704 + * Fit the scatterlist and the number of buffers alongside the
1705 + * skb backpointer in the software annotation area. We'll need
1706 + * all of them on Tx Conf.
1708 + swa = (struct dpaa2_eth_swa *)sgt_buf;
1711 + swa->num_sg = num_sg;
1712 + swa->num_dma_bufs = num_dma_bufs;
1714 + /* Separately map the SGT buffer */
1715 + addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
1716 + if (unlikely(dma_mapping_error(dev, addr))) {
1718 + goto dma_map_single_failed;
1720 + dpaa2_fd_set_offset(fd, priv->tx_data_offset);
1721 + dpaa2_fd_set_format(fd, dpaa2_fd_sg);
1722 + dpaa2_fd_set_addr(fd, addr);
1723 + dpaa2_fd_set_len(fd, skb->len);
1725 + fd->simple.ctrl = DPAA2_FD_CTRL_ASAL | FD_CTRL_PTA | FD_CTRL_PTV1;
1727 + if (priv->ts_tx_en && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
1728 + enable_tx_tstamp(fd, sgt_buf);
1732 +dma_map_single_failed:
1734 +sgt_buf_alloc_failed:
1735 + dma_unmap_sg(dev, scl, num_sg, DMA_TO_DEVICE);
1741 +/* Create a frame descriptor based on a linear skb */
1742 +static int build_single_fd(struct dpaa2_eth_priv *priv,
1743 + struct sk_buff *skb,
1744 + struct dpaa2_fd *fd)
1746 + struct device *dev = priv->net_dev->dev.parent;
1748 + struct sk_buff **skbh;
1750 + struct dpaa2_fas *fas;
1752 + buffer_start = PTR_ALIGN(skb->data - priv->tx_data_offset -
1753 + DPAA2_ETH_TX_BUF_ALIGN,
1754 + DPAA2_ETH_TX_BUF_ALIGN);
1756 + /* PTA from egress side is passed as is to the confirmation side so
1757 + * we need to clear some fields here in order to find consistent values
1758 + * on TX confirmation. We are clearing FAS (Frame Annotation Status)
1759 + * field from the hardware annotation area
1761 + fas = dpaa2_eth_get_fas(buffer_start);
1762 + memset(fas, 0, DPAA2_FAS_SIZE);
1764 + /* Store a backpointer to the skb at the beginning of the buffer
1765 + * (in the private data area) such that we can release it
1768 + skbh = (struct sk_buff **)buffer_start;
1771 + addr = dma_map_single(dev, buffer_start,
1772 + skb_tail_pointer(skb) - buffer_start,
1773 + DMA_BIDIRECTIONAL);
1774 + if (unlikely(dma_mapping_error(dev, addr)))
1777 + dpaa2_fd_set_addr(fd, addr);
1778 + dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
1779 + dpaa2_fd_set_len(fd, skb->len);
1780 + dpaa2_fd_set_format(fd, dpaa2_fd_single);
1782 + fd->simple.ctrl = DPAA2_FD_CTRL_ASAL | FD_CTRL_PTA | FD_CTRL_PTV1;
1784 + if (priv->ts_tx_en && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
1785 + enable_tx_tstamp(fd, buffer_start);
1790 +/* FD freeing routine on the Tx path
1792 + * DMA-unmap and free FD and possibly SGT buffer allocated on Tx. The skb
1793 + * back-pointed to is also freed.
1794 + * This can be called either from dpaa2_eth_tx_conf() or on the error path of
1796 + * Optionally, return the frame annotation status word (FAS), which needs
1797 + * to be checked if we're on the confirmation path.
1799 +static void free_tx_fd(const struct dpaa2_eth_priv *priv,
1800 + const struct dpaa2_fd *fd,
1803 + struct device *dev = priv->net_dev->dev.parent;
1804 + dma_addr_t fd_addr;
1805 + struct sk_buff **skbh, *skb;
1806 + unsigned char *buffer_start;
1808 + struct scatterlist *scl;
1809 + int num_sg, num_dma_bufs;
1810 + struct dpaa2_eth_swa *swa;
1811 + u8 fd_format = dpaa2_fd_get_format(fd);
1812 + struct dpaa2_fas *fas;
1814 + fd_addr = dpaa2_fd_get_addr(fd);
1815 + skbh = dpaa2_eth_iova_to_virt(priv->iommu_domain, fd_addr);
1817 + /* HWA - FAS, timestamp (for Tx confirmation frames) */
1818 + fas = dpaa2_eth_get_fas(skbh);
1821 + switch (fd_format) {
1822 + case dpaa2_fd_single:
1824 + buffer_start = (unsigned char *)skbh;
1825 + /* Accessing the skb buffer is safe before dma unmap, because
1826 + * we didn't map the actual skb shell.
1828 + dma_unmap_single(dev, fd_addr,
1829 + skb_tail_pointer(skb) - buffer_start,
1830 + DMA_BIDIRECTIONAL);
1833 + swa = (struct dpaa2_eth_swa *)skbh;
1836 + num_sg = swa->num_sg;
1837 + num_dma_bufs = swa->num_dma_bufs;
1839 + /* Unmap the scatterlist */
1840 + dma_unmap_sg(dev, scl, num_sg, DMA_TO_DEVICE);
1843 + /* Unmap the SGT buffer */
1844 + unmap_size = priv->tx_data_offset +
1845 + sizeof(struct dpaa2_sg_entry) * (1 + num_dma_bufs);
1846 + dma_unmap_single(dev, fd_addr, unmap_size, DMA_BIDIRECTIONAL);
1849 + /* Unsupported format, mark it as errored and give up */
1855 + /* Get the timestamp value */
1856 + if (priv->ts_tx_en && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
1857 + struct skb_shared_hwtstamps shhwtstamps;
1860 + memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1862 + ns = (u64 *)dpaa2_eth_get_ts(skbh);
1863 + *ns = DPAA2_PTP_NOMINAL_FREQ_PERIOD_NS * le64_to_cpup(ns);
1864 + shhwtstamps.hwtstamp = ns_to_ktime(*ns);
1865 + skb_tstamp_tx(skb, &shhwtstamps);
1868 + /* Read the status from the Frame Annotation after we unmap the first
1869 + * buffer but before we free it. The caller function is responsible
1870 + * for checking the status value.
1873 + *status = le32_to_cpu(fas->status);
1875 + /* Free SGT buffer kmalloc'ed on tx */
1876 + if (fd_format != dpaa2_fd_single)
1879 + /* Move on with skb release */
1880 + dev_kfree_skb(skb);
1883 +static int dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev)
1885 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1886 + struct device *dev = net_dev->dev.parent;
1887 + struct dpaa2_fd fd;
1888 + struct rtnl_link_stats64 *percpu_stats;
1889 + struct dpaa2_eth_drv_stats *percpu_extras;
1890 + struct dpaa2_eth_fq *fq;
1891 + u16 queue_mapping = skb_get_queue_mapping(skb);
1894 + /* If we're congested, stop this tx queue; transmission of the
1895 + * current skb happens regardless of congestion state
1897 + fq = &priv->fq[queue_mapping];
1899 + dma_sync_single_for_cpu(dev, priv->cscn_dma,
1900 + DPAA2_CSCN_SIZE, DMA_FROM_DEVICE);
1901 + if (unlikely(dpaa2_cscn_state_congested(priv->cscn_mem))) {
1902 + netif_stop_subqueue(net_dev, queue_mapping);
1903 + fq->stats.congestion_entry++;
1906 + percpu_stats = this_cpu_ptr(priv->percpu_stats);
1907 + percpu_extras = this_cpu_ptr(priv->percpu_extras);
1909 + if (unlikely(skb_headroom(skb) < DPAA2_ETH_NEEDED_HEADROOM(priv))) {
1910 + struct sk_buff *ns;
1912 + ns = skb_realloc_headroom(skb, DPAA2_ETH_NEEDED_HEADROOM(priv));
1913 + if (unlikely(!ns)) {
1914 + percpu_stats->tx_dropped++;
1915 + goto err_alloc_headroom;
1917 + dev_kfree_skb(skb);
1921 + /* We'll be holding a back-reference to the skb until Tx Confirmation;
1922 + * we don't want that overwritten by a concurrent Tx with a cloned skb.
1924 + skb = skb_unshare(skb, GFP_ATOMIC);
1925 + if (unlikely(!skb)) {
1926 + /* skb_unshare() has already freed the skb */
1927 + percpu_stats->tx_dropped++;
1928 + return NETDEV_TX_OK;
1931 + /* Setup the FD fields */
1932 + memset(&fd, 0, sizeof(fd));
1934 + if (skb_is_nonlinear(skb)) {
1935 + err = build_sg_fd(priv, skb, &fd);
1936 + percpu_extras->tx_sg_frames++;
1937 + percpu_extras->tx_sg_bytes += skb->len;
1939 + err = build_single_fd(priv, skb, &fd);
1942 + if (unlikely(err)) {
1943 + percpu_stats->tx_dropped++;
1944 + goto err_build_fd;
1947 + /* Tracing point */
1948 + trace_dpaa2_tx_fd(net_dev, &fd);
1950 + for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
1951 + err = dpaa2_io_service_enqueue_qd(NULL, priv->tx_qdid, 0,
1952 + fq->tx_qdbin, &fd);
1953 + /* TODO: This doesn't work. Check on simulator.
1954 + * err = dpaa2_io_service_enqueue_fq(NULL,
1955 + * priv->fq[0].fqid_tx, &fd);
1957 + if (err != -EBUSY)
1960 + percpu_extras->tx_portal_busy += i;
1961 + if (unlikely(err < 0)) {
1962 + percpu_stats->tx_errors++;
1963 + /* Clean up everything, including freeing the skb */
1964 + free_tx_fd(priv, &fd, NULL);
1966 + percpu_stats->tx_packets++;
1967 + percpu_stats->tx_bytes += dpaa2_fd_get_len(&fd);
1970 + return NETDEV_TX_OK;
1973 +err_alloc_headroom:
1974 + dev_kfree_skb(skb);
1976 + return NETDEV_TX_OK;
1979 +/* Tx confirmation frame processing routine */
1980 +static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
1981 + struct dpaa2_eth_channel *ch,
1982 + const struct dpaa2_fd *fd,
1983 + struct napi_struct *napi __always_unused,
1986 + struct device *dev = priv->net_dev->dev.parent;
1987 + struct rtnl_link_stats64 *percpu_stats;
1988 + struct dpaa2_eth_drv_stats *percpu_extras;
1990 + bool errors = !!(fd->simple.ctrl & DPAA2_FD_TX_ERR_MASK);
1991 + bool check_fas_errors = false;
1993 + /* Tracing point */
1994 + trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
1996 + percpu_extras = this_cpu_ptr(priv->percpu_extras);
1997 + percpu_extras->tx_conf_frames++;
1998 + percpu_extras->tx_conf_bytes += dpaa2_fd_get_len(fd);
2000 + /* Check congestion state and wake all queues if necessary */
2001 + if (unlikely(__netif_subqueue_stopped(priv->net_dev, queue_id))) {
2002 + dma_sync_single_for_cpu(dev, priv->cscn_dma,
2003 + DPAA2_CSCN_SIZE, DMA_FROM_DEVICE);
2004 + if (!dpaa2_cscn_state_congested(priv->cscn_mem))
2005 + netif_tx_wake_all_queues(priv->net_dev);
2008 + /* check frame errors in the FD field */
2009 + if (unlikely(errors)) {
2010 + check_fas_errors = !!(fd->simple.ctrl & FD_CTRL_FAERR) &&
2011 + !!(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV);
2012 + if (net_ratelimit())
2013 + netdev_dbg(priv->net_dev, "Tx frame FD err: %x08\n",
2014 + fd->simple.ctrl & DPAA2_FD_TX_ERR_MASK);
2017 + free_tx_fd(priv, fd, check_fas_errors ? &status : NULL);
2019 + /* if there are no errors, we're done */
2020 + if (likely(!errors))
2023 + percpu_stats = this_cpu_ptr(priv->percpu_stats);
2024 + /* Tx-conf logically pertains to the egress path. */
2025 + percpu_stats->tx_errors++;
2027 + if (net_ratelimit())
2028 + netdev_dbg(priv->net_dev, "Tx frame FAS err: %x08\n",
2029 + status & DPAA2_FAS_TX_ERR_MASK);
2032 +static int set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
2036 + err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
2037 + DPNI_OFF_RX_L3_CSUM, enable);
2039 + netdev_err(priv->net_dev,
2040 + "dpni_set_offload() DPNI_OFF_RX_L3_CSUM failed\n");
2044 + err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
2045 + DPNI_OFF_RX_L4_CSUM, enable);
2047 + netdev_err(priv->net_dev,
2048 + "dpni_set_offload() DPNI_OFF_RX_L4_CSUM failed\n");
2055 +static int set_tx_csum(struct dpaa2_eth_priv *priv, bool enable)
2059 + err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
2060 + DPNI_OFF_TX_L3_CSUM, enable);
2062 + netdev_err(priv->net_dev,
2063 + "dpni_set_offload() DPNI_OFF_RX_L3_CSUM failed\n");
2067 + err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
2068 + DPNI_OFF_TX_L4_CSUM, enable);
2070 + netdev_err(priv->net_dev,
2071 + "dpni_set_offload() DPNI_OFF_RX_L4_CSUM failed\n");
2078 +/* Perform a single release command to add buffers
2079 + * to the specified buffer pool
2081 +static int add_bufs(struct dpaa2_eth_priv *priv, u16 bpid)
2083 + struct device *dev = priv->net_dev->dev.parent;
2084 + u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
2089 + for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) {
2090 + /* Allocate buffer visible to WRIOP + skb shared info +
2091 + * alignment padding.
2093 + buf = napi_alloc_frag(DPAA2_ETH_BUF_RAW_SIZE(priv));
2094 + if (unlikely(!buf))
2097 + buf = PTR_ALIGN(buf, priv->rx_buf_align);
2099 + addr = dma_map_single(dev, buf, DPAA2_ETH_RX_BUF_SIZE,
2101 + if (unlikely(dma_mapping_error(dev, addr)))
2104 + buf_array[i] = addr;
2106 + /* tracing point */
2107 + trace_dpaa2_eth_buf_seed(priv->net_dev,
2108 + buf, DPAA2_ETH_BUF_RAW_SIZE(priv),
2109 + addr, DPAA2_ETH_RX_BUF_SIZE,
2114 + /* In case the portal is busy, retry until successful.
2115 + * The buffer release function would only fail if the QBMan portal
2116 + * was busy, which implies portal contention (i.e. more CPUs than
2117 + * portals, i.e. GPPs w/o affine DPIOs). For all practical purposes,
2118 + * there is little we can realistically do, short of giving up -
2119 + * in which case we'd risk depleting the buffer pool and never again
2120 + * receiving the Rx interrupt which would kick-start the refill logic.
2121 + * So just keep retrying, at the risk of being moved to ksoftirqd.
2123 + while (dpaa2_io_service_release(NULL, bpid, buf_array, i))
2128 + put_page(virt_to_head_page(buf));
2131 + goto release_bufs;
2136 +static int seed_pool(struct dpaa2_eth_priv *priv, u16 bpid)
2141 + /* This is the lazy seeding of Rx buffer pools.
2142 + * dpaa2_add_bufs() is also used on the Rx hotpath and calls
2143 + * napi_alloc_frag(). The trouble with that is that it in turn ends up
2144 + * calling this_cpu_ptr(), which mandates execution in atomic context.
2145 + * Rather than splitting up the code, do a one-off preempt disable.
2147 + preempt_disable();
2148 + for (j = 0; j < priv->num_channels; j++) {
2149 + priv->channel[j]->buf_count = 0;
2150 + for (i = 0; i < priv->num_bufs;
2151 + i += DPAA2_ETH_BUFS_PER_CMD) {
2152 + new_count = add_bufs(priv, bpid);
2153 + priv->channel[j]->buf_count += new_count;
2155 + if (new_count < DPAA2_ETH_BUFS_PER_CMD) {
2167 + * Drain the specified number of buffers from the DPNI's private buffer pool.
2168 + * @count must not exceeed DPAA2_ETH_BUFS_PER_CMD
2170 +static void drain_bufs(struct dpaa2_eth_priv *priv, int count)
2172 + struct device *dev = priv->net_dev->dev.parent;
2173 + u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
2178 + ret = dpaa2_io_service_acquire(NULL, priv->bpid,
2179 + buf_array, count);
2181 + netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n");
2184 + for (i = 0; i < ret; i++) {
2185 + /* Same logic as on regular Rx path */
2186 + vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain,
2188 + dma_unmap_single(dev, buf_array[i],
2189 + DPAA2_ETH_RX_BUF_SIZE,
2191 + put_page(virt_to_head_page(vaddr));
2196 +static void drain_pool(struct dpaa2_eth_priv *priv)
2198 + preempt_disable();
2199 + drain_bufs(priv, DPAA2_ETH_BUFS_PER_CMD);
2200 + drain_bufs(priv, 1);
2204 +/* Function is called from softirq context only, so we don't need to guard
2205 + * the access to percpu count
2207 +static int refill_pool(struct dpaa2_eth_priv *priv,
2208 + struct dpaa2_eth_channel *ch,
2213 + if (likely(ch->buf_count >= priv->refill_thresh))
2217 + new_count = add_bufs(priv, bpid);
2218 + if (unlikely(!new_count)) {
2219 + /* Out of memory; abort for now, we'll try later on */
2222 + ch->buf_count += new_count;
2223 + } while (ch->buf_count < priv->num_bufs);
2225 + if (unlikely(ch->buf_count < priv->num_bufs))
2231 +static int pull_channel(struct dpaa2_eth_channel *ch)
2234 + int dequeues = -1;
2236 + /* Retry while portal is busy */
2238 + err = dpaa2_io_service_pull_channel(NULL, ch->ch_id, ch->store);
2241 + } while (err == -EBUSY);
2243 + ch->stats.dequeue_portal_busy += dequeues;
2244 + if (unlikely(err))
2245 + ch->stats.pull_err++;
2250 +/* NAPI poll routine
2252 + * Frames are dequeued from the QMan channel associated with this NAPI context.
2253 + * Rx and (if configured) Rx error frames count towards the NAPI budget. Tx
2254 + * confirmation frames are limited by a threshold per NAPI poll cycle.
2256 +static int dpaa2_eth_poll(struct napi_struct *napi, int budget)
2258 + struct dpaa2_eth_channel *ch;
2259 + int rx_cleaned = 0, tx_conf_cleaned = 0;
2260 + bool store_cleaned;
2261 + struct dpaa2_eth_priv *priv;
2264 + ch = container_of(napi, struct dpaa2_eth_channel, napi);
2268 + err = pull_channel(ch);
2269 + if (unlikely(err))
2272 + /* Refill pool if appropriate */
2273 + refill_pool(priv, ch, priv->bpid);
2275 + store_cleaned = consume_frames(ch, &rx_cleaned,
2276 + &tx_conf_cleaned);
2278 + /* If we've either consumed the budget with Rx frames,
2279 + * or reached the Tx conf threshold, we're done.
2281 + if (rx_cleaned >= budget ||
2282 + tx_conf_cleaned >= TX_CONF_PER_NAPI_POLL)
2284 + } while (store_cleaned);
2286 + /* We didn't consume the entire budget, finish napi and
2287 + * re-enable data availability notifications.
2289 + napi_complete(napi);
2291 + err = dpaa2_io_service_rearm(NULL, &ch->nctx);
2293 + } while (err == -EBUSY);
2295 + return max(rx_cleaned, 1);
2298 +static void enable_ch_napi(struct dpaa2_eth_priv *priv)
2300 + struct dpaa2_eth_channel *ch;
2303 + for (i = 0; i < priv->num_channels; i++) {
2304 + ch = priv->channel[i];
2305 + napi_enable(&ch->napi);
2309 +static void disable_ch_napi(struct dpaa2_eth_priv *priv)
2311 + struct dpaa2_eth_channel *ch;
2314 + for (i = 0; i < priv->num_channels; i++) {
2315 + ch = priv->channel[i];
2316 + napi_disable(&ch->napi);
2320 +static int link_state_update(struct dpaa2_eth_priv *priv)
2322 + struct dpni_link_state state;
2325 + err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
2326 + if (unlikely(err)) {
2327 + netdev_err(priv->net_dev,
2328 + "dpni_get_link_state() failed\n");
2332 + /* Chech link state; speed / duplex changes are not treated yet */
2333 + if (priv->link_state.up == state.up)
2336 + priv->link_state = state;
2338 + netif_carrier_on(priv->net_dev);
2339 + netif_tx_start_all_queues(priv->net_dev);
2341 + netif_tx_stop_all_queues(priv->net_dev);
2342 + netif_carrier_off(priv->net_dev);
2345 + netdev_info(priv->net_dev, "Link Event: state %s",
2346 + state.up ? "up" : "down");
2351 +static int dpaa2_eth_open(struct net_device *net_dev)
2353 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2356 + /* We'll only start the txqs when the link is actually ready; make sure
2357 + * we don't race against the link up notification, which may come
2358 + * immediately after dpni_enable();
2360 + netif_tx_stop_all_queues(net_dev);
2362 + /* Also, explicitly set carrier off, otherwise netif_carrier_ok() will
2363 + * return true and cause 'ip link show' to report the LOWER_UP flag,
2364 + * even though the link notification wasn't even received.
2366 + netif_carrier_off(net_dev);
2368 + err = seed_pool(priv, priv->bpid);
2370 + /* Not much to do; the buffer pool, though not filled up,
2371 + * may still contain some buffers which would enable us
2374 + netdev_err(net_dev, "Buffer seeding failed for DPBP %d (bpid=%d)\n",
2375 + priv->dpbp_dev->obj_desc.id, priv->bpid);
2378 + if (priv->tx_pause_frames)
2379 + priv->refill_thresh = priv->num_bufs - DPAA2_ETH_BUFS_PER_CMD;
2381 + priv->refill_thresh = DPAA2_ETH_REFILL_THRESH_TD;
2383 + err = dpni_enable(priv->mc_io, 0, priv->mc_token);
2385 + netdev_err(net_dev, "dpni_enable() failed\n");
2389 + /* If the DPMAC object has already processed the link up interrupt,
2390 + * we have to learn the link state ourselves.
2392 + err = link_state_update(priv);
2394 + netdev_err(net_dev, "Can't update link state\n");
2395 + goto link_state_err;
2402 + priv->refill_thresh = 0;
2407 +static int dpaa2_eth_stop(struct net_device *net_dev)
2409 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2411 + int retries = 10, i;
2413 + netif_tx_stop_all_queues(net_dev);
2414 + netif_carrier_off(net_dev);
2416 + /* Loop while dpni_disable() attempts to drain the egress FQs
2417 + * and confirm them back to us.
2420 + dpni_disable(priv->mc_io, 0, priv->mc_token);
2421 + dpni_is_enabled(priv->mc_io, 0, priv->mc_token, &dpni_enabled);
2423 + /* Allow the MC some slack */
2425 + } while (dpni_enabled && --retries);
2427 + netdev_warn(net_dev, "Retry count exceeded disabling DPNI\n");
2428 + /* Must go on and disable NAPI nonetheless, so we don't crash at
2429 + * the next "ifconfig up"
2433 + priv->refill_thresh = 0;
2435 + /* Wait for all running napi poll routines to finish, so that no
2436 + * new refill operations are started.
2438 + for (i = 0; i < priv->num_channels; i++)
2439 + napi_synchronize(&priv->channel[i]->napi);
2441 + /* Empty the buffer pool */
2447 +static int dpaa2_eth_init(struct net_device *net_dev)
2449 + u64 supported = 0;
2450 + u64 not_supported = 0;
2451 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2452 + u32 options = priv->dpni_attrs.options;
2454 + /* Capabilities listing */
2455 + supported |= IFF_LIVE_ADDR_CHANGE;
2457 + if (options & DPNI_OPT_NO_MAC_FILTER)
2458 + not_supported |= IFF_UNICAST_FLT;
2460 + supported |= IFF_UNICAST_FLT;
2462 + net_dev->priv_flags |= supported;
2463 + net_dev->priv_flags &= ~not_supported;
2466 + net_dev->features = NETIF_F_RXCSUM |
2467 + NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2468 + NETIF_F_SG | NETIF_F_HIGHDMA |
2470 + net_dev->hw_features = net_dev->features;
2475 +static int dpaa2_eth_set_addr(struct net_device *net_dev, void *addr)
2477 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2478 + struct device *dev = net_dev->dev.parent;
2481 + err = eth_mac_addr(net_dev, addr);
2483 + dev_err(dev, "eth_mac_addr() failed (%d)\n", err);
2487 + err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
2488 + net_dev->dev_addr);
2490 + dev_err(dev, "dpni_set_primary_mac_addr() failed (%d)\n", err);
2497 +/** Fill in counters maintained by the GPP driver. These may be different from
2498 + * the hardware counters obtained by ethtool.
2500 +static void dpaa2_eth_get_stats(struct net_device *net_dev,
2501 + struct rtnl_link_stats64 *stats)
2503 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2504 + struct rtnl_link_stats64 *percpu_stats;
2506 + u64 *netstats = (u64 *)stats;
2508 + int num = sizeof(struct rtnl_link_stats64) / sizeof(u64);
2510 + for_each_possible_cpu(i) {
2511 + percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
2512 + cpustats = (u64 *)percpu_stats;
2513 + for (j = 0; j < num; j++)
2514 + netstats[j] += cpustats[j];
2518 +static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu)
2520 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2523 + /* Set the maximum Rx frame length to match the transmit side;
2524 + * account for L2 headers when computing the MFL
2526 + err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token,
2527 + (u16)DPAA2_ETH_L2_MAX_FRM(mtu));
2529 + netdev_err(net_dev, "dpni_set_max_frame_length() failed\n");
2533 + net_dev->mtu = mtu;
2537 +/* Copy mac unicast addresses from @net_dev to @priv.
2538 + * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
2540 +static void add_uc_hw_addr(const struct net_device *net_dev,
2541 + struct dpaa2_eth_priv *priv)
2543 + struct netdev_hw_addr *ha;
2546 + netdev_for_each_uc_addr(ha, net_dev) {
2547 + err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
2550 + netdev_warn(priv->net_dev,
2551 + "Could not add ucast MAC %pM to the filtering table (err %d)\n",
2556 +/* Copy mac multicast addresses from @net_dev to @priv
2557 + * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
2559 +static void add_mc_hw_addr(const struct net_device *net_dev,
2560 + struct dpaa2_eth_priv *priv)
2562 + struct netdev_hw_addr *ha;
2565 + netdev_for_each_mc_addr(ha, net_dev) {
2566 + err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
2569 + netdev_warn(priv->net_dev,
2570 + "Could not add mcast MAC %pM to the filtering table (err %d)\n",
2575 +static void dpaa2_eth_set_rx_mode(struct net_device *net_dev)
2577 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2578 + int uc_count = netdev_uc_count(net_dev);
2579 + int mc_count = netdev_mc_count(net_dev);
2580 + u8 max_mac = priv->dpni_attrs.mac_filter_entries;
2581 + u32 options = priv->dpni_attrs.options;
2582 + u16 mc_token = priv->mc_token;
2583 + struct fsl_mc_io *mc_io = priv->mc_io;
2586 + /* Basic sanity checks; these probably indicate a misconfiguration */
2587 + if (options & DPNI_OPT_NO_MAC_FILTER && max_mac != 0)
2588 + netdev_info(net_dev,
2589 + "mac_filter_entries=%d, DPNI_OPT_NO_MAC_FILTER option must be disabled\n",
2592 + /* Force promiscuous if the uc or mc counts exceed our capabilities. */
2593 + if (uc_count > max_mac) {
2594 + netdev_info(net_dev,
2595 + "Unicast addr count reached %d, max allowed is %d; forcing promisc\n",
2596 + uc_count, max_mac);
2597 + goto force_promisc;
2599 + if (mc_count + uc_count > max_mac) {
2600 + netdev_info(net_dev,
2601 + "Unicast + Multicast addr count reached %d, max allowed is %d; forcing promisc\n",
2602 + uc_count + mc_count, max_mac);
2603 + goto force_mc_promisc;
2606 + /* Adjust promisc settings due to flag combinations */
2607 + if (net_dev->flags & IFF_PROMISC)
2608 + goto force_promisc;
2609 + if (net_dev->flags & IFF_ALLMULTI) {
2610 + /* First, rebuild unicast filtering table. This should be done
2611 + * in promisc mode, in order to avoid frame loss while we
2612 + * progressively add entries to the table.
2613 + * We don't know whether we had been in promisc already, and
2614 + * making an MC call to find out is expensive; so set uc promisc
2617 + err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
2619 + netdev_warn(net_dev, "Can't set uc promisc\n");
2621 + /* Actual uc table reconstruction. */
2622 + err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 0);
2624 + netdev_warn(net_dev, "Can't clear uc filters\n");
2625 + add_uc_hw_addr(net_dev, priv);
2627 + /* Finally, clear uc promisc and set mc promisc as requested. */
2628 + err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
2630 + netdev_warn(net_dev, "Can't clear uc promisc\n");
2631 + goto force_mc_promisc;
2634 + /* Neither unicast, nor multicast promisc will be on... eventually.
2635 + * For now, rebuild mac filtering tables while forcing both of them on.
2637 + err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
2639 + netdev_warn(net_dev, "Can't set uc promisc (%d)\n", err);
2640 + err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
2642 + netdev_warn(net_dev, "Can't set mc promisc (%d)\n", err);
2644 + /* Actual mac filtering tables reconstruction */
2645 + err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 1);
2647 + netdev_warn(net_dev, "Can't clear mac filters\n");
2648 + add_mc_hw_addr(net_dev, priv);
2649 + add_uc_hw_addr(net_dev, priv);
2651 + /* Now we can clear both ucast and mcast promisc, without risking
2652 + * to drop legitimate frames anymore.
2654 + err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
2656 + netdev_warn(net_dev, "Can't clear ucast promisc\n");
2657 + err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 0);
2659 + netdev_warn(net_dev, "Can't clear mcast promisc\n");
2664 + err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
2666 + netdev_warn(net_dev, "Can't set ucast promisc\n");
2668 + err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
2670 + netdev_warn(net_dev, "Can't set mcast promisc\n");
2673 +static int dpaa2_eth_set_features(struct net_device *net_dev,
2674 + netdev_features_t features)
2676 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2677 + netdev_features_t changed = features ^ net_dev->features;
2681 + if (changed & NETIF_F_RXCSUM) {
2682 + enable = !!(features & NETIF_F_RXCSUM);
2683 + err = set_rx_csum(priv, enable);
2688 + if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
2689 + enable = !!(features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
2690 + err = set_tx_csum(priv, enable);
2698 +static int dpaa2_eth_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2700 + struct dpaa2_eth_priv *priv = netdev_priv(dev);
2701 + struct hwtstamp_config config;
2703 + if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
2706 + switch (config.tx_type) {
2707 + case HWTSTAMP_TX_OFF:
2708 + priv->ts_tx_en = false;
2710 + case HWTSTAMP_TX_ON:
2711 + priv->ts_tx_en = true;
2717 + if (config.rx_filter == HWTSTAMP_FILTER_NONE) {
2718 + priv->ts_rx_en = false;
2720 + priv->ts_rx_en = true;
2721 + /* TS is set for all frame types, not only those requested */
2722 + config.rx_filter = HWTSTAMP_FILTER_ALL;
2725 + return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
2729 +static int dpaa2_eth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2731 + if (cmd == SIOCSHWTSTAMP)
2732 + return dpaa2_eth_ts_ioctl(dev, rq, cmd);
2737 +static const struct net_device_ops dpaa2_eth_ops = {
2738 + .ndo_open = dpaa2_eth_open,
2739 + .ndo_start_xmit = dpaa2_eth_tx,
2740 + .ndo_stop = dpaa2_eth_stop,
2741 + .ndo_init = dpaa2_eth_init,
2742 + .ndo_set_mac_address = dpaa2_eth_set_addr,
2743 + .ndo_get_stats64 = dpaa2_eth_get_stats,
2744 + .ndo_change_mtu = dpaa2_eth_change_mtu,
2745 + .ndo_set_rx_mode = dpaa2_eth_set_rx_mode,
2746 + .ndo_set_features = dpaa2_eth_set_features,
2747 + .ndo_do_ioctl = dpaa2_eth_ioctl,
2750 +static void cdan_cb(struct dpaa2_io_notification_ctx *ctx)
2752 + struct dpaa2_eth_channel *ch;
2754 + ch = container_of(ctx, struct dpaa2_eth_channel, nctx);
2756 + /* Update NAPI statistics */
2759 + napi_schedule_irqoff(&ch->napi);
2762 +/* Allocate and configure a DPCON object */
2763 +static struct fsl_mc_device *setup_dpcon(struct dpaa2_eth_priv *priv)
2765 + struct fsl_mc_device *dpcon;
2766 + struct device *dev = priv->net_dev->dev.parent;
2767 + struct dpcon_attr attrs;
2770 + err = fsl_mc_object_allocate(to_fsl_mc_device(dev),
2771 + FSL_MC_POOL_DPCON, &dpcon);
2773 + dev_info(dev, "Not enough DPCONs, will go on as-is\n");
2777 + err = dpcon_open(priv->mc_io, 0, dpcon->obj_desc.id, &dpcon->mc_handle);
2779 + dev_err(dev, "dpcon_open() failed\n");
2783 + err = dpcon_reset(priv->mc_io, 0, dpcon->mc_handle);
2785 + dev_err(dev, "dpcon_reset() failed\n");
2789 + err = dpcon_get_attributes(priv->mc_io, 0, dpcon->mc_handle, &attrs);
2791 + dev_err(dev, "dpcon_get_attributes() failed\n");
2792 + goto err_get_attr;
2795 + err = dpcon_enable(priv->mc_io, 0, dpcon->mc_handle);
2797 + dev_err(dev, "dpcon_enable() failed\n");
2806 + dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
2808 + fsl_mc_object_free(dpcon);
2813 +static void free_dpcon(struct dpaa2_eth_priv *priv,
2814 + struct fsl_mc_device *dpcon)
2816 + dpcon_disable(priv->mc_io, 0, dpcon->mc_handle);
2817 + dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
2818 + fsl_mc_object_free(dpcon);
2821 +static struct dpaa2_eth_channel *
2822 +alloc_channel(struct dpaa2_eth_priv *priv)
2824 + struct dpaa2_eth_channel *channel;
2825 + struct dpcon_attr attr;
2826 + struct device *dev = priv->net_dev->dev.parent;
2829 + channel = kzalloc(sizeof(*channel), GFP_KERNEL);
2833 + channel->dpcon = setup_dpcon(priv);
2834 + if (!channel->dpcon)
2837 + err = dpcon_get_attributes(priv->mc_io, 0, channel->dpcon->mc_handle,
2840 + dev_err(dev, "dpcon_get_attributes() failed\n");
2841 + goto err_get_attr;
2844 + channel->dpcon_id = attr.id;
2845 + channel->ch_id = attr.qbman_ch_id;
2846 + channel->priv = priv;
2851 + free_dpcon(priv, channel->dpcon);
2857 +static void free_channel(struct dpaa2_eth_priv *priv,
2858 + struct dpaa2_eth_channel *channel)
2860 + free_dpcon(priv, channel->dpcon);
2864 +/* DPIO setup: allocate and configure QBMan channels, setup core affinity
2865 + * and register data availability notifications
2867 +static int setup_dpio(struct dpaa2_eth_priv *priv)
2869 + struct dpaa2_io_notification_ctx *nctx;
2870 + struct dpaa2_eth_channel *channel;
2871 + struct dpcon_notification_cfg dpcon_notif_cfg;
2872 + struct device *dev = priv->net_dev->dev.parent;
2875 + /* We want the ability to spread ingress traffic (RX, TX conf) to as
2876 + * many cores as possible, so we need one channel for each core
2877 + * (unless there's fewer queues than cores, in which case the extra
2878 + * channels would be wasted).
2879 + * Allocate one channel per core and register it to the core's
2880 + * affine DPIO. If not enough channels are available for all cores
2881 + * or if some cores don't have an affine DPIO, there will be no
2882 + * ingress frame processing on those cores.
2884 + cpumask_clear(&priv->dpio_cpumask);
2885 + for_each_online_cpu(i) {
2886 + /* Try to allocate a channel */
2887 + channel = alloc_channel(priv);
2890 + "No affine channel for cpu %d and above\n", i);
2891 + goto err_alloc_ch;
2894 + priv->channel[priv->num_channels] = channel;
2896 + nctx = &channel->nctx;
2897 + nctx->is_cdan = 1;
2898 + nctx->cb = cdan_cb;
2899 + nctx->id = channel->ch_id;
2900 + nctx->desired_cpu = i;
2902 + /* Register the new context */
2903 + err = dpaa2_io_service_register(NULL, nctx);
2905 + dev_dbg(dev, "No affine DPIO for cpu %d\n", i);
2906 + /* If no affine DPIO for this core, there's probably
2907 + * none available for next cores either.
2909 + goto err_service_reg;
2912 + /* Register DPCON notification with MC */
2913 + dpcon_notif_cfg.dpio_id = nctx->dpio_id;
2914 + dpcon_notif_cfg.priority = 0;
2915 + dpcon_notif_cfg.user_ctx = nctx->qman64;
2916 + err = dpcon_set_notification(priv->mc_io, 0,
2917 + channel->dpcon->mc_handle,
2918 + &dpcon_notif_cfg);
2920 + dev_err(dev, "dpcon_set_notification failed()\n");
2921 + goto err_set_cdan;
2924 + /* If we managed to allocate a channel and also found an affine
2925 + * DPIO for this core, add it to the final mask
2927 + cpumask_set_cpu(i, &priv->dpio_cpumask);
2928 + priv->num_channels++;
2930 + /* Stop if we already have enough channels to accommodate all
2931 + * RX and TX conf queues
2933 + if (priv->num_channels == dpaa2_eth_queue_count(priv))
2937 + /* Tx confirmation queues can only be serviced by cpus
2938 + * with an affine DPIO/channel
2940 + cpumask_copy(&priv->txconf_cpumask, &priv->dpio_cpumask);
2945 + dpaa2_io_service_deregister(NULL, nctx);
2947 + free_channel(priv, channel);
2949 + if (cpumask_empty(&priv->dpio_cpumask)) {
2950 + dev_dbg(dev, "No cpu with an affine DPIO/DPCON\n");
2953 + cpumask_copy(&priv->txconf_cpumask, &priv->dpio_cpumask);
2955 + dev_info(dev, "Cores %*pbl available for processing ingress traffic\n",
2956 + cpumask_pr_args(&priv->dpio_cpumask));
2961 +static void free_dpio(struct dpaa2_eth_priv *priv)
2964 + struct dpaa2_eth_channel *ch;
2966 + /* deregister CDAN notifications and free channels */
2967 + for (i = 0; i < priv->num_channels; i++) {
2968 + ch = priv->channel[i];
2969 + dpaa2_io_service_deregister(NULL, &ch->nctx);
2970 + free_channel(priv, ch);
2974 +static struct dpaa2_eth_channel *get_affine_channel(struct dpaa2_eth_priv *priv,
2977 + struct device *dev = priv->net_dev->dev.parent;
2980 + for (i = 0; i < priv->num_channels; i++)
2981 + if (priv->channel[i]->nctx.desired_cpu == cpu)
2982 + return priv->channel[i];
2984 + /* We should never get here. Issue a warning and return
2985 + * the first channel, because it's still better than nothing
2987 + dev_warn(dev, "No affine channel found for cpu %d\n", cpu);
2989 + return priv->channel[0];
2992 +static void set_fq_affinity(struct dpaa2_eth_priv *priv)
2994 + struct device *dev = priv->net_dev->dev.parent;
2995 + struct cpumask xps_mask = CPU_MASK_NONE;
2996 + struct dpaa2_eth_fq *fq;
2997 + int rx_cpu, txc_cpu;
3000 + /* For each FQ, pick one channel/CPU to deliver frames to.
3001 + * This may well change at runtime, either through irqbalance or
3002 + * through direct user intervention.
3004 + rx_cpu = cpumask_first(&priv->dpio_cpumask);
3005 + txc_cpu = cpumask_first(&priv->txconf_cpumask);
3007 + for (i = 0; i < priv->num_fqs; i++) {
3008 + fq = &priv->fq[i];
3009 + switch (fq->type) {
3011 + case DPAA2_RX_ERR_FQ:
3012 + fq->target_cpu = rx_cpu;
3013 + rx_cpu = cpumask_next(rx_cpu, &priv->dpio_cpumask);
3014 + if (rx_cpu >= nr_cpu_ids)
3015 + rx_cpu = cpumask_first(&priv->dpio_cpumask);
3017 + case DPAA2_TX_CONF_FQ:
3018 + fq->target_cpu = txc_cpu;
3020 + /* register txc_cpu to XPS */
3021 + cpumask_set_cpu(txc_cpu, &xps_mask);
3022 + err = netif_set_xps_queue(priv->net_dev, &xps_mask,
3025 + dev_info_once(dev,
3026 + "Tx: error setting XPS queue\n");
3027 + cpumask_clear_cpu(txc_cpu, &xps_mask);
3029 + txc_cpu = cpumask_next(txc_cpu, &priv->txconf_cpumask);
3030 + if (txc_cpu >= nr_cpu_ids)
3031 + txc_cpu = cpumask_first(&priv->txconf_cpumask);
3034 + dev_err(dev, "Unknown FQ type: %d\n", fq->type);
3036 + fq->channel = get_affine_channel(priv, fq->target_cpu);
3040 +static void setup_fqs(struct dpaa2_eth_priv *priv)
3044 + /* We have one TxConf FQ per Tx flow. Tx queues MUST be at the
3045 + * beginning of the queue array.
3046 + * Number of Rx and Tx queues are the same.
3047 + * We only support one traffic class for now.
3049 + for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
3050 + priv->fq[priv->num_fqs].type = DPAA2_TX_CONF_FQ;
3051 + priv->fq[priv->num_fqs].consume = dpaa2_eth_tx_conf;
3052 + priv->fq[priv->num_fqs++].flowid = (u16)i;
3055 + for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
3056 + priv->fq[priv->num_fqs].type = DPAA2_RX_FQ;
3057 + priv->fq[priv->num_fqs].consume = dpaa2_eth_rx;
3058 + priv->fq[priv->num_fqs++].flowid = (u16)i;
3061 +#ifdef CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE
3062 + /* We have exactly one Rx error queue per DPNI */
3063 + priv->fq[priv->num_fqs].type = DPAA2_RX_ERR_FQ;
3064 + priv->fq[priv->num_fqs++].consume = dpaa2_eth_rx_err;
3067 + /* For each FQ, decide on which core to process incoming frames */
3068 + set_fq_affinity(priv);
3071 +/* Allocate and configure one buffer pool for each interface */
3072 +static int setup_dpbp(struct dpaa2_eth_priv *priv)
3075 + struct fsl_mc_device *dpbp_dev;
3076 + struct dpbp_attr dpbp_attrs;
3077 + struct device *dev = priv->net_dev->dev.parent;
3079 + err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP,
3082 + dev_err(dev, "DPBP device allocation failed\n");
3086 + priv->dpbp_dev = dpbp_dev;
3088 + err = dpbp_open(priv->mc_io, 0, priv->dpbp_dev->obj_desc.id,
3089 + &dpbp_dev->mc_handle);
3091 + dev_err(dev, "dpbp_open() failed\n");
3095 + err = dpbp_reset(priv->mc_io, 0, dpbp_dev->mc_handle);
3097 + dev_err(dev, "dpbp_reset() failed\n");
3101 + err = dpbp_enable(priv->mc_io, 0, dpbp_dev->mc_handle);
3103 + dev_err(dev, "dpbp_enable() failed\n");
3107 + err = dpbp_get_attributes(priv->mc_io, 0, dpbp_dev->mc_handle,
3110 + dev_err(dev, "dpbp_get_attributes() failed\n");
3111 + goto err_get_attr;
3114 + priv->bpid = dpbp_attrs.bpid;
3115 + priv->num_bufs = DPAA2_ETH_NUM_BUFS_FC / priv->num_channels;
3120 + dpbp_disable(priv->mc_io, 0, dpbp_dev->mc_handle);
3123 + dpbp_close(priv->mc_io, 0, dpbp_dev->mc_handle);
3125 + fsl_mc_object_free(dpbp_dev);
3130 +static void free_dpbp(struct dpaa2_eth_priv *priv)
3133 + dpbp_disable(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
3134 + dpbp_close(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
3135 + fsl_mc_object_free(priv->dpbp_dev);
3138 +static int setup_tx_congestion(struct dpaa2_eth_priv *priv)
3140 + struct dpni_congestion_notification_cfg cong_notif_cfg = { 0 };
3141 + struct device *dev = priv->net_dev->dev.parent;
3144 + priv->cscn_unaligned = kzalloc(DPAA2_CSCN_SIZE + DPAA2_CSCN_ALIGN,
3146 + if (!priv->cscn_unaligned)
3149 + priv->cscn_mem = PTR_ALIGN(priv->cscn_unaligned, DPAA2_CSCN_ALIGN);
3150 + priv->cscn_dma = dma_map_single(dev, priv->cscn_mem, DPAA2_CSCN_SIZE,
3152 + if (dma_mapping_error(dev, priv->cscn_dma)) {
3153 + dev_err(dev, "Error mapping CSCN memory area\n");
3158 + cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
3159 + cong_notif_cfg.threshold_entry = DPAA2_ETH_TX_CONG_ENTRY_THRESH;
3160 + cong_notif_cfg.threshold_exit = DPAA2_ETH_TX_CONG_EXIT_THRESH;
3161 + cong_notif_cfg.message_ctx = (u64)priv;
3162 + cong_notif_cfg.message_iova = priv->cscn_dma;
3163 + cong_notif_cfg.notification_mode = DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
3164 + DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
3165 + DPNI_CONG_OPT_COHERENT_WRITE;
3166 + err = dpni_set_congestion_notification(priv->mc_io, 0, priv->mc_token,
3170 + dev_err(dev, "dpni_set_congestion_notification failed\n");
3171 + goto err_set_cong;
3177 + dma_unmap_single(dev, priv->cscn_dma, DPAA2_CSCN_SIZE, DMA_FROM_DEVICE);
3179 + kfree(priv->cscn_unaligned);
3184 +/* Configure the DPNI object this interface is associated with */
3185 +static int setup_dpni(struct fsl_mc_device *ls_dev)
3187 + struct device *dev = &ls_dev->dev;
3188 + struct dpaa2_eth_priv *priv;
3189 + struct net_device *net_dev;
3190 + struct dpni_buffer_layout buf_layout;
3191 + struct dpni_link_cfg cfg = {0};
3194 + net_dev = dev_get_drvdata(dev);
3195 + priv = netdev_priv(net_dev);
3197 + priv->dpni_id = ls_dev->obj_desc.id;
3199 + /* get a handle for the DPNI object */
3200 + err = dpni_open(priv->mc_io, 0, priv->dpni_id, &priv->mc_token);
3202 + dev_err(dev, "dpni_open() failed\n");
3206 + ls_dev->mc_io = priv->mc_io;
3207 + ls_dev->mc_handle = priv->mc_token;
3209 + err = dpni_reset(priv->mc_io, 0, priv->mc_token);
3211 + dev_err(dev, "dpni_reset() failed\n");
3215 + err = dpni_get_attributes(priv->mc_io, 0, priv->mc_token,
3216 + &priv->dpni_attrs);
3219 + dev_err(dev, "dpni_get_attributes() failed (err=%d)\n", err);
3220 + goto err_get_attr;
3223 + /* due to a limitation in WRIOP 1.0.0 (ERR009354), the Rx buf
3224 + * align value must be a multiple of 256.
3226 + priv->rx_buf_align =
3227 + priv->dpni_attrs.wriop_version & 0x3ff ?
3228 + DPAA2_ETH_RX_BUF_ALIGN : DPAA2_ETH_RX_BUF_ALIGN_V1;
3230 + /* Update number of logical FQs in netdev */
3231 + err = netif_set_real_num_tx_queues(net_dev,
3232 + dpaa2_eth_queue_count(priv));
3234 + dev_err(dev, "netif_set_real_num_tx_queues failed (%d)\n", err);
3235 + goto err_set_tx_queues;
3238 + err = netif_set_real_num_rx_queues(net_dev,
3239 + dpaa2_eth_queue_count(priv));
3241 + dev_err(dev, "netif_set_real_num_rx_queues failed (%d)\n", err);
3242 + goto err_set_rx_queues;
3245 + /* Configure buffer layouts */
3247 + buf_layout.pass_parser_result = true;
3248 + buf_layout.pass_frame_status = true;
3249 + buf_layout.private_data_size = DPAA2_ETH_SWA_SIZE;
3250 + buf_layout.data_align = priv->rx_buf_align;
3251 + buf_layout.data_head_room = DPAA2_ETH_RX_HEAD_ROOM;
3252 + buf_layout.options = DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
3253 + DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
3254 + DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE |
3255 + DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
3256 + DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
3257 + err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
3258 + DPNI_QUEUE_RX, &buf_layout);
3261 + "dpni_set_buffer_layout(RX) failed\n");
3262 + goto err_buf_layout;
3266 + buf_layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
3267 + DPNI_BUF_LAYOUT_OPT_TIMESTAMP |
3268 + DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
3269 + buf_layout.pass_timestamp = true;
3270 + err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
3271 + DPNI_QUEUE_TX, &buf_layout);
3274 + "dpni_set_buffer_layout(TX) failed\n");
3275 + goto err_buf_layout;
3278 + /* tx-confirm buffer */
3279 + buf_layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
3280 + DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
3281 + err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
3282 + DPNI_QUEUE_TX_CONFIRM, &buf_layout);
3284 + dev_err(dev, "dpni_set_buffer_layout(TX_CONF) failed\n");
3285 + goto err_buf_layout;
3288 + /* Now that we've set our tx buffer layout, retrieve the minimum
3289 + * required tx data offset.
3291 + err = dpni_get_tx_data_offset(priv->mc_io, 0, priv->mc_token,
3292 + &priv->tx_data_offset);
3294 + dev_err(dev, "dpni_get_tx_data_offset() failed (%d)\n", err);
3295 + goto err_data_offset;
3298 + if ((priv->tx_data_offset % 64) != 0)
3299 + dev_warn(dev, "Tx data offset (%d) not a multiple of 64B",
3300 + priv->tx_data_offset);
3302 + /* Accommodate software annotation space (SWA) */
3303 + priv->tx_data_offset += DPAA2_ETH_SWA_SIZE;
3305 + /* Enable congestion notifications for Tx queues */
3306 + err = setup_tx_congestion(priv);
3310 + /* allocate classification rule space */
3311 + priv->cls_rule = kzalloc(sizeof(*priv->cls_rule) *
3312 + dpaa2_eth_fs_count(priv), GFP_KERNEL);
3313 + if (!priv->cls_rule)
3314 + goto err_cls_rule;
3316 + /* Enable flow control */
3317 + cfg.options = DPNI_LINK_OPT_AUTONEG | DPNI_LINK_OPT_PAUSE;
3318 + priv->tx_pause_frames = 1;
3320 + err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &cfg);
3322 + netdev_err(net_dev, "ERROR %d setting link cfg", err);
3323 + goto err_set_link_cfg;
3337 + dpni_close(priv->mc_io, 0, priv->mc_token);
3342 +static void free_dpni(struct dpaa2_eth_priv *priv)
3344 + struct device *dev = priv->net_dev->dev.parent;
3347 + err = dpni_reset(priv->mc_io, 0, priv->mc_token);
3349 + netdev_warn(priv->net_dev, "dpni_reset() failed (err %d)\n",
3352 + dpni_close(priv->mc_io, 0, priv->mc_token);
3354 + kfree(priv->cls_rule);
3356 + dma_unmap_single(dev, priv->cscn_dma, DPAA2_CSCN_SIZE, DMA_FROM_DEVICE);
3357 + kfree(priv->cscn_unaligned);
3360 +int setup_fqs_taildrop(struct dpaa2_eth_priv *priv,
3363 + struct device *dev = priv->net_dev->dev.parent;
3364 + struct dpni_taildrop td;
3367 + td.enable = enable;
3368 + td.threshold = DPAA2_ETH_TAILDROP_THRESH;
3371 + priv->num_bufs = DPAA2_ETH_NUM_BUFS_TD;
3372 + priv->refill_thresh = DPAA2_ETH_REFILL_THRESH_TD;
3374 + priv->num_bufs = DPAA2_ETH_NUM_BUFS_FC /
3375 + priv->num_channels;
3376 + priv->refill_thresh = priv->num_bufs - DPAA2_ETH_BUFS_PER_CMD;
3379 + for (i = 0; i < priv->num_fqs; i++) {
3380 + if (priv->fq[i].type != DPAA2_RX_FQ)
3383 + err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token,
3384 + DPNI_CP_QUEUE, DPNI_QUEUE_RX, 0,
3385 + priv->fq[i].flowid, &td);
3387 + dev_err(dev, "dpni_set_taildrop() failed (%d)\n", err);
3395 +static int setup_rx_flow(struct dpaa2_eth_priv *priv,
3396 + struct dpaa2_eth_fq *fq)
3398 + struct device *dev = priv->net_dev->dev.parent;
3399 + struct dpni_queue q = { { 0 } };
3400 + struct dpni_queue_id qid;
3401 + u8 q_opt = DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST;
3404 + err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
3405 + DPNI_QUEUE_RX, 0, fq->flowid, &q, &qid);
3407 + dev_err(dev, "dpni_get_queue() failed (%d)\n", err);
3411 + fq->fqid = qid.fqid;
3413 + q.destination.id = fq->channel->dpcon_id;
3414 + q.destination.type = DPNI_DEST_DPCON;
3415 + q.destination.priority = 1;
3416 + q.user_context = (u64)fq;
3417 + err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
3418 + DPNI_QUEUE_RX, 0, fq->flowid, q_opt, &q);
3420 + dev_err(dev, "dpni_set_queue() failed (%d)\n", err);
3427 +static int setup_tx_flow(struct dpaa2_eth_priv *priv,
3428 + struct dpaa2_eth_fq *fq)
3430 + struct device *dev = priv->net_dev->dev.parent;
3431 + struct dpni_queue q = { { 0 } };
3432 + struct dpni_queue_id qid;
3433 + u8 q_opt = DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST;
3436 + err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
3437 + DPNI_QUEUE_TX, 0, fq->flowid, &q, &qid);
3439 + dev_err(dev, "dpni_get_queue() failed (%d)\n", err);
3443 + fq->tx_qdbin = qid.qdbin;
3445 + err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
3446 + DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid, &q, &qid);
3448 + dev_err(dev, "dpni_get_queue() failed (%d)\n", err);
3452 + fq->fqid = qid.fqid;
3454 + q.destination.id = fq->channel->dpcon_id;
3455 + q.destination.type = DPNI_DEST_DPCON;
3456 + q.destination.priority = 0;
3457 + q.user_context = (u64)fq;
3458 + err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
3459 + DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid, q_opt, &q);
3461 + dev_err(dev, "dpni_get_queue() failed (%d)\n", err);
3468 +#ifdef CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE
3469 +static int setup_rx_err_flow(struct dpaa2_eth_priv *priv,
3470 + struct dpaa2_eth_fq *fq)
3472 + struct device *dev = priv->net_dev->dev.parent;
3473 + struct dpni_queue q = { { 0 } };
3474 + struct dpni_queue_id qid;
3475 + u8 q_opt = DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST;
3478 + err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
3479 + DPNI_QUEUE_RX_ERR, 0, 0, &q, &qid);
3481 + dev_err(dev, "dpni_get_queue() failed (%d)\n", err);
3485 + fq->fqid = qid.fqid;
3487 + q.destination.id = fq->channel->dpcon_id;
3488 + q.destination.type = DPNI_DEST_DPCON;
3489 + q.destination.priority = 1;
3490 + q.user_context = (u64)fq;
3491 + err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
3492 + DPNI_QUEUE_RX_ERR, 0, 0, q_opt, &q);
3494 + dev_err(dev, "dpni_set_queue() failed (%d)\n", err);
3502 +/* default hash key fields */
3503 +static struct dpaa2_eth_hash_fields default_hash_fields[] = {
3506 + .rxnfc_field = RXH_L2DA,
3507 + .cls_prot = NET_PROT_ETH,
3508 + .cls_field = NH_FLD_ETH_DA,
3511 + .cls_prot = NET_PROT_ETH,
3512 + .cls_field = NH_FLD_ETH_SA,
3515 + /* This is the last ethertype field parsed:
3516 + * depending on frame format, it can be the MAC ethertype
3517 + * or the VLAN etype.
3519 + .cls_prot = NET_PROT_ETH,
3520 + .cls_field = NH_FLD_ETH_TYPE,
3524 + .rxnfc_field = RXH_VLAN,
3525 + .cls_prot = NET_PROT_VLAN,
3526 + .cls_field = NH_FLD_VLAN_TCI,
3530 + .rxnfc_field = RXH_IP_SRC,
3531 + .cls_prot = NET_PROT_IP,
3532 + .cls_field = NH_FLD_IP_SRC,
3535 + .rxnfc_field = RXH_IP_DST,
3536 + .cls_prot = NET_PROT_IP,
3537 + .cls_field = NH_FLD_IP_DST,
3540 + .rxnfc_field = RXH_L3_PROTO,
3541 + .cls_prot = NET_PROT_IP,
3542 + .cls_field = NH_FLD_IP_PROTO,
3545 + /* Using UDP ports, this is functionally equivalent to raw
3546 + * byte pairs from L4 header.
3548 + .rxnfc_field = RXH_L4_B_0_1,
3549 + .cls_prot = NET_PROT_UDP,
3550 + .cls_field = NH_FLD_UDP_PORT_SRC,
3553 + .rxnfc_field = RXH_L4_B_2_3,
3554 + .cls_prot = NET_PROT_UDP,
3555 + .cls_field = NH_FLD_UDP_PORT_DST,
3560 +/* Set RX hash options */
3561 +static int set_hash(struct dpaa2_eth_priv *priv)
3563 + struct device *dev = priv->net_dev->dev.parent;
3564 + struct dpkg_profile_cfg cls_cfg;
3565 + struct dpni_rx_tc_dist_cfg dist_cfg;
3570 + memset(&cls_cfg, 0, sizeof(cls_cfg));
3572 + for (i = 0; i < priv->num_hash_fields; i++) {
3573 + struct dpkg_extract *key =
3574 + &cls_cfg.extracts[cls_cfg.num_extracts];
3576 + key->type = DPKG_EXTRACT_FROM_HDR;
3577 + key->extract.from_hdr.prot = priv->hash_fields[i].cls_prot;
3578 + key->extract.from_hdr.type = DPKG_FULL_FIELD;
3579 + key->extract.from_hdr.field = priv->hash_fields[i].cls_field;
3580 + cls_cfg.num_extracts++;
3582 + priv->rx_flow_hash |= priv->hash_fields[i].rxnfc_field;
3585 + dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_DMA | GFP_KERNEL);
3589 + err = dpni_prepare_key_cfg(&cls_cfg, dma_mem);
3591 + dev_err(dev, "dpni_prepare_key_cfg() failed (%d)", err);
3592 + goto err_prep_key;
3595 + memset(&dist_cfg, 0, sizeof(dist_cfg));
3597 + /* Prepare for setting the rx dist */
3598 + dist_cfg.key_cfg_iova = dma_map_single(dev, dma_mem,
3599 + DPAA2_CLASSIFIER_DMA_SIZE,
3601 + if (dma_mapping_error(dev, dist_cfg.key_cfg_iova)) {
3602 + dev_err(dev, "DMA mapping failed\n");
3607 + dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3608 + if (dpaa2_eth_fs_enabled(priv)) {
3609 + dist_cfg.dist_mode = DPNI_DIST_MODE_FS;
3610 + dist_cfg.fs_cfg.miss_action = DPNI_FS_MISS_HASH;
3612 + dist_cfg.dist_mode = DPNI_DIST_MODE_HASH;
3615 + err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token, 0, &dist_cfg);
3616 + dma_unmap_single(dev, dist_cfg.key_cfg_iova,
3617 + DPAA2_CLASSIFIER_DMA_SIZE, DMA_TO_DEVICE);
3619 + dev_err(dev, "dpni_set_rx_tc_dist() failed (%d)\n", err);
3627 +/* Bind the DPNI to its needed objects and resources: buffer pool, DPIOs,
3628 + * frame queues and channels
3630 +static int bind_dpni(struct dpaa2_eth_priv *priv)
3632 + struct net_device *net_dev = priv->net_dev;
3633 + struct device *dev = net_dev->dev.parent;
3634 + struct dpni_pools_cfg pools_params;
3635 + struct dpni_error_cfg err_cfg;
3639 + pools_params.num_dpbp = 1;
3640 + pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id;
3641 + pools_params.pools[0].backup_pool = 0;
3642 + pools_params.pools[0].buffer_size = DPAA2_ETH_RX_BUF_SIZE;
3643 + err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params);
3645 + dev_err(dev, "dpni_set_pools() failed\n");
3649 + /* Verify classification options and disable hashing and/or
3650 + * flow steering support in case of invalid configuration values
3652 + priv->hash_fields = default_hash_fields;
3653 + priv->num_hash_fields = ARRAY_SIZE(default_hash_fields);
3654 + check_cls_support(priv);
3656 + /* have the interface implicitly distribute traffic based on
3657 + * a static hash key
3659 + if (dpaa2_eth_hash_enabled(priv)) {
3660 + err = set_hash(priv);
3662 + dev_err(dev, "Hashing configuration failed\n");
3667 + /* Configure handling of error frames */
3668 + err_cfg.errors = DPAA2_FAS_RX_ERR_MASK;
3669 + err_cfg.set_frame_annotation = 1;
3670 +#ifdef CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE
3671 + err_cfg.error_action = DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE;
3673 + err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
3675 + err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
3678 + dev_err(dev, "dpni_set_errors_behavior() failed (%d)\n", err);
3682 + /* Configure Rx and Tx conf queues to generate CDANs */
3683 + for (i = 0; i < priv->num_fqs; i++) {
3684 + switch (priv->fq[i].type) {
3686 + err = setup_rx_flow(priv, &priv->fq[i]);
3688 + case DPAA2_TX_CONF_FQ:
3689 + err = setup_tx_flow(priv, &priv->fq[i]);
3691 +#ifdef CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE
3692 + case DPAA2_RX_ERR_FQ:
3693 + err = setup_rx_err_flow(priv, &priv->fq[i]);
3697 + dev_err(dev, "Invalid FQ type %d\n", priv->fq[i].type);
3704 + err = dpni_get_qdid(priv->mc_io, 0, priv->mc_token, DPNI_QUEUE_TX,
3707 + dev_err(dev, "dpni_get_qdid() failed\n");
3714 +/* Allocate rings for storing incoming frame descriptors */
3715 +static int alloc_rings(struct dpaa2_eth_priv *priv)
3717 + struct net_device *net_dev = priv->net_dev;
3718 + struct device *dev = net_dev->dev.parent;
3721 + for (i = 0; i < priv->num_channels; i++) {
3722 + priv->channel[i]->store =
3723 + dpaa2_io_store_create(DPAA2_ETH_STORE_SIZE, dev);
3724 + if (!priv->channel[i]->store) {
3725 + netdev_err(net_dev, "dpaa2_io_store_create() failed\n");
3733 + for (i = 0; i < priv->num_channels; i++) {
3734 + if (!priv->channel[i]->store)
3736 + dpaa2_io_store_destroy(priv->channel[i]->store);
3742 +static void free_rings(struct dpaa2_eth_priv *priv)
3746 + for (i = 0; i < priv->num_channels; i++)
3747 + dpaa2_io_store_destroy(priv->channel[i]->store);
3750 +static int netdev_init(struct net_device *net_dev)
3753 + struct device *dev = net_dev->dev.parent;
3754 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
3755 + u8 mac_addr[ETH_ALEN], dpni_mac_addr[ETH_ALEN];
3756 + u8 bcast_addr[ETH_ALEN];
3757 + u16 rx_headroom, rx_req_headroom;
3759 + net_dev->netdev_ops = &dpaa2_eth_ops;
3761 + /* Get firmware address, if any */
3762 + err = dpni_get_port_mac_addr(priv->mc_io, 0, priv->mc_token, mac_addr);
3764 + dev_err(dev, "dpni_get_port_mac_addr() failed (%d)\n", err);
3768 + /* Get DPNI atttributes address, if any */
3769 + err = dpni_get_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
3772 + dev_err(dev, "dpni_get_primary_mac_addr() failed (%d)\n", err);
3776 + /* First check if firmware has any address configured by bootloader */
3777 + if (!is_zero_ether_addr(mac_addr)) {
3778 + /* If the DPMAC addr != the DPNI addr, update it */
3779 + if (!ether_addr_equal(mac_addr, dpni_mac_addr)) {
3780 + err = dpni_set_primary_mac_addr(priv->mc_io, 0,
3785 + "dpni_set_primary_mac_addr() failed (%d)\n",
3790 + memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
3791 + } else if (is_zero_ether_addr(dpni_mac_addr)) {
3792 + /* Fills in net_dev->dev_addr, as required by
3793 + * register_netdevice()
3795 + eth_hw_addr_random(net_dev);
3796 + /* Make the user aware, without cluttering the boot log */
3797 + dev_dbg_once(dev, " device(s) have all-zero hwaddr, replaced with random\n");
3798 + err = dpni_set_primary_mac_addr(priv->mc_io, 0,
3799 + priv->mc_token, net_dev->dev_addr);
3802 + "dpni_set_primary_mac_addr() failed (%d)\n", err);
3805 + /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all
3806 + * practical purposes, this will be our "permanent" mac address,
3807 + * at least until the next reboot. This move will also permit
3808 + * register_netdevice() to properly fill up net_dev->perm_addr.
3810 + net_dev->addr_assign_type = NET_ADDR_PERM;
3811 + /* If DPMAC address is non-zero, use that one */
3813 + /* NET_ADDR_PERM is default, all we have to do is
3814 + * fill in the device addr.
3816 + memcpy(net_dev->dev_addr, dpni_mac_addr, net_dev->addr_len);
3819 + /* Explicitly add the broadcast address to the MAC filtering table;
3820 + * the MC won't do that for us.
3822 + eth_broadcast_addr(bcast_addr);
3823 + err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token, bcast_addr);
3825 + dev_warn(dev, "dpni_add_mac_addr() failed (%d)\n", err);
3826 + /* Won't return an error; at least, we'd have egress traffic */
3829 + /* Reserve enough space to align buffer as per hardware requirement;
3830 + * NOTE: priv->tx_data_offset MUST be initialized at this point.
3832 + net_dev->needed_headroom = DPAA2_ETH_NEEDED_HEADROOM(priv);
3834 + /* Set MTU limits */
3835 + net_dev->min_mtu = 68;
3836 + net_dev->max_mtu = DPAA2_ETH_MAX_MTU;
3838 + /* Required headroom for Rx skbs, to avoid reallocation on
3839 + * forwarding path.
3841 + rx_req_headroom = LL_RESERVED_SPACE(net_dev) - ETH_HLEN;
3842 + rx_headroom = ALIGN(DPAA2_ETH_RX_HWA_SIZE + DPAA2_ETH_SWA_SIZE +
3843 + DPAA2_ETH_RX_HEAD_ROOM, priv->rx_buf_align);
3844 + if (rx_req_headroom > rx_headroom)
3845 + dev_info_once(dev,
3846 + "Required headroom (%d) greater than available (%d).\n"
3847 + "This will impact performance due to reallocations.\n",
3848 + rx_req_headroom, rx_headroom);
3850 + /* Our .ndo_init will be called herein */
3851 + err = register_netdev(net_dev);
3853 + dev_err(dev, "register_netdev() failed (%d)\n", err);
3860 +static int poll_link_state(void *arg)
3862 + struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)arg;
3865 + while (!kthread_should_stop()) {
3866 + err = link_state_update(priv);
3867 + if (unlikely(err))
3870 + msleep(DPAA2_ETH_LINK_STATE_REFRESH);
3876 +static irqreturn_t dpni_irq0_handler(int irq_num, void *arg)
3878 + return IRQ_WAKE_THREAD;
3881 +static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg)
3883 + u32 status = 0, clear = 0;
3884 + struct device *dev = (struct device *)arg;
3885 + struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
3886 + struct net_device *net_dev = dev_get_drvdata(dev);
3889 + err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
3890 + DPNI_IRQ_INDEX, &status);
3891 + if (unlikely(err)) {
3892 + netdev_err(net_dev, "Can't get irq status (err %d)", err);
3893 + clear = 0xffffffff;
3897 + if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
3898 + clear |= DPNI_IRQ_EVENT_LINK_CHANGED;
3899 + link_state_update(netdev_priv(net_dev));
3903 + dpni_clear_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
3904 + DPNI_IRQ_INDEX, clear);
3905 + return IRQ_HANDLED;
3908 +static int setup_irqs(struct fsl_mc_device *ls_dev)
3911 + struct fsl_mc_device_irq *irq;
3913 + err = fsl_mc_allocate_irqs(ls_dev);
3915 + dev_err(&ls_dev->dev, "MC irqs allocation failed\n");
3919 + irq = ls_dev->irqs[0];
3920 + err = devm_request_threaded_irq(&ls_dev->dev, irq->msi_desc->irq,
3921 + dpni_irq0_handler,
3922 + dpni_irq0_handler_thread,
3923 + IRQF_NO_SUSPEND | IRQF_ONESHOT,
3924 + dev_name(&ls_dev->dev), &ls_dev->dev);
3926 + dev_err(&ls_dev->dev, "devm_request_threaded_irq(): %d", err);
3930 + err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
3931 + DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED);
3933 + dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d", err);
3937 + err = dpni_set_irq_enable(ls_dev->mc_io, 0, ls_dev->mc_handle,
3938 + DPNI_IRQ_INDEX, 1);
3940 + dev_err(&ls_dev->dev, "dpni_set_irq_enable(): %d", err);
3947 + devm_free_irq(&ls_dev->dev, irq->msi_desc->irq, &ls_dev->dev);
3949 + fsl_mc_free_irqs(ls_dev);
3954 +static void add_ch_napi(struct dpaa2_eth_priv *priv)
3957 + struct dpaa2_eth_channel *ch;
3959 + for (i = 0; i < priv->num_channels; i++) {
3960 + ch = priv->channel[i];
3961 + /* NAPI weight *MUST* be a multiple of DPAA2_ETH_STORE_SIZE */
3962 + netif_napi_add(priv->net_dev, &ch->napi, dpaa2_eth_poll,
3963 + NAPI_POLL_WEIGHT);
3967 +static void del_ch_napi(struct dpaa2_eth_priv *priv)
3970 + struct dpaa2_eth_channel *ch;
3972 + for (i = 0; i < priv->num_channels; i++) {
3973 + ch = priv->channel[i];
3974 + netif_napi_del(&ch->napi);
3978 +/* SysFS support */
3979 +static ssize_t dpaa2_eth_show_tx_shaping(struct device *dev,
3980 + struct device_attribute *attr,
3983 + struct dpaa2_eth_priv *priv = netdev_priv(to_net_dev(dev));
3984 + /* No MC API for getting the shaping config. We're stateful. */
3985 + struct dpni_tx_shaping_cfg *scfg = &priv->shaping_cfg;
3987 + return sprintf(buf, "%u %hu\n", scfg->rate_limit, scfg->max_burst_size);
3990 +static ssize_t dpaa2_eth_write_tx_shaping(struct device *dev,
3991 + struct device_attribute *attr,
3996 + struct dpaa2_eth_priv *priv = netdev_priv(to_net_dev(dev));
3997 + struct dpni_tx_shaping_cfg scfg;
3999 + items = sscanf(buf, "%u %hu", &scfg.rate_limit, &scfg.max_burst_size);
4001 + pr_err("Expected format: \"rate_limit(Mbps) max_burst_size(bytes)\"\n");
4004 + /* Size restriction as per MC API documentation */
4005 + if (scfg.max_burst_size > DPAA2_ETH_MAX_BURST_SIZE) {
4006 + pr_err("max_burst_size must be <= %d\n",
4007 + DPAA2_ETH_MAX_BURST_SIZE);
4011 + err = dpni_set_tx_shaping(priv->mc_io, 0, priv->mc_token, &scfg);
4013 + dev_err(dev, "dpni_set_tx_shaping() failed\n");
4016 + /* If successful, save the current configuration for future inquiries */
4017 + priv->shaping_cfg = scfg;
4022 +static ssize_t dpaa2_eth_show_txconf_cpumask(struct device *dev,
4023 + struct device_attribute *attr,
4026 + struct dpaa2_eth_priv *priv = netdev_priv(to_net_dev(dev));
4028 + return cpumap_print_to_pagebuf(1, buf, &priv->txconf_cpumask);
4031 +static ssize_t dpaa2_eth_write_txconf_cpumask(struct device *dev,
4032 + struct device_attribute *attr,
4036 + struct dpaa2_eth_priv *priv = netdev_priv(to_net_dev(dev));
4037 + struct dpaa2_eth_fq *fq;
4038 + bool running = netif_running(priv->net_dev);
4041 + err = cpulist_parse(buf, &priv->txconf_cpumask);
4045 + /* Only accept CPUs that have an affine DPIO */
4046 + if (!cpumask_subset(&priv->txconf_cpumask, &priv->dpio_cpumask)) {
4047 + netdev_info(priv->net_dev,
4048 + "cpumask must be a subset of 0x%lx\n",
4049 + *cpumask_bits(&priv->dpio_cpumask));
4050 + cpumask_and(&priv->txconf_cpumask, &priv->dpio_cpumask,
4051 + &priv->txconf_cpumask);
4054 + /* Rewiring the TxConf FQs requires interface shutdown.
4057 + err = dpaa2_eth_stop(priv->net_dev);
4062 + /* Set the new TxConf FQ affinities */
4063 + set_fq_affinity(priv);
4065 + /* dpaa2_eth_open() below will *stop* the Tx queues until an explicit
4066 + * link up notification is received. Give the polling thread enough time
4067 + * to detect the link state change, or else we'll end up with the
4068 + * transmission side forever shut down.
4070 + if (priv->do_link_poll)
4071 + msleep(2 * DPAA2_ETH_LINK_STATE_REFRESH);
4073 + for (i = 0; i < priv->num_fqs; i++) {
4074 + fq = &priv->fq[i];
4075 + if (fq->type != DPAA2_TX_CONF_FQ)
4077 + setup_tx_flow(priv, fq);
4081 + err = dpaa2_eth_open(priv->net_dev);
4089 +static struct device_attribute dpaa2_eth_attrs[] = {
4090 + __ATTR(txconf_cpumask,
4092 + dpaa2_eth_show_txconf_cpumask,
4093 + dpaa2_eth_write_txconf_cpumask),
4095 + __ATTR(tx_shaping,
4097 + dpaa2_eth_show_tx_shaping,
4098 + dpaa2_eth_write_tx_shaping),
4101 +static void dpaa2_eth_sysfs_init(struct device *dev)
4105 + for (i = 0; i < ARRAY_SIZE(dpaa2_eth_attrs); i++) {
4106 + err = device_create_file(dev, &dpaa2_eth_attrs[i]);
4108 + dev_err(dev, "ERROR creating sysfs file\n");
4116 + device_remove_file(dev, &dpaa2_eth_attrs[--i]);
4119 +static void dpaa2_eth_sysfs_remove(struct device *dev)
4123 + for (i = 0; i < ARRAY_SIZE(dpaa2_eth_attrs); i++)
4124 + device_remove_file(dev, &dpaa2_eth_attrs[i]);
4127 +static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
4129 + struct device *dev;
4130 + struct net_device *net_dev = NULL;
4131 + struct dpaa2_eth_priv *priv = NULL;
4134 + dev = &dpni_dev->dev;
4137 + net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA2_ETH_MAX_TX_QUEUES);
4139 + dev_err(dev, "alloc_etherdev_mq() failed\n");
4143 + SET_NETDEV_DEV(net_dev, dev);
4144 + dev_set_drvdata(dev, net_dev);
4146 + priv = netdev_priv(net_dev);
4147 + priv->net_dev = net_dev;
4149 + priv->iommu_domain = iommu_get_domain_for_dev(dev);
4151 + /* Obtain a MC portal */
4152 + err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
4155 + dev_err(dev, "MC portal allocation failed\n");
4156 + goto err_portal_alloc;
4159 + /* MC objects initialization and configuration */
4160 + err = setup_dpni(dpni_dev);
4162 + goto err_dpni_setup;
4164 + err = setup_dpio(priv);
4166 + dev_info(dev, "Defer probing as no DPIO available\n");
4167 + err = -EPROBE_DEFER;
4168 + goto err_dpio_setup;
4173 + err = setup_dpbp(priv);
4175 + goto err_dpbp_setup;
4177 + err = bind_dpni(priv);
4181 + /* Add a NAPI context for each channel */
4182 + add_ch_napi(priv);
4183 + enable_ch_napi(priv);
4185 + /* Percpu statistics */
4186 + priv->percpu_stats = alloc_percpu(*priv->percpu_stats);
4187 + if (!priv->percpu_stats) {
4188 + dev_err(dev, "alloc_percpu(percpu_stats) failed\n");
4190 + goto err_alloc_percpu_stats;
4192 + priv->percpu_extras = alloc_percpu(*priv->percpu_extras);
4193 + if (!priv->percpu_extras) {
4194 + dev_err(dev, "alloc_percpu(percpu_extras) failed\n");
4196 + goto err_alloc_percpu_extras;
4199 + snprintf(net_dev->name, IFNAMSIZ, "ni%d", dpni_dev->obj_desc.id);
4200 + if (!dev_valid_name(net_dev->name)) {
4201 + dev_warn(&net_dev->dev,
4202 + "netdevice name \"%s\" cannot be used, reverting to default..\n",
4204 + dev_alloc_name(net_dev, "eth%d");
4205 + dev_warn(&net_dev->dev, "using name \"%s\"\n", net_dev->name);
4208 + err = netdev_init(net_dev);
4210 + goto err_netdev_init;
4212 + /* Configure checksum offload based on current interface flags */
4213 + err = set_rx_csum(priv, !!(net_dev->features & NETIF_F_RXCSUM));
4217 + err = set_tx_csum(priv, !!(net_dev->features &
4218 + (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)));
4222 + err = alloc_rings(priv);
4224 + goto err_alloc_rings;
4226 + net_dev->ethtool_ops = &dpaa2_ethtool_ops;
4228 + err = setup_irqs(dpni_dev);
4230 + netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
4231 + priv->poll_thread = kthread_run(poll_link_state, priv,
4232 + "%s_poll_link", net_dev->name);
4233 + if (IS_ERR(priv->poll_thread)) {
4234 + netdev_err(net_dev, "Error starting polling thread\n");
4235 + goto err_poll_thread;
4237 + priv->do_link_poll = true;
4240 + dpaa2_eth_sysfs_init(&net_dev->dev);
4241 +#ifdef CONFIG_FSL_DPAA2_ETH_DEBUGFS
4242 + dpaa2_dbg_add(priv);
4245 + dev_info(dev, "Probed interface %s\n", net_dev->name);
4252 + unregister_netdev(net_dev);
4254 + free_percpu(priv->percpu_extras);
4255 +err_alloc_percpu_extras:
4256 + free_percpu(priv->percpu_stats);
4257 +err_alloc_percpu_stats:
4258 + disable_ch_napi(priv);
4259 + del_ch_napi(priv);
4267 + fsl_mc_portal_free(priv->mc_io);
4269 + dev_set_drvdata(dev, NULL);
4270 + free_netdev(net_dev);
4275 +static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
4277 + struct device *dev;
4278 + struct net_device *net_dev;
4279 + struct dpaa2_eth_priv *priv;
4281 + dev = &ls_dev->dev;
4282 + net_dev = dev_get_drvdata(dev);
4283 + priv = netdev_priv(net_dev);
4285 +#ifdef CONFIG_FSL_DPAA2_ETH_DEBUGFS
4286 + dpaa2_dbg_remove(priv);
4288 + dpaa2_eth_sysfs_remove(&net_dev->dev);
4290 + unregister_netdev(net_dev);
4291 + dev_info(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
4293 + if (priv->do_link_poll)
4294 + kthread_stop(priv->poll_thread);
4296 + fsl_mc_free_irqs(ls_dev);
4299 + free_percpu(priv->percpu_stats);
4300 + free_percpu(priv->percpu_extras);
4302 + disable_ch_napi(priv);
4303 + del_ch_napi(priv);
4308 + fsl_mc_portal_free(priv->mc_io);
4310 + dev_set_drvdata(dev, NULL);
4311 + free_netdev(net_dev);
4316 +static const struct fsl_mc_device_id dpaa2_eth_match_id_table[] = {
4318 + .vendor = FSL_MC_VENDOR_FREESCALE,
4319 + .obj_type = "dpni",
4323 +MODULE_DEVICE_TABLE(fslmc, dpaa2_eth_match_id_table);
4325 +static struct fsl_mc_driver dpaa2_eth_driver = {
4327 + .name = KBUILD_MODNAME,
4328 + .owner = THIS_MODULE,
4330 + .probe = dpaa2_eth_probe,
4331 + .remove = dpaa2_eth_remove,
4332 + .match_id_table = dpaa2_eth_match_id_table
4335 +static int __init dpaa2_eth_driver_init(void)
4339 + dpaa2_eth_dbg_init();
4340 + err = fsl_mc_driver_register(&dpaa2_eth_driver);
4342 + dpaa2_eth_dbg_exit();
4349 +static void __exit dpaa2_eth_driver_exit(void)
4351 + dpaa2_eth_dbg_exit();
4352 + fsl_mc_driver_unregister(&dpaa2_eth_driver);
4355 +module_init(dpaa2_eth_driver_init);
4356 +module_exit(dpaa2_eth_driver_exit);
4358 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
4360 +/* Copyright 2014-2015 Freescale Semiconductor Inc.
4362 + * Redistribution and use in source and binary forms, with or without
4363 + * modification, are permitted provided that the following conditions are met:
4364 + * * Redistributions of source code must retain the above copyright
4365 + * notice, this list of conditions and the following disclaimer.
4366 + * * Redistributions in binary form must reproduce the above copyright
4367 + * notice, this list of conditions and the following disclaimer in the
4368 + * documentation and/or other materials provided with the distribution.
4369 + * * Neither the name of Freescale Semiconductor nor the
4370 + * names of its contributors may be used to endorse or promote products
4371 + * derived from this software without specific prior written permission.
4374 + * ALTERNATIVELY, this software may be distributed under the terms of the
4375 + * GNU General Public License ("GPL") as published by the Free Software
4376 + * Foundation, either version 2 of that License or (at your option) any
4379 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4380 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4381 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4382 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4383 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4384 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4385 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4386 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4387 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4388 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4391 +#ifndef __DPAA2_ETH_H
4392 +#define __DPAA2_ETH_H
4394 +#include <linux/atomic.h>
4395 +#include <linux/netdevice.h>
4396 +#include <linux/if_vlan.h>
4397 +#include "../../fsl-mc/include/dpaa2-io.h"
4401 +#include "dpaa2-eth-debugfs.h"
4403 +#define DPAA2_ETH_STORE_SIZE 16
4405 +/* We set a max threshold for how many Tx confirmations we should process
4406 + * on a NAPI poll call, they take less processing time.
4408 +#define TX_CONF_PER_NAPI_POLL 256
4410 +/* Maximum number of scatter-gather entries in an ingress frame,
4411 + * considering the maximum receive frame size is 64K
4413 +#define DPAA2_ETH_MAX_SG_ENTRIES ((64 * 1024) / DPAA2_ETH_RX_BUF_SIZE)
4415 +/* Maximum acceptable MTU value. It is in direct relation with the hardware
4416 + * enforced Max Frame Length (currently 10k).
4418 +#define DPAA2_ETH_MFL (10 * 1024)
4419 +#define DPAA2_ETH_MAX_MTU (DPAA2_ETH_MFL - VLAN_ETH_HLEN)
4420 +/* Convert L3 MTU to L2 MFL */
4421 +#define DPAA2_ETH_L2_MAX_FRM(mtu) ((mtu) + VLAN_ETH_HLEN)
4423 +/* Maximum burst size value for Tx shaping */
4424 +#define DPAA2_ETH_MAX_BURST_SIZE 0xF7FF
4426 +/* Maximum number of buffers that can be acquired/released through a single
4429 +#define DPAA2_ETH_BUFS_PER_CMD 7
4431 +/* Set the taildrop threshold (in bytes) to allow the enqueue of several jumbo
4432 + * frames in the Rx queues (length of the current frame is not
4433 + * taken into account when making the taildrop decision)
4435 +#define DPAA2_ETH_TAILDROP_THRESH (64 * 1024)
4437 +/* Buffer quota per queue. Must be large enough such that for minimum sized
4438 + * frames taildrop kicks in before the bpool gets depleted, so we compute
4439 + * how many 64B frames fit inside the taildrop threshold and add a margin
4440 + * to accommodate the buffer refill delay.
4442 +#define DPAA2_ETH_MAX_FRAMES_PER_QUEUE (DPAA2_ETH_TAILDROP_THRESH / 64)
4443 +#define DPAA2_ETH_NUM_BUFS_TD (DPAA2_ETH_MAX_FRAMES_PER_QUEUE + 256)
4444 +#define DPAA2_ETH_REFILL_THRESH_TD \
4445 + (DPAA2_ETH_NUM_BUFS_TD - DPAA2_ETH_BUFS_PER_CMD)
4447 +/* Buffer quota per queue to use when flow control is active. */
4448 +#define DPAA2_ETH_NUM_BUFS_FC 256
4450 +/* Hardware requires alignment for ingress/egress buffer addresses
4451 + * and ingress buffer lengths.
4453 +#define DPAA2_ETH_RX_BUF_SIZE 2048
4454 +#define DPAA2_ETH_TX_BUF_ALIGN 64
4455 +#define DPAA2_ETH_RX_BUF_ALIGN 64
4456 +#define DPAA2_ETH_RX_BUF_ALIGN_V1 256
4457 +#define DPAA2_ETH_NEEDED_HEADROOM(p_priv) \
4458 + ((p_priv)->tx_data_offset + DPAA2_ETH_TX_BUF_ALIGN)
4460 +/* rx_extra_head prevents reallocations in L3 processing. */
4461 +#define DPAA2_ETH_SKB_SIZE \
4462 + (DPAA2_ETH_RX_BUF_SIZE + \
4463 + SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
4465 +/* Hardware only sees DPAA2_ETH_RX_BUF_SIZE, but we need to allocate ingress
4466 + * buffers large enough to allow building an skb around them and also account
4467 + * for alignment restrictions.
4469 +#define DPAA2_ETH_BUF_RAW_SIZE(p_priv) \
4470 + (DPAA2_ETH_SKB_SIZE + \
4471 + (p_priv)->rx_buf_align)
4473 +/* PTP nominal frequency 1GHz */
4474 +#define DPAA2_PTP_NOMINAL_FREQ_PERIOD_NS 1
4476 +/* Leave enough extra space in the headroom to make sure the skb is
4477 + * not realloc'd in forwarding scenarios.
4479 +#define DPAA2_ETH_RX_HEAD_ROOM 192
4481 +/* We are accommodating a skb backpointer and some S/G info
4482 + * in the frame's software annotation. The hardware
4483 + * options are either 0 or 64, so we choose the latter.
4485 +#define DPAA2_ETH_SWA_SIZE 64
4487 +/* Must keep this struct smaller than DPAA2_ETH_SWA_SIZE */
4488 +struct dpaa2_eth_swa {
4489 + struct sk_buff *skb;
4490 + struct scatterlist *scl;
4495 +/* Annotation valid bits in FD FRC */
4496 +#define DPAA2_FD_FRC_FASV 0x8000
4497 +#define DPAA2_FD_FRC_FAEADV 0x4000
4498 +#define DPAA2_FD_FRC_FAPRV 0x2000
4499 +#define DPAA2_FD_FRC_FAIADV 0x1000
4500 +#define DPAA2_FD_FRC_FASWOV 0x0800
4501 +#define DPAA2_FD_FRC_FAICFDV 0x0400
4503 +#define DPAA2_FD_RX_ERR_MASK (FD_CTRL_SBE | FD_CTRL_FAERR)
4504 +#define DPAA2_FD_TX_ERR_MASK (FD_CTRL_UFD | \
4509 +/* Annotation bits in FD CTRL */
4510 +#define DPAA2_FD_CTRL_ASAL 0x00020000 /* ASAL = 128 */
4512 +/* Size of hardware annotation area based on the current buffer layout
4515 +#define DPAA2_ETH_RX_HWA_SIZE 64
4516 +#define DPAA2_ETH_TX_HWA_SIZE 128
4518 +/* Frame annotation status */
4526 +/* Frame annotation status word is located in the first 8 bytes
4527 + * of the buffer's hardware annotation area
4529 +#define DPAA2_FAS_OFFSET 0
4530 +#define DPAA2_FAS_SIZE (sizeof(struct dpaa2_fas))
4532 +/* Timestamp is located in the next 8 bytes of the buffer's
4533 + * hardware annotation area
4535 +#define DPAA2_TS_OFFSET 0x8
4537 +/* Frame annotation egress action descriptor */
4538 +#define DPAA2_FAEAD_OFFSET 0x58
4540 +struct dpaa2_faead {
4545 +#define DPAA2_FAEAD_A2V 0x20000000
4546 +#define DPAA2_FAEAD_UPDV 0x00001000
4547 +#define DPAA2_FAEAD_UPD 0x00000010
4549 +/* accessors for the hardware annotation fields that we use */
4550 +#define dpaa2_eth_get_hwa(buf_addr) \
4551 + ((void *)(buf_addr) + DPAA2_ETH_SWA_SIZE)
4553 +#define dpaa2_eth_get_fas(buf_addr) \
4554 + (struct dpaa2_fas *)(dpaa2_eth_get_hwa(buf_addr) + DPAA2_FAS_OFFSET)
4556 +#define dpaa2_eth_get_ts(buf_addr) \
4557 + (u64 *)(dpaa2_eth_get_hwa(buf_addr) + DPAA2_TS_OFFSET)
4559 +#define dpaa2_eth_get_faead(buf_addr) \
4560 + (struct dpaa2_faead *)(dpaa2_eth_get_hwa(buf_addr) + DPAA2_FAEAD_OFFSET)
4562 +/* Error and status bits in the frame annotation status word */
4563 +/* Debug frame, otherwise supposed to be discarded */
4564 +#define DPAA2_FAS_DISC 0x80000000
4566 +#define DPAA2_FAS_MS 0x40000000
4567 +#define DPAA2_FAS_PTP 0x08000000
4568 +/* Ethernet multicast frame */
4569 +#define DPAA2_FAS_MC 0x04000000
4570 +/* Ethernet broadcast frame */
4571 +#define DPAA2_FAS_BC 0x02000000
4572 +#define DPAA2_FAS_KSE 0x00040000
4573 +#define DPAA2_FAS_EOFHE 0x00020000
4574 +#define DPAA2_FAS_MNLE 0x00010000
4575 +#define DPAA2_FAS_TIDE 0x00008000
4576 +#define DPAA2_FAS_PIEE 0x00004000
4577 +/* Frame length error */
4578 +#define DPAA2_FAS_FLE 0x00002000
4579 +/* Frame physical error */
4580 +#define DPAA2_FAS_FPE 0x00001000
4581 +#define DPAA2_FAS_PTE 0x00000080
4582 +#define DPAA2_FAS_ISP 0x00000040
4583 +#define DPAA2_FAS_PHE 0x00000020
4584 +#define DPAA2_FAS_BLE 0x00000010
4585 +/* L3 csum validation performed */
4586 +#define DPAA2_FAS_L3CV 0x00000008
4587 +/* L3 csum error */
4588 +#define DPAA2_FAS_L3CE 0x00000004
4589 +/* L4 csum validation performed */
4590 +#define DPAA2_FAS_L4CV 0x00000002
4591 +/* L4 csum error */
4592 +#define DPAA2_FAS_L4CE 0x00000001
4593 +/* Possible errors on the ingress path */
4594 +#define DPAA2_FAS_RX_ERR_MASK ((DPAA2_FAS_KSE) | \
4595 + (DPAA2_FAS_EOFHE) | \
4596 + (DPAA2_FAS_MNLE) | \
4597 + (DPAA2_FAS_TIDE) | \
4598 + (DPAA2_FAS_PIEE) | \
4599 + (DPAA2_FAS_FLE) | \
4600 + (DPAA2_FAS_FPE) | \
4601 + (DPAA2_FAS_PTE) | \
4602 + (DPAA2_FAS_ISP) | \
4603 + (DPAA2_FAS_PHE) | \
4604 + (DPAA2_FAS_BLE) | \
4605 + (DPAA2_FAS_L3CE) | \
4608 +#define DPAA2_FAS_TX_ERR_MASK ((DPAA2_FAS_KSE) | \
4609 + (DPAA2_FAS_EOFHE) | \
4610 + (DPAA2_FAS_MNLE) | \
4613 +/* Time in milliseconds between link state updates */
4614 +#define DPAA2_ETH_LINK_STATE_REFRESH 1000
4616 +/* Number of times to retry a frame enqueue before giving up.
4617 + * Value determined empirically, in order to minimize the number
4618 + * of frames dropped on Tx
4620 +#define DPAA2_ETH_ENQUEUE_RETRIES 10
4622 +/* Tx congestion entry & exit thresholds, in number of bytes.
4623 + * We allow a maximum of 512KB worth of frames pending processing on the Tx
4624 + * queues of an interface
4626 +#define DPAA2_ETH_TX_CONG_ENTRY_THRESH (512 * 1024)
4627 +#define DPAA2_ETH_TX_CONG_EXIT_THRESH (DPAA2_ETH_TX_CONG_ENTRY_THRESH * 9/10)
4629 +/* Driver statistics, other than those in struct rtnl_link_stats64.
4630 + * These are usually collected per-CPU and aggregated by ethtool.
4632 +struct dpaa2_eth_drv_stats {
4633 + __u64 tx_conf_frames;
4634 + __u64 tx_conf_bytes;
4635 + __u64 tx_sg_frames;
4636 + __u64 tx_sg_bytes;
4637 + __u64 rx_sg_frames;
4638 + __u64 rx_sg_bytes;
4639 + /* Enqueues retried due to portal busy */
4640 + __u64 tx_portal_busy;
4643 +/* Per-FQ statistics */
4644 +struct dpaa2_eth_fq_stats {
4645 + /* Number of frames received on this queue */
4647 + /* Number of times this queue entered congestion */
4648 + __u64 congestion_entry;
4651 +/* Per-channel statistics */
4652 +struct dpaa2_eth_ch_stats {
4653 + /* Volatile dequeues retried due to portal busy */
4654 + __u64 dequeue_portal_busy;
4655 + /* Number of CDANs; useful to estimate avg NAPI len */
4657 + /* Number of frames received on queues from this channel */
4663 +/* Maximum number of queues associated with a DPNI */
4664 +#define DPAA2_ETH_MAX_RX_QUEUES 16
4665 +#define DPAA2_ETH_MAX_TX_QUEUES NR_CPUS
4666 +#define DPAA2_ETH_MAX_RX_ERR_QUEUES 1
4667 +#define DPAA2_ETH_MAX_QUEUES (DPAA2_ETH_MAX_RX_QUEUES + \
4668 + DPAA2_ETH_MAX_TX_QUEUES + \
4669 + DPAA2_ETH_MAX_RX_ERR_QUEUES)
4671 +#define DPAA2_ETH_MAX_DPCONS NR_CPUS
4673 +enum dpaa2_eth_fq_type {
4679 +struct dpaa2_eth_priv;
4681 +struct dpaa2_eth_fq {
4686 + struct dpaa2_eth_channel *channel;
4687 + enum dpaa2_eth_fq_type type;
4689 + void (*consume)(struct dpaa2_eth_priv *,
4690 + struct dpaa2_eth_channel *,
4691 + const struct dpaa2_fd *,
4692 + struct napi_struct *,
4694 + struct dpaa2_eth_fq_stats stats;
4697 +struct dpaa2_eth_channel {
4698 + struct dpaa2_io_notification_ctx nctx;
4699 + struct fsl_mc_device *dpcon;
4703 + struct napi_struct napi;
4704 + struct dpaa2_io_store *store;
4705 + struct dpaa2_eth_priv *priv;
4707 + struct dpaa2_eth_ch_stats stats;
4710 +struct dpaa2_eth_cls_rule {
4711 + struct ethtool_rx_flow_spec fs;
4715 +struct dpaa2_eth_hash_fields {
4717 + enum net_prot cls_prot;
4723 +/* Driver private data */
4724 +struct dpaa2_eth_priv {
4725 + struct net_device *net_dev;
4727 + /* Standard statistics */
4728 + struct rtnl_link_stats64 __percpu *percpu_stats;
4729 + /* Extra stats, in addition to the ones known by the kernel */
4730 + struct dpaa2_eth_drv_stats __percpu *percpu_extras;
4731 + struct iommu_domain *iommu_domain;
4733 + bool ts_tx_en; /* Tx timestamping enabled */
4734 + bool ts_rx_en; /* Rx timestamping enabled */
4736 + u16 tx_data_offset;
4742 + int tx_pause_frames;
4744 + int refill_thresh;
4746 + /* Tx congestion notifications are written here */
4748 + void *cscn_unaligned;
4749 + dma_addr_t cscn_dma;
4752 + /* Tx queues are at the beginning of the array */
4753 + struct dpaa2_eth_fq fq[DPAA2_ETH_MAX_QUEUES];
4756 + struct dpaa2_eth_channel *channel[DPAA2_ETH_MAX_DPCONS];
4759 + struct dpni_attr dpni_attrs;
4760 + struct fsl_mc_device *dpbp_dev;
4762 + struct fsl_mc_io *mc_io;
4763 + /* SysFS-controlled affinity mask for TxConf FQs */
4764 + struct cpumask txconf_cpumask;
4765 + /* Cores which have an affine DPIO/DPCON.
4766 + * This is the cpu set on which Rx frames are processed;
4767 + * Tx confirmation frames are processed on a subset of this,
4768 + * depending on user settings.
4770 + struct cpumask dpio_cpumask;
4774 + struct dpni_link_state link_state;
4775 + bool do_link_poll;
4776 + struct task_struct *poll_thread;
4778 + struct dpaa2_eth_hash_fields *hash_fields;
4779 + u8 num_hash_fields;
4780 + /* enabled ethtool hashing bits */
4783 +#ifdef CONFIG_FSL_DPAA2_ETH_DEBUGFS
4784 + struct dpaa2_debugfs dbg;
4787 + /* array of classification rules */
4788 + struct dpaa2_eth_cls_rule *cls_rule;
4790 + struct dpni_tx_shaping_cfg shaping_cfg;
4793 +#define dpaa2_eth_hash_enabled(priv) \
4794 + ((priv)->dpni_attrs.num_queues > 1)
4796 +#define dpaa2_eth_fs_enabled(priv) \
4797 + (!((priv)->dpni_attrs.options & DPNI_OPT_NO_FS))
4799 +#define dpaa2_eth_fs_mask_enabled(priv) \
4800 + ((priv)->dpni_attrs.options & DPNI_OPT_HAS_KEY_MASKING)
4802 +#define dpaa2_eth_fs_count(priv) \
4803 + ((priv)->dpni_attrs.fs_entries)
4805 +/* size of DMA memory used to pass configuration to classifier, in bytes */
4806 +#define DPAA2_CLASSIFIER_DMA_SIZE 256
4808 +extern const struct ethtool_ops dpaa2_ethtool_ops;
4809 +extern const char dpaa2_eth_drv_version[];
4811 +static inline int dpaa2_eth_queue_count(struct dpaa2_eth_priv *priv)
4813 + return priv->dpni_attrs.num_queues;
4816 +void check_cls_support(struct dpaa2_eth_priv *priv);
4818 +int setup_fqs_taildrop(struct dpaa2_eth_priv *priv, bool enable);
4819 +#endif /* __DPAA2_H */
4821 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-ethtool.c
4823 +/* Copyright 2014-2015 Freescale Semiconductor Inc.
4825 + * Redistribution and use in source and binary forms, with or without
4826 + * modification, are permitted provided that the following conditions are met:
4827 + * * Redistributions of source code must retain the above copyright
4828 + * notice, this list of conditions and the following disclaimer.
4829 + * * Redistributions in binary form must reproduce the above copyright
4830 + * notice, this list of conditions and the following disclaimer in the
4831 + * documentation and/or other materials provided with the distribution.
4832 + * * Neither the name of Freescale Semiconductor nor the
4833 + * names of its contributors may be used to endorse or promote products
4834 + * derived from this software without specific prior written permission.
4837 + * ALTERNATIVELY, this software may be distributed under the terms of the
4838 + * GNU General Public License ("GPL") as published by the Free Software
4839 + * Foundation, either version 2 of that License or (at your option) any
4842 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
4843 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
4844 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
4845 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
4846 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
4847 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
4848 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
4849 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4850 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
4851 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4854 +#include "dpni.h" /* DPNI_LINK_OPT_* */
4855 +#include "dpaa2-eth.h"
4857 +/* To be kept in sync with dpni_statistics */
4858 +static char dpaa2_ethtool_stats[][ETH_GSTRING_LEN] = {
4861 + "rx mcast frames",
4863 + "rx bcast frames",
4867 + "tx mcast frames",
4869 + "tx bcast frames",
4871 + "rx filtered frames",
4872 + "rx discarded frames",
4873 + "rx nobuffer discards",
4874 + "tx discarded frames",
4875 + "tx confirmed frames",
4878 +#define DPAA2_ETH_NUM_STATS ARRAY_SIZE(dpaa2_ethtool_stats)
4880 +/* To be kept in sync with 'struct dpaa2_eth_drv_stats' */
4881 +static char dpaa2_ethtool_extras[][ETH_GSTRING_LEN] = {
4882 + /* per-cpu stats */
4890 + /* how many times we had to retry the enqueue command */
4891 + "enqueue portal busy",
4893 + /* Channel stats */
4894 + /* How many times we had to retry the volatile dequeue command */
4895 + "dequeue portal busy",
4896 + "channel pull errors",
4897 + /* Number of notifications received */
4899 + "tx congestion state",
4900 +#ifdef CONFIG_FSL_QBMAN_DEBUG
4902 + "rx pending frames",
4903 + "rx pending bytes",
4904 + "tx conf pending frames",
4905 + "tx conf pending bytes",
4910 +#define DPAA2_ETH_NUM_EXTRA_STATS ARRAY_SIZE(dpaa2_ethtool_extras)
4912 +static void dpaa2_eth_get_drvinfo(struct net_device *net_dev,
4913 + struct ethtool_drvinfo *drvinfo)
4915 + strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
4916 + strlcpy(drvinfo->version, dpaa2_eth_drv_version,
4917 + sizeof(drvinfo->version));
4918 + strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
4919 + strlcpy(drvinfo->bus_info, dev_name(net_dev->dev.parent->parent),
4920 + sizeof(drvinfo->bus_info));
4923 +static int dpaa2_eth_get_settings(struct net_device *net_dev,
4924 + struct ethtool_cmd *cmd)
4926 + struct dpni_link_state state = {0};
4928 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
4930 + err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
4932 + netdev_err(net_dev, "ERROR %d getting link state", err);
4936 + /* At the moment, we have no way of interrogating the DPMAC
4937 + * from the DPNI side - and for that matter there may exist
4938 + * no DPMAC at all. So for now we just don't report anything
4939 + * beyond the DPNI attributes.
4941 + if (state.options & DPNI_LINK_OPT_AUTONEG)
4942 + cmd->autoneg = AUTONEG_ENABLE;
4943 + if (!(state.options & DPNI_LINK_OPT_HALF_DUPLEX))
4944 + cmd->duplex = DUPLEX_FULL;
4945 + ethtool_cmd_speed_set(cmd, state.rate);
4951 +static int dpaa2_eth_set_settings(struct net_device *net_dev,
4952 + struct ethtool_cmd *cmd)
4954 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
4955 + struct dpni_link_state state = {0};
4956 + struct dpni_link_cfg cfg = {0};
4959 + netdev_dbg(net_dev, "Setting link parameters...");
4961 + /* Need to interrogate on link state to get flow control params */
4962 + err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
4964 + netdev_err(net_dev, "ERROR %d getting link state", err);
4968 + cfg.options = state.options;
4969 + cfg.rate = ethtool_cmd_speed(cmd);
4970 + if (cmd->autoneg == AUTONEG_ENABLE)
4971 + cfg.options |= DPNI_LINK_OPT_AUTONEG;
4973 + cfg.options &= ~DPNI_LINK_OPT_AUTONEG;
4974 + if (cmd->duplex == DUPLEX_HALF)
4975 + cfg.options |= DPNI_LINK_OPT_HALF_DUPLEX;
4977 + cfg.options &= ~DPNI_LINK_OPT_HALF_DUPLEX;
4979 + err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &cfg);
4981 + /* ethtool will be loud enough if we return an error; no point
4982 + * in putting our own error message on the console by default
4984 + netdev_dbg(net_dev, "ERROR %d setting link cfg", err);
4990 +static void dpaa2_eth_get_pauseparam(struct net_device *net_dev,
4991 + struct ethtool_pauseparam *pause)
4993 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
4994 + struct dpni_link_state state = {0};
4997 + err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
4999 + netdev_dbg(net_dev, "ERROR %d getting link state", err);
5001 + /* for now, pause frames autonegotiation is not separate */
5002 + pause->autoneg = !!(state.options & DPNI_LINK_OPT_AUTONEG);
5003 + pause->rx_pause = !!(state.options & DPNI_LINK_OPT_PAUSE);
5004 + pause->tx_pause = pause->rx_pause ^
5005 + !!(state.options & DPNI_LINK_OPT_ASYM_PAUSE);
5008 +static int dpaa2_eth_set_pauseparam(struct net_device *net_dev,
5009 + struct ethtool_pauseparam *pause)
5011 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5012 + struct dpni_link_state state = {0};
5013 + struct dpni_link_cfg cfg = {0};
5014 + u32 current_tx_pause;
5017 + err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
5019 + netdev_dbg(net_dev, "ERROR %d getting link state", err);
5023 + cfg.rate = state.rate;
5024 + cfg.options = state.options;
5025 + current_tx_pause = !!(cfg.options & DPNI_LINK_OPT_PAUSE) ^
5026 + !!(cfg.options & DPNI_LINK_OPT_ASYM_PAUSE);
5028 + if (pause->autoneg != !!(state.options & DPNI_LINK_OPT_AUTONEG))
5029 + netdev_warn(net_dev,
5030 + "WARN: Can't change pause frames autoneg separately\n");
5032 + if (pause->rx_pause)
5033 + cfg.options |= DPNI_LINK_OPT_PAUSE;
5035 + cfg.options &= ~DPNI_LINK_OPT_PAUSE;
5037 + if (pause->rx_pause ^ pause->tx_pause)
5038 + cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
5040 + cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
5042 + err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &cfg);
5044 + /* ethtool will be loud enough if we return an error; no point
5045 + * in putting our own error message on the console by default
5047 + netdev_dbg(net_dev, "ERROR %d setting link cfg", err);
5051 + /* Enable / disable taildrops if Tx pause frames have changed */
5052 + if (current_tx_pause == pause->tx_pause)
5055 + err = setup_fqs_taildrop(priv, !pause->tx_pause);
5057 + netdev_dbg(net_dev, "ERROR %d configuring taildrop", err);
5059 + priv->tx_pause_frames = pause->tx_pause;
5064 +static void dpaa2_eth_get_strings(struct net_device *netdev, u32 stringset,
5070 + switch (stringset) {
5071 + case ETH_SS_STATS:
5072 + for (i = 0; i < DPAA2_ETH_NUM_STATS; i++) {
5073 + strlcpy(p, dpaa2_ethtool_stats[i], ETH_GSTRING_LEN);
5074 + p += ETH_GSTRING_LEN;
5076 + for (i = 0; i < DPAA2_ETH_NUM_EXTRA_STATS; i++) {
5077 + strlcpy(p, dpaa2_ethtool_extras[i], ETH_GSTRING_LEN);
5078 + p += ETH_GSTRING_LEN;
5084 +static int dpaa2_eth_get_sset_count(struct net_device *net_dev, int sset)
5087 + case ETH_SS_STATS: /* ethtool_get_stats(), ethtool_get_drvinfo() */
5088 + return DPAA2_ETH_NUM_STATS + DPAA2_ETH_NUM_EXTRA_STATS;
5090 + return -EOPNOTSUPP;
5094 +/** Fill in hardware counters, as returned by MC.
5096 +static void dpaa2_eth_get_ethtool_stats(struct net_device *net_dev,
5097 + struct ethtool_stats *stats,
5100 + int i = 0; /* Current index in the data array */
5101 + int j = 0, k, err;
5102 + union dpni_statistics dpni_stats;
5104 +#ifdef CONFIG_FSL_QBMAN_DEBUG
5106 + u32 fcnt_rx_total = 0, fcnt_tx_total = 0;
5107 + u32 bcnt_rx_total = 0, bcnt_tx_total = 0;
5111 + u64 portal_busy = 0, pull_err = 0;
5112 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5113 + struct dpaa2_eth_drv_stats *extras;
5114 + struct dpaa2_eth_ch_stats *ch_stats;
5117 + sizeof(u64) * (DPAA2_ETH_NUM_STATS + DPAA2_ETH_NUM_EXTRA_STATS));
5119 + /* Print standard counters, from DPNI statistics */
5120 + for (j = 0; j <= 2; j++) {
5121 + err = dpni_get_statistics(priv->mc_io, 0, priv->mc_token,
5124 + netdev_warn(net_dev, "Err %d getting DPNI stats page %d",
5129 + *(data + i++) = dpni_stats.page_0.ingress_all_frames;
5130 + *(data + i++) = dpni_stats.page_0.ingress_all_bytes;
5131 + *(data + i++) = dpni_stats.page_0.ingress_multicast_frames;
5132 + *(data + i++) = dpni_stats.page_0.ingress_multicast_bytes;
5133 + *(data + i++) = dpni_stats.page_0.ingress_broadcast_frames;
5134 + *(data + i++) = dpni_stats.page_0.ingress_broadcast_bytes;
5137 + *(data + i++) = dpni_stats.page_1.egress_all_frames;
5138 + *(data + i++) = dpni_stats.page_1.egress_all_bytes;
5139 + *(data + i++) = dpni_stats.page_1.egress_multicast_frames;
5140 + *(data + i++) = dpni_stats.page_1.egress_multicast_bytes;
5141 + *(data + i++) = dpni_stats.page_1.egress_broadcast_frames;
5142 + *(data + i++) = dpni_stats.page_1.egress_broadcast_bytes;
5145 + *(data + i++) = dpni_stats.page_2.ingress_filtered_frames;
5146 + *(data + i++) = dpni_stats.page_2.ingress_discarded_frames;
5147 + *(data + i++) = dpni_stats.page_2.ingress_nobuffer_discards;
5148 + *(data + i++) = dpni_stats.page_2.egress_discarded_frames;
5149 + *(data + i++) = dpni_stats.page_2.egress_confirmed_frames;
5156 + /* Print per-cpu extra stats */
5157 + for_each_online_cpu(k) {
5158 + extras = per_cpu_ptr(priv->percpu_extras, k);
5159 + for (j = 0; j < sizeof(*extras) / sizeof(__u64); j++)
5160 + *((__u64 *)data + i + j) += *((__u64 *)extras + j);
5165 + /* We may be using fewer DPIOs than actual CPUs */
5166 + for (j = 0; j < priv->num_channels; j++) {
5167 + ch_stats = &priv->channel[j]->stats;
5168 + cdan += ch_stats->cdan;
5169 + portal_busy += ch_stats->dequeue_portal_busy;
5170 + pull_err += ch_stats->pull_err;
5173 + *(data + i++) = portal_busy;
5174 + *(data + i++) = pull_err;
5175 + *(data + i++) = cdan;
5177 + *(data + i++) = dpaa2_cscn_state_congested(priv->cscn_mem);
5179 +#ifdef CONFIG_FSL_QBMAN_DEBUG
5180 + for (j = 0; j < priv->num_fqs; j++) {
5181 + /* Print FQ instantaneous counts */
5182 + err = dpaa2_io_query_fq_count(NULL, priv->fq[j].fqid,
5185 + netdev_warn(net_dev, "FQ query error %d", err);
5189 + if (priv->fq[j].type == DPAA2_TX_CONF_FQ) {
5190 + fcnt_tx_total += fcnt;
5191 + bcnt_tx_total += bcnt;
5193 + fcnt_rx_total += fcnt;
5194 + bcnt_rx_total += bcnt;
5198 + *(data + i++) = fcnt_rx_total;
5199 + *(data + i++) = bcnt_rx_total;
5200 + *(data + i++) = fcnt_tx_total;
5201 + *(data + i++) = bcnt_tx_total;
5203 + err = dpaa2_io_query_bp_count(NULL, priv->bpid, &buf_cnt);
5205 + netdev_warn(net_dev, "Buffer count query error %d\n", err);
5208 + *(data + i++) = buf_cnt;
5212 +static int cls_key_off(struct dpaa2_eth_priv *priv, int prot, int field)
5216 + for (i = 0; i < priv->num_hash_fields; i++) {
5217 + if (priv->hash_fields[i].cls_prot == prot &&
5218 + priv->hash_fields[i].cls_field == field)
5220 + off += priv->hash_fields[i].size;
5226 +static u8 cls_key_size(struct dpaa2_eth_priv *priv)
5230 + for (i = 0; i < priv->num_hash_fields; i++)
5231 + size += priv->hash_fields[i].size;
5236 +void check_cls_support(struct dpaa2_eth_priv *priv)
5238 + u8 key_size = cls_key_size(priv);
5239 + struct device *dev = priv->net_dev->dev.parent;
5241 + if (dpaa2_eth_hash_enabled(priv)) {
5242 + if (priv->dpni_attrs.fs_key_size < key_size) {
5243 + dev_info(dev, "max_dist_key_size = %d, expected %d. Hashing and steering are disabled\n",
5244 + priv->dpni_attrs.fs_key_size,
5248 + if (priv->num_hash_fields > DPKG_MAX_NUM_OF_EXTRACTS) {
5249 + dev_info(dev, "Too many key fields (max = %d). Hashing and steering are disabled\n",
5250 + DPKG_MAX_NUM_OF_EXTRACTS);
5255 + if (dpaa2_eth_fs_enabled(priv)) {
5256 + if (!dpaa2_eth_hash_enabled(priv)) {
5257 + dev_info(dev, "Insufficient queues. Steering is disabled\n");
5261 + if (!dpaa2_eth_fs_mask_enabled(priv)) {
5262 + dev_info(dev, "Key masks not supported. Steering is disabled\n");
5270 + priv->dpni_attrs.options |= DPNI_OPT_NO_FS;
5271 + priv->dpni_attrs.options &= ~DPNI_OPT_HAS_KEY_MASKING;
5274 +static int prep_l4_rule(struct dpaa2_eth_priv *priv,
5275 + struct ethtool_tcpip4_spec *l4_value,
5276 + struct ethtool_tcpip4_spec *l4_mask,
5277 + void *key, void *mask, u8 l4_proto)
5281 + if (l4_mask->tos) {
5282 + netdev_err(priv->net_dev, "ToS is not supported for IPv4 L4\n");
5283 + return -EOPNOTSUPP;
5286 + if (l4_mask->ip4src) {
5287 + offset = cls_key_off(priv, NET_PROT_IP, NH_FLD_IP_SRC);
5288 + *(u32 *)(key + offset) = l4_value->ip4src;
5289 + *(u32 *)(mask + offset) = l4_mask->ip4src;
5292 + if (l4_mask->ip4dst) {
5293 + offset = cls_key_off(priv, NET_PROT_IP, NH_FLD_IP_DST);
5294 + *(u32 *)(key + offset) = l4_value->ip4dst;
5295 + *(u32 *)(mask + offset) = l4_mask->ip4dst;
5298 + if (l4_mask->psrc) {
5299 + offset = cls_key_off(priv, NET_PROT_UDP, NH_FLD_UDP_PORT_SRC);
5300 + *(u32 *)(key + offset) = l4_value->psrc;
5301 + *(u32 *)(mask + offset) = l4_mask->psrc;
5304 + if (l4_mask->pdst) {
5305 + offset = cls_key_off(priv, NET_PROT_UDP, NH_FLD_UDP_PORT_DST);
5306 + *(u32 *)(key + offset) = l4_value->pdst;
5307 + *(u32 *)(mask + offset) = l4_mask->pdst;
5310 + /* Only apply the rule for the user-specified L4 protocol
5311 + * and if ethertype matches IPv4
5313 + offset = cls_key_off(priv, NET_PROT_ETH, NH_FLD_ETH_TYPE);
5314 + *(u16 *)(key + offset) = htons(ETH_P_IP);
5315 + *(u16 *)(mask + offset) = 0xFFFF;
5317 + offset = cls_key_off(priv, NET_PROT_IP, NH_FLD_IP_PROTO);
5318 + *(u8 *)(key + offset) = l4_proto;
5319 + *(u8 *)(mask + offset) = 0xFF;
5321 + /* TODO: check IP version */
5326 +static int prep_eth_rule(struct dpaa2_eth_priv *priv,
5327 + struct ethhdr *eth_value, struct ethhdr *eth_mask,
5328 + void *key, void *mask)
5332 + if (eth_mask->h_proto) {
5333 + netdev_err(priv->net_dev, "Ethertype is not supported!\n");
5334 + return -EOPNOTSUPP;
5337 + if (!is_zero_ether_addr(eth_mask->h_source)) {
5338 + offset = cls_key_off(priv, NET_PROT_ETH, NH_FLD_ETH_SA);
5339 + ether_addr_copy(key + offset, eth_value->h_source);
5340 + ether_addr_copy(mask + offset, eth_mask->h_source);
5343 + if (!is_zero_ether_addr(eth_mask->h_dest)) {
5344 + offset = cls_key_off(priv, NET_PROT_ETH, NH_FLD_ETH_DA);
5345 + ether_addr_copy(key + offset, eth_value->h_dest);
5346 + ether_addr_copy(mask + offset, eth_mask->h_dest);
5352 +static int prep_user_ip_rule(struct dpaa2_eth_priv *priv,
5353 + struct ethtool_usrip4_spec *uip_value,
5354 + struct ethtool_usrip4_spec *uip_mask,
5355 + void *key, void *mask)
5359 + if (uip_mask->tos)
5360 + return -EOPNOTSUPP;
5362 + if (uip_mask->ip4src) {
5363 + offset = cls_key_off(priv, NET_PROT_IP, NH_FLD_IP_SRC);
5364 + *(u32 *)(key + offset) = uip_value->ip4src;
5365 + *(u32 *)(mask + offset) = uip_mask->ip4src;
5368 + if (uip_mask->ip4dst) {
5369 + offset = cls_key_off(priv, NET_PROT_IP, NH_FLD_IP_DST);
5370 + *(u32 *)(key + offset) = uip_value->ip4dst;
5371 + *(u32 *)(mask + offset) = uip_mask->ip4dst;
5374 + if (uip_mask->proto) {
5375 + offset = cls_key_off(priv, NET_PROT_IP, NH_FLD_IP_PROTO);
5376 + *(u32 *)(key + offset) = uip_value->proto;
5377 + *(u32 *)(mask + offset) = uip_mask->proto;
5379 + if (uip_mask->l4_4_bytes) {
5380 + offset = cls_key_off(priv, NET_PROT_UDP, NH_FLD_UDP_PORT_SRC);
5381 + *(u16 *)(key + offset) = uip_value->l4_4_bytes << 16;
5382 + *(u16 *)(mask + offset) = uip_mask->l4_4_bytes << 16;
5384 + offset = cls_key_off(priv, NET_PROT_UDP, NH_FLD_UDP_PORT_DST);
5385 + *(u16 *)(key + offset) = uip_value->l4_4_bytes & 0xFFFF;
5386 + *(u16 *)(mask + offset) = uip_mask->l4_4_bytes & 0xFFFF;
5389 + /* Ethertype must be IP */
5390 + offset = cls_key_off(priv, NET_PROT_ETH, NH_FLD_ETH_TYPE);
5391 + *(u16 *)(key + offset) = htons(ETH_P_IP);
5392 + *(u16 *)(mask + offset) = 0xFFFF;
5397 +static int prep_ext_rule(struct dpaa2_eth_priv *priv,
5398 + struct ethtool_flow_ext *ext_value,
5399 + struct ethtool_flow_ext *ext_mask,
5400 + void *key, void *mask)
5404 + if (ext_mask->vlan_etype)
5405 + return -EOPNOTSUPP;
5407 + if (ext_mask->vlan_tci) {
5408 + offset = cls_key_off(priv, NET_PROT_VLAN, NH_FLD_VLAN_TCI);
5409 + *(u16 *)(key + offset) = ext_value->vlan_tci;
5410 + *(u16 *)(mask + offset) = ext_mask->vlan_tci;
5416 +static int prep_mac_ext_rule(struct dpaa2_eth_priv *priv,
5417 + struct ethtool_flow_ext *ext_value,
5418 + struct ethtool_flow_ext *ext_mask,
5419 + void *key, void *mask)
5423 + if (!is_zero_ether_addr(ext_mask->h_dest)) {
5424 + offset = cls_key_off(priv, NET_PROT_ETH, NH_FLD_ETH_DA);
5425 + ether_addr_copy(key + offset, ext_value->h_dest);
5426 + ether_addr_copy(mask + offset, ext_mask->h_dest);
5432 +static int prep_cls_rule(struct net_device *net_dev,
5433 + struct ethtool_rx_flow_spec *fs,
5436 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5437 + const u8 key_size = cls_key_size(priv);
5438 + void *msk = key + key_size;
5441 + memset(key, 0, key_size * 2);
5443 + switch (fs->flow_type & 0xff) {
5445 + err = prep_l4_rule(priv, &fs->h_u.tcp_ip4_spec,
5446 + &fs->m_u.tcp_ip4_spec, key, msk,
5450 + err = prep_l4_rule(priv, &fs->h_u.udp_ip4_spec,
5451 + &fs->m_u.udp_ip4_spec, key, msk,
5454 + case SCTP_V4_FLOW:
5455 + err = prep_l4_rule(priv, &fs->h_u.sctp_ip4_spec,
5456 + &fs->m_u.sctp_ip4_spec, key, msk,
5460 + err = prep_eth_rule(priv, &fs->h_u.ether_spec,
5461 + &fs->m_u.ether_spec, key, msk);
5463 + case IP_USER_FLOW:
5464 + err = prep_user_ip_rule(priv, &fs->h_u.usr_ip4_spec,
5465 + &fs->m_u.usr_ip4_spec, key, msk);
5468 + /* TODO: AH, ESP */
5469 + return -EOPNOTSUPP;
5474 + if (fs->flow_type & FLOW_EXT) {
5475 + err = prep_ext_rule(priv, &fs->h_ext, &fs->m_ext, key, msk);
5480 + if (fs->flow_type & FLOW_MAC_EXT) {
5481 + err = prep_mac_ext_rule(priv, &fs->h_ext, &fs->m_ext, key, msk);
5489 +static int del_cls(struct net_device *net_dev, int location);
5491 +static int do_cls(struct net_device *net_dev,
5492 + struct ethtool_rx_flow_spec *fs,
5495 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5496 + struct device *dev = net_dev->dev.parent;
5497 + const int rule_cnt = dpaa2_eth_fs_count(priv);
5498 + struct dpni_rule_cfg rule_cfg;
5499 + struct dpni_fs_action_cfg fs_act = { 0 };
5503 + if (!dpaa2_eth_fs_enabled(priv)) {
5504 + netdev_err(net_dev, "dev does not support steering!\n");
5505 + /* dev doesn't support steering */
5506 + return -EOPNOTSUPP;
5509 + if ((fs->ring_cookie != RX_CLS_FLOW_DISC &&
5510 + fs->ring_cookie >= dpaa2_eth_queue_count(priv)) ||
5511 + fs->location >= rule_cnt)
5514 + /* When adding a new rule, check if location if available,
5515 + * and if not free the existing table entry before inserting
5518 + if (add && (priv->cls_rule[fs->location].in_use == true))
5519 + del_cls(net_dev, fs->location);
5521 + memset(&rule_cfg, 0, sizeof(rule_cfg));
5522 + rule_cfg.key_size = cls_key_size(priv);
5524 + /* allocate twice the key size, for the actual key and for mask */
5525 + dma_mem = kzalloc(rule_cfg.key_size * 2, GFP_DMA | GFP_KERNEL);
5529 + err = prep_cls_rule(net_dev, fs, dma_mem);
5531 + goto err_free_mem;
5533 + rule_cfg.key_iova = dma_map_single(dev, dma_mem,
5534 + rule_cfg.key_size * 2,
5537 + rule_cfg.mask_iova = rule_cfg.key_iova + rule_cfg.key_size;
5539 + if (fs->ring_cookie == RX_CLS_FLOW_DISC)
5540 + fs_act.options |= DPNI_FS_OPT_DISCARD;
5542 + fs_act.flow_id = fs->ring_cookie;
5545 + err = dpni_add_fs_entry(priv->mc_io, 0, priv->mc_token,
5546 + 0, fs->location, &rule_cfg, &fs_act);
5548 + err = dpni_remove_fs_entry(priv->mc_io, 0, priv->mc_token,
5551 + dma_unmap_single(dev, rule_cfg.key_iova,
5552 + rule_cfg.key_size * 2, DMA_TO_DEVICE);
5555 + netdev_err(net_dev, "dpaa2_add/remove_cls() error %d\n", err);
5563 +static int add_cls(struct net_device *net_dev,
5564 + struct ethtool_rx_flow_spec *fs)
5566 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5569 + err = do_cls(net_dev, fs, true);
5573 + priv->cls_rule[fs->location].in_use = true;
5574 + priv->cls_rule[fs->location].fs = *fs;
5579 +static int del_cls(struct net_device *net_dev, int location)
5581 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5584 + err = do_cls(net_dev, &priv->cls_rule[location].fs, false);
5588 + priv->cls_rule[location].in_use = false;
5593 +static int dpaa2_eth_set_rxnfc(struct net_device *net_dev,
5594 + struct ethtool_rxnfc *rxnfc)
5598 + switch (rxnfc->cmd) {
5599 + case ETHTOOL_SRXCLSRLINS:
5600 + err = add_cls(net_dev, &rxnfc->fs);
5603 + case ETHTOOL_SRXCLSRLDEL:
5604 + err = del_cls(net_dev, rxnfc->fs.location);
5608 + err = -EOPNOTSUPP;
5614 +static int dpaa2_eth_get_rxnfc(struct net_device *net_dev,
5615 + struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
5617 + struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
5618 + const int rule_cnt = dpaa2_eth_fs_count(priv);
5621 + switch (rxnfc->cmd) {
5622 + case ETHTOOL_GRXFH:
5623 + /* we purposely ignore cmd->flow_type, because the hashing key
5624 + * is the same (and fixed) for all protocols
5626 + rxnfc->data = priv->rx_flow_hash;
5629 + case ETHTOOL_GRXRINGS:
5630 + rxnfc->data = dpaa2_eth_queue_count(priv);
5633 + case ETHTOOL_GRXCLSRLCNT:
5634 + for (i = 0, rxnfc->rule_cnt = 0; i < rule_cnt; i++)
5635 + if (priv->cls_rule[i].in_use)
5636 + rxnfc->rule_cnt++;
5637 + rxnfc->data = rule_cnt;
5640 + case ETHTOOL_GRXCLSRULE:
5641 + if (!priv->cls_rule[rxnfc->fs.location].in_use)
5644 + rxnfc->fs = priv->cls_rule[rxnfc->fs.location].fs;
5647 + case ETHTOOL_GRXCLSRLALL:
5648 + for (i = 0, j = 0; i < rule_cnt; i++) {
5649 + if (!priv->cls_rule[i].in_use)
5651 + if (j == rxnfc->rule_cnt)
5653 + rule_locs[j++] = i;
5655 + rxnfc->rule_cnt = j;
5656 + rxnfc->data = rule_cnt;
5660 + return -EOPNOTSUPP;
5666 +const struct ethtool_ops dpaa2_ethtool_ops = {
5667 + .get_drvinfo = dpaa2_eth_get_drvinfo,
5668 + .get_link = ethtool_op_get_link,
5669 + .get_settings = dpaa2_eth_get_settings,
5670 + .set_settings = dpaa2_eth_set_settings,
5671 + .get_pauseparam = dpaa2_eth_get_pauseparam,
5672 + .set_pauseparam = dpaa2_eth_set_pauseparam,
5673 + .get_sset_count = dpaa2_eth_get_sset_count,
5674 + .get_ethtool_stats = dpaa2_eth_get_ethtool_stats,
5675 + .get_strings = dpaa2_eth_get_strings,
5676 + .get_rxnfc = dpaa2_eth_get_rxnfc,
5677 + .set_rxnfc = dpaa2_eth_set_rxnfc,
5680 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpkg.h
5682 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
5684 + * Redistribution and use in source and binary forms, with or without
5685 + * modification, are permitted provided that the following conditions are met:
5686 + * * Redistributions of source code must retain the above copyright
5687 + * notice, this list of conditions and the following disclaimer.
5688 + * * Redistributions in binary form must reproduce the above copyright
5689 + * notice, this list of conditions and the following disclaimer in the
5690 + * documentation and/or other materials provided with the distribution.
5691 + * * Neither the name of the above-listed copyright holders nor the
5692 + * names of any contributors may be used to endorse or promote products
5693 + * derived from this software without specific prior written permission.
5696 + * ALTERNATIVELY, this software may be distributed under the terms of the
5697 + * GNU General Public License ("GPL") as published by the Free Software
5698 + * Foundation, either version 2 of that License or (at your option) any
5701 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
5702 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
5703 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
5704 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
5705 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
5706 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
5707 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
5708 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
5709 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
5710 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
5711 + * POSSIBILITY OF SUCH DAMAGE.
5713 +#ifndef __FSL_DPKG_H_
5714 +#define __FSL_DPKG_H_
5716 +#include <linux/types.h>
5719 +/* Data Path Key Generator API
5720 + * Contains initialization APIs and runtime APIs for the Key Generator
5723 +/** Key Generator properties */
5726 + * Number of masks per key extraction
5728 +#define DPKG_NUM_OF_MASKS 4
5730 + * Number of extractions per key profile
5732 +#define DPKG_MAX_NUM_OF_EXTRACTS 10
5735 + * enum dpkg_extract_from_hdr_type - Selecting extraction by header types
5736 + * @DPKG_FROM_HDR: Extract selected bytes from header, by offset
5737 + * @DPKG_FROM_FIELD: Extract selected bytes from header, by offset from field
5738 + * @DPKG_FULL_FIELD: Extract a full field
5740 +enum dpkg_extract_from_hdr_type {
5741 + DPKG_FROM_HDR = 0,
5742 + DPKG_FROM_FIELD = 1,
5743 + DPKG_FULL_FIELD = 2
5747 + * enum dpkg_extract_type - Enumeration for selecting extraction type
5748 + * @DPKG_EXTRACT_FROM_HDR: Extract from the header
5749 + * @DPKG_EXTRACT_FROM_DATA: Extract from data not in specific header
5750 + * @DPKG_EXTRACT_FROM_PARSE: Extract from parser-result;
5751 + * e.g. can be used to extract header existence;
5752 + * please refer to 'Parse Result definition' section in the parser BG
5754 +enum dpkg_extract_type {
5755 + DPKG_EXTRACT_FROM_HDR = 0,
5756 + DPKG_EXTRACT_FROM_DATA = 1,
5757 + DPKG_EXTRACT_FROM_PARSE = 3
5761 + * struct dpkg_mask - A structure for defining a single extraction mask
5762 + * @mask: Byte mask for the extracted content
5763 + * @offset: Offset within the extracted content
5771 + * struct dpkg_extract - A structure for defining a single extraction
5772 + * @type: Determines how the union below is interpreted:
5773 + * DPKG_EXTRACT_FROM_HDR: selects 'from_hdr';
5774 + * DPKG_EXTRACT_FROM_DATA: selects 'from_data';
5775 + * DPKG_EXTRACT_FROM_PARSE: selects 'from_parse'
5776 + * @extract: Selects extraction method
5777 + * @num_of_byte_masks: Defines the number of valid entries in the array below;
5778 + * This is also the number of bytes to be used as masks
5779 + * @masks: Masks parameters
5781 +struct dpkg_extract {
5782 + enum dpkg_extract_type type;
5784 + * union extract - Selects extraction method
5785 + * @from_hdr - Used when 'type = DPKG_EXTRACT_FROM_HDR'
5786 + * @from_data - Used when 'type = DPKG_EXTRACT_FROM_DATA'
5787 + * @from_parse - Used when 'type = DPKG_EXTRACT_FROM_PARSE'
5791 + * struct from_hdr - Used when 'type = DPKG_EXTRACT_FROM_HDR'
5792 + * @prot: Any of the supported headers
5793 + * @type: Defines the type of header extraction:
5794 + * DPKG_FROM_HDR: use size & offset below;
5795 + * DPKG_FROM_FIELD: use field, size and offset below;
5796 + * DPKG_FULL_FIELD: use field below
5797 + * @field: One of the supported fields (NH_FLD_)
5799 + * @size: Size in bytes
5800 + * @offset: Byte offset
5801 + * @hdr_index: Clear for cases not listed below;
5802 + * Used for protocols that may have more than a single
5803 + * header, 0 indicates an outer header;
5804 + * Supported protocols (possible values):
5805 + * NET_PROT_VLAN (0, HDR_INDEX_LAST);
5806 + * NET_PROT_MPLS (0, 1, HDR_INDEX_LAST);
5807 + * NET_PROT_IP(0, HDR_INDEX_LAST);
5808 + * NET_PROT_IPv4(0, HDR_INDEX_LAST);
5809 + * NET_PROT_IPv6(0, HDR_INDEX_LAST);
5813 + enum net_prot prot;
5814 + enum dpkg_extract_from_hdr_type type;
5821 + * struct from_data - Used when 'type = DPKG_EXTRACT_FROM_DATA'
5822 + * @size: Size in bytes
5823 + * @offset: Byte offset
5831 + * struct from_parse - Used when
5832 + * 'type = DPKG_EXTRACT_FROM_PARSE'
5833 + * @size: Size in bytes
5834 + * @offset: Byte offset
5842 + u8 num_of_byte_masks;
5843 + struct dpkg_mask masks[DPKG_NUM_OF_MASKS];
5847 + * struct dpkg_profile_cfg - A structure for defining a full Key Generation
5849 + * @num_extracts: Defines the number of valid entries in the array below
5850 + * @extracts: Array of required extractions
5852 +struct dpkg_profile_cfg {
5854 + struct dpkg_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
5857 +#endif /* __FSL_DPKG_H_ */
5859 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpni-cmd.h
5861 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
5862 + * Copyright 2016 NXP
5864 + * Redistribution and use in source and binary forms, with or without
5865 + * modification, are permitted provided that the following conditions are met:
5866 + * * Redistributions of source code must retain the above copyright
5867 + * notice, this list of conditions and the following disclaimer.
5868 + * * Redistributions in binary form must reproduce the above copyright
5869 + * notice, this list of conditions and the following disclaimer in the
5870 + * documentation and/or other materials provided with the distribution.
5871 + * * Neither the name of the above-listed copyright holders nor the
5872 + * names of any contributors may be used to endorse or promote products
5873 + * derived from this software without specific prior written permission.
5876 + * ALTERNATIVELY, this software may be distributed under the terms of the
5877 + * GNU General Public License ("GPL") as published by the Free Software
5878 + * Foundation, either version 2 of that License or (at your option) any
5881 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
5882 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
5883 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
5884 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
5885 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
5886 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
5887 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
5888 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
5889 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
5890 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
5891 + * POSSIBILITY OF SUCH DAMAGE.
5893 +#ifndef _FSL_DPNI_CMD_H
5894 +#define _FSL_DPNI_CMD_H
5897 +#define DPNI_VER_MAJOR 7
5898 +#define DPNI_VER_MINOR 0
5899 +#define DPNI_CMD_BASE_VERSION 1
5900 +#define DPNI_CMD_ID_OFFSET 4
5902 +#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
5904 +#define DPNI_CMDID_OPEN DPNI_CMD(0x801)
5905 +#define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
5906 +#define DPNI_CMDID_CREATE DPNI_CMD(0x901)
5907 +#define DPNI_CMDID_DESTROY DPNI_CMD(0x900)
5908 +#define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)
5910 +#define DPNI_CMDID_ENABLE DPNI_CMD(0x002)
5911 +#define DPNI_CMDID_DISABLE DPNI_CMD(0x003)
5912 +#define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004)
5913 +#define DPNI_CMDID_RESET DPNI_CMD(0x005)
5914 +#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)
5916 +#define DPNI_CMDID_SET_IRQ DPNI_CMD(0x010)
5917 +#define DPNI_CMDID_GET_IRQ DPNI_CMD(0x011)
5918 +#define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012)
5919 +#define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013)
5920 +#define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014)
5921 +#define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015)
5922 +#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016)
5923 +#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017)
5925 +#define DPNI_CMDID_SET_POOLS DPNI_CMD(0x200)
5926 +#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)
5928 +#define DPNI_CMDID_GET_QDID DPNI_CMD(0x210)
5929 +#define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212)
5930 +#define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215)
5931 +#define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216)
5932 +#define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217)
5933 +#define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A)
5934 +#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD(0x21B)
5936 +#define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220)
5937 +#define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221)
5938 +#define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222)
5939 +#define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223)
5940 +#define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224)
5941 +#define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225)
5942 +#define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226)
5943 +#define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227)
5944 +#define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228)
5946 +#define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235)
5948 +#define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244)
5949 +#define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245)
5950 +#define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246)
5952 +#define DPNI_CMDID_GET_STATISTICS DPNI_CMD(0x25D)
5953 +#define DPNI_CMDID_RESET_STATISTICS DPNI_CMD(0x25E)
5954 +#define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F)
5955 +#define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260)
5956 +#define DPNI_CMDID_GET_TAILDROP DPNI_CMD(0x261)
5957 +#define DPNI_CMDID_SET_TAILDROP DPNI_CMD(0x262)
5959 +#define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263)
5961 +#define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264)
5962 +#define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265)
5964 +#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266)
5965 +#define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267)
5966 +#define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268)
5967 +#define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD(0x269)
5968 +#define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD(0x26A)
5969 +#define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B)
5970 +#define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C)
5972 +/* Macros for accessing command fields smaller than 1byte */
5973 +#define DPNI_MASK(field) \
5974 + GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
5975 + DPNI_##field##_SHIFT)
5977 +#define dpni_set_field(var, field, val) \
5978 + ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
5979 +#define dpni_get_field(var, field) \
5980 + (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
5982 +struct dpni_cmd_open {
5986 +#define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order))
5987 +struct dpni_cmd_set_pools {
5990 + u8 backup_pool_mask;
5992 + /* cmd word 0..4 */
5993 + __le32 dpbp_id[DPNI_MAX_DPBP];
5994 + /* cmd word 4..6 */
5995 + __le16 buffer_size[DPNI_MAX_DPBP];
5998 +/* The enable indication is always the least significant bit */
5999 +#define DPNI_ENABLE_SHIFT 0
6000 +#define DPNI_ENABLE_SIZE 1
6002 +struct dpni_rsp_is_enabled {
6006 +struct dpni_rsp_get_irq {
6007 + /* response word 0 */
6010 + /* response word 1 */
6012 + /* response word 2 */
6017 +struct dpni_cmd_set_irq_enable {
6023 +struct dpni_cmd_get_irq_enable {
6028 +struct dpni_rsp_get_irq_enable {
6032 +struct dpni_cmd_set_irq_mask {
6037 +struct dpni_cmd_get_irq_mask {
6042 +struct dpni_rsp_get_irq_mask {
6046 +struct dpni_cmd_get_irq_status {
6051 +struct dpni_rsp_get_irq_status {
6055 +struct dpni_cmd_clear_irq_status {
6060 +struct dpni_rsp_get_attr {
6061 + /* response word 0 */
6065 + u8 mac_filter_entries;
6067 + /* response word 1 */
6068 + u8 vlan_filter_entries;
6072 + __le16 fs_entries;
6074 + /* response word 2 */
6077 + __le16 wriop_version;
6080 +#define DPNI_ERROR_ACTION_SHIFT 0
6081 +#define DPNI_ERROR_ACTION_SIZE 4
6082 +#define DPNI_FRAME_ANN_SHIFT 4
6083 +#define DPNI_FRAME_ANN_SIZE 1
6085 +struct dpni_cmd_set_errors_behavior {
6087 + /* from least significant bit: error_action:4, set_frame_annotation:1 */
6091 +/* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
6092 + * buffer layouts, but they all share the same parameters.
6093 + * If one of the functions changes, below structure needs to be split.
6096 +#define DPNI_PASS_TS_SHIFT 0
6097 +#define DPNI_PASS_TS_SIZE 1
6098 +#define DPNI_PASS_PR_SHIFT 1
6099 +#define DPNI_PASS_PR_SIZE 1
6100 +#define DPNI_PASS_FS_SHIFT 2
6101 +#define DPNI_PASS_FS_SIZE 1
6103 +struct dpni_cmd_get_buffer_layout {
6107 +struct dpni_rsp_get_buffer_layout {
6108 + /* response word 0 */
6110 + /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
6113 + /* response word 1 */
6114 + __le16 private_data_size;
6115 + __le16 data_align;
6120 +struct dpni_cmd_set_buffer_layout {
6125 + /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
6129 + __le16 private_data_size;
6130 + __le16 data_align;
6135 +struct dpni_cmd_set_offload {
6141 +struct dpni_cmd_get_offload {
6146 +struct dpni_rsp_get_offload {
6151 +struct dpni_cmd_get_qdid {
6155 +struct dpni_rsp_get_qdid {
6159 +struct dpni_rsp_get_tx_data_offset {
6160 + __le16 data_offset;
6163 +struct dpni_cmd_get_statistics {
6167 +struct dpni_rsp_get_statistics {
6168 + __le64 counter[DPNI_STATISTICS_CNT];
6171 +struct dpni_cmd_set_link_cfg {
6181 +#define DPNI_LINK_STATE_SHIFT 0
6182 +#define DPNI_LINK_STATE_SIZE 1
6184 +struct dpni_rsp_get_link_state {
6185 + /* response word 0 */
6187 + /* from LSB: up:1 */
6190 + /* response word 1 */
6193 + /* response word 2 */
6197 +struct dpni_cmd_set_tx_shaping {
6199 + __le16 max_burst_size;
6202 + __le32 rate_limit;
6205 +struct dpni_cmd_set_max_frame_length {
6206 + __le16 max_frame_length;
6209 +struct dpni_rsp_get_max_frame_length {
6210 + __le16 max_frame_length;
6213 +struct dpni_cmd_set_multicast_promisc {
6217 +struct dpni_rsp_get_multicast_promisc {
6221 +struct dpni_cmd_set_unicast_promisc {
6225 +struct dpni_rsp_get_unicast_promisc {
6229 +struct dpni_cmd_set_primary_mac_addr {
6234 +struct dpni_rsp_get_primary_mac_addr {
6239 +struct dpni_rsp_get_port_mac_addr {
6244 +struct dpni_cmd_add_mac_addr {
6249 +struct dpni_cmd_remove_mac_addr {
6254 +#define DPNI_UNICAST_FILTERS_SHIFT 0
6255 +#define DPNI_UNICAST_FILTERS_SIZE 1
6256 +#define DPNI_MULTICAST_FILTERS_SHIFT 1
6257 +#define DPNI_MULTICAST_FILTERS_SIZE 1
6259 +struct dpni_cmd_clear_mac_filters {
6260 + /* from LSB: unicast:1, multicast:1 */
6264 +#define DPNI_DIST_MODE_SHIFT 0
6265 +#define DPNI_DIST_MODE_SIZE 4
6266 +#define DPNI_MISS_ACTION_SHIFT 4
6267 +#define DPNI_MISS_ACTION_SIZE 4
6269 +struct dpni_cmd_set_rx_tc_dist {
6273 + /* from LSB: dist_mode:4, miss_action:4 */
6276 + __le16 default_flow_id;
6277 + /* cmd word 1..5 */
6280 + __le64 key_cfg_iova;
6283 +/* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
6286 +struct dpni_mask_cfg {
6291 +#define DPNI_EFH_TYPE_SHIFT 0
6292 +#define DPNI_EFH_TYPE_SIZE 4
6293 +#define DPNI_EXTRACT_TYPE_SHIFT 0
6294 +#define DPNI_EXTRACT_TYPE_SIZE 4
6296 +struct dpni_dist_extract {
6299 + /* EFH type stored in the 4 least significant bits */
6307 + u8 num_of_repeats;
6308 + u8 num_of_byte_masks;
6309 + /* Extraction type is stored in the 4 LSBs */
6313 + struct dpni_mask_cfg masks[4];
6316 +struct dpni_ext_set_rx_tc_dist {
6317 + /* extension word 0 */
6321 + struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
6324 +struct dpni_cmd_get_queue {
6330 +#define DPNI_DEST_TYPE_SHIFT 0
6331 +#define DPNI_DEST_TYPE_SIZE 4
6332 +#define DPNI_STASH_CTRL_SHIFT 6
6333 +#define DPNI_STASH_CTRL_SIZE 1
6334 +#define DPNI_HOLD_ACTIVE_SHIFT 7
6335 +#define DPNI_HOLD_ACTIVE_SIZE 1
6337 +struct dpni_rsp_get_queue {
6338 + /* response word 0 */
6340 + /* response word 1 */
6344 + /* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
6346 + /* response word 2 */
6348 + /* response word 3 */
6349 + __le64 user_context;
6350 + /* response word 4 */
6355 +struct dpni_cmd_set_queue {
6370 + __le64 user_context;
6373 +struct dpni_cmd_add_fs_entry {
6388 +struct dpni_cmd_remove_fs_entry {
6400 +struct dpni_cmd_set_taildrop {
6402 + u8 congestion_point;
6408 + /* Only least significant bit is relevant */
6416 +struct dpni_cmd_get_taildrop {
6417 + u8 congestion_point;
6423 +struct dpni_rsp_get_taildrop {
6427 + /* only least significant bit is relevant */
6435 +#define DPNI_DEST_TYPE_SHIFT 0
6436 +#define DPNI_DEST_TYPE_SIZE 4
6437 +#define DPNI_CONG_UNITS_SHIFT 4
6438 +#define DPNI_CONG_UNITS_SIZE 2
6440 +struct dpni_cmd_set_congestion_notification {
6447 + u16 notification_mode;
6449 + /* from LSB: dest_type: 4 units:2 */
6456 + u32 threshold_entry;
6457 + u32 threshold_exit;
6460 +#endif /* _FSL_DPNI_CMD_H */
6462 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpni.c
6464 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
6465 + * Copyright 2016 NXP
6467 + * Redistribution and use in source and binary forms, with or without
6468 + * modification, are permitted provided that the following conditions are met:
6469 + * * Redistributions of source code must retain the above copyright
6470 + * notice, this list of conditions and the following disclaimer.
6471 + * * Redistributions in binary form must reproduce the above copyright
6472 + * notice, this list of conditions and the following disclaimer in the
6473 + * documentation and/or other materials provided with the distribution.
6474 + * * Neither the name of the above-listed copyright holders nor the
6475 + * names of any contributors may be used to endorse or promote products
6476 + * derived from this software without specific prior written permission.
6479 + * ALTERNATIVELY, this software may be distributed under the terms of the
6480 + * GNU General Public License ("GPL") as published by the Free Software
6481 + * Foundation, either version 2 of that License or (at your option) any
6484 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
6485 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
6486 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
6487 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
6488 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
6489 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
6490 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
6491 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
6492 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
6493 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
6494 + * POSSIBILITY OF SUCH DAMAGE.
6496 +#include "../../fsl-mc/include/mc-sys.h"
6497 +#include "../../fsl-mc/include/mc-cmd.h"
6499 +#include "dpni-cmd.h"
6502 + * dpni_prepare_key_cfg() - function prepare extract parameters
6503 + * @cfg: defining a full Key Generation profile (rule)
6504 + * @key_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
6506 + * This function has to be called before the following functions:
6507 + * - dpni_set_rx_tc_dist()
6508 + * - dpni_set_qos_table()
6510 +int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg, u8 *key_cfg_buf)
6513 + struct dpni_ext_set_rx_tc_dist *dpni_ext;
6514 + struct dpni_dist_extract *extr;
6516 + if (cfg->num_extracts > DPKG_MAX_NUM_OF_EXTRACTS)
6519 + dpni_ext = (struct dpni_ext_set_rx_tc_dist *)key_cfg_buf;
6520 + dpni_ext->num_extracts = cfg->num_extracts;
6522 + for (i = 0; i < cfg->num_extracts; i++) {
6523 + extr = &dpni_ext->extracts[i];
6525 + switch (cfg->extracts[i].type) {
6526 + case DPKG_EXTRACT_FROM_HDR:
6527 + extr->prot = cfg->extracts[i].extract.from_hdr.prot;
6528 + dpni_set_field(extr->efh_type, EFH_TYPE,
6529 + cfg->extracts[i].extract.from_hdr.type);
6530 + extr->size = cfg->extracts[i].extract.from_hdr.size;
6531 + extr->offset = cfg->extracts[i].extract.from_hdr.offset;
6532 + extr->field = cpu_to_le32(
6533 + cfg->extracts[i].extract.from_hdr.field);
6535 + cfg->extracts[i].extract.from_hdr.hdr_index;
6537 + case DPKG_EXTRACT_FROM_DATA:
6538 + extr->size = cfg->extracts[i].extract.from_data.size;
6540 + cfg->extracts[i].extract.from_data.offset;
6542 + case DPKG_EXTRACT_FROM_PARSE:
6543 + extr->size = cfg->extracts[i].extract.from_parse.size;
6545 + cfg->extracts[i].extract.from_parse.offset;
6551 + extr->num_of_byte_masks = cfg->extracts[i].num_of_byte_masks;
6552 + dpni_set_field(extr->extract_type, EXTRACT_TYPE,
6553 + cfg->extracts[i].type);
6555 + for (j = 0; j < DPKG_NUM_OF_MASKS; j++) {
6556 + extr->masks[j].mask = cfg->extracts[i].masks[j].mask;
6557 + extr->masks[j].offset =
6558 + cfg->extracts[i].masks[j].offset;
6566 + * dpni_open() - Open a control session for the specified object
6567 + * @mc_io: Pointer to MC portal's I/O object
6568 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6569 + * @dpni_id: DPNI unique ID
6570 + * @token: Returned token; use in subsequent API calls
6572 + * This function can be used to open a control session for an
6573 + * already created object; an object may have been declared in
6574 + * the DPL or by calling the dpni_create() function.
6575 + * This function returns a unique authentication token,
6576 + * associated with the specific object ID and the specific MC
6577 + * portal; this token must be used in all subsequent commands for
6578 + * this specific object.
6580 + * Return: '0' on Success; Error code otherwise.
6582 +int dpni_open(struct fsl_mc_io *mc_io,
6587 + struct mc_command cmd = { 0 };
6588 + struct dpni_cmd_open *cmd_params;
6592 + /* prepare command */
6593 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_OPEN,
6596 + cmd_params = (struct dpni_cmd_open *)cmd.params;
6597 + cmd_params->dpni_id = cpu_to_le32(dpni_id);
6599 + /* send command to mc*/
6600 + err = mc_send_command(mc_io, &cmd);
6604 + /* retrieve response parameters */
6605 + *token = mc_cmd_hdr_read_token(&cmd);
6611 + * dpni_close() - Close the control session of the object
6612 + * @mc_io: Pointer to MC portal's I/O object
6613 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6614 + * @token: Token of DPNI object
6616 + * After this function is called, no further operations are
6617 + * allowed on the object without opening a new control session.
6619 + * Return: '0' on Success; Error code otherwise.
6621 +int dpni_close(struct fsl_mc_io *mc_io,
6625 + struct mc_command cmd = { 0 };
6627 + /* prepare command */
6628 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLOSE,
6632 + /* send command to mc*/
6633 + return mc_send_command(mc_io, &cmd);
6637 + * dpni_set_pools() - Set buffer pools configuration
6638 + * @mc_io: Pointer to MC portal's I/O object
6639 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6640 + * @token: Token of DPNI object
6641 + * @cfg: Buffer pools configuration
6643 + * mandatory for DPNI operation
6644 + * warning:Allowed only when DPNI is disabled
6646 + * Return: '0' on Success; Error code otherwise.
6648 +int dpni_set_pools(struct fsl_mc_io *mc_io,
6651 + const struct dpni_pools_cfg *cfg)
6653 + struct mc_command cmd = { 0 };
6654 + struct dpni_cmd_set_pools *cmd_params;
6657 + /* prepare command */
6658 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_POOLS,
6661 + cmd_params = (struct dpni_cmd_set_pools *)cmd.params;
6662 + cmd_params->num_dpbp = cfg->num_dpbp;
6663 + for (i = 0; i < DPNI_MAX_DPBP; i++) {
6664 + cmd_params->dpbp_id[i] = cpu_to_le32(cfg->pools[i].dpbp_id);
6665 + cmd_params->buffer_size[i] =
6666 + cpu_to_le16(cfg->pools[i].buffer_size);
6667 + cmd_params->backup_pool_mask |=
6668 + DPNI_BACKUP_POOL(cfg->pools[i].backup_pool, i);
6671 + /* send command to mc*/
6672 + return mc_send_command(mc_io, &cmd);
6676 + * dpni_enable() - Enable the DPNI, allow sending and receiving frames.
6677 + * @mc_io: Pointer to MC portal's I/O object
6678 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6679 + * @token: Token of DPNI object
6681 + * Return: '0' on Success; Error code otherwise.
6683 +int dpni_enable(struct fsl_mc_io *mc_io,
6687 + struct mc_command cmd = { 0 };
6689 + /* prepare command */
6690 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_ENABLE,
6694 + /* send command to mc*/
6695 + return mc_send_command(mc_io, &cmd);
6699 + * dpni_disable() - Disable the DPNI, stop sending and receiving frames.
6700 + * @mc_io: Pointer to MC portal's I/O object
6701 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6702 + * @token: Token of DPNI object
6704 + * Return: '0' on Success; Error code otherwise.
6706 +int dpni_disable(struct fsl_mc_io *mc_io,
6710 + struct mc_command cmd = { 0 };
6712 + /* prepare command */
6713 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_DISABLE,
6717 + /* send command to mc*/
6718 + return mc_send_command(mc_io, &cmd);
6722 + * dpni_is_enabled() - Check if the DPNI is enabled.
6723 + * @mc_io: Pointer to MC portal's I/O object
6724 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6725 + * @token: Token of DPNI object
6726 + * @en: Returns '1' if object is enabled; '0' otherwise
6728 + * Return: '0' on Success; Error code otherwise.
6730 +int dpni_is_enabled(struct fsl_mc_io *mc_io,
6735 + struct mc_command cmd = { 0 };
6736 + struct dpni_rsp_is_enabled *rsp_params;
6739 + /* prepare command */
6740 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_IS_ENABLED,
6744 + /* send command to mc*/
6745 + err = mc_send_command(mc_io, &cmd);
6749 + /* retrieve response parameters */
6750 + rsp_params = (struct dpni_rsp_is_enabled *)cmd.params;
6751 + *en = dpni_get_field(rsp_params->enabled, ENABLE);
6757 + * dpni_reset() - Reset the DPNI, returns the object to initial state.
6758 + * @mc_io: Pointer to MC portal's I/O object
6759 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6760 + * @token: Token of DPNI object
6762 + * Return: '0' on Success; Error code otherwise.
6764 +int dpni_reset(struct fsl_mc_io *mc_io,
6768 + struct mc_command cmd = { 0 };
6770 + /* prepare command */
6771 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_RESET,
6775 + /* send command to mc*/
6776 + return mc_send_command(mc_io, &cmd);
6780 + * dpni_set_irq_enable() - Set overall interrupt state.
6781 + * @mc_io: Pointer to MC portal's I/O object
6782 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6783 + * @token: Token of DPNI object
6784 + * @irq_index: The interrupt index to configure
6785 + * @en: Interrupt state: - enable = 1, disable = 0
6787 + * Allows GPP software to control when interrupts are generated.
6788 + * Each interrupt can have up to 32 causes. The enable/disable control's the
6789 + * overall interrupt state. if the interrupt is disabled no causes will cause
6792 + * Return: '0' on Success; Error code otherwise.
6794 +int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
6800 + struct mc_command cmd = { 0 };
6801 + struct dpni_cmd_set_irq_enable *cmd_params;
6803 + /* prepare command */
6804 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_ENABLE,
6807 + cmd_params = (struct dpni_cmd_set_irq_enable *)cmd.params;
6808 + dpni_set_field(cmd_params->enable, ENABLE, en);
6809 + cmd_params->irq_index = irq_index;
6811 + /* send command to mc*/
6812 + return mc_send_command(mc_io, &cmd);
6816 + * dpni_get_irq_enable() - Get overall interrupt state
6817 + * @mc_io: Pointer to MC portal's I/O object
6818 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6819 + * @token: Token of DPNI object
6820 + * @irq_index: The interrupt index to configure
6821 + * @en: Returned interrupt state - enable = 1, disable = 0
6823 + * Return: '0' on Success; Error code otherwise.
6825 +int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
6831 + struct mc_command cmd = { 0 };
6832 + struct dpni_cmd_get_irq_enable *cmd_params;
6833 + struct dpni_rsp_get_irq_enable *rsp_params;
6837 + /* prepare command */
6838 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_ENABLE,
6841 + cmd_params = (struct dpni_cmd_get_irq_enable *)cmd.params;
6842 + cmd_params->irq_index = irq_index;
6844 + /* send command to mc*/
6845 + err = mc_send_command(mc_io, &cmd);
6849 + /* retrieve response parameters */
6850 + rsp_params = (struct dpni_rsp_get_irq_enable *)cmd.params;
6851 + *en = dpni_get_field(rsp_params->enabled, ENABLE);
6857 + * dpni_set_irq_mask() - Set interrupt mask.
6858 + * @mc_io: Pointer to MC portal's I/O object
6859 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6860 + * @token: Token of DPNI object
6861 + * @irq_index: The interrupt index to configure
6862 + * @mask: event mask to trigger interrupt;
6864 + * 0 = ignore event
6865 + * 1 = consider event for asserting IRQ
6867 + * Every interrupt can have up to 32 causes and the interrupt model supports
6868 + * masking/unmasking each cause independently
6870 + * Return: '0' on Success; Error code otherwise.
6872 +int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
6878 + struct mc_command cmd = { 0 };
6879 + struct dpni_cmd_set_irq_mask *cmd_params;
6881 + /* prepare command */
6882 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_MASK,
6885 + cmd_params = (struct dpni_cmd_set_irq_mask *)cmd.params;
6886 + cmd_params->mask = cpu_to_le32(mask);
6887 + cmd_params->irq_index = irq_index;
6889 + /* send command to mc*/
6890 + return mc_send_command(mc_io, &cmd);
6894 + * dpni_get_irq_mask() - Get interrupt mask.
6895 + * @mc_io: Pointer to MC portal's I/O object
6896 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6897 + * @token: Token of DPNI object
6898 + * @irq_index: The interrupt index to configure
6899 + * @mask: Returned event mask to trigger interrupt
6901 + * Every interrupt can have up to 32 causes and the interrupt model supports
6902 + * masking/unmasking each cause independently
6904 + * Return: '0' on Success; Error code otherwise.
6906 +int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
6912 + struct mc_command cmd = { 0 };
6913 + struct dpni_cmd_get_irq_mask *cmd_params;
6914 + struct dpni_rsp_get_irq_mask *rsp_params;
6917 + /* prepare command */
6918 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_MASK,
6921 + cmd_params = (struct dpni_cmd_get_irq_mask *)cmd.params;
6922 + cmd_params->irq_index = irq_index;
6924 + /* send command to mc*/
6925 + err = mc_send_command(mc_io, &cmd);
6929 + /* retrieve response parameters */
6930 + rsp_params = (struct dpni_rsp_get_irq_mask *)cmd.params;
6931 + *mask = le32_to_cpu(rsp_params->mask);
6937 + * dpni_get_irq_status() - Get the current status of any pending interrupts.
6938 + * @mc_io: Pointer to MC portal's I/O object
6939 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6940 + * @token: Token of DPNI object
6941 + * @irq_index: The interrupt index to configure
6942 + * @status: Returned interrupts status - one bit per cause:
6943 + * 0 = no interrupt pending
6944 + * 1 = interrupt pending
6946 + * Return: '0' on Success; Error code otherwise.
6948 +int dpni_get_irq_status(struct fsl_mc_io *mc_io,
6954 + struct mc_command cmd = { 0 };
6955 + struct dpni_cmd_get_irq_status *cmd_params;
6956 + struct dpni_rsp_get_irq_status *rsp_params;
6959 + /* prepare command */
6960 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_STATUS,
6963 + cmd_params = (struct dpni_cmd_get_irq_status *)cmd.params;
6964 + cmd_params->status = cpu_to_le32(*status);
6965 + cmd_params->irq_index = irq_index;
6967 + /* send command to mc*/
6968 + err = mc_send_command(mc_io, &cmd);
6972 + /* retrieve response parameters */
6973 + rsp_params = (struct dpni_rsp_get_irq_status *)cmd.params;
6974 + *status = le32_to_cpu(rsp_params->status);
6980 + * dpni_clear_irq_status() - Clear a pending interrupt's status
6981 + * @mc_io: Pointer to MC portal's I/O object
6982 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
6983 + * @token: Token of DPNI object
6984 + * @irq_index: The interrupt index to configure
6985 + * @status: bits to clear (W1C) - one bit per cause:
6986 + * 0 = don't change
6987 + * 1 = clear status bit
6989 + * Return: '0' on Success; Error code otherwise.
6991 +int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
6997 + struct mc_command cmd = { 0 };
6998 + struct dpni_cmd_clear_irq_status *cmd_params;
7000 + /* prepare command */
7001 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLEAR_IRQ_STATUS,
7004 + cmd_params = (struct dpni_cmd_clear_irq_status *)cmd.params;
7005 + cmd_params->irq_index = irq_index;
7006 + cmd_params->status = cpu_to_le32(status);
7008 + /* send command to mc*/
7009 + return mc_send_command(mc_io, &cmd);
7013 + * dpni_get_attributes() - Retrieve DPNI attributes.
7014 + * @mc_io: Pointer to MC portal's I/O object
7015 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7016 + * @token: Token of DPNI object
7017 + * @attr: Object's attributes
7019 + * Return: '0' on Success; Error code otherwise.
7021 +int dpni_get_attributes(struct fsl_mc_io *mc_io,
7024 + struct dpni_attr *attr)
7026 + struct mc_command cmd = { 0 };
7027 + struct dpni_rsp_get_attr *rsp_params;
7031 + /* prepare command */
7032 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_ATTR,
7036 + /* send command to mc*/
7037 + err = mc_send_command(mc_io, &cmd);
7041 + /* retrieve response parameters */
7042 + rsp_params = (struct dpni_rsp_get_attr *)cmd.params;
7043 + attr->options = le32_to_cpu(rsp_params->options);
7044 + attr->num_queues = rsp_params->num_queues;
7045 + attr->num_tcs = rsp_params->num_tcs;
7046 + attr->mac_filter_entries = rsp_params->mac_filter_entries;
7047 + attr->vlan_filter_entries = rsp_params->vlan_filter_entries;
7048 + attr->qos_entries = rsp_params->qos_entries;
7049 + attr->fs_entries = le16_to_cpu(rsp_params->fs_entries);
7050 + attr->qos_key_size = rsp_params->qos_key_size;
7051 + attr->fs_key_size = rsp_params->fs_key_size;
7052 + attr->wriop_version = le16_to_cpu(rsp_params->wriop_version);
7058 + * dpni_set_errors_behavior() - Set errors behavior
7059 + * @mc_io: Pointer to MC portal's I/O object
7060 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7061 + * @token: Token of DPNI object
7062 + * @cfg: Errors configuration
7064 + * this function may be called numerous times with different
7067 + * Return: '0' on Success; Error code otherwise.
7069 +int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
7072 + struct dpni_error_cfg *cfg)
7074 + struct mc_command cmd = { 0 };
7075 + struct dpni_cmd_set_errors_behavior *cmd_params;
7077 + /* prepare command */
7078 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_ERRORS_BEHAVIOR,
7081 + cmd_params = (struct dpni_cmd_set_errors_behavior *)cmd.params;
7082 + cmd_params->errors = cpu_to_le32(cfg->errors);
7083 + dpni_set_field(cmd_params->flags, ERROR_ACTION, cfg->error_action);
7084 + dpni_set_field(cmd_params->flags, FRAME_ANN, cfg->set_frame_annotation);
7086 + /* send command to mc*/
7087 + return mc_send_command(mc_io, &cmd);
7091 + * dpni_get_buffer_layout() - Retrieve buffer layout attributes.
7092 + * @mc_io: Pointer to MC portal's I/O object
7093 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7094 + * @token: Token of DPNI object
7095 + * @qtype: Type of queue to retrieve configuration for
7096 + * @layout: Returns buffer layout attributes
7098 + * Return: '0' on Success; Error code otherwise.
7100 +int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
7103 + enum dpni_queue_type qtype,
7104 + struct dpni_buffer_layout *layout)
7106 + struct mc_command cmd = { 0 };
7107 + struct dpni_cmd_get_buffer_layout *cmd_params;
7108 + struct dpni_rsp_get_buffer_layout *rsp_params;
7111 + /* prepare command */
7112 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_BUFFER_LAYOUT,
7115 + cmd_params = (struct dpni_cmd_get_buffer_layout *)cmd.params;
7116 + cmd_params->qtype = qtype;
7118 + /* send command to mc*/
7119 + err = mc_send_command(mc_io, &cmd);
7123 + /* retrieve response parameters */
7124 + rsp_params = (struct dpni_rsp_get_buffer_layout *)cmd.params;
7125 + layout->pass_timestamp = dpni_get_field(rsp_params->flags, PASS_TS);
7126 + layout->pass_parser_result = dpni_get_field(rsp_params->flags, PASS_PR);
7127 + layout->pass_frame_status = dpni_get_field(rsp_params->flags, PASS_FS);
7128 + layout->private_data_size = le16_to_cpu(rsp_params->private_data_size);
7129 + layout->data_align = le16_to_cpu(rsp_params->data_align);
7130 + layout->data_head_room = le16_to_cpu(rsp_params->head_room);
7131 + layout->data_tail_room = le16_to_cpu(rsp_params->tail_room);
7137 + * dpni_set_buffer_layout() - Set buffer layout configuration.
7138 + * @mc_io: Pointer to MC portal's I/O object
7139 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7140 + * @token: Token of DPNI object
7141 + * @qtype: Type of queue this configuration applies to
7142 + * @layout: Buffer layout configuration
7144 + * Return: '0' on Success; Error code otherwise.
7146 + * @warning Allowed only when DPNI is disabled
7148 +int dpni_set_buffer_layout(struct fsl_mc_io *mc_io,
7151 + enum dpni_queue_type qtype,
7152 + const struct dpni_buffer_layout *layout)
7154 + struct mc_command cmd = { 0 };
7155 + struct dpni_cmd_set_buffer_layout *cmd_params;
7157 + /* prepare command */
7158 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_BUFFER_LAYOUT,
7161 + cmd_params = (struct dpni_cmd_set_buffer_layout *)cmd.params;
7162 + cmd_params->qtype = qtype;
7163 + cmd_params->options = cpu_to_le16(layout->options);
7164 + dpni_set_field(cmd_params->flags, PASS_TS, layout->pass_timestamp);
7165 + dpni_set_field(cmd_params->flags, PASS_PR, layout->pass_parser_result);
7166 + dpni_set_field(cmd_params->flags, PASS_FS, layout->pass_frame_status);
7167 + cmd_params->private_data_size = cpu_to_le16(layout->private_data_size);
7168 + cmd_params->data_align = cpu_to_le16(layout->data_align);
7169 + cmd_params->head_room = cpu_to_le16(layout->data_head_room);
7170 + cmd_params->tail_room = cpu_to_le16(layout->data_tail_room);
7172 + /* send command to mc*/
7173 + return mc_send_command(mc_io, &cmd);
7177 + * dpni_set_offload() - Set DPNI offload configuration.
7178 + * @mc_io: Pointer to MC portal's I/O object
7179 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7180 + * @token: Token of DPNI object
7181 + * @type: Type of DPNI offload
7182 + * @config: Offload configuration.
7183 + * For checksum offloads, non-zero value enables the offload
7185 + * Return: '0' on Success; Error code otherwise.
7187 + * @warning Allowed only when DPNI is disabled
7190 +int dpni_set_offload(struct fsl_mc_io *mc_io,
7193 + enum dpni_offload type,
7196 + struct mc_command cmd = { 0 };
7197 + struct dpni_cmd_set_offload *cmd_params;
7199 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_OFFLOAD,
7202 + cmd_params = (struct dpni_cmd_set_offload *)cmd.params;
7203 + cmd_params->dpni_offload = type;
7204 + cmd_params->config = cpu_to_le32(config);
7206 + return mc_send_command(mc_io, &cmd);
7209 +int dpni_get_offload(struct fsl_mc_io *mc_io,
7212 + enum dpni_offload type,
7215 + struct mc_command cmd = { 0 };
7216 + struct dpni_cmd_get_offload *cmd_params;
7217 + struct dpni_rsp_get_offload *rsp_params;
7220 + /* prepare command */
7221 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_OFFLOAD,
7224 + cmd_params = (struct dpni_cmd_get_offload *)cmd.params;
7225 + cmd_params->dpni_offload = type;
7227 + /* send command to mc*/
7228 + err = mc_send_command(mc_io, &cmd);
7232 + /* retrieve response parameters */
7233 + rsp_params = (struct dpni_rsp_get_offload *)cmd.params;
7234 + *config = le32_to_cpu(rsp_params->config);
7240 + * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used
7241 + * for enqueue operations
7242 + * @mc_io: Pointer to MC portal's I/O object
7243 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7244 + * @token: Token of DPNI object
7245 + * @qtype: Type of queue to receive QDID for
7246 + * @qdid: Returned virtual QDID value that should be used as an argument
7247 + * in all enqueue operations
7249 + * Return: '0' on Success; Error code otherwise.
7251 +int dpni_get_qdid(struct fsl_mc_io *mc_io,
7254 + enum dpni_queue_type qtype,
7257 + struct mc_command cmd = { 0 };
7258 + struct dpni_cmd_get_qdid *cmd_params;
7259 + struct dpni_rsp_get_qdid *rsp_params;
7262 + /* prepare command */
7263 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QDID,
7266 + cmd_params = (struct dpni_cmd_get_qdid *)cmd.params;
7267 + cmd_params->qtype = qtype;
7269 + /* send command to mc*/
7270 + err = mc_send_command(mc_io, &cmd);
7274 + /* retrieve response parameters */
7275 + rsp_params = (struct dpni_rsp_get_qdid *)cmd.params;
7276 + *qdid = le16_to_cpu(rsp_params->qdid);
7282 + * dpni_get_tx_data_offset() - Get the Tx data offset (from start of buffer)
7283 + * @mc_io: Pointer to MC portal's I/O object
7284 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7285 + * @token: Token of DPNI object
7286 + * @data_offset: Tx data offset (from start of buffer)
7288 + * Return: '0' on Success; Error code otherwise.
7290 +int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,
7295 + struct mc_command cmd = { 0 };
7296 + struct dpni_rsp_get_tx_data_offset *rsp_params;
7299 + /* prepare command */
7300 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_DATA_OFFSET,
7304 + /* send command to mc*/
7305 + err = mc_send_command(mc_io, &cmd);
7309 + /* retrieve response parameters */
7310 + rsp_params = (struct dpni_rsp_get_tx_data_offset *)cmd.params;
7311 + *data_offset = le16_to_cpu(rsp_params->data_offset);
7317 + * dpni_set_link_cfg() - set the link configuration.
7318 + * @mc_io: Pointer to MC portal's I/O object
7319 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7320 + * @token: Token of DPNI object
7321 + * @cfg: Link configuration
7323 + * Return: '0' on Success; Error code otherwise.
7325 +int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
7328 + const struct dpni_link_cfg *cfg)
7330 + struct mc_command cmd = { 0 };
7331 + struct dpni_cmd_set_link_cfg *cmd_params;
7333 + /* prepare command */
7334 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_LINK_CFG,
7337 + cmd_params = (struct dpni_cmd_set_link_cfg *)cmd.params;
7338 + cmd_params->rate = cpu_to_le32(cfg->rate);
7339 + cmd_params->options = cpu_to_le64(cfg->options);
7341 + /* send command to mc*/
7342 + return mc_send_command(mc_io, &cmd);
7346 + * dpni_get_link_state() - Return the link state (either up or down)
7347 + * @mc_io: Pointer to MC portal's I/O object
7348 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7349 + * @token: Token of DPNI object
7350 + * @state: Returned link state;
7352 + * Return: '0' on Success; Error code otherwise.
7354 +int dpni_get_link_state(struct fsl_mc_io *mc_io,
7357 + struct dpni_link_state *state)
7359 + struct mc_command cmd = { 0 };
7360 + struct dpni_rsp_get_link_state *rsp_params;
7363 + /* prepare command */
7364 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_LINK_STATE,
7368 + /* send command to mc*/
7369 + err = mc_send_command(mc_io, &cmd);
7373 + /* retrieve response parameters */
7374 + rsp_params = (struct dpni_rsp_get_link_state *)cmd.params;
7375 + state->up = dpni_get_field(rsp_params->flags, LINK_STATE);
7376 + state->rate = le32_to_cpu(rsp_params->rate);
7377 + state->options = le64_to_cpu(rsp_params->options);
7383 + * dpni_set_tx_shaping() - Set the transmit shaping
7384 + * @mc_io: Pointer to MC portal's I/O object
7385 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7386 + * @token: Token of DPNI object
7387 + * @tx_shaper: tx shaping configuration
7389 + * Return: '0' on Success; Error code otherwise.
7391 +int dpni_set_tx_shaping(struct fsl_mc_io *mc_io,
7394 + const struct dpni_tx_shaping_cfg *tx_shaper)
7396 + struct mc_command cmd = { 0 };
7397 + struct dpni_cmd_set_tx_shaping *cmd_params;
7399 + /* prepare command */
7400 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_SHAPING,
7403 + cmd_params = (struct dpni_cmd_set_tx_shaping *)cmd.params;
7404 + cmd_params->max_burst_size = cpu_to_le16(tx_shaper->max_burst_size);
7405 + cmd_params->rate_limit = cpu_to_le32(tx_shaper->rate_limit);
7407 + /* send command to mc*/
7408 + return mc_send_command(mc_io, &cmd);
7412 + * dpni_set_max_frame_length() - Set the maximum received frame length.
7413 + * @mc_io: Pointer to MC portal's I/O object
7414 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7415 + * @token: Token of DPNI object
7416 + * @max_frame_length: Maximum received frame length (in
7417 + * bytes); frame is discarded if its
7418 + * length exceeds this value
7420 + * Return: '0' on Success; Error code otherwise.
7422 +int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
7425 + u16 max_frame_length)
7427 + struct mc_command cmd = { 0 };
7428 + struct dpni_cmd_set_max_frame_length *cmd_params;
7430 + /* prepare command */
7431 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MAX_FRAME_LENGTH,
7434 + cmd_params = (struct dpni_cmd_set_max_frame_length *)cmd.params;
7435 + cmd_params->max_frame_length = cpu_to_le16(max_frame_length);
7437 + /* send command to mc*/
7438 + return mc_send_command(mc_io, &cmd);
7442 + * dpni_get_max_frame_length() - Get the maximum received frame length.
7443 + * @mc_io: Pointer to MC portal's I/O object
7444 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7445 + * @token: Token of DPNI object
7446 + * @max_frame_length: Maximum received frame length (in
7447 + * bytes); frame is discarded if its
7448 + * length exceeds this value
7450 + * Return: '0' on Success; Error code otherwise.
7452 +int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
7455 + u16 *max_frame_length)
7457 + struct mc_command cmd = { 0 };
7458 + struct dpni_rsp_get_max_frame_length *rsp_params;
7461 + /* prepare command */
7462 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAX_FRAME_LENGTH,
7466 + /* send command to mc*/
7467 + err = mc_send_command(mc_io, &cmd);
7471 + /* retrieve response parameters */
7472 + rsp_params = (struct dpni_rsp_get_max_frame_length *)cmd.params;
7473 + *max_frame_length = le16_to_cpu(rsp_params->max_frame_length);
7479 + * dpni_set_multicast_promisc() - Enable/disable multicast promiscuous mode
7480 + * @mc_io: Pointer to MC portal's I/O object
7481 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7482 + * @token: Token of DPNI object
7483 + * @en: Set to '1' to enable; '0' to disable
7485 + * Return: '0' on Success; Error code otherwise.
7487 +int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
7492 + struct mc_command cmd = { 0 };
7493 + struct dpni_cmd_set_multicast_promisc *cmd_params;
7495 + /* prepare command */
7496 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MCAST_PROMISC,
7499 + cmd_params = (struct dpni_cmd_set_multicast_promisc *)cmd.params;
7500 + dpni_set_field(cmd_params->enable, ENABLE, en);
7502 + /* send command to mc*/
7503 + return mc_send_command(mc_io, &cmd);
7507 + * dpni_get_multicast_promisc() - Get multicast promiscuous mode
7508 + * @mc_io: Pointer to MC portal's I/O object
7509 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7510 + * @token: Token of DPNI object
7511 + * @en: Returns '1' if enabled; '0' otherwise
7513 + * Return: '0' on Success; Error code otherwise.
7515 +int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
7520 + struct mc_command cmd = { 0 };
7521 + struct dpni_rsp_get_multicast_promisc *rsp_params;
7524 + /* prepare command */
7525 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MCAST_PROMISC,
7529 + /* send command to mc*/
7530 + err = mc_send_command(mc_io, &cmd);
7534 + /* retrieve response parameters */
7535 + rsp_params = (struct dpni_rsp_get_multicast_promisc *)cmd.params;
7536 + *en = dpni_get_field(rsp_params->enabled, ENABLE);
7542 + * dpni_set_unicast_promisc() - Enable/disable unicast promiscuous mode
7543 + * @mc_io: Pointer to MC portal's I/O object
7544 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7545 + * @token: Token of DPNI object
7546 + * @en: Set to '1' to enable; '0' to disable
7548 + * Return: '0' on Success; Error code otherwise.
7550 +int dpni_set_unicast_promisc(struct fsl_mc_io *mc_io,
7555 + struct mc_command cmd = { 0 };
7556 + struct dpni_cmd_set_unicast_promisc *cmd_params;
7558 + /* prepare command */
7559 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_UNICAST_PROMISC,
7562 + cmd_params = (struct dpni_cmd_set_unicast_promisc *)cmd.params;
7563 + dpni_set_field(cmd_params->enable, ENABLE, en);
7565 + /* send command to mc*/
7566 + return mc_send_command(mc_io, &cmd);
7570 + * dpni_get_unicast_promisc() - Get unicast promiscuous mode
7571 + * @mc_io: Pointer to MC portal's I/O object
7572 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7573 + * @token: Token of DPNI object
7574 + * @en: Returns '1' if enabled; '0' otherwise
7576 + * Return: '0' on Success; Error code otherwise.
7578 +int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
7583 + struct mc_command cmd = { 0 };
7584 + struct dpni_rsp_get_unicast_promisc *rsp_params;
7587 + /* prepare command */
7588 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_UNICAST_PROMISC,
7592 + /* send command to mc*/
7593 + err = mc_send_command(mc_io, &cmd);
7597 + /* retrieve response parameters */
7598 + rsp_params = (struct dpni_rsp_get_unicast_promisc *)cmd.params;
7599 + *en = dpni_get_field(rsp_params->enabled, ENABLE);
7605 + * dpni_set_primary_mac_addr() - Set the primary MAC address
7606 + * @mc_io: Pointer to MC portal's I/O object
7607 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7608 + * @token: Token of DPNI object
7609 + * @mac_addr: MAC address to set as primary address
7611 + * Return: '0' on Success; Error code otherwise.
7613 +int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
7616 + const u8 mac_addr[6])
7618 + struct mc_command cmd = { 0 };
7619 + struct dpni_cmd_set_primary_mac_addr *cmd_params;
7622 + /* prepare command */
7623 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_PRIM_MAC,
7626 + cmd_params = (struct dpni_cmd_set_primary_mac_addr *)cmd.params;
7627 + for (i = 0; i < 6; i++)
7628 + cmd_params->mac_addr[i] = mac_addr[5 - i];
7630 + /* send command to mc*/
7631 + return mc_send_command(mc_io, &cmd);
7635 + * dpni_get_primary_mac_addr() - Get the primary MAC address
7636 + * @mc_io: Pointer to MC portal's I/O object
7637 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7638 + * @token: Token of DPNI object
7639 + * @mac_addr: Returned MAC address
7641 + * Return: '0' on Success; Error code otherwise.
7643 +int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
7648 + struct mc_command cmd = { 0 };
7649 + struct dpni_rsp_get_primary_mac_addr *rsp_params;
7652 + /* prepare command */
7653 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PRIM_MAC,
7657 + /* send command to mc*/
7658 + err = mc_send_command(mc_io, &cmd);
7662 + /* retrieve response parameters */
7663 + rsp_params = (struct dpni_rsp_get_primary_mac_addr *)cmd.params;
7664 + for (i = 0; i < 6; i++)
7665 + mac_addr[5 - i] = rsp_params->mac_addr[i];
7671 + * dpni_get_port_mac_addr() - Retrieve MAC address associated to the physical
7672 + * port the DPNI is attached to
7673 + * @mc_io: Pointer to MC portal's I/O object
7674 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7675 + * @token: Token of DPNI object
7676 + * @mac_addr: MAC address of the physical port, if any, otherwise 0
7678 + * The primary MAC address is not cleared by this operation.
7680 + * Return: '0' on Success; Error code otherwise.
7682 +int dpni_get_port_mac_addr(struct fsl_mc_io *mc_io,
7687 + struct mc_command cmd = { 0 };
7688 + struct dpni_rsp_get_port_mac_addr *rsp_params;
7691 + /* prepare command */
7692 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PORT_MAC_ADDR,
7696 + /* send command to mc*/
7697 + err = mc_send_command(mc_io, &cmd);
7701 + /* retrieve response parameters */
7702 + rsp_params = (struct dpni_rsp_get_port_mac_addr *)cmd.params;
7703 + for (i = 0; i < 6; i++)
7704 + mac_addr[5 - i] = rsp_params->mac_addr[i];
7710 + * dpni_add_mac_addr() - Add MAC address filter
7711 + * @mc_io: Pointer to MC portal's I/O object
7712 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7713 + * @token: Token of DPNI object
7714 + * @mac_addr: MAC address to add
7716 + * Return: '0' on Success; Error code otherwise.
7718 +int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
7721 + const u8 mac_addr[6])
7723 + struct mc_command cmd = { 0 };
7724 + struct dpni_cmd_add_mac_addr *cmd_params;
7727 + /* prepare command */
7728 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_MAC_ADDR,
7731 + cmd_params = (struct dpni_cmd_add_mac_addr *)cmd.params;
7732 + for (i = 0; i < 6; i++)
7733 + cmd_params->mac_addr[i] = mac_addr[5 - i];
7735 + /* send command to mc*/
7736 + return mc_send_command(mc_io, &cmd);
7740 + * dpni_remove_mac_addr() - Remove MAC address filter
7741 + * @mc_io: Pointer to MC portal's I/O object
7742 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7743 + * @token: Token of DPNI object
7744 + * @mac_addr: MAC address to remove
7746 + * Return: '0' on Success; Error code otherwise.
7748 +int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
7751 + const u8 mac_addr[6])
7753 + struct mc_command cmd = { 0 };
7754 + struct dpni_cmd_remove_mac_addr *cmd_params;
7757 + /* prepare command */
7758 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_MAC_ADDR,
7761 + cmd_params = (struct dpni_cmd_remove_mac_addr *)cmd.params;
7762 + for (i = 0; i < 6; i++)
7763 + cmd_params->mac_addr[i] = mac_addr[5 - i];
7765 + /* send command to mc*/
7766 + return mc_send_command(mc_io, &cmd);
7770 + * dpni_clear_mac_filters() - Clear all unicast and/or multicast MAC filters
7771 + * @mc_io: Pointer to MC portal's I/O object
7772 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7773 + * @token: Token of DPNI object
7774 + * @unicast: Set to '1' to clear unicast addresses
7775 + * @multicast: Set to '1' to clear multicast addresses
7777 + * The primary MAC address is not cleared by this operation.
7779 + * Return: '0' on Success; Error code otherwise.
7781 +int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
7787 + struct mc_command cmd = { 0 };
7788 + struct dpni_cmd_clear_mac_filters *cmd_params;
7790 + /* prepare command */
7791 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLR_MAC_FILTERS,
7794 + cmd_params = (struct dpni_cmd_clear_mac_filters *)cmd.params;
7795 + dpni_set_field(cmd_params->flags, UNICAST_FILTERS, unicast);
7796 + dpni_set_field(cmd_params->flags, MULTICAST_FILTERS, multicast);
7798 + /* send command to mc*/
7799 + return mc_send_command(mc_io, &cmd);
7803 + * dpni_set_rx_tc_dist() - Set Rx traffic class distribution configuration
7804 + * @mc_io: Pointer to MC portal's I/O object
7805 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7806 + * @token: Token of DPNI object
7807 + * @tc_id: Traffic class selection (0-7)
7808 + * @cfg: Traffic class distribution configuration
7810 + * warning: if 'dist_mode != DPNI_DIST_MODE_NONE', call dpni_prepare_key_cfg()
7811 + * first to prepare the key_cfg_iova parameter
7813 + * Return: '0' on Success; error code otherwise.
7815 +int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
7819 + const struct dpni_rx_tc_dist_cfg *cfg)
7821 + struct mc_command cmd = { 0 };
7822 + struct dpni_cmd_set_rx_tc_dist *cmd_params;
7824 + /* prepare command */
7825 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_TC_DIST,
7828 + cmd_params = (struct dpni_cmd_set_rx_tc_dist *)cmd.params;
7829 + cmd_params->dist_size = cpu_to_le16(cfg->dist_size);
7830 + cmd_params->tc_id = tc_id;
7831 + dpni_set_field(cmd_params->flags, DIST_MODE, cfg->dist_mode);
7832 + dpni_set_field(cmd_params->flags, MISS_ACTION, cfg->fs_cfg.miss_action);
7833 + cmd_params->default_flow_id = cpu_to_le16(cfg->fs_cfg.default_flow_id);
7834 + cmd_params->key_cfg_iova = cpu_to_le64(cfg->key_cfg_iova);
7836 + /* send command to mc*/
7837 + return mc_send_command(mc_io, &cmd);
7841 + * dpni_add_fs_entry() - Add Flow Steering entry for a specific traffic class
7842 + * (to select a flow ID)
7843 + * @mc_io: Pointer to MC portal's I/O object
7844 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7845 + * @token: Token of DPNI object
7846 + * @tc_id: Traffic class selection (0-7)
7847 + * @index: Location in the QoS table where to insert the entry.
7848 + * Only relevant if MASKING is enabled for QoS
7849 + * classification on this DPNI, it is ignored for exact match.
7850 + * @cfg: Flow steering rule to add
7851 + * @action: Action to be taken as result of a classification hit
7853 + * Return: '0' on Success; Error code otherwise.
7855 +int dpni_add_fs_entry(struct fsl_mc_io *mc_io,
7860 + const struct dpni_rule_cfg *cfg,
7861 + const struct dpni_fs_action_cfg *action)
7863 + struct dpni_cmd_add_fs_entry *cmd_params;
7864 + struct mc_command cmd = { 0 };
7866 + /* prepare command */
7867 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_FS_ENT,
7870 + cmd_params = (struct dpni_cmd_add_fs_entry *)cmd.params;
7871 + cmd_params->tc_id = tc_id;
7872 + cmd_params->key_size = cfg->key_size;
7873 + cmd_params->index = cpu_to_le16(index);
7874 + cmd_params->key_iova = cpu_to_le64(cfg->key_iova);
7875 + cmd_params->mask_iova = cpu_to_le64(cfg->mask_iova);
7876 + cmd_params->options = cpu_to_le16(action->options);
7877 + cmd_params->flow_id = cpu_to_le16(action->flow_id);
7878 + cmd_params->flc = cpu_to_le64(action->flc);
7880 + /* send command to mc*/
7881 + return mc_send_command(mc_io, &cmd);
7885 + * dpni_remove_fs_entry() - Remove Flow Steering entry from a specific
7887 + * @mc_io: Pointer to MC portal's I/O object
7888 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7889 + * @token: Token of DPNI object
7890 + * @tc_id: Traffic class selection (0-7)
7891 + * @cfg: Flow steering rule to remove
7893 + * Return: '0' on Success; Error code otherwise.
7895 +int dpni_remove_fs_entry(struct fsl_mc_io *mc_io,
7899 + const struct dpni_rule_cfg *cfg)
7901 + struct dpni_cmd_remove_fs_entry *cmd_params;
7902 + struct mc_command cmd = { 0 };
7904 + /* prepare command */
7905 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_FS_ENT,
7908 + cmd_params = (struct dpni_cmd_remove_fs_entry *)cmd.params;
7909 + cmd_params->tc_id = tc_id;
7910 + cmd_params->key_size = cfg->key_size;
7911 + cmd_params->key_iova = cpu_to_le64(cfg->key_iova);
7912 + cmd_params->mask_iova = cpu_to_le64(cfg->mask_iova);
7914 + /* send command to mc*/
7915 + return mc_send_command(mc_io, &cmd);
7919 + * dpni_set_congestion_notification() - Set traffic class congestion
7920 + * notification configuration
7921 + * @mc_io: Pointer to MC portal's I/O object
7922 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7923 + * @token: Token of DPNI object
7924 + * @qtype: Type of queue - Rx, Tx and Tx confirm types are supported
7925 + * @tc_id: Traffic class selection (0-7)
7926 + * @cfg: congestion notification configuration
7928 + * Return: '0' on Success; error code otherwise.
7930 +int dpni_set_congestion_notification(struct fsl_mc_io *mc_io,
7933 + enum dpni_queue_type qtype,
7935 + const struct dpni_congestion_notification_cfg *cfg)
7937 + struct dpni_cmd_set_congestion_notification *cmd_params;
7938 + struct mc_command cmd = { 0 };
7940 + /* prepare command */
7941 + cmd.header = mc_encode_cmd_header(
7942 + DPNI_CMDID_SET_CONGESTION_NOTIFICATION,
7945 + cmd_params = (struct dpni_cmd_set_congestion_notification *)cmd.params;
7946 + cmd_params->qtype = qtype;
7947 + cmd_params->tc = tc_id;
7948 + cmd_params->dest_id = cpu_to_le32(cfg->dest_cfg.dest_id);
7949 + cmd_params->notification_mode = cpu_to_le16(cfg->notification_mode);
7950 + cmd_params->dest_priority = cfg->dest_cfg.priority;
7951 + dpni_set_field(cmd_params->type_units, DEST_TYPE,
7952 + cfg->dest_cfg.dest_type);
7953 + dpni_set_field(cmd_params->type_units, CONG_UNITS, cfg->units);
7954 + cmd_params->message_iova = cpu_to_le64(cfg->message_iova);
7955 + cmd_params->message_ctx = cpu_to_le64(cfg->message_ctx);
7956 + cmd_params->threshold_entry = cpu_to_le32(cfg->threshold_entry);
7957 + cmd_params->threshold_exit = cpu_to_le32(cfg->threshold_exit);
7959 + /* send command to mc*/
7960 + return mc_send_command(mc_io, &cmd);
7964 + * dpni_set_queue() - Set queue parameters
7965 + * @mc_io: Pointer to MC portal's I/O object
7966 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
7967 + * @token: Token of DPNI object
7968 + * @qtype: Type of queue - all queue types are supported, although
7969 + * the command is ignored for Tx
7970 + * @tc: Traffic class, in range 0 to NUM_TCS - 1
7971 + * @index: Selects the specific queue out of the set allocated for the
7972 + * same TC. Value must be in range 0 to NUM_QUEUES - 1
7973 + * @options: A combination of DPNI_QUEUE_OPT_ values that control what
7974 + * configuration options are set on the queue
7975 + * @queue: Queue structure
7977 + * Return: '0' on Success; Error code otherwise.
7979 +int dpni_set_queue(struct fsl_mc_io *mc_io,
7982 + enum dpni_queue_type qtype,
7986 + const struct dpni_queue *queue)
7988 + struct mc_command cmd = { 0 };
7989 + struct dpni_cmd_set_queue *cmd_params;
7991 + /* prepare command */
7992 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_QUEUE,
7995 + cmd_params = (struct dpni_cmd_set_queue *)cmd.params;
7996 + cmd_params->qtype = qtype;
7997 + cmd_params->tc = tc;
7998 + cmd_params->index = index;
7999 + cmd_params->options = options;
8000 + cmd_params->dest_id = cpu_to_le32(queue->destination.id);
8001 + cmd_params->dest_prio = queue->destination.priority;
8002 + dpni_set_field(cmd_params->flags, DEST_TYPE, queue->destination.type);
8003 + dpni_set_field(cmd_params->flags, STASH_CTRL, queue->flc.stash_control);
8004 + dpni_set_field(cmd_params->flags, HOLD_ACTIVE,
8005 + queue->destination.hold_active);
8006 + cmd_params->flc = cpu_to_le64(queue->flc.value);
8007 + cmd_params->user_context = cpu_to_le64(queue->user_context);
8009 + /* send command to mc */
8010 + return mc_send_command(mc_io, &cmd);
8014 + * dpni_get_queue() - Get queue parameters
8015 + * @mc_io: Pointer to MC portal's I/O object
8016 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
8017 + * @token: Token of DPNI object
8018 + * @qtype: Type of queue - all queue types are supported
8019 + * @tc: Traffic class, in range 0 to NUM_TCS - 1
8020 + * @index: Selects the specific queue out of the set allocated for the
8021 + * same TC. Value must be in range 0 to NUM_QUEUES - 1
8022 + * @queue: Queue configuration structure
8023 + * @qid: Queue identification
8025 + * Return: '0' on Success; Error code otherwise.
8027 +int dpni_get_queue(struct fsl_mc_io *mc_io,
8030 + enum dpni_queue_type qtype,
8033 + struct dpni_queue *queue,
8034 + struct dpni_queue_id *qid)
8036 + struct mc_command cmd = { 0 };
8037 + struct dpni_cmd_get_queue *cmd_params;
8038 + struct dpni_rsp_get_queue *rsp_params;
8041 + /* prepare command */
8042 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QUEUE,
8045 + cmd_params = (struct dpni_cmd_get_queue *)cmd.params;
8046 + cmd_params->qtype = qtype;
8047 + cmd_params->tc = tc;
8048 + cmd_params->index = index;
8050 + /* send command to mc */
8051 + err = mc_send_command(mc_io, &cmd);
8055 + /* retrieve response parameters */
8056 + rsp_params = (struct dpni_rsp_get_queue *)cmd.params;
8057 + queue->destination.id = le32_to_cpu(rsp_params->dest_id);
8058 + queue->destination.priority = rsp_params->dest_prio;
8059 + queue->destination.type = dpni_get_field(rsp_params->flags,
8061 + queue->flc.stash_control = dpni_get_field(rsp_params->flags,
8063 + queue->destination.hold_active = dpni_get_field(rsp_params->flags,
8065 + queue->flc.value = le64_to_cpu(rsp_params->flc);
8066 + queue->user_context = le64_to_cpu(rsp_params->user_context);
8067 + qid->fqid = le32_to_cpu(rsp_params->fqid);
8068 + qid->qdbin = le16_to_cpu(rsp_params->qdbin);
8074 + * dpni_get_statistics() - Get DPNI statistics
8075 + * @mc_io: Pointer to MC portal's I/O object
8076 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
8077 + * @token: Token of DPNI object
8078 + * @page: Selects the statistics page to retrieve, see
8079 + * DPNI_GET_STATISTICS output. Pages are numbered 0 to 2.
8080 + * @stat: Structure containing the statistics
8082 + * Return: '0' on Success; Error code otherwise.
8084 +int dpni_get_statistics(struct fsl_mc_io *mc_io,
8088 + union dpni_statistics *stat)
8090 + struct mc_command cmd = { 0 };
8091 + struct dpni_cmd_get_statistics *cmd_params;
8092 + struct dpni_rsp_get_statistics *rsp_params;
8095 + /* prepare command */
8096 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_STATISTICS,
8099 + cmd_params = (struct dpni_cmd_get_statistics *)cmd.params;
8100 + cmd_params->page_number = page;
8102 + /* send command to mc */
8103 + err = mc_send_command(mc_io, &cmd);
8107 + /* retrieve response parameters */
8108 + rsp_params = (struct dpni_rsp_get_statistics *)cmd.params;
8109 + for (i = 0; i < DPNI_STATISTICS_CNT; i++)
8110 + stat->raw.counter[i] = le64_to_cpu(rsp_params->counter[i]);
8116 + * dpni_reset_statistics() - Clears DPNI statistics
8117 + * @mc_io: Pointer to MC portal's I/O object
8118 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
8119 + * @token: Token of DPNI object
8121 + * Return: '0' on Success; Error code otherwise.
8123 +int dpni_reset_statistics(struct fsl_mc_io *mc_io,
8127 + struct mc_command cmd = { 0 };
8129 + /* prepare command */
8130 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_RESET_STATISTICS,
8134 + /* send command to mc*/
8135 + return mc_send_command(mc_io, &cmd);
8139 + * dpni_set_taildrop() - Set taildrop per queue or TC
8140 + * @mc_io: Pointer to MC portal's I/O object
8141 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
8142 + * @token: Token of DPNI object
8143 + * @cg_point: Congestion point
8144 + * @q_type: Queue type on which the taildrop is configured.
8145 + * Only Rx queues are supported for now
8146 + * @tc: Traffic class to apply this taildrop to
8147 + * @q_index: Index of the queue if the DPNI supports multiple queues for
8148 + * traffic distribution. Ignored if CONGESTION_POINT is not 0.
8149 + * @taildrop: Taildrop structure
8151 + * Return: '0' on Success; Error code otherwise.
8153 +int dpni_set_taildrop(struct fsl_mc_io *mc_io,
8156 + enum dpni_congestion_point cg_point,
8157 + enum dpni_queue_type qtype,
8160 + struct dpni_taildrop *taildrop)
8162 + struct mc_command cmd = { 0 };
8163 + struct dpni_cmd_set_taildrop *cmd_params;
8165 + /* prepare command */
8166 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TAILDROP,
8169 + cmd_params = (struct dpni_cmd_set_taildrop *)cmd.params;
8170 + cmd_params->congestion_point = cg_point;
8171 + cmd_params->qtype = qtype;
8172 + cmd_params->tc = tc;
8173 + cmd_params->index = index;
8174 + dpni_set_field(cmd_params->enable, ENABLE, taildrop->enable);
8175 + cmd_params->units = taildrop->units;
8176 + cmd_params->threshold = cpu_to_le32(taildrop->threshold);
8178 + /* send command to mc */
8179 + return mc_send_command(mc_io, &cmd);
8183 + * dpni_get_taildrop() - Get taildrop information
8184 + * @mc_io: Pointer to MC portal's I/O object
8185 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
8186 + * @token: Token of DPNI object
8187 + * @cg_point: Congestion point
8188 + * @q_type: Queue type on which the taildrop is configured.
8189 + * Only Rx queues are supported for now
8190 + * @tc: Traffic class to apply this taildrop to
8191 + * @q_index: Index of the queue if the DPNI supports multiple queues for
8192 + * traffic distribution. Ignored if CONGESTION_POINT is not 0.
8193 + * @taildrop: Taildrop structure
8195 + * Return: '0' on Success; Error code otherwise.
8197 +int dpni_get_taildrop(struct fsl_mc_io *mc_io,
8200 + enum dpni_congestion_point cg_point,
8201 + enum dpni_queue_type qtype,
8204 + struct dpni_taildrop *taildrop)
8206 + struct mc_command cmd = { 0 };
8207 + struct dpni_cmd_get_taildrop *cmd_params;
8208 + struct dpni_rsp_get_taildrop *rsp_params;
8211 + /* prepare command */
8212 + cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TAILDROP,
8215 + cmd_params = (struct dpni_cmd_get_taildrop *)cmd.params;
8216 + cmd_params->congestion_point = cg_point;
8217 + cmd_params->qtype = qtype;
8218 + cmd_params->tc = tc;
8219 + cmd_params->index = index;
8221 + /* send command to mc */
8222 + err = mc_send_command(mc_io, &cmd);
8226 + /* retrieve response parameters */
8227 + rsp_params = (struct dpni_rsp_get_taildrop *)cmd.params;
8228 + taildrop->enable = dpni_get_field(rsp_params->enable, ENABLE);
8229 + taildrop->units = rsp_params->units;
8230 + taildrop->threshold = le32_to_cpu(rsp_params->threshold);
8235 +++ b/drivers/staging/fsl-dpaa2/ethernet/dpni.h
8237 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
8238 + * Copyright 2016 NXP
8240 + * Redistribution and use in source and binary forms, with or without
8241 + * modification, are permitted provided that the following conditions are met:
8242 + * * Redistributions of source code must retain the above copyright
8243 + * notice, this list of conditions and the following disclaimer.
8244 + * * Redistributions in binary form must reproduce the above copyright
8245 + * notice, this list of conditions and the following disclaimer in the
8246 + * documentation and/or other materials provided with the distribution.
8247 + * * Neither the name of the above-listed copyright holders nor the
8248 + * names of any contributors may be used to endorse or promote products
8249 + * derived from this software without specific prior written permission.
8252 + * ALTERNATIVELY, this software may be distributed under the terms of the
8253 + * GNU General Public License ("GPL") as published by the Free Software
8254 + * Foundation, either version 2 of that License or (at your option) any
8257 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
8258 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
8259 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
8260 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
8261 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
8262 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
8263 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
8264 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
8265 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
8266 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
8267 + * POSSIBILITY OF SUCH DAMAGE.
8269 +#ifndef __FSL_DPNI_H
8270 +#define __FSL_DPNI_H
8277 + * Data Path Network Interface API
8278 + * Contains initialization APIs and runtime control APIs for DPNI
8281 +/** General DPNI macros */
8284 + * Maximum number of traffic classes
8286 +#define DPNI_MAX_TC 8
8288 + * Maximum number of buffer pools per DPNI
8290 +#define DPNI_MAX_DPBP 8
8293 + * All traffic classes considered; see dpni_set_queue()
8295 +#define DPNI_ALL_TCS (u8)(-1)
8297 + * All flows within traffic class considered; see dpni_set_queue()
8299 +#define DPNI_ALL_TC_FLOWS (u16)(-1)
8301 + * Generate new flow ID; see dpni_set_queue()
8303 +#define DPNI_NEW_FLOW_ID (u16)(-1)
8306 + * Tx traffic is always released to a buffer pool on transmit, there are no
8307 + * resources allocated to have the frames confirmed back to the source after
8310 +#define DPNI_OPT_TX_FRM_RELEASE 0x000001
8312 + * Disables support for MAC address filtering for addresses other than primary
8313 + * MAC address. This affects both unicast and multicast. Promiscuous mode can
8314 + * still be enabled/disabled for both unicast and multicast. If promiscuous mode
8315 + * is disabled, only traffic matching the primary MAC address will be accepted.
8317 +#define DPNI_OPT_NO_MAC_FILTER 0x000002
8319 + * Allocate policers for this DPNI. They can be used to rate-limit traffic per
8320 + * traffic class (TC) basis.
8322 +#define DPNI_OPT_HAS_POLICING 0x000004
8324 + * Congestion can be managed in several ways, allowing the buffer pool to
8325 + * deplete on ingress, taildrop on each queue or use congestion groups for sets
8326 + * of queues. If set, it configures a single congestion groups across all TCs.
8327 + * If reset, a congestion group is allocated for each TC. Only relevant if the
8328 + * DPNI has multiple traffic classes.
8330 +#define DPNI_OPT_SHARED_CONGESTION 0x000008
8332 + * Enables TCAM for Flow Steering and QoS look-ups. If not specified, all
8333 + * look-ups are exact match. Note that TCAM is not available on LS1088 and its
8334 + * variants. Setting this bit on these SoCs will trigger an error.
8336 +#define DPNI_OPT_HAS_KEY_MASKING 0x000010
8338 + * Disables the flow steering table.
8340 +#define DPNI_OPT_NO_FS 0x000020
8342 +int dpni_open(struct fsl_mc_io *mc_io,
8347 +int dpni_close(struct fsl_mc_io *mc_io,
8352 + * struct dpni_pools_cfg - Structure representing buffer pools configuration
8353 + * @num_dpbp: Number of DPBPs
8354 + * @pools: Array of buffer pools parameters; The number of valid entries
8355 + * must match 'num_dpbp' value
8357 +struct dpni_pools_cfg {
8360 + * struct pools - Buffer pools parameters
8361 + * @dpbp_id: DPBP object ID
8362 + * @buffer_size: Buffer size
8363 + * @backup_pool: Backup pool
8369 + } pools[DPNI_MAX_DPBP];
8372 +int dpni_set_pools(struct fsl_mc_io *mc_io,
8375 + const struct dpni_pools_cfg *cfg);
8377 +int dpni_enable(struct fsl_mc_io *mc_io,
8381 +int dpni_disable(struct fsl_mc_io *mc_io,
8385 +int dpni_is_enabled(struct fsl_mc_io *mc_io,
8390 +int dpni_reset(struct fsl_mc_io *mc_io,
8395 + * DPNI IRQ Index and Events
8401 +#define DPNI_IRQ_INDEX 0
8403 + * IRQ event - indicates a change in link state
8405 +#define DPNI_IRQ_EVENT_LINK_CHANGED 0x00000001
8407 +int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
8413 +int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
8419 +int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
8425 +int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
8431 +int dpni_get_irq_status(struct fsl_mc_io *mc_io,
8437 +int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
8444 + * struct dpni_attr - Structure representing DPNI attributes
8445 + * @options: Any combination of the following options:
8446 + * DPNI_OPT_TX_FRM_RELEASE
8447 + * DPNI_OPT_NO_MAC_FILTER
8448 + * DPNI_OPT_HAS_POLICING
8449 + * DPNI_OPT_SHARED_CONGESTION
8450 + * DPNI_OPT_HAS_KEY_MASKING
8452 + * @num_queues: Number of Tx and Rx queues used for traffic distribution.
8453 + * @num_tcs: Number of traffic classes (TCs), reserved for the DPNI.
8454 + * @mac_filter_entries: Number of entries in the MAC address filtering table.
8455 + * @vlan_filter_entries: Number of entries in the VLAN address filtering table.
8456 + * @qos_entries: Number of entries in the QoS classification table.
8457 + * @fs_entries: Number of entries in the flow steering table.
8458 + * @qos_key_size: Size, in bytes, of the QoS look-up key. Defining a key larger
8459 + * than this when adding QoS entries will result in an error.
8460 + * @fs_key_size: Size, in bytes, of the flow steering look-up key. Defining a
8461 + * key larger than this when composing the hash + FS key will
8462 + * result in an error.
8463 + * @wriop_version: Version of WRIOP HW block. The 3 version values are stored
8464 + * on 6, 5, 5 bits respectively.
8470 + u8 mac_filter_entries;
8471 + u8 vlan_filter_entries;
8476 + u16 wriop_version;
8479 +int dpni_get_attributes(struct fsl_mc_io *mc_io,
8482 + struct dpni_attr *attr);
8489 + * Extract out of frame header error
8491 +#define DPNI_ERROR_EOFHE 0x00020000
8493 + * Frame length error
8495 +#define DPNI_ERROR_FLE 0x00002000
8497 + * Frame physical error
8499 +#define DPNI_ERROR_FPE 0x00001000
8501 + * Parsing header error
8503 +#define DPNI_ERROR_PHE 0x00000020
8505 + * Parser L3 checksum error
8507 +#define DPNI_ERROR_L3CE 0x00000004
8509 + * Parser L3 checksum error
8511 +#define DPNI_ERROR_L4CE 0x00000001
8514 + * enum dpni_error_action - Defines DPNI behavior for errors
8515 + * @DPNI_ERROR_ACTION_DISCARD: Discard the frame
8516 + * @DPNI_ERROR_ACTION_CONTINUE: Continue with the normal flow
8517 + * @DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE: Send the frame to the error queue
8519 +enum dpni_error_action {
8520 + DPNI_ERROR_ACTION_DISCARD = 0,
8521 + DPNI_ERROR_ACTION_CONTINUE = 1,
8522 + DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE = 2
8526 + * struct dpni_error_cfg - Structure representing DPNI errors treatment
8527 + * @errors: Errors mask; use 'DPNI_ERROR__<X>
8528 + * @error_action: The desired action for the errors mask
8529 + * @set_frame_annotation: Set to '1' to mark the errors in frame annotation
8530 + * status (FAS); relevant only for the non-discard action
8532 +struct dpni_error_cfg {
8534 + enum dpni_error_action error_action;
8535 + int set_frame_annotation;
8538 +int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
8541 + struct dpni_error_cfg *cfg);
8544 + * DPNI buffer layout modification options
8548 + * Select to modify the time-stamp setting
8550 +#define DPNI_BUF_LAYOUT_OPT_TIMESTAMP 0x00000001
8552 + * Select to modify the parser-result setting; not applicable for Tx
8554 +#define DPNI_BUF_LAYOUT_OPT_PARSER_RESULT 0x00000002
8556 + * Select to modify the frame-status setting
8558 +#define DPNI_BUF_LAYOUT_OPT_FRAME_STATUS 0x00000004
8560 + * Select to modify the private-data-size setting
8562 +#define DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE 0x00000008
8564 + * Select to modify the data-alignment setting
8566 +#define DPNI_BUF_LAYOUT_OPT_DATA_ALIGN 0x00000010
8568 + * Select to modify the data-head-room setting
8570 +#define DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM 0x00000020
8572 + * Select to modify the data-tail-room setting
8574 +#define DPNI_BUF_LAYOUT_OPT_DATA_TAIL_ROOM 0x00000040
8577 + * struct dpni_buffer_layout - Structure representing DPNI buffer layout
8578 + * @options: Flags representing the suggested modifications to the buffer
8579 + * layout; Use any combination of 'DPNI_BUF_LAYOUT_OPT_<X>' flags
8580 + * @pass_timestamp: Pass timestamp value
8581 + * @pass_parser_result: Pass parser results
8582 + * @pass_frame_status: Pass frame status
8583 + * @private_data_size: Size kept for private data (in bytes)
8584 + * @data_align: Data alignment
8585 + * @data_head_room: Data head room
8586 + * @data_tail_room: Data tail room
8588 +struct dpni_buffer_layout {
8590 + int pass_timestamp;
8591 + int pass_parser_result;
8592 + int pass_frame_status;
8593 + u16 private_data_size;
8595 + u16 data_head_room;
8596 + u16 data_tail_room;
8600 + * enum dpni_queue_type - Identifies a type of queue targeted by the command
8601 + * @DPNI_QUEUE_RX: Rx queue
8602 + * @DPNI_QUEUE_TX: Tx queue
8603 + * @DPNI_QUEUE_TX_CONFIRM: Tx confirmation queue
8604 + * @DPNI_QUEUE_RX_ERR: Rx error queue
8605 + */enum dpni_queue_type {
8608 + DPNI_QUEUE_TX_CONFIRM,
8609 + DPNI_QUEUE_RX_ERR,
8612 +int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
8615 + enum dpni_queue_type qtype,
8616 + struct dpni_buffer_layout *layout);
8618 +int dpni_set_buffer_layout(struct fsl_mc_io *mc_io,
8621 + enum dpni_queue_type qtype,
8622 + const struct dpni_buffer_layout *layout);
8625 + * enum dpni_offload - Identifies a type of offload targeted by the command
8626 + * @DPNI_OFF_RX_L3_CSUM: Rx L3 checksum validation
8627 + * @DPNI_OFF_RX_L4_CSUM: Rx L4 checksum validation
8628 + * @DPNI_OFF_TX_L3_CSUM: Tx L3 checksum generation
8629 + * @DPNI_OFF_TX_L4_CSUM: Tx L4 checksum generation
8631 +enum dpni_offload {
8632 + DPNI_OFF_RX_L3_CSUM,
8633 + DPNI_OFF_RX_L4_CSUM,
8634 + DPNI_OFF_TX_L3_CSUM,
8635 + DPNI_OFF_TX_L4_CSUM,
8638 +int dpni_set_offload(struct fsl_mc_io *mc_io,
8641 + enum dpni_offload type,
8644 +int dpni_get_offload(struct fsl_mc_io *mc_io,
8647 + enum dpni_offload type,
8650 +int dpni_get_qdid(struct fsl_mc_io *mc_io,
8653 + enum dpni_queue_type qtype,
8656 +int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,
8659 + u16 *data_offset);
8661 +#define DPNI_STATISTICS_CNT 7
8663 +union dpni_statistics {
8665 + * struct page_0 - Page_0 statistics structure
8666 + * @ingress_all_frames: Ingress frame count
8667 + * @ingress_all_bytes: Ingress byte count
8668 + * @ingress_multicast_frames: Ingress multicast frame count
8669 + * @ingress_multicast_bytes: Ingress multicast byte count
8670 + * @ingress_broadcast_frames: Ingress broadcast frame count
8671 + * @ingress_broadcast_bytes: Ingress broadcast byte count
8674 + u64 ingress_all_frames;
8675 + u64 ingress_all_bytes;
8676 + u64 ingress_multicast_frames;
8677 + u64 ingress_multicast_bytes;
8678 + u64 ingress_broadcast_frames;
8679 + u64 ingress_broadcast_bytes;
8682 + * struct page_1 - Page_1 statistics structure
8683 + * @egress_all_frames: Egress frame count
8684 + * @egress_all_bytes: Egress byte count
8685 + * @egress_multicast_frames: Egress multicast frame count
8686 + * @egress_multicast_bytes: Egress multicast byte count
8687 + * @egress_broadcast_frames: Egress broadcast frame count
8688 + * @egress_broadcast_bytes: Egress broadcast byte count
8691 + u64 egress_all_frames;
8692 + u64 egress_all_bytes;
8693 + u64 egress_multicast_frames;
8694 + u64 egress_multicast_bytes;
8695 + u64 egress_broadcast_frames;
8696 + u64 egress_broadcast_bytes;
8699 + * struct page_2 - Page_2 statistics structure
8700 + * @ingress_filtered_frames: Ingress filtered frame count
8701 + * @ingress_discarded_frames: Ingress discarded frame count
8702 + * @ingress_nobuffer_discards: Ingress discarded frame count
8703 + * due to lack of buffers
8704 + * @egress_discarded_frames: Egress discarded frame count
8705 + * @egress_confirmed_frames: Egress confirmed frame count
8708 + u64 ingress_filtered_frames;
8709 + u64 ingress_discarded_frames;
8710 + u64 ingress_nobuffer_discards;
8711 + u64 egress_discarded_frames;
8712 + u64 egress_confirmed_frames;
8715 + * struct raw - raw statistics structure
8718 + u64 counter[DPNI_STATISTICS_CNT];
8722 +int dpni_get_statistics(struct fsl_mc_io *mc_io,
8726 + union dpni_statistics *stat);
8728 +int dpni_reset_statistics(struct fsl_mc_io *mc_io,
8733 + * Enable auto-negotiation
8735 +#define DPNI_LINK_OPT_AUTONEG 0x0000000000000001ULL
8737 + * Enable half-duplex mode
8739 +#define DPNI_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
8741 + * Enable pause frames
8743 +#define DPNI_LINK_OPT_PAUSE 0x0000000000000004ULL
8745 + * Enable a-symmetric pause frames
8747 +#define DPNI_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
8750 + * struct - Structure representing DPNI link configuration
8752 + * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
8754 +struct dpni_link_cfg {
8759 +int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
8762 + const struct dpni_link_cfg *cfg);
8765 + * struct dpni_link_state - Structure representing DPNI link state
8767 + * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
8768 + * @up: Link state; '0' for down, '1' for up
8770 +struct dpni_link_state {
8776 +int dpni_get_link_state(struct fsl_mc_io *mc_io,
8779 + struct dpni_link_state *state);
8782 + * struct dpni_tx_shaping - Structure representing DPNI tx shaping configuration
8783 + * @rate_limit: rate in Mbps
8784 + * @max_burst_size: burst size in bytes (up to 64KB)
8786 +struct dpni_tx_shaping_cfg {
8788 + u16 max_burst_size;
8791 +int dpni_set_tx_shaping(struct fsl_mc_io *mc_io,
8794 + const struct dpni_tx_shaping_cfg *tx_shaper);
8796 +int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
8799 + u16 max_frame_length);
8801 +int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
8804 + u16 *max_frame_length);
8806 +int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
8811 +int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
8816 +int dpni_set_unicast_promisc(struct fsl_mc_io *mc_io,
8821 +int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
8826 +int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
8829 + const u8 mac_addr[6]);
8831 +int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
8836 +int dpni_get_port_mac_addr(struct fsl_mc_io *mc_io,
8841 +int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
8844 + const u8 mac_addr[6]);
8846 +int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
8849 + const u8 mac_addr[6]);
8851 +int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
8858 + * enum dpni_dist_mode - DPNI distribution mode
8859 + * @DPNI_DIST_MODE_NONE: No distribution
8860 + * @DPNI_DIST_MODE_HASH: Use hash distribution; only relevant if
8861 + * the 'DPNI_OPT_DIST_HASH' option was set at DPNI creation
8862 + * @DPNI_DIST_MODE_FS: Use explicit flow steering; only relevant if
8863 + * the 'DPNI_OPT_DIST_FS' option was set at DPNI creation
8865 +enum dpni_dist_mode {
8866 + DPNI_DIST_MODE_NONE = 0,
8867 + DPNI_DIST_MODE_HASH = 1,
8868 + DPNI_DIST_MODE_FS = 2
8872 + * enum dpni_fs_miss_action - DPNI Flow Steering miss action
8873 + * @DPNI_FS_MISS_DROP: In case of no-match, drop the frame
8874 + * @DPNI_FS_MISS_EXPLICIT_FLOWID: In case of no-match, use explicit flow-id
8875 + * @DPNI_FS_MISS_HASH: In case of no-match, distribute using hash
8877 +enum dpni_fs_miss_action {
8878 + DPNI_FS_MISS_DROP = 0,
8879 + DPNI_FS_MISS_EXPLICIT_FLOWID = 1,
8880 + DPNI_FS_MISS_HASH = 2
8884 + * struct dpni_fs_tbl_cfg - Flow Steering table configuration
8885 + * @miss_action: Miss action selection
8886 + * @default_flow_id: Used when 'miss_action = DPNI_FS_MISS_EXPLICIT_FLOWID'
8888 +struct dpni_fs_tbl_cfg {
8889 + enum dpni_fs_miss_action miss_action;
8890 + u16 default_flow_id;
8893 +int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
8897 + * struct dpni_rx_tc_dist_cfg - Rx traffic class distribution configuration
8898 + * @dist_size: Set the distribution size;
8899 + * supported values: 1,2,3,4,6,7,8,12,14,16,24,28,32,48,56,64,96,
8900 + * 112,128,192,224,256,384,448,512,768,896,1024
8901 + * @dist_mode: Distribution mode
8902 + * @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with
8903 + * the extractions to be used for the distribution key by calling
8904 + * dpni_prepare_key_cfg() relevant only when
8905 + * 'dist_mode != DPNI_DIST_MODE_NONE', otherwise it can be '0'
8906 + * @fs_cfg: Flow Steering table configuration; only relevant if
8907 + * 'dist_mode = DPNI_DIST_MODE_FS'
8909 +struct dpni_rx_tc_dist_cfg {
8911 + enum dpni_dist_mode dist_mode;
8913 + struct dpni_fs_tbl_cfg fs_cfg;
8916 +int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
8920 + const struct dpni_rx_tc_dist_cfg *cfg);
8923 + * enum dpni_dest - DPNI destination types
8924 + * @DPNI_DEST_NONE: Unassigned destination; The queue is set in parked mode and
8925 + * does not generate FQDAN notifications; user is expected to
8926 + * dequeue from the queue based on polling or other user-defined
8928 + * @DPNI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN
8929 + * notifications to the specified DPIO; user is expected to dequeue
8930 + * from the queue only after notification is received
8931 + * @DPNI_DEST_DPCON: The queue is set in schedule mode and does not generate
8932 + * FQDAN notifications, but is connected to the specified DPCON
8933 + * object; user is expected to dequeue from the DPCON channel
8936 + DPNI_DEST_NONE = 0,
8937 + DPNI_DEST_DPIO = 1,
8938 + DPNI_DEST_DPCON = 2
8942 + * struct dpni_queue - Queue structure
8943 + * @user_context: User data, presented to the user along with any frames from
8944 + * this queue. Not relevant for Tx queues.
8946 +struct dpni_queue {
8948 + * struct destination - Destination structure
8949 + * @id: ID of the destination, only relevant if DEST_TYPE is > 0.
8950 + * Identifies either a DPIO or a DPCON object. Not relevant for
8952 + * @type: May be one of the following:
8953 + * 0 - No destination, queue can be manually queried, but will not
8954 + * push traffic or notifications to a DPIO;
8955 + * 1 - The destination is a DPIO. When traffic becomes available in
8956 + * the queue a FQDAN (FQ data available notification) will be
8957 + * generated to selected DPIO;
8958 + * 2 - The destination is a DPCON. The queue is associated with a
8959 + * DPCON object for the purpose of scheduling between multiple
8960 + * queues. The DPCON may be independently configured to
8961 + * generate notifications. Not relevant for Tx queues.
8962 + * @hold_active: Hold active, maintains a queue scheduled for longer
8963 + * in a DPIO during dequeue to reduce spread of traffic.
8964 + * Only relevant if queues are not affined to a single DPIO.
8968 + enum dpni_dest type;
8975 + char stash_control;
8980 + * struct dpni_queue_id - Queue identification, used for enqueue commands
8981 + * or queue control
8982 + * @fqid: FQID used for enqueueing to and/or configuration of this specific FQ
8983 + * @qdbin: Queueing bin, used to enqueue using QDID, DQBIN, QPRI. Only relevant
8986 +struct dpni_queue_id {
8992 + * Set User Context
8994 +#define DPNI_QUEUE_OPT_USER_CTX 0x00000001
8995 +#define DPNI_QUEUE_OPT_DEST 0x00000002
8996 +#define DPNI_QUEUE_OPT_FLC 0x00000004
8997 +#define DPNI_QUEUE_OPT_HOLD_ACTIVE 0x00000008
8999 +int dpni_set_queue(struct fsl_mc_io *mc_io,
9002 + enum dpni_queue_type qtype,
9006 + const struct dpni_queue *queue);
9008 +int dpni_get_queue(struct fsl_mc_io *mc_io,
9011 + enum dpni_queue_type qtype,
9014 + struct dpni_queue *queue,
9015 + struct dpni_queue_id *qid);
9018 + * enum dpni_congestion_unit - DPNI congestion units
9019 + * @DPNI_CONGESTION_UNIT_BYTES: bytes units
9020 + * @DPNI_CONGESTION_UNIT_FRAMES: frames units
9022 +enum dpni_congestion_unit {
9023 + DPNI_CONGESTION_UNIT_BYTES = 0,
9024 + DPNI_CONGESTION_UNIT_FRAMES
9028 + * enum dpni_congestion_point - Structure representing congestion point
9029 + * @DPNI_CP_QUEUE: Set taildrop per queue, identified by QUEUE_TYPE, TC and
9031 + * @DPNI_CP_GROUP: Set taildrop per queue group. Depending on options used to
9032 + * define the DPNI this can be either per TC (default) or per
9033 + * interface (DPNI_OPT_SHARED_CONGESTION set at DPNI create).
9034 + * QUEUE_INDEX is ignored if this type is used.
9036 +enum dpni_congestion_point {
9042 + * struct dpni_dest_cfg - Structure representing DPNI destination parameters
9043 + * @dest_type: Destination type
9044 + * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
9045 + * @priority: Priority selection within the DPIO or DPCON channel; valid values
9046 + * are 0-1 or 0-7, depending on the number of priorities in that
9047 + * channel; not relevant for 'DPNI_DEST_NONE' option
9049 +struct dpni_dest_cfg {
9050 + enum dpni_dest dest_type;
9055 +/* DPNI congestion options */
9058 + * CSCN message is written to message_iova once entering a
9059 + * congestion state (see 'threshold_entry')
9061 +#define DPNI_CONG_OPT_WRITE_MEM_ON_ENTER 0x00000001
9063 + * CSCN message is written to message_iova once exiting a
9064 + * congestion state (see 'threshold_exit')
9066 +#define DPNI_CONG_OPT_WRITE_MEM_ON_EXIT 0x00000002
9068 + * CSCN write will attempt to allocate into a cache (coherent write);
9069 + * valid only if 'DPNI_CONG_OPT_WRITE_MEM_<X>' is selected
9071 +#define DPNI_CONG_OPT_COHERENT_WRITE 0x00000004
9073 + * if 'dest_cfg.dest_type != DPNI_DEST_NONE' CSCN message is sent to
9074 + * DPIO/DPCON's WQ channel once entering a congestion state
9075 + * (see 'threshold_entry')
9077 +#define DPNI_CONG_OPT_NOTIFY_DEST_ON_ENTER 0x00000008
9079 + * if 'dest_cfg.dest_type != DPNI_DEST_NONE' CSCN message is sent to
9080 + * DPIO/DPCON's WQ channel once exiting a congestion state
9081 + * (see 'threshold_exit')
9083 +#define DPNI_CONG_OPT_NOTIFY_DEST_ON_EXIT 0x00000010
9085 + * if 'dest_cfg.dest_type != DPNI_DEST_NONE' when the CSCN is written to the
9086 + * sw-portal's DQRR, the DQRI interrupt is asserted immediately (if enabled)
9088 +#define DPNI_CONG_OPT_INTR_COALESCING_DISABLED 0x00000020
9091 + * struct dpni_congestion_notification_cfg - congestion notification
9093 + * @units: units type
9094 + * @threshold_entry: above this threshold we enter a congestion state.
9095 + * set it to '0' to disable it
9096 + * @threshold_exit: below this threshold we exit the congestion state.
9097 + * @message_ctx: The context that will be part of the CSCN message
9098 + * @message_iova: I/O virtual address (must be in DMA-able memory),
9099 + * must be 16B aligned; valid only if 'DPNI_CONG_OPT_WRITE_MEM_<X>' is
9100 + * contained in 'options'
9101 + * @dest_cfg: CSCN can be send to either DPIO or DPCON WQ channel
9102 + * @notification_mode: Mask of available options; use 'DPNI_CONG_OPT_<X>' values
9105 +struct dpni_congestion_notification_cfg {
9106 + enum dpni_congestion_unit units;
9107 + u32 threshold_entry;
9108 + u32 threshold_exit;
9111 + struct dpni_dest_cfg dest_cfg;
9112 + u16 notification_mode;
9115 +int dpni_set_congestion_notification(struct fsl_mc_io *mc_io,
9118 + enum dpni_queue_type qtype,
9120 + const struct dpni_congestion_notification_cfg *cfg);
9123 + * struct dpni_taildrop - Structure representing the taildrop
9124 + * @enable: Indicates whether the taildrop is active or not.
9125 + * @units: Indicates the unit of THRESHOLD. Queue taildrop only supports
9126 + * byte units, this field is ignored and assumed = 0 if
9127 + * CONGESTION_POINT is 0.
9128 + * @threshold: Threshold value, in units identified by UNITS field. Value 0
9129 + * cannot be used as a valid taildrop threshold, THRESHOLD must
9130 + * be > 0 if the taildrop is enabled.
9132 +struct dpni_taildrop {
9134 + enum dpni_congestion_unit units;
9138 +int dpni_set_taildrop(struct fsl_mc_io *mc_io,
9141 + enum dpni_congestion_point cg_point,
9142 + enum dpni_queue_type q_type,
9145 + struct dpni_taildrop *taildrop);
9147 +int dpni_get_taildrop(struct fsl_mc_io *mc_io,
9150 + enum dpni_congestion_point cg_point,
9151 + enum dpni_queue_type q_type,
9154 + struct dpni_taildrop *taildrop);
9157 + * struct dpni_rule_cfg - Rule configuration for table lookup
9158 + * @key_iova: I/O virtual address of the key (must be in DMA-able memory)
9159 + * @mask_iova: I/O virtual address of the mask (must be in DMA-able memory)
9160 + * @key_size: key and mask size (in bytes)
9162 +struct dpni_rule_cfg {
9169 + * Discard matching traffic. If set, this takes precedence over any other
9170 + * configuration and matching traffic is always discarded.
9172 + #define DPNI_FS_OPT_DISCARD 0x1
9175 + * Set FLC value. If set, flc member of truct dpni_fs_action_cfg is used to
9176 + * override the FLC value set per queue.
9177 + * For more details check the Frame Descriptor section in the hardware
9180 +#define DPNI_FS_OPT_SET_FLC 0x2
9183 + * Indicates whether the 6 lowest significant bits of FLC are used for stash
9184 + * control. If set, the 6 least significant bits in value are interpreted as
9186 + * - bits 0-1: indicates the number of 64 byte units of context that are
9187 + * stashed. FLC value is interpreted as a memory address in this case,
9188 + * excluding the 6 LS bits.
9189 + * - bits 2-3: indicates the number of 64 byte units of frame annotation
9190 + * to be stashed. Annotation is placed at FD[ADDR].
9191 + * - bits 4-5: indicates the number of 64 byte units of frame data to be
9192 + * stashed. Frame data is placed at FD[ADDR] + FD[OFFSET].
9193 + * This flag is ignored if DPNI_FS_OPT_SET_FLC is not specified.
9195 +#define DPNI_FS_OPT_SET_STASH_CONTROL 0x4
9198 + * struct dpni_fs_action_cfg - Action configuration for table look-up
9199 + * @flc: FLC value for traffic matching this rule. Please check the Frame
9200 + * Descriptor section in the hardware documentation for more information.
9201 + * @flow_id: Identifies the Rx queue used for matching traffic. Supported
9202 + * values are in range 0 to num_queue-1.
9203 + * @options: Any combination of DPNI_FS_OPT_ values.
9205 +struct dpni_fs_action_cfg {
9211 +int dpni_add_fs_entry(struct fsl_mc_io *mc_io,
9216 + const struct dpni_rule_cfg *cfg,
9217 + const struct dpni_fs_action_cfg *action);
9219 +int dpni_remove_fs_entry(struct fsl_mc_io *mc_io,
9223 + const struct dpni_rule_cfg *cfg);
9225 +#endif /* __FSL_DPNI_H */
9227 +++ b/drivers/staging/fsl-dpaa2/ethernet/net.h
9229 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
9231 + * Redistribution and use in source and binary forms, with or without
9232 + * modification, are permitted provided that the following conditions are met:
9233 + * * Redistributions of source code must retain the above copyright
9234 + * notice, this list of conditions and the following disclaimer.
9235 + * * Redistributions in binary form must reproduce the above copyright
9236 + * notice, this list of conditions and the following disclaimer in the
9237 + * documentation and/or other materials provided with the distribution.
9238 + * * Neither the name of the above-listed copyright holders nor the
9239 + * names of any contributors may be used to endorse or promote products
9240 + * derived from this software without specific prior written permission.
9243 + * ALTERNATIVELY, this software may be distributed under the terms of the
9244 + * GNU General Public License ("GPL") as published by the Free Software
9245 + * Foundation, either version 2 of that License or (at your option) any
9248 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
9249 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
9250 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
9251 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
9252 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
9253 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
9254 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
9255 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
9256 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
9257 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
9258 + * POSSIBILITY OF SUCH DAMAGE.
9260 +#ifndef __FSL_NET_H
9261 +#define __FSL_NET_H
9263 +#define LAST_HDR_INDEX 0xFFFFFFFF
9265 +/*****************************************************************************/
9266 +/* Protocol fields */
9267 +/*****************************************************************************/
9269 +/************************* Ethernet fields *********************************/
9270 +#define NH_FLD_ETH_DA (1)
9271 +#define NH_FLD_ETH_SA (NH_FLD_ETH_DA << 1)
9272 +#define NH_FLD_ETH_LENGTH (NH_FLD_ETH_DA << 2)
9273 +#define NH_FLD_ETH_TYPE (NH_FLD_ETH_DA << 3)
9274 +#define NH_FLD_ETH_FINAL_CKSUM (NH_FLD_ETH_DA << 4)
9275 +#define NH_FLD_ETH_PADDING (NH_FLD_ETH_DA << 5)
9276 +#define NH_FLD_ETH_ALL_FIELDS ((NH_FLD_ETH_DA << 6) - 1)
9278 +#define NH_FLD_ETH_ADDR_SIZE 6
9280 +/*************************** VLAN fields ***********************************/
9281 +#define NH_FLD_VLAN_VPRI (1)
9282 +#define NH_FLD_VLAN_CFI (NH_FLD_VLAN_VPRI << 1)
9283 +#define NH_FLD_VLAN_VID (NH_FLD_VLAN_VPRI << 2)
9284 +#define NH_FLD_VLAN_LENGTH (NH_FLD_VLAN_VPRI << 3)
9285 +#define NH_FLD_VLAN_TYPE (NH_FLD_VLAN_VPRI << 4)
9286 +#define NH_FLD_VLAN_ALL_FIELDS ((NH_FLD_VLAN_VPRI << 5) - 1)
9288 +#define NH_FLD_VLAN_TCI (NH_FLD_VLAN_VPRI | \
9289 + NH_FLD_VLAN_CFI | \
9292 +/************************ IP (generic) fields ******************************/
9293 +#define NH_FLD_IP_VER (1)
9294 +#define NH_FLD_IP_DSCP (NH_FLD_IP_VER << 2)
9295 +#define NH_FLD_IP_ECN (NH_FLD_IP_VER << 3)
9296 +#define NH_FLD_IP_PROTO (NH_FLD_IP_VER << 4)
9297 +#define NH_FLD_IP_SRC (NH_FLD_IP_VER << 5)
9298 +#define NH_FLD_IP_DST (NH_FLD_IP_VER << 6)
9299 +#define NH_FLD_IP_TOS_TC (NH_FLD_IP_VER << 7)
9300 +#define NH_FLD_IP_ID (NH_FLD_IP_VER << 8)
9301 +#define NH_FLD_IP_ALL_FIELDS ((NH_FLD_IP_VER << 9) - 1)
9303 +#define NH_FLD_IP_PROTO_SIZE 1
9305 +/***************************** IPV4 fields *********************************/
9306 +#define NH_FLD_IPV4_VER (1)
9307 +#define NH_FLD_IPV4_HDR_LEN (NH_FLD_IPV4_VER << 1)
9308 +#define NH_FLD_IPV4_TOS (NH_FLD_IPV4_VER << 2)
9309 +#define NH_FLD_IPV4_TOTAL_LEN (NH_FLD_IPV4_VER << 3)
9310 +#define NH_FLD_IPV4_ID (NH_FLD_IPV4_VER << 4)
9311 +#define NH_FLD_IPV4_FLAG_D (NH_FLD_IPV4_VER << 5)
9312 +#define NH_FLD_IPV4_FLAG_M (NH_FLD_IPV4_VER << 6)
9313 +#define NH_FLD_IPV4_OFFSET (NH_FLD_IPV4_VER << 7)
9314 +#define NH_FLD_IPV4_TTL (NH_FLD_IPV4_VER << 8)
9315 +#define NH_FLD_IPV4_PROTO (NH_FLD_IPV4_VER << 9)
9316 +#define NH_FLD_IPV4_CKSUM (NH_FLD_IPV4_VER << 10)
9317 +#define NH_FLD_IPV4_SRC_IP (NH_FLD_IPV4_VER << 11)
9318 +#define NH_FLD_IPV4_DST_IP (NH_FLD_IPV4_VER << 12)
9319 +#define NH_FLD_IPV4_OPTS (NH_FLD_IPV4_VER << 13)
9320 +#define NH_FLD_IPV4_OPTS_COUNT (NH_FLD_IPV4_VER << 14)
9321 +#define NH_FLD_IPV4_ALL_FIELDS ((NH_FLD_IPV4_VER << 15) - 1)
9323 +#define NH_FLD_IPV4_ADDR_SIZE 4
9324 +#define NH_FLD_IPV4_PROTO_SIZE 1
9326 +/***************************** IPV6 fields *********************************/
9327 +#define NH_FLD_IPV6_VER (1)
9328 +#define NH_FLD_IPV6_TC (NH_FLD_IPV6_VER << 1)
9329 +#define NH_FLD_IPV6_SRC_IP (NH_FLD_IPV6_VER << 2)
9330 +#define NH_FLD_IPV6_DST_IP (NH_FLD_IPV6_VER << 3)
9331 +#define NH_FLD_IPV6_NEXT_HDR (NH_FLD_IPV6_VER << 4)
9332 +#define NH_FLD_IPV6_FL (NH_FLD_IPV6_VER << 5)
9333 +#define NH_FLD_IPV6_HOP_LIMIT (NH_FLD_IPV6_VER << 6)
9334 +#define NH_FLD_IPV6_ID (NH_FLD_IPV6_VER << 7)
9335 +#define NH_FLD_IPV6_ALL_FIELDS ((NH_FLD_IPV6_VER << 8) - 1)
9337 +#define NH_FLD_IPV6_ADDR_SIZE 16
9338 +#define NH_FLD_IPV6_NEXT_HDR_SIZE 1
9340 +/***************************** ICMP fields *********************************/
9341 +#define NH_FLD_ICMP_TYPE (1)
9342 +#define NH_FLD_ICMP_CODE (NH_FLD_ICMP_TYPE << 1)
9343 +#define NH_FLD_ICMP_CKSUM (NH_FLD_ICMP_TYPE << 2)
9344 +#define NH_FLD_ICMP_ID (NH_FLD_ICMP_TYPE << 3)
9345 +#define NH_FLD_ICMP_SQ_NUM (NH_FLD_ICMP_TYPE << 4)
9346 +#define NH_FLD_ICMP_ALL_FIELDS ((NH_FLD_ICMP_TYPE << 5) - 1)
9348 +#define NH_FLD_ICMP_CODE_SIZE 1
9349 +#define NH_FLD_ICMP_TYPE_SIZE 1
9351 +/***************************** IGMP fields *********************************/
9352 +#define NH_FLD_IGMP_VERSION (1)
9353 +#define NH_FLD_IGMP_TYPE (NH_FLD_IGMP_VERSION << 1)
9354 +#define NH_FLD_IGMP_CKSUM (NH_FLD_IGMP_VERSION << 2)
9355 +#define NH_FLD_IGMP_DATA (NH_FLD_IGMP_VERSION << 3)
9356 +#define NH_FLD_IGMP_ALL_FIELDS ((NH_FLD_IGMP_VERSION << 4) - 1)
9358 +/***************************** TCP fields **********************************/
9359 +#define NH_FLD_TCP_PORT_SRC (1)
9360 +#define NH_FLD_TCP_PORT_DST (NH_FLD_TCP_PORT_SRC << 1)
9361 +#define NH_FLD_TCP_SEQ (NH_FLD_TCP_PORT_SRC << 2)
9362 +#define NH_FLD_TCP_ACK (NH_FLD_TCP_PORT_SRC << 3)
9363 +#define NH_FLD_TCP_OFFSET (NH_FLD_TCP_PORT_SRC << 4)
9364 +#define NH_FLD_TCP_FLAGS (NH_FLD_TCP_PORT_SRC << 5)
9365 +#define NH_FLD_TCP_WINDOW (NH_FLD_TCP_PORT_SRC << 6)
9366 +#define NH_FLD_TCP_CKSUM (NH_FLD_TCP_PORT_SRC << 7)
9367 +#define NH_FLD_TCP_URGPTR (NH_FLD_TCP_PORT_SRC << 8)
9368 +#define NH_FLD_TCP_OPTS (NH_FLD_TCP_PORT_SRC << 9)
9369 +#define NH_FLD_TCP_OPTS_COUNT (NH_FLD_TCP_PORT_SRC << 10)
9370 +#define NH_FLD_TCP_ALL_FIELDS ((NH_FLD_TCP_PORT_SRC << 11) - 1)
9372 +#define NH_FLD_TCP_PORT_SIZE 2
9374 +/***************************** UDP fields **********************************/
9375 +#define NH_FLD_UDP_PORT_SRC (1)
9376 +#define NH_FLD_UDP_PORT_DST (NH_FLD_UDP_PORT_SRC << 1)
9377 +#define NH_FLD_UDP_LEN (NH_FLD_UDP_PORT_SRC << 2)
9378 +#define NH_FLD_UDP_CKSUM (NH_FLD_UDP_PORT_SRC << 3)
9379 +#define NH_FLD_UDP_ALL_FIELDS ((NH_FLD_UDP_PORT_SRC << 4) - 1)
9381 +#define NH_FLD_UDP_PORT_SIZE 2
9383 +/*************************** UDP-lite fields *******************************/
9384 +#define NH_FLD_UDP_LITE_PORT_SRC (1)
9385 +#define NH_FLD_UDP_LITE_PORT_DST (NH_FLD_UDP_LITE_PORT_SRC << 1)
9386 +#define NH_FLD_UDP_LITE_ALL_FIELDS \
9387 + ((NH_FLD_UDP_LITE_PORT_SRC << 2) - 1)
9389 +#define NH_FLD_UDP_LITE_PORT_SIZE 2
9391 +/*************************** UDP-encap-ESP fields **************************/
9392 +#define NH_FLD_UDP_ENC_ESP_PORT_SRC (1)
9393 +#define NH_FLD_UDP_ENC_ESP_PORT_DST (NH_FLD_UDP_ENC_ESP_PORT_SRC << 1)
9394 +#define NH_FLD_UDP_ENC_ESP_LEN (NH_FLD_UDP_ENC_ESP_PORT_SRC << 2)
9395 +#define NH_FLD_UDP_ENC_ESP_CKSUM (NH_FLD_UDP_ENC_ESP_PORT_SRC << 3)
9396 +#define NH_FLD_UDP_ENC_ESP_SPI (NH_FLD_UDP_ENC_ESP_PORT_SRC << 4)
9397 +#define NH_FLD_UDP_ENC_ESP_SEQUENCE_NUM (NH_FLD_UDP_ENC_ESP_PORT_SRC << 5)
9398 +#define NH_FLD_UDP_ENC_ESP_ALL_FIELDS \
9399 + ((NH_FLD_UDP_ENC_ESP_PORT_SRC << 6) - 1)
9401 +#define NH_FLD_UDP_ENC_ESP_PORT_SIZE 2
9402 +#define NH_FLD_UDP_ENC_ESP_SPI_SIZE 4
9404 +/***************************** SCTP fields *********************************/
9405 +#define NH_FLD_SCTP_PORT_SRC (1)
9406 +#define NH_FLD_SCTP_PORT_DST (NH_FLD_SCTP_PORT_SRC << 1)
9407 +#define NH_FLD_SCTP_VER_TAG (NH_FLD_SCTP_PORT_SRC << 2)
9408 +#define NH_FLD_SCTP_CKSUM (NH_FLD_SCTP_PORT_SRC << 3)
9409 +#define NH_FLD_SCTP_ALL_FIELDS ((NH_FLD_SCTP_PORT_SRC << 4) - 1)
9411 +#define NH_FLD_SCTP_PORT_SIZE 2
9413 +/***************************** DCCP fields *********************************/
9414 +#define NH_FLD_DCCP_PORT_SRC (1)
9415 +#define NH_FLD_DCCP_PORT_DST (NH_FLD_DCCP_PORT_SRC << 1)
9416 +#define NH_FLD_DCCP_ALL_FIELDS ((NH_FLD_DCCP_PORT_SRC << 2) - 1)
9418 +#define NH_FLD_DCCP_PORT_SIZE 2
9420 +/***************************** IPHC fields *********************************/
9421 +#define NH_FLD_IPHC_CID (1)
9422 +#define NH_FLD_IPHC_CID_TYPE (NH_FLD_IPHC_CID << 1)
9423 +#define NH_FLD_IPHC_HCINDEX (NH_FLD_IPHC_CID << 2)
9424 +#define NH_FLD_IPHC_GEN (NH_FLD_IPHC_CID << 3)
9425 +#define NH_FLD_IPHC_D_BIT (NH_FLD_IPHC_CID << 4)
9426 +#define NH_FLD_IPHC_ALL_FIELDS ((NH_FLD_IPHC_CID << 5) - 1)
9428 +/***************************** SCTP fields *********************************/
9429 +#define NH_FLD_SCTP_CHUNK_DATA_TYPE (1)
9430 +#define NH_FLD_SCTP_CHUNK_DATA_FLAGS (NH_FLD_SCTP_CHUNK_DATA_TYPE << 1)
9431 +#define NH_FLD_SCTP_CHUNK_DATA_LENGTH (NH_FLD_SCTP_CHUNK_DATA_TYPE << 2)
9432 +#define NH_FLD_SCTP_CHUNK_DATA_TSN (NH_FLD_SCTP_CHUNK_DATA_TYPE << 3)
9433 +#define NH_FLD_SCTP_CHUNK_DATA_STREAM_ID (NH_FLD_SCTP_CHUNK_DATA_TYPE << 4)
9434 +#define NH_FLD_SCTP_CHUNK_DATA_STREAM_SQN (NH_FLD_SCTP_CHUNK_DATA_TYPE << 5)
9435 +#define NH_FLD_SCTP_CHUNK_DATA_PAYLOAD_PID (NH_FLD_SCTP_CHUNK_DATA_TYPE << 6)
9436 +#define NH_FLD_SCTP_CHUNK_DATA_UNORDERED (NH_FLD_SCTP_CHUNK_DATA_TYPE << 7)
9437 +#define NH_FLD_SCTP_CHUNK_DATA_BEGGINING (NH_FLD_SCTP_CHUNK_DATA_TYPE << 8)
9438 +#define NH_FLD_SCTP_CHUNK_DATA_END (NH_FLD_SCTP_CHUNK_DATA_TYPE << 9)
9439 +#define NH_FLD_SCTP_CHUNK_DATA_ALL_FIELDS \
9440 + ((NH_FLD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
9442 +/*************************** L2TPV2 fields *********************************/
9443 +#define NH_FLD_L2TPV2_TYPE_BIT (1)
9444 +#define NH_FLD_L2TPV2_LENGTH_BIT (NH_FLD_L2TPV2_TYPE_BIT << 1)
9445 +#define NH_FLD_L2TPV2_SEQUENCE_BIT (NH_FLD_L2TPV2_TYPE_BIT << 2)
9446 +#define NH_FLD_L2TPV2_OFFSET_BIT (NH_FLD_L2TPV2_TYPE_BIT << 3)
9447 +#define NH_FLD_L2TPV2_PRIORITY_BIT (NH_FLD_L2TPV2_TYPE_BIT << 4)
9448 +#define NH_FLD_L2TPV2_VERSION (NH_FLD_L2TPV2_TYPE_BIT << 5)
9449 +#define NH_FLD_L2TPV2_LEN (NH_FLD_L2TPV2_TYPE_BIT << 6)
9450 +#define NH_FLD_L2TPV2_TUNNEL_ID (NH_FLD_L2TPV2_TYPE_BIT << 7)
9451 +#define NH_FLD_L2TPV2_SESSION_ID (NH_FLD_L2TPV2_TYPE_BIT << 8)
9452 +#define NH_FLD_L2TPV2_NS (NH_FLD_L2TPV2_TYPE_BIT << 9)
9453 +#define NH_FLD_L2TPV2_NR (NH_FLD_L2TPV2_TYPE_BIT << 10)
9454 +#define NH_FLD_L2TPV2_OFFSET_SIZE (NH_FLD_L2TPV2_TYPE_BIT << 11)
9455 +#define NH_FLD_L2TPV2_FIRST_BYTE (NH_FLD_L2TPV2_TYPE_BIT << 12)
9456 +#define NH_FLD_L2TPV2_ALL_FIELDS \
9457 + ((NH_FLD_L2TPV2_TYPE_BIT << 13) - 1)
9459 +/*************************** L2TPV3 fields *********************************/
9460 +#define NH_FLD_L2TPV3_CTRL_TYPE_BIT (1)
9461 +#define NH_FLD_L2TPV3_CTRL_LENGTH_BIT (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 1)
9462 +#define NH_FLD_L2TPV3_CTRL_SEQUENCE_BIT (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 2)
9463 +#define NH_FLD_L2TPV3_CTRL_VERSION (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 3)
9464 +#define NH_FLD_L2TPV3_CTRL_LENGTH (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 4)
9465 +#define NH_FLD_L2TPV3_CTRL_CONTROL (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 5)
9466 +#define NH_FLD_L2TPV3_CTRL_SENT (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 6)
9467 +#define NH_FLD_L2TPV3_CTRL_RECV (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 7)
9468 +#define NH_FLD_L2TPV3_CTRL_FIRST_BYTE (NH_FLD_L2TPV3_CTRL_TYPE_BIT << 8)
9469 +#define NH_FLD_L2TPV3_CTRL_ALL_FIELDS \
9470 + ((NH_FLD_L2TPV3_CTRL_TYPE_BIT << 9) - 1)
9472 +#define NH_FLD_L2TPV3_SESS_TYPE_BIT (1)
9473 +#define NH_FLD_L2TPV3_SESS_VERSION (NH_FLD_L2TPV3_SESS_TYPE_BIT << 1)
9474 +#define NH_FLD_L2TPV3_SESS_ID (NH_FLD_L2TPV3_SESS_TYPE_BIT << 2)
9475 +#define NH_FLD_L2TPV3_SESS_COOKIE (NH_FLD_L2TPV3_SESS_TYPE_BIT << 3)
9476 +#define NH_FLD_L2TPV3_SESS_ALL_FIELDS \
9477 + ((NH_FLD_L2TPV3_SESS_TYPE_BIT << 4) - 1)
9479 +/**************************** PPP fields ***********************************/
9480 +#define NH_FLD_PPP_PID (1)
9481 +#define NH_FLD_PPP_COMPRESSED (NH_FLD_PPP_PID << 1)
9482 +#define NH_FLD_PPP_ALL_FIELDS ((NH_FLD_PPP_PID << 2) - 1)
9484 +/************************** PPPoE fields ***********************************/
9485 +#define NH_FLD_PPPOE_VER (1)
9486 +#define NH_FLD_PPPOE_TYPE (NH_FLD_PPPOE_VER << 1)
9487 +#define NH_FLD_PPPOE_CODE (NH_FLD_PPPOE_VER << 2)
9488 +#define NH_FLD_PPPOE_SID (NH_FLD_PPPOE_VER << 3)
9489 +#define NH_FLD_PPPOE_LEN (NH_FLD_PPPOE_VER << 4)
9490 +#define NH_FLD_PPPOE_SESSION (NH_FLD_PPPOE_VER << 5)
9491 +#define NH_FLD_PPPOE_PID (NH_FLD_PPPOE_VER << 6)
9492 +#define NH_FLD_PPPOE_ALL_FIELDS ((NH_FLD_PPPOE_VER << 7) - 1)
9494 +/************************* PPP-Mux fields **********************************/
9495 +#define NH_FLD_PPPMUX_PID (1)
9496 +#define NH_FLD_PPPMUX_CKSUM (NH_FLD_PPPMUX_PID << 1)
9497 +#define NH_FLD_PPPMUX_COMPRESSED (NH_FLD_PPPMUX_PID << 2)
9498 +#define NH_FLD_PPPMUX_ALL_FIELDS ((NH_FLD_PPPMUX_PID << 3) - 1)
9500 +/*********************** PPP-Mux sub-frame fields **************************/
9501 +#define NH_FLD_PPPMUX_SUBFRM_PFF (1)
9502 +#define NH_FLD_PPPMUX_SUBFRM_LXT (NH_FLD_PPPMUX_SUBFRM_PFF << 1)
9503 +#define NH_FLD_PPPMUX_SUBFRM_LEN (NH_FLD_PPPMUX_SUBFRM_PFF << 2)
9504 +#define NH_FLD_PPPMUX_SUBFRM_PID (NH_FLD_PPPMUX_SUBFRM_PFF << 3)
9505 +#define NH_FLD_PPPMUX_SUBFRM_USE_PID (NH_FLD_PPPMUX_SUBFRM_PFF << 4)
9506 +#define NH_FLD_PPPMUX_SUBFRM_ALL_FIELDS \
9507 + ((NH_FLD_PPPMUX_SUBFRM_PFF << 5) - 1)
9509 +/*************************** LLC fields ************************************/
9510 +#define NH_FLD_LLC_DSAP (1)
9511 +#define NH_FLD_LLC_SSAP (NH_FLD_LLC_DSAP << 1)
9512 +#define NH_FLD_LLC_CTRL (NH_FLD_LLC_DSAP << 2)
9513 +#define NH_FLD_LLC_ALL_FIELDS ((NH_FLD_LLC_DSAP << 3) - 1)
9515 +/*************************** NLPID fields **********************************/
9516 +#define NH_FLD_NLPID_NLPID (1)
9517 +#define NH_FLD_NLPID_ALL_FIELDS ((NH_FLD_NLPID_NLPID << 1) - 1)
9519 +/*************************** SNAP fields ***********************************/
9520 +#define NH_FLD_SNAP_OUI (1)
9521 +#define NH_FLD_SNAP_PID (NH_FLD_SNAP_OUI << 1)
9522 +#define NH_FLD_SNAP_ALL_FIELDS ((NH_FLD_SNAP_OUI << 2) - 1)
9524 +/*************************** LLC SNAP fields *******************************/
9525 +#define NH_FLD_LLC_SNAP_TYPE (1)
9526 +#define NH_FLD_LLC_SNAP_ALL_FIELDS ((NH_FLD_LLC_SNAP_TYPE << 1) - 1)
9528 +#define NH_FLD_ARP_HTYPE (1)
9529 +#define NH_FLD_ARP_PTYPE (NH_FLD_ARP_HTYPE << 1)
9530 +#define NH_FLD_ARP_HLEN (NH_FLD_ARP_HTYPE << 2)
9531 +#define NH_FLD_ARP_PLEN (NH_FLD_ARP_HTYPE << 3)
9532 +#define NH_FLD_ARP_OPER (NH_FLD_ARP_HTYPE << 4)
9533 +#define NH_FLD_ARP_SHA (NH_FLD_ARP_HTYPE << 5)
9534 +#define NH_FLD_ARP_SPA (NH_FLD_ARP_HTYPE << 6)
9535 +#define NH_FLD_ARP_THA (NH_FLD_ARP_HTYPE << 7)
9536 +#define NH_FLD_ARP_TPA (NH_FLD_ARP_HTYPE << 8)
9537 +#define NH_FLD_ARP_ALL_FIELDS ((NH_FLD_ARP_HTYPE << 9) - 1)
9539 +/*************************** RFC2684 fields ********************************/
9540 +#define NH_FLD_RFC2684_LLC (1)
9541 +#define NH_FLD_RFC2684_NLPID (NH_FLD_RFC2684_LLC << 1)
9542 +#define NH_FLD_RFC2684_OUI (NH_FLD_RFC2684_LLC << 2)
9543 +#define NH_FLD_RFC2684_PID (NH_FLD_RFC2684_LLC << 3)
9544 +#define NH_FLD_RFC2684_VPN_OUI (NH_FLD_RFC2684_LLC << 4)
9545 +#define NH_FLD_RFC2684_VPN_IDX (NH_FLD_RFC2684_LLC << 5)
9546 +#define NH_FLD_RFC2684_ALL_FIELDS ((NH_FLD_RFC2684_LLC << 6) - 1)
9548 +/*************************** User defined fields ***************************/
9549 +#define NH_FLD_USER_DEFINED_SRCPORT (1)
9550 +#define NH_FLD_USER_DEFINED_PCDID (NH_FLD_USER_DEFINED_SRCPORT << 1)
9551 +#define NH_FLD_USER_DEFINED_ALL_FIELDS \
9552 + ((NH_FLD_USER_DEFINED_SRCPORT << 2) - 1)
9554 +/*************************** Payload fields ********************************/
9555 +#define NH_FLD_PAYLOAD_BUFFER (1)
9556 +#define NH_FLD_PAYLOAD_SIZE (NH_FLD_PAYLOAD_BUFFER << 1)
9557 +#define NH_FLD_MAX_FRM_SIZE (NH_FLD_PAYLOAD_BUFFER << 2)
9558 +#define NH_FLD_MIN_FRM_SIZE (NH_FLD_PAYLOAD_BUFFER << 3)
9559 +#define NH_FLD_PAYLOAD_TYPE (NH_FLD_PAYLOAD_BUFFER << 4)
9560 +#define NH_FLD_FRAME_SIZE (NH_FLD_PAYLOAD_BUFFER << 5)
9561 +#define NH_FLD_PAYLOAD_ALL_FIELDS ((NH_FLD_PAYLOAD_BUFFER << 6) - 1)
9563 +/*************************** GRE fields ************************************/
9564 +#define NH_FLD_GRE_TYPE (1)
9565 +#define NH_FLD_GRE_ALL_FIELDS ((NH_FLD_GRE_TYPE << 1) - 1)
9567 +/*************************** MINENCAP fields *******************************/
9568 +#define NH_FLD_MINENCAP_SRC_IP (1)
9569 +#define NH_FLD_MINENCAP_DST_IP (NH_FLD_MINENCAP_SRC_IP << 1)
9570 +#define NH_FLD_MINENCAP_TYPE (NH_FLD_MINENCAP_SRC_IP << 2)
9571 +#define NH_FLD_MINENCAP_ALL_FIELDS \
9572 + ((NH_FLD_MINENCAP_SRC_IP << 3) - 1)
9574 +/*************************** IPSEC AH fields *******************************/
9575 +#define NH_FLD_IPSEC_AH_SPI (1)
9576 +#define NH_FLD_IPSEC_AH_NH (NH_FLD_IPSEC_AH_SPI << 1)
9577 +#define NH_FLD_IPSEC_AH_ALL_FIELDS ((NH_FLD_IPSEC_AH_SPI << 2) - 1)
9579 +/*************************** IPSEC ESP fields ******************************/
9580 +#define NH_FLD_IPSEC_ESP_SPI (1)
9581 +#define NH_FLD_IPSEC_ESP_SEQUENCE_NUM (NH_FLD_IPSEC_ESP_SPI << 1)
9582 +#define NH_FLD_IPSEC_ESP_ALL_FIELDS ((NH_FLD_IPSEC_ESP_SPI << 2) - 1)
9584 +#define NH_FLD_IPSEC_ESP_SPI_SIZE 4
9586 +/*************************** MPLS fields ***********************************/
9587 +#define NH_FLD_MPLS_LABEL_STACK (1)
9588 +#define NH_FLD_MPLS_LABEL_STACK_ALL_FIELDS \
9589 + ((NH_FLD_MPLS_LABEL_STACK << 1) - 1)
9591 +/*************************** MACSEC fields *********************************/
9592 +#define NH_FLD_MACSEC_SECTAG (1)
9593 +#define NH_FLD_MACSEC_ALL_FIELDS ((NH_FLD_MACSEC_SECTAG << 1) - 1)
9595 +/*************************** GTP fields ************************************/
9596 +#define NH_FLD_GTP_TEID (1)
9598 +/* Protocol options */
9600 +/* Ethernet options */
9601 +#define NH_OPT_ETH_BROADCAST 1
9602 +#define NH_OPT_ETH_MULTICAST 2
9603 +#define NH_OPT_ETH_UNICAST 3
9604 +#define NH_OPT_ETH_BPDU 4
9606 +#define NH_ETH_IS_MULTICAST_ADDR(addr) (addr[0] & 0x01)
9607 +/* also applicable for broadcast */
9610 +#define NH_OPT_VLAN_CFI 1
9613 +#define NH_OPT_IPV4_UNICAST 1
9614 +#define NH_OPT_IPV4_MULTICAST 2
9615 +#define NH_OPT_IPV4_BROADCAST 3
9616 +#define NH_OPT_IPV4_OPTION 4
9617 +#define NH_OPT_IPV4_FRAG 5
9618 +#define NH_OPT_IPV4_INITIAL_FRAG 6
9621 +#define NH_OPT_IPV6_UNICAST 1
9622 +#define NH_OPT_IPV6_MULTICAST 2
9623 +#define NH_OPT_IPV6_OPTION 3
9624 +#define NH_OPT_IPV6_FRAG 4
9625 +#define NH_OPT_IPV6_INITIAL_FRAG 5
9627 +/* General IP options (may be used for any version) */
9628 +#define NH_OPT_IP_FRAG 1
9629 +#define NH_OPT_IP_INITIAL_FRAG 2
9630 +#define NH_OPT_IP_OPTION 3
9632 +/* Minenc. options */
9633 +#define NH_OPT_MINENCAP_SRC_ADDR_PRESENT 1
9636 +#define NH_OPT_GRE_ROUTING_PRESENT 1
9639 +#define NH_OPT_TCP_OPTIONS 1
9640 +#define NH_OPT_TCP_CONTROL_HIGH_BITS 2
9641 +#define NH_OPT_TCP_CONTROL_LOW_BITS 3
9643 +/* CAPWAP options */
9644 +#define NH_OPT_CAPWAP_DTLS 1
9647 + NET_PROT_NONE = 0,
9656 + NET_PROT_UDP_LITE,
9659 + NET_PROT_SCTP_CHUNK_DATA,
9663 + NET_PROT_PPPMUX_SUBFRM,
9665 + NET_PROT_L2TPV3_CTRL,
9666 + NET_PROT_L2TPV3_SESS,
9668 + NET_PROT_LLC_SNAP,
9672 + NET_PROT_IPSEC_AH,
9673 + NET_PROT_IPSEC_ESP,
9674 + NET_PROT_UDP_ENC_ESP, /* RFC 3948 */
9677 + NET_PROT_MINENCAP,
9682 + NET_PROT_CAPWAP_DATA,
9683 + NET_PROT_CAPWAP_CTRL,
9690 + NET_PROT_USER_DEFINED_L2,
9691 + NET_PROT_USER_DEFINED_L3,
9692 + NET_PROT_USER_DEFINED_L4,
9693 + NET_PROT_USER_DEFINED_L5,
9694 + NET_PROT_USER_DEFINED_SHIM1,
9695 + NET_PROT_USER_DEFINED_SHIM2,
9697 + NET_PROT_DUMMY_LAST
9701 +#define NH_IEEE8021Q_ETYPE 0x8100
9702 +#define NH_IEEE8021Q_HDR(etype, pcp, dei, vlan_id) \
9703 + ((((u32)((etype) & 0xFFFF)) << 16) | \
9704 + (((u32)((pcp) & 0x07)) << 13) | \
9705 + (((u32)((dei) & 0x01)) << 12) | \
9706 + (((u32)((vlan_id) & 0xFFF))))
9708 +#endif /* __FSL_NET_H */
9710 +++ b/drivers/staging/fsl-dpaa2/ethsw/Kconfig
9712 +config FSL_DPAA2_ETHSW
9713 + tristate "DPAA2 Ethernet Switch"
9714 + depends on FSL_MC_BUS && FSL_DPAA2
9717 + Prototype driver for DPAA2 Ethernet Switch.
9719 +++ b/drivers/staging/fsl-dpaa2/ethsw/Makefile
9722 +obj-$(CONFIG_FSL_DPAA2_ETHSW) += dpaa2-ethsw.o
9724 +dpaa2-ethsw-objs := switch.o dpsw.o
9727 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
9730 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
9732 +++ b/drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h
9734 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
9736 + * Redistribution and use in source and binary forms, with or without
9737 + * modification, are permitted provided that the following conditions are met:
9738 + * * Redistributions of source code must retain the above copyright
9739 + * notice, this list of conditions and the following disclaimer.
9740 + * * Redistributions in binary form must reproduce the above copyright
9741 + * notice, this list of conditions and the following disclaimer in the
9742 + * documentation and/or other materials provided with the distribution.
9743 + * * Neither the name of the above-listed copyright holders nor the
9744 + * names of any contributors may be used to endorse or promote products
9745 + * derived from this software without specific prior written permission.
9748 + * ALTERNATIVELY, this software may be distributed under the terms of the
9749 + * GNU General Public License ("GPL") as published by the Free Software
9750 + * Foundation, either version 2 of that License or (at your option) any
9753 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
9754 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
9755 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
9756 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
9757 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
9758 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
9759 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
9760 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
9761 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
9762 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
9763 + * POSSIBILITY OF SUCH DAMAGE.
9765 +#ifndef __FSL_DPSW_CMD_H
9766 +#define __FSL_DPSW_CMD_H
9769 +#define DPSW_VER_MAJOR 8
9770 +#define DPSW_VER_MINOR 0
9772 +#define DPSW_CMD_BASE_VERSION 1
9773 +#define DPSW_CMD_ID_OFFSET 4
9775 +#define DPSW_CMD_ID(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_BASE_VERSION)
9778 +#define DPSW_CMDID_CLOSE DPSW_CMD_ID(0x800)
9779 +#define DPSW_CMDID_OPEN DPSW_CMD_ID(0x802)
9781 +#define DPSW_CMDID_GET_API_VERSION DPSW_CMD_ID(0xa02)
9783 +#define DPSW_CMDID_ENABLE DPSW_CMD_ID(0x002)
9784 +#define DPSW_CMDID_DISABLE DPSW_CMD_ID(0x003)
9785 +#define DPSW_CMDID_GET_ATTR DPSW_CMD_ID(0x004)
9786 +#define DPSW_CMDID_RESET DPSW_CMD_ID(0x005)
9787 +#define DPSW_CMDID_IS_ENABLED DPSW_CMD_ID(0x006)
9789 +#define DPSW_CMDID_SET_IRQ DPSW_CMD_ID(0x010)
9790 +#define DPSW_CMDID_GET_IRQ DPSW_CMD_ID(0x011)
9791 +#define DPSW_CMDID_SET_IRQ_ENABLE DPSW_CMD_ID(0x012)
9792 +#define DPSW_CMDID_GET_IRQ_ENABLE DPSW_CMD_ID(0x013)
9793 +#define DPSW_CMDID_SET_IRQ_MASK DPSW_CMD_ID(0x014)
9794 +#define DPSW_CMDID_GET_IRQ_MASK DPSW_CMD_ID(0x015)
9795 +#define DPSW_CMDID_GET_IRQ_STATUS DPSW_CMD_ID(0x016)
9796 +#define DPSW_CMDID_CLEAR_IRQ_STATUS DPSW_CMD_ID(0x017)
9798 +#define DPSW_CMDID_SET_REFLECTION_IF DPSW_CMD_ID(0x022)
9800 +#define DPSW_CMDID_ADD_CUSTOM_TPID DPSW_CMD_ID(0x024)
9802 +#define DPSW_CMDID_REMOVE_CUSTOM_TPID DPSW_CMD_ID(0x026)
9804 +#define DPSW_CMDID_IF_SET_TCI DPSW_CMD_ID(0x030)
9805 +#define DPSW_CMDID_IF_SET_STP DPSW_CMD_ID(0x031)
9806 +#define DPSW_CMDID_IF_SET_ACCEPTED_FRAMES DPSW_CMD_ID(0x032)
9807 +#define DPSW_CMDID_SET_IF_ACCEPT_ALL_VLAN DPSW_CMD_ID(0x033)
9808 +#define DPSW_CMDID_IF_GET_COUNTER DPSW_CMD_ID(0x034)
9809 +#define DPSW_CMDID_IF_SET_COUNTER DPSW_CMD_ID(0x035)
9810 +#define DPSW_CMDID_IF_SET_TX_SELECTION DPSW_CMD_ID(0x036)
9811 +#define DPSW_CMDID_IF_ADD_REFLECTION DPSW_CMD_ID(0x037)
9812 +#define DPSW_CMDID_IF_REMOVE_REFLECTION DPSW_CMD_ID(0x038)
9813 +#define DPSW_CMDID_IF_SET_FLOODING_METERING DPSW_CMD_ID(0x039)
9814 +#define DPSW_CMDID_IF_SET_METERING DPSW_CMD_ID(0x03A)
9815 +#define DPSW_CMDID_IF_SET_EARLY_DROP DPSW_CMD_ID(0x03B)
9817 +#define DPSW_CMDID_IF_ENABLE DPSW_CMD_ID(0x03D)
9818 +#define DPSW_CMDID_IF_DISABLE DPSW_CMD_ID(0x03E)
9820 +#define DPSW_CMDID_IF_GET_ATTR DPSW_CMD_ID(0x042)
9822 +#define DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH DPSW_CMD_ID(0x044)
9823 +#define DPSW_CMDID_IF_GET_MAX_FRAME_LENGTH DPSW_CMD_ID(0x045)
9824 +#define DPSW_CMDID_IF_GET_LINK_STATE DPSW_CMD_ID(0x046)
9825 +#define DPSW_CMDID_IF_SET_FLOODING DPSW_CMD_ID(0x047)
9826 +#define DPSW_CMDID_IF_SET_BROADCAST DPSW_CMD_ID(0x048)
9827 +#define DPSW_CMDID_IF_SET_MULTICAST DPSW_CMD_ID(0x049)
9828 +#define DPSW_CMDID_IF_GET_TCI DPSW_CMD_ID(0x04A)
9830 +#define DPSW_CMDID_IF_SET_LINK_CFG DPSW_CMD_ID(0x04C)
9832 +#define DPSW_CMDID_VLAN_ADD DPSW_CMD_ID(0x060)
9833 +#define DPSW_CMDID_VLAN_ADD_IF DPSW_CMD_ID(0x061)
9834 +#define DPSW_CMDID_VLAN_ADD_IF_UNTAGGED DPSW_CMD_ID(0x062)
9835 +#define DPSW_CMDID_VLAN_ADD_IF_FLOODING DPSW_CMD_ID(0x063)
9836 +#define DPSW_CMDID_VLAN_REMOVE_IF DPSW_CMD_ID(0x064)
9837 +#define DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED DPSW_CMD_ID(0x065)
9838 +#define DPSW_CMDID_VLAN_REMOVE_IF_FLOODING DPSW_CMD_ID(0x066)
9839 +#define DPSW_CMDID_VLAN_REMOVE DPSW_CMD_ID(0x067)
9840 +#define DPSW_CMDID_VLAN_GET_IF DPSW_CMD_ID(0x068)
9841 +#define DPSW_CMDID_VLAN_GET_IF_FLOODING DPSW_CMD_ID(0x069)
9842 +#define DPSW_CMDID_VLAN_GET_IF_UNTAGGED DPSW_CMD_ID(0x06A)
9843 +#define DPSW_CMDID_VLAN_GET_ATTRIBUTES DPSW_CMD_ID(0x06B)
9845 +#define DPSW_CMDID_FDB_GET_MULTICAST DPSW_CMD_ID(0x080)
9846 +#define DPSW_CMDID_FDB_GET_UNICAST DPSW_CMD_ID(0x081)
9847 +#define DPSW_CMDID_FDB_ADD DPSW_CMD_ID(0x082)
9848 +#define DPSW_CMDID_FDB_REMOVE DPSW_CMD_ID(0x083)
9849 +#define DPSW_CMDID_FDB_ADD_UNICAST DPSW_CMD_ID(0x084)
9850 +#define DPSW_CMDID_FDB_REMOVE_UNICAST DPSW_CMD_ID(0x085)
9851 +#define DPSW_CMDID_FDB_ADD_MULTICAST DPSW_CMD_ID(0x086)
9852 +#define DPSW_CMDID_FDB_REMOVE_MULTICAST DPSW_CMD_ID(0x087)
9853 +#define DPSW_CMDID_FDB_SET_LEARNING_MODE DPSW_CMD_ID(0x088)
9854 +#define DPSW_CMDID_FDB_GET_ATTR DPSW_CMD_ID(0x089)
9856 +#define DPSW_CMDID_ACL_ADD DPSW_CMD_ID(0x090)
9857 +#define DPSW_CMDID_ACL_REMOVE DPSW_CMD_ID(0x091)
9858 +#define DPSW_CMDID_ACL_ADD_ENTRY DPSW_CMD_ID(0x092)
9859 +#define DPSW_CMDID_ACL_REMOVE_ENTRY DPSW_CMD_ID(0x093)
9860 +#define DPSW_CMDID_ACL_ADD_IF DPSW_CMD_ID(0x094)
9861 +#define DPSW_CMDID_ACL_REMOVE_IF DPSW_CMD_ID(0x095)
9862 +#define DPSW_CMDID_ACL_GET_ATTR DPSW_CMD_ID(0x096)
9864 +#define DPSW_CMDID_CTRL_IF_GET_ATTR DPSW_CMD_ID(0x0A0)
9865 +#define DPSW_CMDID_CTRL_IF_SET_POOLS DPSW_CMD_ID(0x0A1)
9866 +#define DPSW_CMDID_CTRL_IF_ENABLE DPSW_CMD_ID(0x0A2)
9867 +#define DPSW_CMDID_CTRL_IF_DISABLE DPSW_CMD_ID(0x0A3)
9869 +/* Macros for accessing command fields smaller than 1byte */
9870 +#define DPSW_MASK(field) \
9871 + GENMASK(DPSW_##field##_SHIFT + DPSW_##field##_SIZE - 1, \
9872 + DPSW_##field##_SHIFT)
9873 +#define dpsw_set_field(var, field, val) \
9874 + ((var) |= (((val) << DPSW_##field##_SHIFT) & DPSW_MASK(field)))
9875 +#define dpsw_get_field(var, field) \
9876 + (((var) & DPSW_MASK(field)) >> DPSW_##field##_SHIFT)
9877 +#define dpsw_get_bit(var, bit) \
9878 + (((var) >> (bit)) & GENMASK(0, 0))
9880 +static inline u64 dpsw_set_bit(u64 var, unsigned int bit, u8 val)
9882 + var |= (u64)val << bit & GENMASK(bit, bit);
9886 +struct dpsw_cmd_open {
9890 +#define DPSW_COMPONENT_TYPE_SHIFT 0
9891 +#define DPSW_COMPONENT_TYPE_SIZE 4
9893 +struct dpsw_cmd_create {
9897 + u8 max_meters_per_if;
9898 + /* from LSB: only the first 4 bits */
9899 + u8 component_type;
9903 + __le16 max_fdb_entries;
9904 + __le16 fdb_aging_time;
9905 + __le16 max_fdb_mc_groups;
9910 +struct dpsw_cmd_destroy {
9914 +#define DPSW_ENABLE_SHIFT 0
9915 +#define DPSW_ENABLE_SIZE 1
9917 +struct dpsw_rsp_is_enabled {
9918 + /* from LSB: enable:1 */
9922 +struct dpsw_cmd_set_irq {
9933 +struct dpsw_cmd_get_irq {
9938 +struct dpsw_rsp_get_irq {
9949 +struct dpsw_cmd_set_irq_enable {
9955 +struct dpsw_cmd_get_irq_enable {
9960 +struct dpsw_rsp_get_irq_enable {
9964 +struct dpsw_cmd_set_irq_mask {
9969 +struct dpsw_cmd_get_irq_mask {
9974 +struct dpsw_rsp_get_irq_mask {
9978 +struct dpsw_cmd_get_irq_status {
9983 +struct dpsw_rsp_get_irq_status {
9987 +struct dpsw_cmd_clear_irq_status {
9992 +#define DPSW_COMPONENT_TYPE_SHIFT 0
9993 +#define DPSW_COMPONENT_TYPE_SIZE 4
9995 +struct dpsw_rsp_get_attr {
10000 + __le16 max_vlans;
10001 + __le16 num_vlans;
10003 + __le16 max_fdb_entries;
10004 + __le16 fdb_aging_time;
10008 + __le16 max_fdb_mc_groups;
10009 + u8 max_meters_per_if;
10010 + /* from LSB only the ffirst 4 bits */
10011 + u8 component_type;
10017 +struct dpsw_cmd_set_reflection_if {
10021 +struct dpsw_cmd_if_set_flooding {
10023 + /* from LSB: enable:1 */
10027 +struct dpsw_cmd_if_set_broadcast {
10029 + /* from LSB: enable:1 */
10033 +struct dpsw_cmd_if_set_multicast {
10035 + /* from LSB: enable:1 */
10039 +#define DPSW_VLAN_ID_SHIFT 0
10040 +#define DPSW_VLAN_ID_SIZE 12
10041 +#define DPSW_DEI_SHIFT 12
10042 +#define DPSW_DEI_SIZE 1
10043 +#define DPSW_PCP_SHIFT 13
10044 +#define DPSW_PCP_SIZE 3
10046 +struct dpsw_cmd_if_set_tci {
10048 + /* from LSB: VLAN_ID:12 DEI:1 PCP:3 */
10052 +struct dpsw_cmd_if_get_tci {
10056 +struct dpsw_rsp_if_get_tci {
10063 +#define DPSW_STATE_SHIFT 0
10064 +#define DPSW_STATE_SIZE 4
10066 +struct dpsw_cmd_if_set_stp {
10069 + /* only the first LSB 4 bits */
10073 +#define DPSW_FRAME_TYPE_SHIFT 0
10074 +#define DPSW_FRAME_TYPE_SIZE 4
10075 +#define DPSW_UNACCEPTED_ACT_SHIFT 4
10076 +#define DPSW_UNACCEPTED_ACT_SIZE 4
10078 +struct dpsw_cmd_if_set_accepted_frames {
10080 + /* from LSB: type:4 unaccepted_act:4 */
10084 +#define DPSW_ACCEPT_ALL_SHIFT 0
10085 +#define DPSW_ACCEPT_ALL_SIZE 1
10087 +struct dpsw_cmd_if_set_accept_all_vlan {
10089 + /* only the least significant bit */
10093 +#define DPSW_COUNTER_TYPE_SHIFT 0
10094 +#define DPSW_COUNTER_TYPE_SIZE 5
10096 +struct dpsw_cmd_if_get_counter {
10098 + /* from LSB: type:5 */
10102 +struct dpsw_rsp_if_get_counter {
10107 +struct dpsw_cmd_if_set_counter {
10110 + /* from LSB: type:5 */
10116 +#define DPSW_PRIORITY_SELECTOR_SHIFT 0
10117 +#define DPSW_PRIORITY_SELECTOR_SIZE 3
10118 +#define DPSW_SCHED_MODE_SHIFT 0
10119 +#define DPSW_SCHED_MODE_SIZE 4
10121 +struct dpsw_cmd_if_set_tx_selection {
10123 + /* from LSB: priority_selector:3 */
10124 + u8 priority_selector;
10128 + struct dpsw_tc_sched {
10129 + __le16 delta_bandwidth;
10135 +#define DPSW_FILTER_SHIFT 0
10136 +#define DPSW_FILTER_SIZE 2
10138 +struct dpsw_cmd_if_reflection {
10141 + /* only 2 bits from the LSB */
10145 +#define DPSW_MODE_SHIFT 0
10146 +#define DPSW_MODE_SIZE 4
10147 +#define DPSW_UNITS_SHIFT 4
10148 +#define DPSW_UNITS_SIZE 4
10150 +struct dpsw_cmd_if_set_flooding_metering {
10154 + /* from LSB: mode:4 units:4 */
10164 +struct dpsw_cmd_if_set_metering {
10168 + /* from LSB: mode:4 units:4 */
10178 +#define DPSW_EARLY_DROP_MODE_SHIFT 0
10179 +#define DPSW_EARLY_DROP_MODE_SIZE 2
10180 +#define DPSW_EARLY_DROP_UNIT_SHIFT 2
10181 +#define DPSW_EARLY_DROP_UNIT_SIZE 2
10183 +struct dpsw_prep_early_drop {
10184 + /* from LSB: mode:2 units:2 */
10187 + __le32 tail_drop_threshold;
10188 + u8 green_drop_probability;
10190 + __le64 green_max_threshold;
10191 + __le64 green_min_threshold;
10193 + u8 yellow_drop_probability;
10195 + __le64 yellow_max_threshold;
10196 + __le64 yellow_min_threshold;
10199 +struct dpsw_cmd_if_set_early_drop {
10206 + __le64 early_drop_iova;
10209 +struct dpsw_cmd_custom_tpid {
10214 +struct dpsw_cmd_if {
10218 +#define DPSW_ADMIT_UNTAGGED_SHIFT 0
10219 +#define DPSW_ADMIT_UNTAGGED_SIZE 4
10220 +#define DPSW_ENABLED_SHIFT 5
10221 +#define DPSW_ENABLED_SIZE 1
10222 +#define DPSW_ACCEPT_ALL_VLAN_SHIFT 6
10223 +#define DPSW_ACCEPT_ALL_VLAN_SIZE 1
10225 +struct dpsw_rsp_if_get_attr {
10227 + /* from LSB: admit_untagged:4 enabled:1 accept_all_vlan:1 */
10240 +struct dpsw_cmd_if_set_max_frame_length {
10242 + __le16 frame_length;
10245 +struct dpsw_cmd_if_get_max_frame_length {
10249 +struct dpsw_rsp_if_get_max_frame_length {
10251 + __le16 frame_length;
10254 +struct dpsw_cmd_if_set_link_cfg {
10265 +struct dpsw_cmd_if_get_link_state {
10269 +#define DPSW_UP_SHIFT 0
10270 +#define DPSW_UP_SIZE 1
10272 +struct dpsw_rsp_if_get_link_state {
10284 +struct dpsw_vlan_add {
10289 +struct dpsw_cmd_vlan_manage_if {
10298 +struct dpsw_cmd_vlan_remove {
10303 +struct dpsw_cmd_vlan_get_attr {
10307 +struct dpsw_rsp_vlan_get_attr {
10313 + __le16 num_untagged_ifs;
10314 + __le16 num_flooding_ifs;
10317 +struct dpsw_cmd_vlan_get_if {
10321 +struct dpsw_rsp_vlan_get_if {
10330 +struct dpsw_cmd_vlan_get_if_untagged {
10334 +struct dpsw_rsp_vlan_get_if_untagged {
10343 +struct dpsw_cmd_vlan_get_if_flooding {
10347 +struct dpsw_rsp_vlan_get_if_flooding {
10356 +struct dpsw_cmd_fdb_add {
10358 + __le16 fdb_aging_time;
10359 + __le16 num_fdb_entries;
10362 +struct dpsw_rsp_fdb_add {
10366 +struct dpsw_cmd_fdb_remove {
10370 +#define DPSW_ENTRY_TYPE_SHIFT 0
10371 +#define DPSW_ENTRY_TYPE_SIZE 4
10373 +struct dpsw_cmd_fdb_add_unicast {
10380 + /* only the first 4 bits from LSB */
10384 +struct dpsw_cmd_fdb_get_unicast {
10389 +struct dpsw_rsp_fdb_get_unicast {
10391 + __le16 if_egress;
10392 + /* only first 4 bits from LSB */
10396 +struct dpsw_cmd_fdb_remove_unicast {
10401 + __le16 if_egress;
10402 + /* only the first 4 bits from LSB */
10406 +struct dpsw_cmd_fdb_add_multicast {
10410 + /* only the first 4 bits from LSB */
10420 +struct dpsw_cmd_fdb_get_multicast {
10425 +struct dpsw_rsp_fdb_get_multicast {
10430 + /* only the first 4 bits from LSB */
10437 +struct dpsw_cmd_fdb_remove_multicast {
10441 + /* only the first 4 bits from LSB */
10451 +#define DPSW_LEARNING_MODE_SHIFT 0
10452 +#define DPSW_LEARNING_MODE_SIZE 4
10454 +struct dpsw_cmd_fdb_set_learning_mode {
10456 + /* only the first 4 bits from LSB */
10460 +struct dpsw_cmd_fdb_get_attr {
10464 +struct dpsw_rsp_fdb_get_attr {
10467 + __le16 max_fdb_entries;
10468 + __le16 fdb_aging_time;
10469 + __le16 num_fdb_mc_groups;
10471 + __le16 max_fdb_mc_groups;
10472 + /* only the first 4 bits from LSB */
10473 + u8 learning_mode;
10476 +struct dpsw_cmd_acl_add {
10478 + __le16 max_entries;
10481 +struct dpsw_rsp_acl_add {
10485 +struct dpsw_cmd_acl_remove {
10489 +struct dpsw_prep_acl_entry {
10490 + u8 match_l2_dest_mac[6];
10491 + __le16 match_l2_tpid;
10493 + u8 match_l2_source_mac[6];
10494 + __le16 match_l2_vlan_id;
10496 + __le32 match_l3_dest_ip;
10497 + __le32 match_l3_source_ip;
10499 + __le16 match_l4_dest_port;
10500 + __le16 match_l4_source_port;
10501 + __le16 match_l2_ether_type;
10502 + u8 match_l2_pcp_dei;
10503 + u8 match_l3_dscp;
10505 + u8 mask_l2_dest_mac[6];
10506 + __le16 mask_l2_tpid;
10508 + u8 mask_l2_source_mac[6];
10509 + __le16 mask_l2_vlan_id;
10511 + __le32 mask_l3_dest_ip;
10512 + __le32 mask_l3_source_ip;
10514 + __le16 mask_l4_dest_port;
10515 + __le16 mask_l4_source_port;
10516 + __le16 mask_l2_ether_type;
10517 + u8 mask_l2_pcp_dei;
10520 + u8 match_l3_protocol;
10521 + u8 mask_l3_protocol;
10524 +#define DPSW_RESULT_ACTION_SHIFT 0
10525 +#define DPSW_RESULT_ACTION_SIZE 4
10527 +struct dpsw_cmd_acl_entry {
10529 + __le16 result_if_id;
10530 + __le32 precedence;
10531 + /* from LSB only the first 4 bits */
10532 + u8 result_action;
10538 +struct dpsw_cmd_acl_if {
10547 +struct dpsw_cmd_acl_get_attr {
10551 +struct dpsw_rsp_acl_get_attr {
10555 + __le16 max_entries;
10556 + __le16 num_entries;
10560 +struct dpsw_rsp_ctrl_if_get_attr {
10565 + __le32 rx_err_fqid;
10567 + __le32 tx_err_conf_fqid;
10570 +struct dpsw_cmd_ctrl_if_set_pools {
10572 + /* from LSB: POOL0_BACKUP_POOL:1 ... POOL7_BACKUP_POOL */
10575 + __le32 dpbp_id[8];
10576 + __le16 buffer_size[8];
10579 +struct dpsw_rsp_get_api_version {
10580 + __le16 version_major;
10581 + __le16 version_minor;
10584 +#endif /* __FSL_DPSW_CMD_H */
10586 +++ b/drivers/staging/fsl-dpaa2/ethsw/dpsw.c
10588 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
10590 + * Redistribution and use in source and binary forms, with or without
10591 + * modification, are permitted provided that the following conditions are met:
10592 + * * Redistributions of source code must retain the above copyright
10593 + * notice, this list of conditions and the following disclaimer.
10594 + * * Redistributions in binary form must reproduce the above copyright
10595 + * notice, this list of conditions and the following disclaimer in the
10596 + * documentation and/or other materials provided with the distribution.
10597 + * * Neither the name of the above-listed copyright holders nor the
10598 + * names of any contributors may be used to endorse or promote products
10599 + * derived from this software without specific prior written permission.
10602 + * ALTERNATIVELY, this software may be distributed under the terms of the
10603 + * GNU General Public License ("GPL") as published by the Free Software
10604 + * Foundation, either version 2 of that License or (at your option) any
10607 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10608 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
10609 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
10610 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
10611 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
10612 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
10613 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
10614 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
10615 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
10616 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
10617 + * POSSIBILITY OF SUCH DAMAGE.
10619 +#include "../../fsl-mc/include/mc-sys.h"
10620 +#include "../../fsl-mc/include/mc-cmd.h"
10622 +#include "dpsw-cmd.h"
10624 +static void build_if_id_bitmap(__le64 *bmap,
10626 + const u16 num_ifs) {
10629 + for (i = 0; (i < num_ifs) && (i < DPSW_MAX_IF); i++)
10630 + bmap[id[i] / 64] = dpsw_set_bit(bmap[id[i] / 64],
10635 +static void read_if_id_bitmap(u16 *if_id,
10638 + int bitmap[DPSW_MAX_IF] = { 0 };
10642 + for (i = 0; i < DPSW_MAX_IF; i++) {
10643 + bitmap[i] = dpsw_get_bit(le64_to_cpu(bmap[i / 64]),
10645 + count += bitmap[i];
10648 + *num_ifs = (u16)count;
10650 + for (i = 0; (i < DPSW_MAX_IF) && (j < count); i++) {
10652 + if_id[j] = (u16)i;
10659 + * dpsw_open() - Open a control session for the specified object
10660 + * @mc_io: Pointer to MC portal's I/O object
10661 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10662 + * @dpsw_id: DPSW unique ID
10663 + * @token: Returned token; use in subsequent API calls
10665 + * This function can be used to open a control session for an
10666 + * already created object; an object may have been declared in
10667 + * the DPL or by calling the dpsw_create() function.
10668 + * This function returns a unique authentication token,
10669 + * associated with the specific object ID and the specific MC
10670 + * portal; this token must be used in all subsequent commands for
10671 + * this specific object
10673 + * Return: '0' on Success; Error code otherwise.
10675 +int dpsw_open(struct fsl_mc_io *mc_io,
10680 + struct mc_command cmd = { 0 };
10681 + struct dpsw_cmd_open *cmd_params;
10684 + /* prepare command */
10685 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_OPEN,
10688 + cmd_params = (struct dpsw_cmd_open *)cmd.params;
10689 + cmd_params->dpsw_id = cpu_to_le32(dpsw_id);
10691 + /* send command to mc*/
10692 + err = mc_send_command(mc_io, &cmd);
10696 + /* retrieve response parameters */
10697 + *token = mc_cmd_hdr_read_token(&cmd);
10703 + * dpsw_close() - Close the control session of the object
10704 + * @mc_io: Pointer to MC portal's I/O object
10705 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10706 + * @token: Token of DPSW object
10708 + * After this function is called, no further operations are
10709 + * allowed on the object without opening a new control session.
10711 + * Return: '0' on Success; Error code otherwise.
10713 +int dpsw_close(struct fsl_mc_io *mc_io,
10717 + struct mc_command cmd = { 0 };
10719 + /* prepare command */
10720 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_CLOSE,
10724 + /* send command to mc*/
10725 + return mc_send_command(mc_io, &cmd);
10729 + * dpsw_enable() - Enable DPSW functionality
10730 + * @mc_io: Pointer to MC portal's I/O object
10731 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10732 + * @token: Token of DPSW object
10734 + * Return: Completion status. '0' on Success; Error code otherwise.
10736 +int dpsw_enable(struct fsl_mc_io *mc_io,
10740 + struct mc_command cmd = { 0 };
10742 + /* prepare command */
10743 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ENABLE,
10747 + /* send command to mc*/
10748 + return mc_send_command(mc_io, &cmd);
10752 + * dpsw_disable() - Disable DPSW functionality
10753 + * @mc_io: Pointer to MC portal's I/O object
10754 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10755 + * @token: Token of DPSW object
10757 + * Return: Completion status. '0' on Success; Error code otherwise.
10759 +int dpsw_disable(struct fsl_mc_io *mc_io,
10763 + struct mc_command cmd = { 0 };
10765 + /* prepare command */
10766 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_DISABLE,
10770 + /* send command to mc*/
10771 + return mc_send_command(mc_io, &cmd);
10775 + * dpsw_is_enabled() - Check if the DPSW is enabled
10777 + * @mc_io: Pointer to MC portal's I/O object
10778 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10779 + * @token: Token of DPSW object
10780 + * @en: Returns '1' if object is enabled; '0' otherwise
10782 + * Return: '0' on Success; Error code otherwise
10784 +int dpsw_is_enabled(struct fsl_mc_io *mc_io,
10789 + struct mc_command cmd = { 0 };
10790 + struct dpsw_rsp_is_enabled *cmd_rsp;
10793 + /* prepare command */
10794 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IS_ENABLED, cmd_flags,
10797 + /* send command to mc*/
10798 + err = mc_send_command(mc_io, &cmd);
10802 + /* retrieve response parameters */
10803 + cmd_rsp = (struct dpsw_rsp_is_enabled *)cmd.params;
10804 + *en = dpsw_get_field(cmd_rsp->enabled, ENABLE);
10810 + * dpsw_reset() - Reset the DPSW, returns the object to initial state.
10811 + * @mc_io: Pointer to MC portal's I/O object
10812 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10813 + * @token: Token of DPSW object
10815 + * Return: '0' on Success; Error code otherwise.
10817 +int dpsw_reset(struct fsl_mc_io *mc_io,
10821 + struct mc_command cmd = { 0 };
10823 + /* prepare command */
10824 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_RESET,
10828 + /* send command to mc*/
10829 + return mc_send_command(mc_io, &cmd);
10833 + * dpsw_set_irq() - Set IRQ information for the DPSW to trigger an interrupt.
10834 + * @mc_io: Pointer to MC portal's I/O object
10835 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10836 + * @token: Token of DPSW object
10837 + * @irq_index: Identifies the interrupt index to configure
10838 + * @irq_cfg: IRQ configuration
10840 + * Return: '0' on Success; Error code otherwise.
10842 +int dpsw_set_irq(struct fsl_mc_io *mc_io,
10846 + struct dpsw_irq_cfg *irq_cfg)
10848 + struct mc_command cmd = { 0 };
10849 + struct dpsw_cmd_set_irq *cmd_params;
10851 + /* prepare command */
10852 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IRQ,
10855 + cmd_params = (struct dpsw_cmd_set_irq *)cmd.params;
10856 + cmd_params->irq_index = irq_index;
10857 + cmd_params->irq_val = cpu_to_le32(irq_cfg->val);
10858 + cmd_params->irq_addr = cpu_to_le64(irq_cfg->addr);
10859 + cmd_params->irq_num = cpu_to_le32(irq_cfg->irq_num);
10861 + /* send command to mc*/
10862 + return mc_send_command(mc_io, &cmd);
10866 + * dpsw_get_irq() - Get IRQ information from the DPSW
10868 + * @mc_io: Pointer to MC portal's I/O object
10869 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10870 + * @token: Token of DPSW object
10871 + * @irq_index: The interrupt index to configure
10872 + * @type: Interrupt type: 0 represents message interrupt
10873 + * type (both irq_addr and irq_val are valid)
10874 + * @irq_cfg: IRQ attributes
10876 + * Return: '0' on Success; Error code otherwise.
10878 +int dpsw_get_irq(struct fsl_mc_io *mc_io,
10883 + struct dpsw_irq_cfg *irq_cfg)
10885 + struct mc_command cmd = { 0 };
10886 + struct dpsw_cmd_get_irq *cmd_params;
10887 + struct dpsw_rsp_get_irq *rsp_params;
10890 + /* prepare command */
10891 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_IRQ,
10894 + cmd_params = (struct dpsw_cmd_get_irq *)cmd.params;
10895 + cmd_params->irq_index = irq_index;
10897 + /* send command to mc*/
10898 + err = mc_send_command(mc_io, &cmd);
10902 + /* retrieve response parameters */
10903 + rsp_params = (struct dpsw_rsp_get_irq *)cmd.params;
10904 + irq_cfg->addr = le64_to_cpu(rsp_params->irq_addr);
10905 + irq_cfg->val = le32_to_cpu(rsp_params->irq_val);
10906 + irq_cfg->irq_num = le32_to_cpu(rsp_params->irq_num);
10907 + *type = le32_to_cpu(rsp_params->irq_type);
10913 + * dpsw_set_irq_enable() - Set overall interrupt state.
10914 + * @mc_io: Pointer to MC portal's I/O object
10915 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10916 + * @token: Token of DPCI object
10917 + * @irq_index: The interrupt index to configure
10918 + * @en: Interrupt state - enable = 1, disable = 0
10920 + * Allows GPP software to control when interrupts are generated.
10921 + * Each interrupt can have up to 32 causes. The enable/disable control's the
10922 + * overall interrupt state. if the interrupt is disabled no causes will cause
10925 + * Return: '0' on Success; Error code otherwise.
10927 +int dpsw_set_irq_enable(struct fsl_mc_io *mc_io,
10933 + struct mc_command cmd = { 0 };
10934 + struct dpsw_cmd_set_irq_enable *cmd_params;
10936 + /* prepare command */
10937 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IRQ_ENABLE,
10940 + cmd_params = (struct dpsw_cmd_set_irq_enable *)cmd.params;
10941 + dpsw_set_field(cmd_params->enable_state, ENABLE, en);
10942 + cmd_params->irq_index = irq_index;
10944 + /* send command to mc*/
10945 + return mc_send_command(mc_io, &cmd);
10949 + * dpsw_set_irq_mask() - Set interrupt mask.
10950 + * @mc_io: Pointer to MC portal's I/O object
10951 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10952 + * @token: Token of DPCI object
10953 + * @irq_index: The interrupt index to configure
10954 + * @mask: Event mask to trigger interrupt;
10956 + * 0 = ignore event
10957 + * 1 = consider event for asserting IRQ
10959 + * Every interrupt can have up to 32 causes and the interrupt model supports
10960 + * masking/unmasking each cause independently
10962 + * Return: '0' on Success; Error code otherwise.
10964 +int dpsw_set_irq_mask(struct fsl_mc_io *mc_io,
10970 + struct mc_command cmd = { 0 };
10971 + struct dpsw_cmd_set_irq_mask *cmd_params;
10973 + /* prepare command */
10974 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IRQ_MASK,
10977 + cmd_params = (struct dpsw_cmd_set_irq_mask *)cmd.params;
10978 + cmd_params->mask = cpu_to_le32(mask);
10979 + cmd_params->irq_index = irq_index;
10981 + /* send command to mc*/
10982 + return mc_send_command(mc_io, &cmd);
10986 + * dpsw_get_irq_status() - Get the current status of any pending interrupts
10987 + * @mc_io: Pointer to MC portal's I/O object
10988 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
10989 + * @token: Token of DPSW object
10990 + * @irq_index: The interrupt index to configure
10991 + * @status: Returned interrupts status - one bit per cause:
10992 + * 0 = no interrupt pending
10993 + * 1 = interrupt pending
10995 + * Return: '0' on Success; Error code otherwise.
10997 +int dpsw_get_irq_status(struct fsl_mc_io *mc_io,
11003 + struct mc_command cmd = { 0 };
11004 + struct dpsw_cmd_get_irq_status *cmd_params;
11005 + struct dpsw_rsp_get_irq_status *rsp_params;
11008 + /* prepare command */
11009 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_IRQ_STATUS,
11012 + cmd_params = (struct dpsw_cmd_get_irq_status *)cmd.params;
11013 + cmd_params->status = cpu_to_le32(*status);
11014 + cmd_params->irq_index = irq_index;
11016 + /* send command to mc*/
11017 + err = mc_send_command(mc_io, &cmd);
11021 + /* retrieve response parameters */
11022 + rsp_params = (struct dpsw_rsp_get_irq_status *)cmd.params;
11023 + *status = le32_to_cpu(rsp_params->status);
11029 + * dpsw_clear_irq_status() - Clear a pending interrupt's status
11030 + * @mc_io: Pointer to MC portal's I/O object
11031 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11032 + * @token: Token of DPCI object
11033 + * @irq_index: The interrupt index to configure
11034 + * @status: bits to clear (W1C) - one bit per cause:
11035 + * 0 = don't change
11036 + * 1 = clear status bit
11038 + * Return: '0' on Success; Error code otherwise.
11040 +int dpsw_clear_irq_status(struct fsl_mc_io *mc_io,
11046 + struct mc_command cmd = { 0 };
11047 + struct dpsw_cmd_clear_irq_status *cmd_params;
11049 + /* prepare command */
11050 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_CLEAR_IRQ_STATUS,
11053 + cmd_params = (struct dpsw_cmd_clear_irq_status *)cmd.params;
11054 + cmd_params->status = cpu_to_le32(status);
11055 + cmd_params->irq_index = irq_index;
11057 + /* send command to mc*/
11058 + return mc_send_command(mc_io, &cmd);
11062 + * dpsw_get_attributes() - Retrieve DPSW attributes
11063 + * @mc_io: Pointer to MC portal's I/O object
11064 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11065 + * @token: Token of DPSW object
11066 + * @attr: Returned DPSW attributes
11068 + * Return: Completion status. '0' on Success; Error code otherwise.
11070 +int dpsw_get_attributes(struct fsl_mc_io *mc_io,
11073 + struct dpsw_attr *attr)
11075 + struct mc_command cmd = { 0 };
11076 + struct dpsw_rsp_get_attr *rsp_params;
11079 + /* prepare command */
11080 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_ATTR,
11084 + /* send command to mc*/
11085 + err = mc_send_command(mc_io, &cmd);
11089 + /* retrieve response parameters */
11090 + rsp_params = (struct dpsw_rsp_get_attr *)cmd.params;
11091 + attr->num_ifs = le16_to_cpu(rsp_params->num_ifs);
11092 + attr->max_fdbs = rsp_params->max_fdbs;
11093 + attr->num_fdbs = rsp_params->num_fdbs;
11094 + attr->max_vlans = le16_to_cpu(rsp_params->max_vlans);
11095 + attr->num_vlans = le16_to_cpu(rsp_params->num_vlans);
11096 + attr->max_fdb_entries = le16_to_cpu(rsp_params->max_fdb_entries);
11097 + attr->fdb_aging_time = le16_to_cpu(rsp_params->fdb_aging_time);
11098 + attr->id = le32_to_cpu(rsp_params->dpsw_id);
11099 + attr->mem_size = le16_to_cpu(rsp_params->mem_size);
11100 + attr->max_fdb_mc_groups = le16_to_cpu(rsp_params->max_fdb_mc_groups);
11101 + attr->max_meters_per_if = rsp_params->max_meters_per_if;
11102 + attr->options = le64_to_cpu(rsp_params->options);
11103 + attr->component_type = dpsw_get_field(rsp_params->component_type,
11110 + * dpsw_set_reflection_if() - Set target interface for reflected interfaces.
11111 + * @mc_io: Pointer to MC portal's I/O object
11112 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11113 + * @token: Token of DPSW object
11114 + * @if_id: Interface Id
11116 + * Only one reflection receive interface is allowed per switch
11118 + * Return: Completion status. '0' on Success; Error code otherwise.
11120 +int dpsw_set_reflection_if(struct fsl_mc_io *mc_io,
11125 + struct mc_command cmd = { 0 };
11126 + struct dpsw_cmd_set_reflection_if *cmd_params;
11128 + /* prepare command */
11129 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_REFLECTION_IF,
11132 + cmd_params = (struct dpsw_cmd_set_reflection_if *)cmd.params;
11133 + cmd_params->if_id = cpu_to_le16(if_id);
11135 + /* send command to mc*/
11136 + return mc_send_command(mc_io, &cmd);
11140 + * dpsw_if_set_link_cfg() - Set the link configuration.
11141 + * @mc_io: Pointer to MC portal's I/O object
11142 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11143 + * @token: Token of DPSW object
11144 + * @if_id: Interface id
11145 + * @cfg: Link configuration
11147 + * Return: '0' on Success; Error code otherwise.
11149 +int dpsw_if_set_link_cfg(struct fsl_mc_io *mc_io,
11153 + struct dpsw_link_cfg *cfg)
11155 + struct mc_command cmd = { 0 };
11156 + struct dpsw_cmd_if_set_link_cfg *cmd_params;
11158 + /* prepare command */
11159 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_LINK_CFG,
11162 + cmd_params = (struct dpsw_cmd_if_set_link_cfg *)cmd.params;
11163 + cmd_params->if_id = cpu_to_le16(if_id);
11164 + cmd_params->rate = cpu_to_le32(cfg->rate);
11165 + cmd_params->options = cpu_to_le64(cfg->options);
11167 + /* send command to mc*/
11168 + return mc_send_command(mc_io, &cmd);
11172 + * dpsw_if_get_link_state - Return the link state
11173 + * @mc_io: Pointer to MC portal's I/O object
11174 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11175 + * @token: Token of DPSW object
11176 + * @if_id: Interface id
11177 + * @state: Link state 1 - linkup, 0 - link down or disconnected
11179 + * @Return '0' on Success; Error code otherwise.
11181 +int dpsw_if_get_link_state(struct fsl_mc_io *mc_io,
11185 + struct dpsw_link_state *state)
11187 + struct mc_command cmd = { 0 };
11188 + struct dpsw_cmd_if_get_link_state *cmd_params;
11189 + struct dpsw_rsp_if_get_link_state *rsp_params;
11192 + /* prepare command */
11193 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_LINK_STATE,
11196 + cmd_params = (struct dpsw_cmd_if_get_link_state *)cmd.params;
11197 + cmd_params->if_id = cpu_to_le16(if_id);
11199 + /* send command to mc*/
11200 + err = mc_send_command(mc_io, &cmd);
11204 + /* retrieve response parameters */
11205 + rsp_params = (struct dpsw_rsp_if_get_link_state *)cmd.params;
11206 + state->rate = le32_to_cpu(rsp_params->rate);
11207 + state->options = le64_to_cpu(rsp_params->options);
11208 + state->up = dpsw_get_field(rsp_params->up, UP);
11214 + * dpsw_if_set_flooding() - Enable Disable flooding for particular interface
11215 + * @mc_io: Pointer to MC portal's I/O object
11216 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11217 + * @token: Token of DPSW object
11218 + * @if_id: Interface Identifier
11219 + * @en: 1 - enable, 0 - disable
11221 + * Return: Completion status. '0' on Success; Error code otherwise.
11223 +int dpsw_if_set_flooding(struct fsl_mc_io *mc_io,
11229 + struct mc_command cmd = { 0 };
11230 + struct dpsw_cmd_if_set_flooding *cmd_params;
11232 + /* prepare command */
11233 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_FLOODING,
11236 + cmd_params = (struct dpsw_cmd_if_set_flooding *)cmd.params;
11237 + cmd_params->if_id = cpu_to_le16(if_id);
11238 + dpsw_set_field(cmd_params->enable, ENABLE, en);
11240 + /* send command to mc*/
11241 + return mc_send_command(mc_io, &cmd);
11245 + * dpsw_if_set_broadcast() - Enable/disable broadcast for particular interface
11246 + * @mc_io: Pointer to MC portal's I/O object
11247 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11248 + * @token: Token of DPSW object
11249 + * @if_id: Interface Identifier
11250 + * @en: 1 - enable, 0 - disable
11252 + * Return: Completion status. '0' on Success; Error code otherwise.
11254 +int dpsw_if_set_broadcast(struct fsl_mc_io *mc_io,
11260 + struct mc_command cmd = { 0 };
11261 + struct dpsw_cmd_if_set_broadcast *cmd_params;
11263 + /* prepare command */
11264 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_BROADCAST,
11267 + cmd_params = (struct dpsw_cmd_if_set_broadcast *)cmd.params;
11268 + cmd_params->if_id = cpu_to_le16(if_id);
11269 + dpsw_set_field(cmd_params->enable, ENABLE, en);
11271 + /* send command to mc*/
11272 + return mc_send_command(mc_io, &cmd);
11276 + * dpsw_if_set_multicast() - Enable/disable multicast for particular interface
11277 + * @mc_io: Pointer to MC portal's I/O object
11278 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11279 + * @token: Token of DPSW object
11280 + * @if_id: Interface Identifier
11281 + * @en: 1 - enable, 0 - disable
11283 + * Return: Completion status. '0' on Success; Error code otherwise.
11285 +int dpsw_if_set_multicast(struct fsl_mc_io *mc_io,
11291 + struct mc_command cmd = { 0 };
11292 + struct dpsw_cmd_if_set_multicast *cmd_params;
11294 + /* prepare command */
11295 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_MULTICAST,
11298 + cmd_params = (struct dpsw_cmd_if_set_multicast *)cmd.params;
11299 + cmd_params->if_id = cpu_to_le16(if_id);
11300 + dpsw_set_field(cmd_params->enable, ENABLE, en);
11302 + /* send command to mc*/
11303 + return mc_send_command(mc_io, &cmd);
11307 + * dpsw_if_set_tci() - Set default VLAN Tag Control Information (TCI)
11308 + * @mc_io: Pointer to MC portal's I/O object
11309 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11310 + * @token: Token of DPSW object
11311 + * @if_id: Interface Identifier
11312 + * @cfg: Tag Control Information Configuration
11314 + * Return: Completion status. '0' on Success; Error code otherwise.
11316 +int dpsw_if_set_tci(struct fsl_mc_io *mc_io,
11320 + const struct dpsw_tci_cfg *cfg)
11322 + struct mc_command cmd = { 0 };
11323 + struct dpsw_cmd_if_set_tci *cmd_params;
11325 + /* prepare command */
11326 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_TCI,
11329 + cmd_params = (struct dpsw_cmd_if_set_tci *)cmd.params;
11330 + cmd_params->if_id = cpu_to_le16(if_id);
11331 + dpsw_set_field(cmd_params->conf, VLAN_ID, cfg->vlan_id);
11332 + dpsw_set_field(cmd_params->conf, DEI, cfg->dei);
11333 + dpsw_set_field(cmd_params->conf, PCP, cfg->pcp);
11334 + cmd_params->conf = cpu_to_le16(cmd_params->conf);
11336 + /* send command to mc*/
11337 + return mc_send_command(mc_io, &cmd);
11341 + * dpsw_if_get_tci() - Get default VLAN Tag Control Information (TCI)
11342 + * @mc_io: Pointer to MC portal's I/O object
11343 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11344 + * @token: Token of DPSW object
11345 + * @if_id: Interface Identifier
11346 + * @cfg: Tag Control Information Configuration
11348 + * Return: Completion status. '0' on Success; Error code otherwise.
11350 +int dpsw_if_get_tci(struct fsl_mc_io *mc_io,
11354 + struct dpsw_tci_cfg *cfg)
11356 + struct mc_command cmd = { 0 };
11357 + struct dpsw_cmd_if_get_tci *cmd_params;
11358 + struct dpsw_rsp_if_get_tci *rsp_params;
11361 + /* prepare command */
11362 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_TCI,
11365 + cmd_params = (struct dpsw_cmd_if_get_tci *)cmd.params;
11366 + cmd_params->if_id = cpu_to_le16(if_id);
11368 + /* send command to mc*/
11369 + err = mc_send_command(mc_io, &cmd);
11373 + /* retrieve response parameters */
11374 + rsp_params = (struct dpsw_rsp_if_get_tci *)cmd.params;
11375 + cfg->pcp = rsp_params->pcp;
11376 + cfg->dei = rsp_params->dei;
11377 + cfg->vlan_id = le16_to_cpu(rsp_params->vlan_id);
11383 + * dpsw_if_set_stp() - Function sets Spanning Tree Protocol (STP) state.
11384 + * @mc_io: Pointer to MC portal's I/O object
11385 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11386 + * @token: Token of DPSW object
11387 + * @if_id: Interface Identifier
11388 + * @cfg: STP State configuration parameters
11390 + * The following STP states are supported -
11391 + * blocking, listening, learning, forwarding and disabled.
11393 + * Return: Completion status. '0' on Success; Error code otherwise.
11395 +int dpsw_if_set_stp(struct fsl_mc_io *mc_io,
11399 + const struct dpsw_stp_cfg *cfg)
11401 + struct mc_command cmd = { 0 };
11402 + struct dpsw_cmd_if_set_stp *cmd_params;
11404 + /* prepare command */
11405 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_STP,
11408 + cmd_params = (struct dpsw_cmd_if_set_stp *)cmd.params;
11409 + cmd_params->if_id = cpu_to_le16(if_id);
11410 + cmd_params->vlan_id = cpu_to_le16(cfg->vlan_id);
11411 + dpsw_set_field(cmd_params->state, STATE, cfg->state);
11413 + /* send command to mc*/
11414 + return mc_send_command(mc_io, &cmd);
11418 + * dpsw_if_set_accepted_frames()
11419 + * @mc_io: Pointer to MC portal's I/O object
11420 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11421 + * @token: Token of DPSW object
11422 + * @if_id: Interface Identifier
11423 + * @cfg: Frame types configuration
11425 + * When is admit_only_vlan_tagged- the device will discard untagged
11426 + * frames or Priority-Tagged frames received on this interface.
11427 + * When admit_only_untagged- untagged frames or Priority-Tagged
11428 + * frames received on this interface will be accepted and assigned
11429 + * to a VID based on the PVID and VID Set for this interface.
11430 + * When admit_all - the device will accept VLAN tagged, untagged
11431 + * and priority tagged frames.
11432 + * The default is admit_all
11434 + * Return: Completion status. '0' on Success; Error code otherwise.
11436 +int dpsw_if_set_accepted_frames(struct fsl_mc_io *mc_io,
11440 + const struct dpsw_accepted_frames_cfg *cfg)
11442 + struct mc_command cmd = { 0 };
11443 + struct dpsw_cmd_if_set_accepted_frames *cmd_params;
11445 + /* prepare command */
11446 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_ACCEPTED_FRAMES,
11449 + cmd_params = (struct dpsw_cmd_if_set_accepted_frames *)cmd.params;
11450 + cmd_params->if_id = cpu_to_le16(if_id);
11451 + dpsw_set_field(cmd_params->unaccepted, FRAME_TYPE, cfg->type);
11452 + dpsw_set_field(cmd_params->unaccepted, UNACCEPTED_ACT,
11453 + cfg->unaccept_act);
11455 + /* send command to mc*/
11456 + return mc_send_command(mc_io, &cmd);
11460 + * dpsw_if_set_accept_all_vlan()
11461 + * @mc_io: Pointer to MC portal's I/O object
11462 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11463 + * @token: Token of DPSW object
11464 + * @if_id: Interface Identifier
11465 + * @accept_all: Accept or drop frames having different VLAN
11467 + * When this is accept (FALSE), the device will discard incoming
11468 + * frames for VLANs that do not include this interface in its
11469 + * Member set. When accept (TRUE), the interface will accept all incoming frames
11471 + * Return: Completion status. '0' on Success; Error code otherwise.
11473 +int dpsw_if_set_accept_all_vlan(struct fsl_mc_io *mc_io,
11479 + struct mc_command cmd = { 0 };
11480 + struct dpsw_cmd_if_set_accept_all_vlan *cmd_params;
11482 + /* prepare command */
11483 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_SET_IF_ACCEPT_ALL_VLAN,
11486 + cmd_params = (struct dpsw_cmd_if_set_accept_all_vlan *)cmd.params;
11487 + cmd_params->if_id = cpu_to_le16(if_id);
11488 + dpsw_set_field(cmd_params->accept_all, ACCEPT_ALL, accept_all);
11490 + /* send command to mc*/
11491 + return mc_send_command(mc_io, &cmd);
11495 + * dpsw_if_get_counter() - Get specific counter of particular interface
11496 + * @mc_io: Pointer to MC portal's I/O object
11497 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11498 + * @token: Token of DPSW object
11499 + * @if_id: Interface Identifier
11500 + * @type: Counter type
11501 + * @counter: return value
11503 + * Return: Completion status. '0' on Success; Error code otherwise.
11505 +int dpsw_if_get_counter(struct fsl_mc_io *mc_io,
11509 + enum dpsw_counter type,
11512 + struct mc_command cmd = { 0 };
11513 + struct dpsw_cmd_if_get_counter *cmd_params;
11514 + struct dpsw_rsp_if_get_counter *rsp_params;
11517 + /* prepare command */
11518 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_COUNTER,
11521 + cmd_params = (struct dpsw_cmd_if_get_counter *)cmd.params;
11522 + cmd_params->if_id = cpu_to_le16(if_id);
11523 + dpsw_set_field(cmd_params->type, COUNTER_TYPE, type);
11525 + /* send command to mc*/
11526 + err = mc_send_command(mc_io, &cmd);
11530 + /* retrieve response parameters */
11531 + rsp_params = (struct dpsw_rsp_if_get_counter *)cmd.params;
11532 + *counter = le64_to_cpu(rsp_params->counter);
11538 + * dpsw_if_set_counter() - Set specific counter of particular interface
11539 + * @mc_io: Pointer to MC portal's I/O object
11540 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11541 + * @token: Token of DPSW object
11542 + * @if_id: Interface Identifier
11543 + * @type: Counter type
11544 + * @counter: New counter value
11546 + * Return: Completion status. '0' on Success; Error code otherwise.
11548 +int dpsw_if_set_counter(struct fsl_mc_io *mc_io,
11552 + enum dpsw_counter type,
11555 + struct mc_command cmd = { 0 };
11556 + struct dpsw_cmd_if_set_counter *cmd_params;
11558 + /* prepare command */
11559 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_COUNTER,
11562 + cmd_params = (struct dpsw_cmd_if_set_counter *)cmd.params;
11563 + cmd_params->if_id = cpu_to_le16(if_id);
11564 + cmd_params->counter = cpu_to_le64(counter);
11565 + dpsw_set_field(cmd_params->type, COUNTER_TYPE, type);
11567 + /* send command to mc*/
11568 + return mc_send_command(mc_io, &cmd);
11572 + * dpsw_if_set_tx_selection() - Function is used for mapping variety
11573 + * of frame fields
11574 + * @mc_io: Pointer to MC portal's I/O object
11575 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11576 + * @token: Token of DPSW object
11577 + * @if_id: Interface Identifier
11578 + * @cfg: Traffic class mapping configuration
11580 + * Function is used for mapping variety of frame fields (DSCP, PCP)
11581 + * to Traffic Class. Traffic class is a number
11582 + * in the range from 0 to 7
11584 + * Return: Completion status. '0' on Success; Error code otherwise.
11586 +int dpsw_if_set_tx_selection(struct fsl_mc_io *mc_io,
11590 + const struct dpsw_tx_selection_cfg *cfg)
11592 + struct dpsw_cmd_if_set_tx_selection *cmd_params;
11593 + struct mc_command cmd = { 0 };
11596 + /* prepare command */
11597 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_TX_SELECTION,
11600 + cmd_params = (struct dpsw_cmd_if_set_tx_selection *)cmd.params;
11601 + cmd_params->if_id = cpu_to_le16(if_id);
11602 + dpsw_set_field(cmd_params->priority_selector, PRIORITY_SELECTOR,
11603 + cfg->priority_selector);
11605 + for (i = 0; i < 8; i++) {
11606 + cmd_params->tc_sched[i].delta_bandwidth =
11607 + cpu_to_le16(cfg->tc_sched[i].delta_bandwidth);
11608 + dpsw_set_field(cmd_params->tc_sched[i].mode, SCHED_MODE,
11609 + cfg->tc_sched[i].mode);
11610 + cmd_params->tc_id[i] = cfg->tc_id[i];
11613 + /* send command to mc*/
11614 + return mc_send_command(mc_io, &cmd);
11618 + * dpsw_if_add_reflection() - Identify interface to be reflected or mirrored
11619 + * @mc_io: Pointer to MC portal's I/O object
11620 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11621 + * @token: Token of DPSW object
11622 + * @if_id: Interface Identifier
11623 + * @cfg: Reflection configuration
11625 + * Return: Completion status. '0' on Success; Error code otherwise.
11627 +int dpsw_if_add_reflection(struct fsl_mc_io *mc_io,
11631 + const struct dpsw_reflection_cfg *cfg)
11633 + struct mc_command cmd = { 0 };
11634 + struct dpsw_cmd_if_reflection *cmd_params;
11636 + /* prepare command */
11637 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_ADD_REFLECTION,
11640 + cmd_params = (struct dpsw_cmd_if_reflection *)cmd.params;
11641 + cmd_params->if_id = cpu_to_le16(if_id);
11642 + cmd_params->vlan_id = cpu_to_le16(cfg->vlan_id);
11643 + dpsw_set_field(cmd_params->filter, FILTER, cfg->filter);
11645 + /* send command to mc*/
11646 + return mc_send_command(mc_io, &cmd);
11650 + * dpsw_if_remove_reflection() - Remove interface to be reflected or mirrored
11651 + * @mc_io: Pointer to MC portal's I/O object
11652 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11653 + * @token: Token of DPSW object
11654 + * @if_id: Interface Identifier
11655 + * @cfg: Reflection configuration
11657 + * Return: Completion status. '0' on Success; Error code otherwise.
11659 +int dpsw_if_remove_reflection(struct fsl_mc_io *mc_io,
11663 + const struct dpsw_reflection_cfg *cfg)
11665 + struct mc_command cmd = { 0 };
11666 + struct dpsw_cmd_if_reflection *cmd_params;
11668 + /* prepare command */
11669 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_REMOVE_REFLECTION,
11672 + cmd_params = (struct dpsw_cmd_if_reflection *)cmd.params;
11673 + cmd_params->if_id = cpu_to_le16(if_id);
11674 + cmd_params->vlan_id = cpu_to_le16(cfg->vlan_id);
11675 + dpsw_set_field(cmd_params->filter, FILTER, cfg->filter);
11677 + /* send command to mc*/
11678 + return mc_send_command(mc_io, &cmd);
11682 + * dpsw_if_set_flooding_metering() - Set flooding metering
11683 + * @mc_io: Pointer to MC portal's I/O object
11684 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11685 + * @token: Token of DPSW object
11686 + * @if_id: Interface Identifier
11687 + * @cfg: Metering parameters
11689 + * Return: Completion status. '0' on Success; Error code otherwise.
11691 +int dpsw_if_set_flooding_metering(struct fsl_mc_io *mc_io,
11695 + const struct dpsw_metering_cfg *cfg)
11697 + struct mc_command cmd = { 0 };
11698 + struct dpsw_cmd_if_set_flooding_metering *cmd_params;
11700 + /* prepare command */
11701 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_FLOODING_METERING,
11704 + cmd_params = (struct dpsw_cmd_if_set_flooding_metering *)cmd.params;
11705 + cmd_params->if_id = cpu_to_le16(if_id);
11706 + dpsw_set_field(cmd_params->mode_units, MODE, cfg->mode);
11707 + dpsw_set_field(cmd_params->mode_units, UNITS, cfg->units);
11708 + cmd_params->cir = cpu_to_le32(cfg->cir);
11709 + cmd_params->eir = cpu_to_le32(cfg->eir);
11710 + cmd_params->cbs = cpu_to_le32(cfg->cbs);
11711 + cmd_params->ebs = cpu_to_le32(cfg->ebs);
11713 + /* send command to mc*/
11714 + return mc_send_command(mc_io, &cmd);
11718 + * dpsw_if_set_metering() - Set interface metering for flooding
11719 + * @mc_io: Pointer to MC portal's I/O object
11720 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11721 + * @token: Token of DPSW object
11722 + * @if_id: Interface Identifier
11723 + * @tc_id: Traffic class ID
11724 + * @cfg: Metering parameters
11726 + * Return: Completion status. '0' on Success; Error code otherwise.
11728 +int dpsw_if_set_metering(struct fsl_mc_io *mc_io,
11733 + const struct dpsw_metering_cfg *cfg)
11735 + struct mc_command cmd = { 0 };
11736 + struct dpsw_cmd_if_set_metering *cmd_params;
11738 + /* prepare command */
11739 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_METERING,
11742 + cmd_params = (struct dpsw_cmd_if_set_metering *)cmd.params;
11743 + cmd_params->if_id = cpu_to_le16(if_id);
11744 + cmd_params->tc_id = tc_id;
11745 + dpsw_set_field(cmd_params->mode_units, MODE, cfg->mode);
11746 + dpsw_set_field(cmd_params->mode_units, UNITS, cfg->units);
11747 + cmd_params->cir = cpu_to_le32(cfg->cir);
11748 + cmd_params->eir = cpu_to_le32(cfg->eir);
11749 + cmd_params->cbs = cpu_to_le32(cfg->cbs);
11750 + cmd_params->ebs = cpu_to_le32(cfg->ebs);
11752 + /* send command to mc*/
11753 + return mc_send_command(mc_io, &cmd);
11757 + * dpsw_prepare_early_drop() - Prepare an early drop for setting in to interface
11758 + * @cfg: Early-drop configuration
11759 + * @early_drop_buf: Zeroed 256 bytes of memory before mapping it to DMA
11761 + * This function has to be called before dpsw_if_tc_set_early_drop
11764 +void dpsw_prepare_early_drop(const struct dpsw_early_drop_cfg *cfg,
11765 + u8 *early_drop_buf)
11767 + struct dpsw_prep_early_drop *ext_params;
11769 + ext_params = (struct dpsw_prep_early_drop *)early_drop_buf;
11770 + dpsw_set_field(ext_params->conf, EARLY_DROP_MODE, cfg->drop_mode);
11771 + dpsw_set_field(ext_params->conf, EARLY_DROP_UNIT, cfg->units);
11772 + ext_params->tail_drop_threshold = cpu_to_le32(cfg->tail_drop_threshold);
11773 + ext_params->green_drop_probability = cfg->green.drop_probability;
11774 + ext_params->green_max_threshold = cpu_to_le64(cfg->green.max_threshold);
11775 + ext_params->green_min_threshold = cpu_to_le64(cfg->green.min_threshold);
11776 + ext_params->yellow_drop_probability = cfg->yellow.drop_probability;
11777 + ext_params->yellow_max_threshold =
11778 + cpu_to_le64(cfg->yellow.max_threshold);
11779 + ext_params->yellow_min_threshold =
11780 + cpu_to_le64(cfg->yellow.min_threshold);
11784 + * dpsw_if_set_early_drop() - Set interface traffic class early-drop
11786 + * @mc_io: Pointer to MC portal's I/O object
11787 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11788 + * @token: Token of DPSW object
11789 + * @if_id: Interface Identifier
11790 + * @tc_id: Traffic class selection (0-7)
11791 + * @early_drop_iova: I/O virtual address of 64 bytes;
11792 + * Must be cacheline-aligned and DMA-able memory
11794 + * warning: Before calling this function, call dpsw_prepare_if_tc_early_drop()
11795 + * to prepare the early_drop_iova parameter
11797 + * Return: '0' on Success; error code otherwise.
11799 +int dpsw_if_set_early_drop(struct fsl_mc_io *mc_io,
11804 + u64 early_drop_iova)
11806 + struct mc_command cmd = { 0 };
11807 + struct dpsw_cmd_if_set_early_drop *cmd_params;
11809 + /* prepare command */
11810 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_EARLY_DROP,
11813 + cmd_params = (struct dpsw_cmd_if_set_early_drop *)cmd.params;
11814 + cmd_params->tc_id = tc_id;
11815 + cmd_params->if_id = cpu_to_le16(if_id);
11816 + cmd_params->early_drop_iova = cpu_to_le64(early_drop_iova);
11818 + /* send command to mc*/
11819 + return mc_send_command(mc_io, &cmd);
11823 + * dpsw_add_custom_tpid() - API Configures a distinct Ethernet type value
11824 + * @mc_io: Pointer to MC portal's I/O object
11825 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11826 + * @token: Token of DPSW object
11827 + * @cfg: Tag Protocol identifier
11829 + * API Configures a distinct Ethernet type value (or TPID value)
11830 + * to indicate a VLAN tag in addition to the common
11831 + * TPID values 0x8100 and 0x88A8.
11832 + * Two additional TPID's are supported
11834 + * Return: Completion status. '0' on Success; Error code otherwise.
11836 +int dpsw_add_custom_tpid(struct fsl_mc_io *mc_io,
11839 + const struct dpsw_custom_tpid_cfg *cfg)
11841 + struct mc_command cmd = { 0 };
11842 + struct dpsw_cmd_custom_tpid *cmd_params;
11844 + /* prepare command */
11845 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ADD_CUSTOM_TPID,
11848 + cmd_params = (struct dpsw_cmd_custom_tpid *)cmd.params;
11849 + cmd_params->tpid = cpu_to_le16(cfg->tpid);
11851 + /* send command to mc*/
11852 + return mc_send_command(mc_io, &cmd);
11856 + * dpsw_remove_custom_tpid - API removes a distinct Ethernet type value
11857 + * @mc_io: Pointer to MC portal's I/O object
11858 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11859 + * @token: Token of DPSW object
11860 + * @cfg: Tag Protocol identifier
11862 + * Return: Completion status. '0' on Success; Error code otherwise.
11864 +int dpsw_remove_custom_tpid(struct fsl_mc_io *mc_io,
11867 + const struct dpsw_custom_tpid_cfg *cfg)
11869 + struct mc_command cmd = { 0 };
11870 + struct dpsw_cmd_custom_tpid *cmd_params;
11872 + /* prepare command */
11873 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_REMOVE_CUSTOM_TPID,
11876 + cmd_params = (struct dpsw_cmd_custom_tpid *)cmd.params;
11877 + cmd_params->tpid = cpu_to_le16(cfg->tpid);
11879 + /* send command to mc*/
11880 + return mc_send_command(mc_io, &cmd);
11884 + * dpsw_if_enable() - Enable Interface
11885 + * @mc_io: Pointer to MC portal's I/O object
11886 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11887 + * @token: Token of DPSW object
11888 + * @if_id: Interface Identifier
11890 + * Return: Completion status. '0' on Success; Error code otherwise.
11892 +int dpsw_if_enable(struct fsl_mc_io *mc_io,
11897 + struct mc_command cmd = { 0 };
11898 + struct dpsw_cmd_if *cmd_params;
11900 + /* prepare command */
11901 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_ENABLE,
11904 + cmd_params = (struct dpsw_cmd_if *)cmd.params;
11905 + cmd_params->if_id = cpu_to_le16(if_id);
11907 + /* send command to mc*/
11908 + return mc_send_command(mc_io, &cmd);
11912 + * dpsw_if_disable() - Disable Interface
11913 + * @mc_io: Pointer to MC portal's I/O object
11914 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11915 + * @token: Token of DPSW object
11916 + * @if_id: Interface Identifier
11918 + * Return: Completion status. '0' on Success; Error code otherwise.
11920 +int dpsw_if_disable(struct fsl_mc_io *mc_io,
11925 + struct mc_command cmd = { 0 };
11926 + struct dpsw_cmd_if *cmd_params;
11928 + /* prepare command */
11929 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_DISABLE,
11932 + cmd_params = (struct dpsw_cmd_if *)cmd.params;
11933 + cmd_params->if_id = cpu_to_le16(if_id);
11935 + /* send command to mc*/
11936 + return mc_send_command(mc_io, &cmd);
11940 + * dpsw_if_get_attributes() - Function obtains attributes of interface
11941 + * @mc_io: Pointer to MC portal's I/O object
11942 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11943 + * @token: Token of DPSW object
11944 + * @if_id: Interface Identifier
11945 + * @attr: Returned interface attributes
11947 + * Return: Completion status. '0' on Success; Error code otherwise.
11949 +int dpsw_if_get_attributes(struct fsl_mc_io *mc_io,
11953 + struct dpsw_if_attr *attr)
11955 + struct dpsw_rsp_if_get_attr *rsp_params;
11956 + struct dpsw_cmd_if *cmd_params;
11957 + struct mc_command cmd = { 0 };
11960 + /* prepare command */
11961 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_ATTR,
11964 + cmd_params = (struct dpsw_cmd_if *)cmd.params;
11965 + cmd_params->if_id = cpu_to_le16(if_id);
11967 + /* send command to mc*/
11968 + err = mc_send_command(mc_io, &cmd);
11972 + /* retrieve response parameters */
11973 + rsp_params = (struct dpsw_rsp_if_get_attr *)cmd.params;
11974 + attr->num_tcs = rsp_params->num_tcs;
11975 + attr->rate = le32_to_cpu(rsp_params->rate);
11976 + attr->options = le32_to_cpu(rsp_params->options);
11977 + attr->enabled = dpsw_get_field(rsp_params->conf, ENABLED);
11978 + attr->accept_all_vlan = dpsw_get_field(rsp_params->conf,
11979 + ACCEPT_ALL_VLAN);
11980 + attr->admit_untagged = dpsw_get_field(rsp_params->conf, ADMIT_UNTAGGED);
11981 + attr->qdid = le16_to_cpu(rsp_params->qdid);
11987 + * dpsw_if_set_max_frame_length() - Set Maximum Receive frame length.
11988 + * @mc_io: Pointer to MC portal's I/O object
11989 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
11990 + * @token: Token of DPSW object
11991 + * @if_id: Interface Identifier
11992 + * @frame_length: Maximum Frame Length
11994 + * Return: Completion status. '0' on Success; Error code otherwise.
11996 +int dpsw_if_set_max_frame_length(struct fsl_mc_io *mc_io,
12000 + u16 frame_length)
12002 + struct mc_command cmd = { 0 };
12003 + struct dpsw_cmd_if_set_max_frame_length *cmd_params;
12005 + /* prepare command */
12006 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH,
12009 + cmd_params = (struct dpsw_cmd_if_set_max_frame_length *)cmd.params;
12010 + cmd_params->if_id = cpu_to_le16(if_id);
12011 + cmd_params->frame_length = cpu_to_le16(frame_length);
12013 + /* send command to mc*/
12014 + return mc_send_command(mc_io, &cmd);
12018 + * dpsw_if_get_max_frame_length() - Get Maximum Receive frame length.
12019 + * @mc_io: Pointer to MC portal's I/O object
12020 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12021 + * @token: Token of DPSW object
12022 + * @if_id: Interface Identifier
12023 + * @frame_length: Returned maximum Frame Length
12025 + * Return: Completion status. '0' on Success; Error code otherwise.
12027 +int dpsw_if_get_max_frame_length(struct fsl_mc_io *mc_io,
12031 + u16 *frame_length)
12033 + struct mc_command cmd = { 0 };
12034 + struct dpsw_cmd_if_get_max_frame_length *cmd_params;
12035 + struct dpsw_rsp_if_get_max_frame_length *rsp_params;
12038 + /* prepare command */
12039 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_IF_GET_MAX_FRAME_LENGTH,
12042 + cmd_params = (struct dpsw_cmd_if_get_max_frame_length *)cmd.params;
12043 + cmd_params->if_id = cpu_to_le16(if_id);
12045 + /* send command to mc*/
12046 + err = mc_send_command(mc_io, &cmd);
12050 + rsp_params = (struct dpsw_rsp_if_get_max_frame_length *)cmd.params;
12051 + *frame_length = le16_to_cpu(rsp_params->frame_length);
12057 + * dpsw_vlan_add() - Adding new VLAN to DPSW.
12058 + * @mc_io: Pointer to MC portal's I/O object
12059 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12060 + * @token: Token of DPSW object
12061 + * @vlan_id: VLAN Identifier
12062 + * @cfg: VLAN configuration
12064 + * Only VLAN ID and FDB ID are required parameters here.
12065 + * 12 bit VLAN ID is defined in IEEE802.1Q.
12066 + * Adding a duplicate VLAN ID is not allowed.
12067 + * FDB ID can be shared across multiple VLANs. Shared learning
12068 + * is obtained by calling dpsw_vlan_add for multiple VLAN IDs
12069 + * with same fdb_id
12071 + * Return: Completion status. '0' on Success; Error code otherwise.
12073 +int dpsw_vlan_add(struct fsl_mc_io *mc_io,
12077 + const struct dpsw_vlan_cfg *cfg)
12079 + struct mc_command cmd = { 0 };
12080 + struct dpsw_vlan_add *cmd_params;
12082 + /* prepare command */
12083 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD,
12086 + cmd_params = (struct dpsw_vlan_add *)cmd.params;
12087 + cmd_params->fdb_id = cpu_to_le16(cfg->fdb_id);
12088 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12090 + /* send command to mc*/
12091 + return mc_send_command(mc_io, &cmd);
12095 + * dpsw_vlan_add_if() - Adding a set of interfaces to an existing VLAN.
12096 + * @mc_io: Pointer to MC portal's I/O object
12097 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12098 + * @token: Token of DPSW object
12099 + * @vlan_id: VLAN Identifier
12100 + * @cfg: Set of interfaces to add
12102 + * It adds only interfaces not belonging to this VLAN yet,
12103 + * otherwise an error is generated and an entire command is
12104 + * ignored. This function can be called numerous times always
12105 + * providing required interfaces delta.
12107 + * Return: Completion status. '0' on Success; Error code otherwise.
12109 +int dpsw_vlan_add_if(struct fsl_mc_io *mc_io,
12113 + const struct dpsw_vlan_if_cfg *cfg)
12115 + struct mc_command cmd = { 0 };
12116 + struct dpsw_cmd_vlan_manage_if *cmd_params;
12118 + /* prepare command */
12119 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD_IF,
12122 + cmd_params = (struct dpsw_cmd_vlan_manage_if *)cmd.params;
12123 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12124 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12126 + /* send command to mc*/
12127 + return mc_send_command(mc_io, &cmd);
12131 + * dpsw_vlan_add_if_untagged() - Defining a set of interfaces that should be
12132 + * transmitted as untagged.
12133 + * @mc_io: Pointer to MC portal's I/O object
12134 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12135 + * @token: Token of DPSW object
12136 + * @vlan_id: VLAN Identifier
12137 + * @cfg: Set of interfaces that should be transmitted as untagged
12139 + * These interfaces should already belong to this VLAN.
12140 + * By default all interfaces are transmitted as tagged.
12141 + * Providing un-existing interface or untagged interface that is
12142 + * configured untagged already generates an error and the entire
12143 + * command is ignored.
12145 + * Return: Completion status. '0' on Success; Error code otherwise.
12147 +int dpsw_vlan_add_if_untagged(struct fsl_mc_io *mc_io,
12151 + const struct dpsw_vlan_if_cfg *cfg)
12153 + struct mc_command cmd = { 0 };
12154 + struct dpsw_cmd_vlan_manage_if *cmd_params;
12156 + /* prepare command */
12157 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD_IF_UNTAGGED,
12160 + cmd_params = (struct dpsw_cmd_vlan_manage_if *)cmd.params;
12161 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12162 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12164 + /* send command to mc*/
12165 + return mc_send_command(mc_io, &cmd);
12169 + * dpsw_vlan_add_if_flooding() - Define a set of interfaces that should be
12170 + * included in flooding when frame with unknown destination
12171 + * unicast MAC arrived.
12172 + * @mc_io: Pointer to MC portal's I/O object
12173 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12174 + * @token: Token of DPSW object
12175 + * @vlan_id: VLAN Identifier
12176 + * @cfg: Set of interfaces that should be used for flooding
12178 + * These interfaces should belong to this VLAN. By default all
12179 + * interfaces are included into flooding list. Providing
12180 + * un-existing interface or an interface that already in the
12181 + * flooding list generates an error and the entire command is
12184 + * Return: Completion status. '0' on Success; Error code otherwise.
12186 +int dpsw_vlan_add_if_flooding(struct fsl_mc_io *mc_io,
12190 + const struct dpsw_vlan_if_cfg *cfg)
12192 + struct mc_command cmd = { 0 };
12193 + struct dpsw_cmd_vlan_manage_if *cmd_params;
12195 + /* prepare command */
12196 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_ADD_IF_FLOODING,
12199 + cmd_params = (struct dpsw_cmd_vlan_manage_if *)cmd.params;
12200 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12201 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12203 + /* send command to mc*/
12204 + return mc_send_command(mc_io, &cmd);
12208 + * dpsw_vlan_remove_if() - Remove interfaces from an existing VLAN.
12209 + * @mc_io: Pointer to MC portal's I/O object
12210 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12211 + * @token: Token of DPSW object
12212 + * @vlan_id: VLAN Identifier
12213 + * @cfg: Set of interfaces that should be removed
12215 + * Interfaces must belong to this VLAN, otherwise an error
12216 + * is returned and an the command is ignored
12218 + * Return: Completion status. '0' on Success; Error code otherwise.
12220 +int dpsw_vlan_remove_if(struct fsl_mc_io *mc_io,
12224 + const struct dpsw_vlan_if_cfg *cfg)
12226 + struct mc_command cmd = { 0 };
12227 + struct dpsw_cmd_vlan_manage_if *cmd_params;
12229 + /* prepare command */
12230 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE_IF,
12233 + cmd_params = (struct dpsw_cmd_vlan_manage_if *)cmd.params;
12234 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12235 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12237 + /* send command to mc*/
12238 + return mc_send_command(mc_io, &cmd);
12242 + * dpsw_vlan_remove_if_untagged() - Define a set of interfaces that should be
12243 + * converted from transmitted as untagged to transmit as tagged.
12244 + * @mc_io: Pointer to MC portal's I/O object
12245 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12246 + * @token: Token of DPSW object
12247 + * @vlan_id: VLAN Identifier
12248 + * @cfg: Set of interfaces that should be removed
12250 + * Interfaces provided by API have to belong to this VLAN and
12251 + * configured untagged, otherwise an error is returned and the
12252 + * command is ignored
12254 + * Return: Completion status. '0' on Success; Error code otherwise.
12256 +int dpsw_vlan_remove_if_untagged(struct fsl_mc_io *mc_io,
12260 + const struct dpsw_vlan_if_cfg *cfg)
12262 + struct mc_command cmd = { 0 };
12263 + struct dpsw_cmd_vlan_manage_if *cmd_params;
12265 + /* prepare command */
12266 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED,
12269 + cmd_params = (struct dpsw_cmd_vlan_manage_if *)cmd.params;
12270 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12271 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12273 + /* send command to mc*/
12274 + return mc_send_command(mc_io, &cmd);
12278 + * dpsw_vlan_remove_if_flooding() - Define a set of interfaces that should be
12279 + * removed from the flooding list.
12280 + * @mc_io: Pointer to MC portal's I/O object
12281 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12282 + * @token: Token of DPSW object
12283 + * @vlan_id: VLAN Identifier
12284 + * @cfg: Set of interfaces used for flooding
12286 + * Return: Completion status. '0' on Success; Error code otherwise.
12288 +int dpsw_vlan_remove_if_flooding(struct fsl_mc_io *mc_io,
12292 + const struct dpsw_vlan_if_cfg *cfg)
12294 + struct mc_command cmd = { 0 };
12295 + struct dpsw_cmd_vlan_manage_if *cmd_params;
12297 + /* prepare command */
12298 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE_IF_FLOODING,
12301 + cmd_params = (struct dpsw_cmd_vlan_manage_if *)cmd.params;
12302 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12303 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12305 + /* send command to mc*/
12306 + return mc_send_command(mc_io, &cmd);
12310 + * dpsw_vlan_remove() - Remove an entire VLAN
12311 + * @mc_io: Pointer to MC portal's I/O object
12312 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12313 + * @token: Token of DPSW object
12314 + * @vlan_id: VLAN Identifier
12316 + * Return: Completion status. '0' on Success; Error code otherwise.
12318 +int dpsw_vlan_remove(struct fsl_mc_io *mc_io,
12323 + struct mc_command cmd = { 0 };
12324 + struct dpsw_cmd_vlan_remove *cmd_params;
12326 + /* prepare command */
12327 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_REMOVE,
12330 + cmd_params = (struct dpsw_cmd_vlan_remove *)cmd.params;
12331 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12333 + /* send command to mc*/
12334 + return mc_send_command(mc_io, &cmd);
12338 + * dpsw_vlan_get_attributes() - Get VLAN attributes
12339 + * @mc_io: Pointer to MC portal's I/O object
12340 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12341 + * @token: Token of DPSW object
12342 + * @vlan_id: VLAN Identifier
12343 + * @attr: Returned DPSW attributes
12345 + * Return: Completion status. '0' on Success; Error code otherwise.
12347 +int dpsw_vlan_get_attributes(struct fsl_mc_io *mc_io,
12351 + struct dpsw_vlan_attr *attr)
12353 + struct mc_command cmd = { 0 };
12354 + struct dpsw_cmd_vlan_get_attr *cmd_params;
12355 + struct dpsw_rsp_vlan_get_attr *rsp_params;
12358 + /* prepare command */
12359 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_ATTRIBUTES,
12362 + cmd_params = (struct dpsw_cmd_vlan_get_attr *)cmd.params;
12363 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12365 + /* send command to mc*/
12366 + err = mc_send_command(mc_io, &cmd);
12370 + /* retrieve response parameters */
12371 + rsp_params = (struct dpsw_rsp_vlan_get_attr *)cmd.params;
12372 + attr->fdb_id = le16_to_cpu(rsp_params->fdb_id);
12373 + attr->num_ifs = le16_to_cpu(rsp_params->num_ifs);
12374 + attr->num_untagged_ifs = le16_to_cpu(rsp_params->num_untagged_ifs);
12375 + attr->num_flooding_ifs = le16_to_cpu(rsp_params->num_flooding_ifs);
12381 + * dpsw_vlan_get_if() - Get interfaces belong to this VLAN
12382 + * @mc_io: Pointer to MC portal's I/O object
12383 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12384 + * @token: Token of DPSW object
12385 + * @vlan_id: VLAN Identifier
12386 + * @cfg: Returned set of interfaces belong to this VLAN
12388 + * Return: Completion status. '0' on Success; Error code otherwise.
12390 +int dpsw_vlan_get_if(struct fsl_mc_io *mc_io,
12394 + struct dpsw_vlan_if_cfg *cfg)
12396 + struct mc_command cmd = { 0 };
12397 + struct dpsw_cmd_vlan_get_if *cmd_params;
12398 + struct dpsw_rsp_vlan_get_if *rsp_params;
12401 + /* prepare command */
12402 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_IF,
12405 + cmd_params = (struct dpsw_cmd_vlan_get_if *)cmd.params;
12406 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12408 + /* send command to mc*/
12409 + err = mc_send_command(mc_io, &cmd);
12413 + /* retrieve response parameters */
12414 + rsp_params = (struct dpsw_rsp_vlan_get_if *)cmd.params;
12415 + cfg->num_ifs = le16_to_cpu(rsp_params->num_ifs);
12416 + read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, rsp_params->if_id);
12422 + * dpsw_vlan_get_if_flooding() - Get interfaces used in flooding for this VLAN
12423 + * @mc_io: Pointer to MC portal's I/O object
12424 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12425 + * @token: Token of DPSW object
12426 + * @vlan_id: VLAN Identifier
12427 + * @cfg: Returned set of flooding interfaces
12429 + * Return: Completion status. '0' on Success; Error code otherwise.
12432 +int dpsw_vlan_get_if_flooding(struct fsl_mc_io *mc_io,
12436 + struct dpsw_vlan_if_cfg *cfg)
12438 + struct mc_command cmd = { 0 };
12439 + struct dpsw_cmd_vlan_get_if_flooding *cmd_params;
12440 + struct dpsw_rsp_vlan_get_if_flooding *rsp_params;
12443 + /* prepare command */
12444 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_IF_FLOODING,
12447 + cmd_params = (struct dpsw_cmd_vlan_get_if_flooding *)cmd.params;
12448 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12450 + /* send command to mc*/
12451 + err = mc_send_command(mc_io, &cmd);
12455 + /* retrieve response parameters */
12456 + rsp_params = (struct dpsw_rsp_vlan_get_if_flooding *)cmd.params;
12457 + cfg->num_ifs = le16_to_cpu(rsp_params->num_ifs);
12458 + read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, rsp_params->if_id);
12464 + * dpsw_vlan_get_if_untagged() - Get interfaces that should be transmitted as
12466 + * @mc_io: Pointer to MC portal's I/O object
12467 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12468 + * @token: Token of DPSW object
12469 + * @vlan_id: VLAN Identifier
12470 + * @cfg: Returned set of untagged interfaces
12472 + * Return: Completion status. '0' on Success; Error code otherwise.
12474 +int dpsw_vlan_get_if_untagged(struct fsl_mc_io *mc_io,
12478 + struct dpsw_vlan_if_cfg *cfg)
12480 + struct mc_command cmd = { 0 };
12481 + struct dpsw_cmd_vlan_get_if_untagged *cmd_params;
12482 + struct dpsw_rsp_vlan_get_if_untagged *rsp_params;
12485 + /* prepare command */
12486 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_VLAN_GET_IF_UNTAGGED,
12489 + cmd_params = (struct dpsw_cmd_vlan_get_if_untagged *)cmd.params;
12490 + cmd_params->vlan_id = cpu_to_le16(vlan_id);
12492 + /* send command to mc*/
12493 + err = mc_send_command(mc_io, &cmd);
12497 + /* retrieve response parameters */
12498 + rsp_params = (struct dpsw_rsp_vlan_get_if_untagged *)cmd.params;
12499 + cfg->num_ifs = le16_to_cpu(rsp_params->num_ifs);
12500 + read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, rsp_params->if_id);
12506 + * dpsw_fdb_add() - Add FDB to switch and Returns handle to FDB table for
12508 + * @mc_io: Pointer to MC portal's I/O object
12509 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12510 + * @token: Token of DPSW object
12511 + * @fdb_id: Returned Forwarding Database Identifier
12512 + * @cfg: FDB Configuration
12514 + * Return: Completion status. '0' on Success; Error code otherwise.
12516 +int dpsw_fdb_add(struct fsl_mc_io *mc_io,
12520 + const struct dpsw_fdb_cfg *cfg)
12522 + struct mc_command cmd = { 0 };
12523 + struct dpsw_cmd_fdb_add *cmd_params;
12524 + struct dpsw_rsp_fdb_add *rsp_params;
12527 + /* prepare command */
12528 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_ADD,
12531 + cmd_params = (struct dpsw_cmd_fdb_add *)cmd.params;
12532 + cmd_params->fdb_aging_time = cpu_to_le16(cfg->fdb_aging_time);
12533 + cmd_params->num_fdb_entries = cpu_to_le16(cfg->num_fdb_entries);
12535 + /* send command to mc*/
12536 + err = mc_send_command(mc_io, &cmd);
12540 + /* retrieve response parameters */
12541 + rsp_params = (struct dpsw_rsp_fdb_add *)cmd.params;
12542 + *fdb_id = le16_to_cpu(rsp_params->fdb_id);
12548 + * dpsw_fdb_remove() - Remove FDB from switch
12549 + * @mc_io: Pointer to MC portal's I/O object
12550 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12551 + * @token: Token of DPSW object
12552 + * @fdb_id: Forwarding Database Identifier
12554 + * Return: Completion status. '0' on Success; Error code otherwise.
12556 +int dpsw_fdb_remove(struct fsl_mc_io *mc_io,
12561 + struct mc_command cmd = { 0 };
12562 + struct dpsw_cmd_fdb_remove *cmd_params;
12564 + /* prepare command */
12565 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_REMOVE,
12568 + cmd_params = (struct dpsw_cmd_fdb_remove *)cmd.params;
12569 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12571 + /* send command to mc*/
12572 + return mc_send_command(mc_io, &cmd);
12576 + * dpsw_fdb_add_unicast() - Function adds an unicast entry into MAC lookup table
12577 + * @mc_io: Pointer to MC portal's I/O object
12578 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12579 + * @token: Token of DPSW object
12580 + * @fdb_id: Forwarding Database Identifier
12581 + * @cfg: Unicast entry configuration
12583 + * Return: Completion status. '0' on Success; Error code otherwise.
12585 +int dpsw_fdb_add_unicast(struct fsl_mc_io *mc_io,
12589 + const struct dpsw_fdb_unicast_cfg *cfg)
12591 + struct mc_command cmd = { 0 };
12592 + struct dpsw_cmd_fdb_add_unicast *cmd_params;
12595 + /* prepare command */
12596 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_ADD_UNICAST,
12599 + cmd_params = (struct dpsw_cmd_fdb_add_unicast *)cmd.params;
12600 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12601 + cmd_params->if_egress = cpu_to_le16(cfg->if_egress);
12602 + for (i = 0; i < 6; i++)
12603 + cmd_params->mac_addr[i] = cfg->mac_addr[5 - i];
12604 + dpsw_set_field(cmd_params->type, ENTRY_TYPE, cfg->type);
12606 + /* send command to mc*/
12607 + return mc_send_command(mc_io, &cmd);
12611 + * dpsw_fdb_get_unicast() - Get unicast entry from MAC lookup table by
12612 + * unicast Ethernet address
12613 + * @mc_io: Pointer to MC portal's I/O object
12614 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12615 + * @token: Token of DPSW object
12616 + * @fdb_id: Forwarding Database Identifier
12617 + * @cfg: Returned unicast entry configuration
12619 + * Return: Completion status. '0' on Success; Error code otherwise.
12621 +int dpsw_fdb_get_unicast(struct fsl_mc_io *mc_io,
12625 + struct dpsw_fdb_unicast_cfg *cfg)
12627 + struct mc_command cmd = { 0 };
12628 + struct dpsw_cmd_fdb_get_unicast *cmd_params;
12629 + struct dpsw_rsp_fdb_get_unicast *rsp_params;
12632 + /* prepare command */
12633 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_GET_UNICAST,
12636 + cmd_params = (struct dpsw_cmd_fdb_get_unicast *)cmd.params;
12637 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12638 + for (i = 0; i < 6; i++)
12639 + cmd_params->mac_addr[i] = cfg->mac_addr[5 - i];
12641 + /* send command to mc*/
12642 + err = mc_send_command(mc_io, &cmd);
12646 + /* retrieve response parameters */
12647 + rsp_params = (struct dpsw_rsp_fdb_get_unicast *)cmd.params;
12648 + cfg->if_egress = le16_to_cpu(rsp_params->if_egress);
12649 + cfg->type = dpsw_get_field(rsp_params->type, ENTRY_TYPE);
12655 + * dpsw_fdb_remove_unicast() - removes an entry from MAC lookup table
12656 + * @mc_io: Pointer to MC portal's I/O object
12657 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12658 + * @token: Token of DPSW object
12659 + * @fdb_id: Forwarding Database Identifier
12660 + * @cfg: Unicast entry configuration
12662 + * Return: Completion status. '0' on Success; Error code otherwise.
12664 +int dpsw_fdb_remove_unicast(struct fsl_mc_io *mc_io,
12668 + const struct dpsw_fdb_unicast_cfg *cfg)
12670 + struct mc_command cmd = { 0 };
12671 + struct dpsw_cmd_fdb_remove_unicast *cmd_params;
12674 + /* prepare command */
12675 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_REMOVE_UNICAST,
12678 + cmd_params = (struct dpsw_cmd_fdb_remove_unicast *)cmd.params;
12679 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12680 + for (i = 0; i < 6; i++)
12681 + cmd_params->mac_addr[i] = cfg->mac_addr[5 - i];
12682 + cmd_params->if_egress = cpu_to_le16(cfg->if_egress);
12683 + dpsw_set_field(cmd_params->type, ENTRY_TYPE, cfg->type);
12685 + /* send command to mc*/
12686 + return mc_send_command(mc_io, &cmd);
12690 + * dpsw_fdb_add_multicast() - Add a set of egress interfaces to multi-cast group
12691 + * @mc_io: Pointer to MC portal's I/O object
12692 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12693 + * @token: Token of DPSW object
12694 + * @fdb_id: Forwarding Database Identifier
12695 + * @cfg: Multicast entry configuration
12697 + * If group doesn't exist, it will be created.
12698 + * It adds only interfaces not belonging to this multicast group
12699 + * yet, otherwise error will be generated and the command is
12701 + * This function may be called numerous times always providing
12702 + * required interfaces delta.
12704 + * Return: Completion status. '0' on Success; Error code otherwise.
12706 +int dpsw_fdb_add_multicast(struct fsl_mc_io *mc_io,
12710 + const struct dpsw_fdb_multicast_cfg *cfg)
12712 + struct mc_command cmd = { 0 };
12713 + struct dpsw_cmd_fdb_add_multicast *cmd_params;
12716 + /* prepare command */
12717 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_ADD_MULTICAST,
12720 + cmd_params = (struct dpsw_cmd_fdb_add_multicast *)cmd.params;
12721 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12722 + cmd_params->num_ifs = cpu_to_le16(cfg->num_ifs);
12723 + dpsw_set_field(cmd_params->type, ENTRY_TYPE, cfg->type);
12724 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12725 + for (i = 0; i < 6; i++)
12726 + cmd_params->mac_addr[i] = cfg->mac_addr[5 - i];
12728 + /* send command to mc*/
12729 + return mc_send_command(mc_io, &cmd);
12733 + * dpsw_fdb_get_multicast() - Reading multi-cast group by multi-cast Ethernet
12735 + * @mc_io: Pointer to MC portal's I/O object
12736 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12737 + * @token: Token of DPSW object
12738 + * @fdb_id: Forwarding Database Identifier
12739 + * @cfg: Returned multicast entry configuration
12741 + * Return: Completion status. '0' on Success; Error code otherwise.
12743 +int dpsw_fdb_get_multicast(struct fsl_mc_io *mc_io,
12747 + struct dpsw_fdb_multicast_cfg *cfg)
12749 + struct mc_command cmd = { 0 };
12750 + struct dpsw_cmd_fdb_get_multicast *cmd_params;
12751 + struct dpsw_rsp_fdb_get_multicast *rsp_params;
12754 + /* prepare command */
12755 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_GET_MULTICAST,
12758 + cmd_params = (struct dpsw_cmd_fdb_get_multicast *)cmd.params;
12759 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12760 + for (i = 0; i < 6; i++)
12761 + cmd_params->mac_addr[i] = cfg->mac_addr[5 - i];
12763 + /* send command to mc*/
12764 + err = mc_send_command(mc_io, &cmd);
12768 + /* retrieve response parameters */
12769 + rsp_params = (struct dpsw_rsp_fdb_get_multicast *)cmd.params;
12770 + cfg->num_ifs = le16_to_cpu(rsp_params->num_ifs);
12771 + cfg->type = dpsw_get_field(rsp_params->type, ENTRY_TYPE);
12772 + read_if_id_bitmap(cfg->if_id, &cfg->num_ifs, rsp_params->if_id);
12778 + * dpsw_fdb_remove_multicast() - Removing interfaces from an existing multicast
12780 + * @mc_io: Pointer to MC portal's I/O object
12781 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12782 + * @token: Token of DPSW object
12783 + * @fdb_id: Forwarding Database Identifier
12784 + * @cfg: Multicast entry configuration
12786 + * Interfaces provided by this API have to exist in the group,
12787 + * otherwise an error will be returned and an entire command
12788 + * ignored. If there is no interface left in the group,
12789 + * an entire group is deleted
12791 + * Return: Completion status. '0' on Success; Error code otherwise.
12793 +int dpsw_fdb_remove_multicast(struct fsl_mc_io *mc_io,
12797 + const struct dpsw_fdb_multicast_cfg *cfg)
12799 + struct mc_command cmd = { 0 };
12800 + struct dpsw_cmd_fdb_remove_multicast *cmd_params;
12803 + /* prepare command */
12804 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_REMOVE_MULTICAST,
12807 + cmd_params = (struct dpsw_cmd_fdb_remove_multicast *)cmd.params;
12808 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12809 + cmd_params->num_ifs = cpu_to_le16(cfg->num_ifs);
12810 + dpsw_set_field(cmd_params->type, ENTRY_TYPE, cfg->type);
12811 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
12812 + for (i = 0; i < 6; i++)
12813 + cmd_params->mac_addr[i] = cfg->mac_addr[5 - i];
12815 + /* send command to mc*/
12816 + return mc_send_command(mc_io, &cmd);
12820 + * dpsw_fdb_set_learning_mode() - Define FDB learning mode
12821 + * @mc_io: Pointer to MC portal's I/O object
12822 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12823 + * @token: Token of DPSW object
12824 + * @fdb_id: Forwarding Database Identifier
12825 + * @mode: Learning mode
12827 + * Return: Completion status. '0' on Success; Error code otherwise.
12829 +int dpsw_fdb_set_learning_mode(struct fsl_mc_io *mc_io,
12833 + enum dpsw_fdb_learning_mode mode)
12835 + struct mc_command cmd = { 0 };
12836 + struct dpsw_cmd_fdb_set_learning_mode *cmd_params;
12838 + /* prepare command */
12839 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_SET_LEARNING_MODE,
12842 + cmd_params = (struct dpsw_cmd_fdb_set_learning_mode *)cmd.params;
12843 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12844 + dpsw_set_field(cmd_params->mode, LEARNING_MODE, mode);
12846 + /* send command to mc*/
12847 + return mc_send_command(mc_io, &cmd);
12851 + * dpsw_fdb_get_attributes() - Get FDB attributes
12852 + * @mc_io: Pointer to MC portal's I/O object
12853 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12854 + * @token: Token of DPSW object
12855 + * @fdb_id: Forwarding Database Identifier
12856 + * @attr: Returned FDB attributes
12858 + * Return: Completion status. '0' on Success; Error code otherwise.
12860 +int dpsw_fdb_get_attributes(struct fsl_mc_io *mc_io,
12864 + struct dpsw_fdb_attr *attr)
12866 + struct mc_command cmd = { 0 };
12867 + struct dpsw_cmd_fdb_get_attr *cmd_params;
12868 + struct dpsw_rsp_fdb_get_attr *rsp_params;
12871 + /* prepare command */
12872 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_FDB_GET_ATTR,
12875 + cmd_params = (struct dpsw_cmd_fdb_get_attr *)cmd.params;
12876 + cmd_params->fdb_id = cpu_to_le16(fdb_id);
12878 + /* send command to mc*/
12879 + err = mc_send_command(mc_io, &cmd);
12883 + /* retrieve response parameters */
12884 + rsp_params = (struct dpsw_rsp_fdb_get_attr *)cmd.params;
12885 + attr->max_fdb_entries = le16_to_cpu(rsp_params->max_fdb_entries);
12886 + attr->fdb_aging_time = le16_to_cpu(rsp_params->fdb_aging_time);
12887 + attr->learning_mode = dpsw_get_field(rsp_params->learning_mode,
12889 + attr->num_fdb_mc_groups = le16_to_cpu(rsp_params->num_fdb_mc_groups);
12890 + attr->max_fdb_mc_groups = le16_to_cpu(rsp_params->max_fdb_mc_groups);
12896 + * dpsw_acl_add() - Adds ACL to L2 switch.
12897 + * @mc_io: Pointer to MC portal's I/O object
12898 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12899 + * @token: Token of DPSW object
12900 + * @acl_id: Returned ACL ID, for the future reference
12901 + * @cfg: ACL configuration
12903 + * Create Access Control List. Multiple ACLs can be created and
12904 + * co-exist in L2 switch
12906 + * Return: '0' on Success; Error code otherwise.
12908 +int dpsw_acl_add(struct fsl_mc_io *mc_io,
12912 + const struct dpsw_acl_cfg *cfg)
12914 + struct mc_command cmd = { 0 };
12915 + struct dpsw_cmd_acl_add *cmd_params;
12916 + struct dpsw_rsp_acl_add *rsp_params;
12919 + /* prepare command */
12920 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_ADD,
12923 + cmd_params = (struct dpsw_cmd_acl_add *)cmd.params;
12924 + cmd_params->max_entries = cpu_to_le16(cfg->max_entries);
12926 + /* send command to mc*/
12927 + err = mc_send_command(mc_io, &cmd);
12931 + /* retrieve response parameters */
12932 + rsp_params = (struct dpsw_rsp_acl_add *)cmd.params;
12933 + *acl_id = le16_to_cpu(rsp_params->acl_id);
12939 + * dpsw_acl_remove() - Removes ACL from L2 switch.
12940 + * @mc_io: Pointer to MC portal's I/O object
12941 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
12942 + * @token: Token of DPSW object
12943 + * @acl_id: ACL ID
12945 + * Return: '0' on Success; Error code otherwise.
12947 +int dpsw_acl_remove(struct fsl_mc_io *mc_io,
12952 + struct mc_command cmd = { 0 };
12953 + struct dpsw_cmd_acl_remove *cmd_params;
12955 + /* prepare command */
12956 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_REMOVE,
12959 + cmd_params = (struct dpsw_cmd_acl_remove *)cmd.params;
12960 + cmd_params->acl_id = cpu_to_le16(acl_id);
12962 + /* send command to mc*/
12963 + return mc_send_command(mc_io, &cmd);
12967 + * dpsw_acl_prepare_entry_cfg() - Set an entry to ACL.
12969 + * @entry_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
12971 + * This function has to be called before adding or removing acl_entry
12974 +void dpsw_acl_prepare_entry_cfg(const struct dpsw_acl_key *key,
12975 + u8 *entry_cfg_buf)
12977 + struct dpsw_prep_acl_entry *ext_params;
12980 + ext_params = (struct dpsw_prep_acl_entry *)entry_cfg_buf;
12982 + for (i = 0; i < 6; i++) {
12983 + ext_params->match_l2_dest_mac[i] =
12984 + key->match.l2_dest_mac[5 - i];
12985 + ext_params->match_l2_source_mac[i] =
12986 + key->match.l2_source_mac[5 - i];
12987 + ext_params->mask_l2_dest_mac[i] =
12988 + key->mask.l2_dest_mac[5 - i];
12989 + ext_params->mask_l2_source_mac[i] =
12990 + key->mask.l2_source_mac[5 - i];
12993 + ext_params->match_l2_tpid = cpu_to_le16(key->match.l2_tpid);
12994 + ext_params->match_l2_vlan_id = cpu_to_le16(key->match.l2_vlan_id);
12995 + ext_params->match_l3_dest_ip = cpu_to_le32(key->match.l3_dest_ip);
12996 + ext_params->match_l3_source_ip = cpu_to_le32(key->match.l3_source_ip);
12997 + ext_params->match_l4_dest_port = cpu_to_le16(key->match.l4_dest_port);
12998 + ext_params->match_l2_ether_type = cpu_to_le16(key->match.l2_ether_type);
12999 + ext_params->match_l2_pcp_dei = key->match.l2_pcp_dei;
13000 + ext_params->match_l3_dscp = key->match.l3_dscp;
13001 + ext_params->match_l4_source_port =
13002 + cpu_to_le16(key->match.l4_source_port);
13004 + ext_params->mask_l2_tpid = cpu_to_le16(key->mask.l2_tpid);
13005 + ext_params->mask_l2_vlan_id = cpu_to_le16(key->mask.l2_vlan_id);
13006 + ext_params->mask_l3_dest_ip = cpu_to_le32(key->mask.l3_dest_ip);
13007 + ext_params->mask_l3_source_ip = cpu_to_le32(key->mask.l3_source_ip);
13008 + ext_params->mask_l4_dest_port = cpu_to_le16(key->mask.l4_dest_port);
13009 + ext_params->mask_l4_source_port = cpu_to_le16(key->mask.l4_source_port);
13010 + ext_params->mask_l2_ether_type = cpu_to_le16(key->mask.l2_ether_type);
13011 + ext_params->mask_l2_pcp_dei = key->mask.l2_pcp_dei;
13012 + ext_params->mask_l3_dscp = key->mask.l3_dscp;
13013 + ext_params->match_l3_protocol = key->match.l3_protocol;
13014 + ext_params->mask_l3_protocol = key->mask.l3_protocol;
13018 + * dpsw_acl_add_entry() - Adds an entry to ACL.
13019 + * @mc_io: Pointer to MC portal's I/O object
13020 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13021 + * @token: Token of DPSW object
13022 + * @acl_id: ACL ID
13023 + * @cfg: Entry configuration
13025 + * warning: This function has to be called after dpsw_acl_set_entry_cfg()
13027 + * Return: '0' on Success; Error code otherwise.
13029 +int dpsw_acl_add_entry(struct fsl_mc_io *mc_io,
13033 + const struct dpsw_acl_entry_cfg *cfg)
13035 + struct mc_command cmd = { 0 };
13036 + struct dpsw_cmd_acl_entry *cmd_params;
13038 + /* prepare command */
13039 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_ADD_ENTRY,
13042 + cmd_params = (struct dpsw_cmd_acl_entry *)cmd.params;
13043 + cmd_params->acl_id = cpu_to_le16(acl_id);
13044 + cmd_params->result_if_id = cpu_to_le16(cfg->result.if_id);
13045 + cmd_params->precedence = cpu_to_le32(cfg->precedence);
13046 + dpsw_set_field(cmd_params->result_action, RESULT_ACTION,
13047 + cfg->result.action);
13048 + cmd_params->key_iova = cpu_to_le64(cfg->key_iova);
13050 + /* send command to mc*/
13051 + return mc_send_command(mc_io, &cmd);
13055 + * dpsw_acl_remove_entry() - Removes an entry from ACL.
13056 + * @mc_io: Pointer to MC portal's I/O object
13057 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13058 + * @token: Token of DPSW object
13059 + * @acl_id: ACL ID
13060 + * @cfg: Entry configuration
13062 + * warning: This function has to be called after dpsw_acl_set_entry_cfg()
13064 + * Return: '0' on Success; Error code otherwise.
13066 +int dpsw_acl_remove_entry(struct fsl_mc_io *mc_io,
13070 + const struct dpsw_acl_entry_cfg *cfg)
13072 + struct mc_command cmd = { 0 };
13073 + struct dpsw_cmd_acl_entry *cmd_params;
13075 + /* prepare command */
13076 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_REMOVE_ENTRY,
13079 + cmd_params = (struct dpsw_cmd_acl_entry *)cmd.params;
13080 + cmd_params->acl_id = cpu_to_le16(acl_id);
13081 + cmd_params->result_if_id = cpu_to_le16(cfg->result.if_id);
13082 + cmd_params->precedence = cpu_to_le32(cfg->precedence);
13083 + dpsw_set_field(cmd_params->result_action, RESULT_ACTION,
13084 + cfg->result.action);
13085 + cmd_params->key_iova = cpu_to_le64(cfg->key_iova);
13087 + /* send command to mc*/
13088 + return mc_send_command(mc_io, &cmd);
13092 + * dpsw_acl_add_if() - Associate interface/interfaces with ACL.
13093 + * @mc_io: Pointer to MC portal's I/O object
13094 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13095 + * @token: Token of DPSW object
13096 + * @acl_id: ACL ID
13097 + * @cfg: Interfaces list
13099 + * Return: '0' on Success; Error code otherwise.
13101 +int dpsw_acl_add_if(struct fsl_mc_io *mc_io,
13105 + const struct dpsw_acl_if_cfg *cfg)
13107 + struct mc_command cmd = { 0 };
13108 + struct dpsw_cmd_acl_if *cmd_params;
13110 + /* prepare command */
13111 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_ADD_IF,
13114 + cmd_params = (struct dpsw_cmd_acl_if *)cmd.params;
13115 + cmd_params->acl_id = cpu_to_le16(acl_id);
13116 + cmd_params->num_ifs = cpu_to_le16(cfg->num_ifs);
13117 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
13119 + /* send command to mc*/
13120 + return mc_send_command(mc_io, &cmd);
13124 + * dpsw_acl_remove_if() - De-associate interface/interfaces from ACL.
13125 + * @mc_io: Pointer to MC portal's I/O object
13126 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13127 + * @token: Token of DPSW object
13128 + * @acl_id: ACL ID
13129 + * @cfg: Interfaces list
13131 + * Return: '0' on Success; Error code otherwise.
13133 +int dpsw_acl_remove_if(struct fsl_mc_io *mc_io,
13137 + const struct dpsw_acl_if_cfg *cfg)
13139 + struct mc_command cmd = { 0 };
13140 + struct dpsw_cmd_acl_if *cmd_params;
13142 + /* prepare command */
13143 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_REMOVE_IF,
13146 + cmd_params = (struct dpsw_cmd_acl_if *)cmd.params;
13147 + cmd_params->acl_id = cpu_to_le16(acl_id);
13148 + cmd_params->num_ifs = cpu_to_le16(cfg->num_ifs);
13149 + build_if_id_bitmap(cmd_params->if_id, cfg->if_id, cfg->num_ifs);
13151 + /* send command to mc*/
13152 + return mc_send_command(mc_io, &cmd);
13156 + * dpsw_acl_get_attributes() - Get specific counter of particular interface
13157 + * @mc_io: Pointer to MC portal's I/O object
13158 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13159 + * @token: Token of DPSW object
13160 + * @acl_id: ACL Identifier
13161 + * @attr: Returned ACL attributes
13163 + * Return: '0' on Success; Error code otherwise.
13165 +int dpsw_acl_get_attributes(struct fsl_mc_io *mc_io,
13169 + struct dpsw_acl_attr *attr)
13171 + struct mc_command cmd = { 0 };
13172 + struct dpsw_cmd_acl_get_attr *cmd_params;
13173 + struct dpsw_rsp_acl_get_attr *rsp_params;
13176 + /* prepare command */
13177 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_ACL_GET_ATTR,
13180 + cmd_params = (struct dpsw_cmd_acl_get_attr *)cmd.params;
13181 + cmd_params->acl_id = cpu_to_le16(acl_id);
13183 + /* send command to mc*/
13184 + err = mc_send_command(mc_io, &cmd);
13188 + /* retrieve response parameters */
13189 + rsp_params = (struct dpsw_rsp_acl_get_attr *)cmd.params;
13190 + attr->max_entries = le16_to_cpu(rsp_params->max_entries);
13191 + attr->num_entries = le16_to_cpu(rsp_params->num_entries);
13192 + attr->num_ifs = le16_to_cpu(rsp_params->num_ifs);
13198 + * dpsw_ctrl_if_get_attributes() - Obtain control interface attributes
13199 + * @mc_io: Pointer to MC portal's I/O object
13200 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13201 + * @token: Token of DPSW object
13202 + * @attr: Returned control interface attributes
13204 + * Return: '0' on Success; Error code otherwise.
13206 +int dpsw_ctrl_if_get_attributes(struct fsl_mc_io *mc_io,
13209 + struct dpsw_ctrl_if_attr *attr)
13211 + struct mc_command cmd = { 0 };
13212 + struct dpsw_rsp_ctrl_if_get_attr *rsp_params;
13215 + /* prepare command */
13216 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_GET_ATTR,
13220 + /* send command to mc*/
13221 + err = mc_send_command(mc_io, &cmd);
13225 + /* retrieve response parameters */
13226 + rsp_params = (struct dpsw_rsp_ctrl_if_get_attr *)cmd.params;
13227 + attr->rx_fqid = le32_to_cpu(rsp_params->rx_fqid);
13228 + attr->rx_err_fqid = le32_to_cpu(rsp_params->rx_err_fqid);
13229 + attr->tx_err_conf_fqid = le32_to_cpu(rsp_params->tx_err_conf_fqid);
13235 + * dpsw_ctrl_if_set_pools() - Set control interface buffer pools
13236 + * @mc_io: Pointer to MC portal's I/O object
13237 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13238 + * @token: Token of DPSW object
13239 + * @cfg: Buffer pools configuration
13241 + * Return: '0' on Success; Error code otherwise.
13243 +int dpsw_ctrl_if_set_pools(struct fsl_mc_io *mc_io,
13246 + const struct dpsw_ctrl_if_pools_cfg *pools)
13248 + struct mc_command cmd = { 0 };
13249 + struct dpsw_cmd_ctrl_if_set_pools *cmd_params;
13252 + /* prepare command */
13253 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_SET_POOLS,
13256 + cmd_params = (struct dpsw_cmd_ctrl_if_set_pools *)cmd.params;
13257 + cmd_params->num_dpbp = pools->num_dpbp;
13258 + for (i = 0; i < 8; i++) {
13259 + cmd_params->backup_pool = dpsw_set_bit(cmd_params->backup_pool,
13261 + pools->pools[i].backup_pool);
13262 + cmd_params->buffer_size[i] =
13263 + cpu_to_le16(pools->pools[i].buffer_size);
13264 + cmd_params->dpbp_id[i] =
13265 + cpu_to_le32(pools->pools[i].dpbp_id);
13268 + /* send command to mc*/
13269 + return mc_send_command(mc_io, &cmd);
13273 + * dpsw_ctrl_if_enable() - Enable control interface
13274 + * @mc_io: Pointer to MC portal's I/O object
13275 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13276 + * @token: Token of DPSW object
13278 + * Return: '0' on Success; Error code otherwise.
13280 +int dpsw_ctrl_if_enable(struct fsl_mc_io *mc_io,
13284 + struct mc_command cmd = { 0 };
13286 + /* prepare command */
13287 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_ENABLE,
13291 + /* send command to mc*/
13292 + return mc_send_command(mc_io, &cmd);
13296 + * dpsw_ctrl_if_disable() - Function disables control interface
13297 + * @mc_io: Pointer to MC portal's I/O object
13298 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13299 + * @token: Token of DPSW object
13301 + * Return: '0' on Success; Error code otherwise.
13303 +int dpsw_ctrl_if_disable(struct fsl_mc_io *mc_io,
13307 + struct mc_command cmd = { 0 };
13309 + /* prepare command */
13310 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_CTRL_IF_DISABLE,
13314 + /* send command to mc*/
13315 + return mc_send_command(mc_io, &cmd);
13319 + * dpsw_get_api_version() - Get Data Path Switch API version
13320 + * @mc_io: Pointer to MC portal's I/O object
13321 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
13322 + * @major_ver: Major version of data path switch API
13323 + * @minor_ver: Minor version of data path switch API
13325 + * Return: '0' on Success; Error code otherwise.
13327 +int dpsw_get_api_version(struct fsl_mc_io *mc_io,
13332 + struct mc_command cmd = { 0 };
13333 + struct dpsw_rsp_get_api_version *rsp_params;
13336 + cmd.header = mc_encode_cmd_header(DPSW_CMDID_GET_API_VERSION,
13340 + err = mc_send_command(mc_io, &cmd);
13344 + rsp_params = (struct dpsw_rsp_get_api_version *)cmd.params;
13345 + *major_ver = le16_to_cpu(rsp_params->version_major);
13346 + *minor_ver = le16_to_cpu(rsp_params->version_minor);
13351 +++ b/drivers/staging/fsl-dpaa2/ethsw/dpsw.h
13353 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
13355 + * Redistribution and use in source and binary forms, with or without
13356 + * modification, are permitted provided that the following conditions are met:
13357 + * * Redistributions of source code must retain the above copyright
13358 + * notice, this list of conditions and the following disclaimer.
13359 + * * Redistributions in binary form must reproduce the above copyright
13360 + * notice, this list of conditions and the following disclaimer in the
13361 + * documentation and/or other materials provided with the distribution.
13362 + * * Neither the name of the above-listed copyright holders nor the
13363 + * names of any contributors may be used to endorse or promote products
13364 + * derived from this software without specific prior written permission.
13367 + * ALTERNATIVELY, this software may be distributed under the terms of the
13368 + * GNU General Public License ("GPL") as published by the Free Software
13369 + * Foundation, either version 2 of that License or (at your option) any
13372 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
13373 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
13374 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13375 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
13376 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
13377 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
13378 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
13379 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
13380 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
13381 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
13382 + * POSSIBILITY OF SUCH DAMAGE.
13384 +#ifndef __FSL_DPSW_H
13385 +#define __FSL_DPSW_H
13387 +/* Data Path L2-Switch API
13388 + * Contains API for handling DPSW topology and functionality
13394 + * DPSW general definitions
13398 + * Maximum number of traffic class priorities
13400 +#define DPSW_MAX_PRIORITIES 8
13402 + * Maximum number of interfaces
13404 +#define DPSW_MAX_IF 64
13406 +int dpsw_open(struct fsl_mc_io *mc_io,
13411 +int dpsw_close(struct fsl_mc_io *mc_io,
13420 + * Disable flooding
13422 +#define DPSW_OPT_FLOODING_DIS 0x0000000000000001ULL
13424 + * Disable Multicast
13426 +#define DPSW_OPT_MULTICAST_DIS 0x0000000000000004ULL
13428 + * Support control interface
13430 +#define DPSW_OPT_CTRL_IF_DIS 0x0000000000000010ULL
13432 + * Disable flooding metering
13434 +#define DPSW_OPT_FLOODING_METERING_DIS 0x0000000000000020ULL
13436 + * Enable metering
13438 +#define DPSW_OPT_METERING_EN 0x0000000000000040ULL
13441 + * enum dpsw_component_type - component type of a bridge
13442 + * @DPSW_COMPONENT_TYPE_C_VLAN: A C-VLAN component of an
13443 + * enterprise VLAN bridge or of a Provider Bridge used
13444 + * to process C-tagged frames
13445 + * @DPSW_COMPONENT_TYPE_S_VLAN: An S-VLAN component of a
13446 + * Provider Bridge
13449 +enum dpsw_component_type {
13450 + DPSW_COMPONENT_TYPE_C_VLAN = 0,
13451 + DPSW_COMPONENT_TYPE_S_VLAN
13455 + * struct dpsw_cfg - DPSW configuration
13456 + * @num_ifs: Number of external and internal interfaces
13457 + * @adv: Advanced parameters; default is all zeros;
13458 + * use this structure to change default settings
13463 + * struct adv - Advanced parameters
13464 + * @options: Enable/Disable DPSW features (bitmap)
13465 + * @max_vlans: Maximum Number of VLAN's; 0 - indicates default 16
13466 + * @max_meters_per_if: Number of meters per interface
13467 + * @max_fdbs: Maximum Number of FDB's; 0 - indicates default 16
13468 + * @max_fdb_entries: Number of FDB entries for default FDB table;
13469 + * 0 - indicates default 1024 entries.
13470 + * @fdb_aging_time: Default FDB aging time for default FDB table;
13471 + * 0 - indicates default 300 seconds
13472 + * @max_fdb_mc_groups: Number of multicast groups in each FDB table;
13473 + * 0 - indicates default 32
13474 + * @component_type: Indicates the component type of this bridge
13479 + u8 max_meters_per_if;
13481 + u16 max_fdb_entries;
13482 + u16 fdb_aging_time;
13483 + u16 max_fdb_mc_groups;
13484 + enum dpsw_component_type component_type;
13488 +int dpsw_create(struct fsl_mc_io *mc_io,
13491 + const struct dpsw_cfg *cfg,
13494 +int dpsw_destroy(struct fsl_mc_io *mc_io,
13499 +int dpsw_enable(struct fsl_mc_io *mc_io,
13503 +int dpsw_disable(struct fsl_mc_io *mc_io,
13507 +int dpsw_is_enabled(struct fsl_mc_io *mc_io,
13512 +int dpsw_reset(struct fsl_mc_io *mc_io,
13517 + * DPSW IRQ Index and Events
13520 +#define DPSW_IRQ_INDEX_IF 0x0000
13521 +#define DPSW_IRQ_INDEX_L2SW 0x0001
13524 + * IRQ event - Indicates that the link state changed
13526 +#define DPSW_IRQ_EVENT_LINK_CHANGED 0x0001
13529 + * struct dpsw_irq_cfg - IRQ configuration
13530 + * @addr: Address that must be written to signal a message-based interrupt
13531 + * @val: Value to write into irq_addr address
13532 + * @irq_num: A user defined number associated with this IRQ
13534 +struct dpsw_irq_cfg {
13540 +int dpsw_set_irq(struct fsl_mc_io *mc_io,
13544 + struct dpsw_irq_cfg *irq_cfg);
13546 +int dpsw_get_irq(struct fsl_mc_io *mc_io,
13551 + struct dpsw_irq_cfg *irq_cfg);
13553 +int dpsw_set_irq_enable(struct fsl_mc_io *mc_io,
13559 +int dpsw_get_irq_enable(struct fsl_mc_io *mc_io,
13565 +int dpsw_set_irq_mask(struct fsl_mc_io *mc_io,
13571 +int dpsw_get_irq_mask(struct fsl_mc_io *mc_io,
13577 +int dpsw_get_irq_status(struct fsl_mc_io *mc_io,
13583 +int dpsw_clear_irq_status(struct fsl_mc_io *mc_io,
13590 + * struct dpsw_attr - Structure representing DPSW attributes
13591 + * @id: DPSW object ID
13592 + * @options: Enable/Disable DPSW features
13593 + * @max_vlans: Maximum Number of VLANs
13594 + * @max_meters_per_if: Number of meters per interface
13595 + * @max_fdbs: Maximum Number of FDBs
13596 + * @max_fdb_entries: Number of FDB entries for default FDB table;
13597 + * 0 - indicates default 1024 entries.
13598 + * @fdb_aging_time: Default FDB aging time for default FDB table;
13599 + * 0 - indicates default 300 seconds
13600 + * @max_fdb_mc_groups: Number of multicast groups in each FDB table;
13601 + * 0 - indicates default 32
13602 + * @mem_size: DPSW frame storage memory size
13603 + * @num_ifs: Number of interfaces
13604 + * @num_vlans: Current number of VLANs
13605 + * @num_fdbs: Current number of FDBs
13606 + * @component_type: Component type of this bridge
13608 +struct dpsw_attr {
13612 + u8 max_meters_per_if;
13614 + u16 max_fdb_entries;
13615 + u16 fdb_aging_time;
13616 + u16 max_fdb_mc_groups;
13621 + enum dpsw_component_type component_type;
13624 +int dpsw_get_attributes(struct fsl_mc_io *mc_io,
13627 + struct dpsw_attr *attr);
13629 +int dpsw_set_reflection_if(struct fsl_mc_io *mc_io,
13635 + * enum dpsw_action - Action selection for special/control frames
13636 + * @DPSW_ACTION_DROP: Drop frame
13637 + * @DPSW_ACTION_REDIRECT: Redirect frame to control port
13639 +enum dpsw_action {
13640 + DPSW_ACTION_DROP = 0,
13641 + DPSW_ACTION_REDIRECT = 1
13645 + * Enable auto-negotiation
13647 +#define DPSW_LINK_OPT_AUTONEG 0x0000000000000001ULL
13649 + * Enable half-duplex mode
13651 +#define DPSW_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
13653 + * Enable pause frames
13655 +#define DPSW_LINK_OPT_PAUSE 0x0000000000000004ULL
13657 + * Enable a-symmetric pause frames
13659 +#define DPSW_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
13662 + * struct dpsw_link_cfg - Structure representing DPSW link configuration
13664 + * @options: Mask of available options; use 'DPSW_LINK_OPT_<X>' values
13666 +struct dpsw_link_cfg {
13671 +int dpsw_if_set_link_cfg(struct fsl_mc_io *mc_io,
13675 + struct dpsw_link_cfg *cfg);
13677 + * struct dpsw_link_state - Structure representing DPSW link state
13679 + * @options: Mask of available options; use 'DPSW_LINK_OPT_<X>' values
13680 + * @up: 0 - covers two cases: down and disconnected, 1 - up
13682 +struct dpsw_link_state {
13688 +int dpsw_if_get_link_state(struct fsl_mc_io *mc_io,
13692 + struct dpsw_link_state *state);
13694 +int dpsw_if_set_flooding(struct fsl_mc_io *mc_io,
13700 +int dpsw_if_set_broadcast(struct fsl_mc_io *mc_io,
13706 +int dpsw_if_set_multicast(struct fsl_mc_io *mc_io,
13713 + * struct dpsw_tci_cfg - Tag Contorl Information (TCI) configuration
13714 + * @pcp: Priority Code Point (PCP): a 3-bit field which refers
13715 + * to the IEEE 802.1p priority
13716 + * @dei: Drop Eligible Indicator (DEI): a 1-bit field. May be used
13717 + * separately or in conjunction with PCP to indicate frames
13718 + * eligible to be dropped in the presence of congestion
13719 + * @vlan_id: VLAN Identifier (VID): a 12-bit field specifying the VLAN
13720 + * to which the frame belongs. The hexadecimal values
13721 + * of 0x000 and 0xFFF are reserved;
13722 + * all other values may be used as VLAN identifiers,
13723 + * allowing up to 4,094 VLANs
13725 +struct dpsw_tci_cfg {
13731 +int dpsw_if_set_tci(struct fsl_mc_io *mc_io,
13735 + const struct dpsw_tci_cfg *cfg);
13737 +int dpsw_if_get_tci(struct fsl_mc_io *mc_io,
13741 + struct dpsw_tci_cfg *cfg);
13744 + * enum dpsw_stp_state - Spanning Tree Protocol (STP) states
13745 + * @DPSW_STP_STATE_BLOCKING: Blocking state
13746 + * @DPSW_STP_STATE_LISTENING: Listening state
13747 + * @DPSW_STP_STATE_LEARNING: Learning state
13748 + * @DPSW_STP_STATE_FORWARDING: Forwarding state
13751 +enum dpsw_stp_state {
13752 + DPSW_STP_STATE_BLOCKING = 0,
13753 + DPSW_STP_STATE_LISTENING = 1,
13754 + DPSW_STP_STATE_LEARNING = 2,
13755 + DPSW_STP_STATE_FORWARDING = 3
13759 + * struct dpsw_stp_cfg - Spanning Tree Protocol (STP) Configuration
13760 + * @vlan_id: VLAN ID STP state
13761 + * @state: STP state
13763 +struct dpsw_stp_cfg {
13765 + enum dpsw_stp_state state;
13768 +int dpsw_if_set_stp(struct fsl_mc_io *mc_io,
13772 + const struct dpsw_stp_cfg *cfg);
13775 + * enum dpsw_accepted_frames - Types of frames to accept
13776 + * @DPSW_ADMIT_ALL: The device accepts VLAN tagged, untagged and
13777 + * priority tagged frames
13778 + * @DPSW_ADMIT_ONLY_VLAN_TAGGED: The device discards untagged frames or
13779 + * Priority-Tagged frames received on this interface.
13782 +enum dpsw_accepted_frames {
13783 + DPSW_ADMIT_ALL = 1,
13784 + DPSW_ADMIT_ONLY_VLAN_TAGGED = 3
13788 + * struct dpsw_accepted_frames_cfg - Types of frames to accept configuration
13789 + * @type: Defines ingress accepted frames
13790 + * @unaccept_act: When a frame is not accepted, it may be discarded or
13791 + * redirected to control interface depending on this mode
13793 +struct dpsw_accepted_frames_cfg {
13794 + enum dpsw_accepted_frames type;
13795 + enum dpsw_action unaccept_act;
13798 +int dpsw_if_set_accepted_frames(struct fsl_mc_io *mc_io,
13802 + const struct dpsw_accepted_frames_cfg *cfg);
13804 +int dpsw_if_set_accept_all_vlan(struct fsl_mc_io *mc_io,
13811 + * enum dpsw_counter - Counters types
13812 + * @DPSW_CNT_ING_FRAME: Counts ingress frames
13813 + * @DPSW_CNT_ING_BYTE: Counts ingress bytes
13814 + * @DPSW_CNT_ING_FLTR_FRAME: Counts filtered ingress frames
13815 + * @DPSW_CNT_ING_FRAME_DISCARD: Counts discarded ingress frame
13816 + * @DPSW_CNT_ING_MCAST_FRAME: Counts ingress multicast frames
13817 + * @DPSW_CNT_ING_MCAST_BYTE: Counts ingress multicast bytes
13818 + * @DPSW_CNT_ING_BCAST_FRAME: Counts ingress broadcast frames
13819 + * @DPSW_CNT_ING_BCAST_BYTES: Counts ingress broadcast bytes
13820 + * @DPSW_CNT_EGR_FRAME: Counts egress frames
13821 + * @DPSW_CNT_EGR_BYTE: Counts eEgress bytes
13822 + * @DPSW_CNT_EGR_FRAME_DISCARD: Counts discarded egress frames
13823 + * @DPSW_CNT_EGR_STP_FRAME_DISCARD: Counts egress STP discarded frames
13825 +enum dpsw_counter {
13826 + DPSW_CNT_ING_FRAME = 0x0,
13827 + DPSW_CNT_ING_BYTE = 0x1,
13828 + DPSW_CNT_ING_FLTR_FRAME = 0x2,
13829 + DPSW_CNT_ING_FRAME_DISCARD = 0x3,
13830 + DPSW_CNT_ING_MCAST_FRAME = 0x4,
13831 + DPSW_CNT_ING_MCAST_BYTE = 0x5,
13832 + DPSW_CNT_ING_BCAST_FRAME = 0x6,
13833 + DPSW_CNT_ING_BCAST_BYTES = 0x7,
13834 + DPSW_CNT_EGR_FRAME = 0x8,
13835 + DPSW_CNT_EGR_BYTE = 0x9,
13836 + DPSW_CNT_EGR_FRAME_DISCARD = 0xa,
13837 + DPSW_CNT_EGR_STP_FRAME_DISCARD = 0xb
13840 +int dpsw_if_get_counter(struct fsl_mc_io *mc_io,
13844 + enum dpsw_counter type,
13847 +int dpsw_if_set_counter(struct fsl_mc_io *mc_io,
13851 + enum dpsw_counter type,
13855 + * Maximum number of TC
13857 +#define DPSW_MAX_TC 8
13860 + * enum dpsw_priority_selector - User priority
13861 + * @DPSW_UP_PCP: Priority Code Point (PCP): a 3-bit field which
13862 + * refers to the IEEE 802.1p priority.
13863 + * @DPSW_UP_DSCP: Differentiated services Code Point (DSCP): 6 bit
13864 + * field from IP header
13867 +enum dpsw_priority_selector {
13873 + * enum dpsw_schedule_mode - Traffic classes scheduling
13874 + * @DPSW_SCHED_STRICT_PRIORITY: schedule strict priority
13875 + * @DPSW_SCHED_WEIGHTED: schedule based on token bucket created algorithm
13877 +enum dpsw_schedule_mode {
13878 + DPSW_SCHED_STRICT_PRIORITY,
13879 + DPSW_SCHED_WEIGHTED
13883 + * struct dpsw_tx_schedule_cfg - traffic class configuration
13884 + * @mode: Strict or weight-based scheduling
13885 + * @delta_bandwidth: weighted Bandwidth in range from 100 to 10000
13887 +struct dpsw_tx_schedule_cfg {
13888 + enum dpsw_schedule_mode mode;
13889 + u16 delta_bandwidth;
13893 + * struct dpsw_tx_selection_cfg - Mapping user priority into traffic
13894 + * class configuration
13895 + * @priority_selector: Source for user priority regeneration
13896 + * @tc_id: The Regenerated User priority that the incoming
13897 + * User Priority is mapped to for this interface
13898 + * @tc_sched: Traffic classes configuration
13900 +struct dpsw_tx_selection_cfg {
13901 + enum dpsw_priority_selector priority_selector;
13902 + u8 tc_id[DPSW_MAX_PRIORITIES];
13903 + struct dpsw_tx_schedule_cfg tc_sched[DPSW_MAX_TC];
13906 +int dpsw_if_set_tx_selection(struct fsl_mc_io *mc_io,
13910 + const struct dpsw_tx_selection_cfg *cfg);
13913 + * enum dpsw_reflection_filter - Filter type for frames to reflect
13914 + * @DPSW_REFLECTION_FILTER_INGRESS_ALL: Reflect all frames
13915 + * @DPSW_REFLECTION_FILTER_INGRESS_VLAN: Reflect only frames belong to
13916 + * particular VLAN defined by vid parameter
13919 +enum dpsw_reflection_filter {
13920 + DPSW_REFLECTION_FILTER_INGRESS_ALL = 0,
13921 + DPSW_REFLECTION_FILTER_INGRESS_VLAN = 1
13925 + * struct dpsw_reflection_cfg - Structure representing reflection information
13926 + * @filter: Filter type for frames to reflect
13927 + * @vlan_id: Vlan Id to reflect; valid only when filter type is
13928 + * DPSW_INGRESS_VLAN
13930 +struct dpsw_reflection_cfg {
13931 + enum dpsw_reflection_filter filter;
13935 +int dpsw_if_add_reflection(struct fsl_mc_io *mc_io,
13939 + const struct dpsw_reflection_cfg *cfg);
13941 +int dpsw_if_remove_reflection(struct fsl_mc_io *mc_io,
13945 + const struct dpsw_reflection_cfg *cfg);
13948 + * enum dpsw_metering_mode - Metering modes
13949 + * @DPSW_METERING_MODE_NONE: metering disabled
13950 + * @DPSW_METERING_MODE_RFC2698: RFC 2698
13951 + * @DPSW_METERING_MODE_RFC4115: RFC 4115
13953 +enum dpsw_metering_mode {
13954 + DPSW_METERING_MODE_NONE = 0,
13955 + DPSW_METERING_MODE_RFC2698,
13956 + DPSW_METERING_MODE_RFC4115
13960 + * enum dpsw_metering_unit - Metering count
13961 + * @DPSW_METERING_UNIT_BYTES: count bytes
13962 + * @DPSW_METERING_UNIT_FRAMES: count frames
13964 +enum dpsw_metering_unit {
13965 + DPSW_METERING_UNIT_BYTES = 0,
13966 + DPSW_METERING_UNIT_FRAMES
13970 + * struct dpsw_metering_cfg - Metering configuration
13971 + * @mode: metering modes
13972 + * @units: Bytes or frame units
13973 + * @cir: Committed information rate (CIR) in Kbits/s
13974 + * @eir: Peak information rate (PIR) Kbit/s rfc2698
13975 + * Excess information rate (EIR) Kbit/s rfc4115
13976 + * @cbs: Committed burst size (CBS) in bytes
13977 + * @ebs: Peak burst size (PBS) in bytes for rfc2698
13978 + * Excess bust size (EBS) in bytes rfc4115
13981 +struct dpsw_metering_cfg {
13982 + enum dpsw_metering_mode mode;
13983 + enum dpsw_metering_unit units;
13990 +int dpsw_if_set_flooding_metering(struct fsl_mc_io *mc_io,
13994 + const struct dpsw_metering_cfg *cfg);
13996 +int dpsw_if_set_metering(struct fsl_mc_io *mc_io,
14001 + const struct dpsw_metering_cfg *cfg);
14004 + * enum dpsw_early_drop_unit - DPSW early drop unit
14005 + * @DPSW_EARLY_DROP_UNIT_BYTE: count bytes
14006 + * @DPSW_EARLY_DROP_UNIT_FRAMES: count frames
14008 +enum dpsw_early_drop_unit {
14009 + DPSW_EARLY_DROP_UNIT_BYTE = 0,
14010 + DPSW_EARLY_DROP_UNIT_FRAMES
14014 + * enum dpsw_early_drop_mode - DPSW early drop mode
14015 + * @DPSW_EARLY_DROP_MODE_NONE: early drop is disabled
14016 + * @DPSW_EARLY_DROP_MODE_TAIL: early drop in taildrop mode
14017 + * @DPSW_EARLY_DROP_MODE_WRED: early drop in WRED mode
14019 +enum dpsw_early_drop_mode {
14020 + DPSW_EARLY_DROP_MODE_NONE = 0,
14021 + DPSW_EARLY_DROP_MODE_TAIL,
14022 + DPSW_EARLY_DROP_MODE_WRED
14026 + * struct dpsw_wred_cfg - WRED configuration
14027 + * @max_threshold: maximum threshold that packets may be discarded. Above this
14028 + * threshold all packets are discarded; must be less than 2^39;
14029 + * approximated to be expressed as (x+256)*2^(y-1) due to HW
14030 + * implementation.
14031 + * @min_threshold: minimum threshold that packets may be discarded at
14032 + * @drop_probability: probability that a packet will be discarded (1-100,
14033 + * associated with the maximum threshold)
14035 +struct dpsw_wred_cfg {
14036 + u64 min_threshold;
14037 + u64 max_threshold;
14038 + u8 drop_probability;
14042 + * struct dpsw_early_drop_cfg - early-drop configuration
14043 + * @drop_mode: drop mode
14044 + * @units: count units
14045 + * @yellow: WRED - 'yellow' configuration
14046 + * @green: WRED - 'green' configuration
14047 + * @tail_drop_threshold: tail drop threshold
14049 +struct dpsw_early_drop_cfg {
14050 + enum dpsw_early_drop_mode drop_mode;
14051 + enum dpsw_early_drop_unit units;
14052 + struct dpsw_wred_cfg yellow;
14053 + struct dpsw_wred_cfg green;
14054 + u32 tail_drop_threshold;
14057 +void dpsw_prepare_early_drop(const struct dpsw_early_drop_cfg *cfg,
14058 + u8 *early_drop_buf);
14060 +int dpsw_if_set_early_drop(struct fsl_mc_io *mc_io,
14065 + u64 early_drop_iova);
14068 + * struct dpsw_custom_tpid_cfg - Structure representing tag Protocol identifier
14069 + * @tpid: An additional tag protocol identifier
14071 +struct dpsw_custom_tpid_cfg {
14075 +int dpsw_add_custom_tpid(struct fsl_mc_io *mc_io,
14078 + const struct dpsw_custom_tpid_cfg *cfg);
14080 +int dpsw_remove_custom_tpid(struct fsl_mc_io *mc_io,
14083 + const struct dpsw_custom_tpid_cfg *cfg);
14085 +int dpsw_if_enable(struct fsl_mc_io *mc_io,
14090 +int dpsw_if_disable(struct fsl_mc_io *mc_io,
14096 + * struct dpsw_if_attr - Structure representing DPSW interface attributes
14097 + * @num_tcs: Number of traffic classes
14098 + * @rate: Transmit rate in bits per second
14099 + * @options: Interface configuration options (bitmap)
14100 + * @enabled: Indicates if interface is enabled
14101 + * @accept_all_vlan: The device discards/accepts incoming frames
14102 + * for VLANs that do not include this interface
14103 + * @admit_untagged: When set to 'DPSW_ADMIT_ONLY_VLAN_TAGGED', the device
14104 + * discards untagged frames or priority-tagged frames received on
14105 + * this interface;
14106 + * When set to 'DPSW_ADMIT_ALL', untagged frames or priority-
14107 + * tagged frames received on this interface are accepted
14108 + * @qdid: control frames transmit qdid
14110 +struct dpsw_if_attr {
14115 + int accept_all_vlan;
14116 + enum dpsw_accepted_frames admit_untagged;
14120 +int dpsw_if_get_attributes(struct fsl_mc_io *mc_io,
14124 + struct dpsw_if_attr *attr);
14126 +int dpsw_if_set_max_frame_length(struct fsl_mc_io *mc_io,
14130 + u16 frame_length);
14132 +int dpsw_if_get_max_frame_length(struct fsl_mc_io *mc_io,
14136 + u16 *frame_length);
14139 + * struct dpsw_vlan_cfg - VLAN Configuration
14140 + * @fdb_id: Forwarding Data Base
14142 +struct dpsw_vlan_cfg {
14146 +int dpsw_vlan_add(struct fsl_mc_io *mc_io,
14150 + const struct dpsw_vlan_cfg *cfg);
14153 + * struct dpsw_vlan_if_cfg - Set of VLAN Interfaces
14154 + * @num_ifs: The number of interfaces that are assigned to the egress
14155 + * list for this VLAN
14156 + * @if_id: The set of interfaces that are
14157 + * assigned to the egress list for this VLAN
14159 +struct dpsw_vlan_if_cfg {
14161 + u16 if_id[DPSW_MAX_IF];
14164 +int dpsw_vlan_add_if(struct fsl_mc_io *mc_io,
14168 + const struct dpsw_vlan_if_cfg *cfg);
14170 +int dpsw_vlan_add_if_untagged(struct fsl_mc_io *mc_io,
14174 + const struct dpsw_vlan_if_cfg *cfg);
14176 +int dpsw_vlan_add_if_flooding(struct fsl_mc_io *mc_io,
14180 + const struct dpsw_vlan_if_cfg *cfg);
14182 +int dpsw_vlan_remove_if(struct fsl_mc_io *mc_io,
14186 + const struct dpsw_vlan_if_cfg *cfg);
14188 +int dpsw_vlan_remove_if_untagged(struct fsl_mc_io *mc_io,
14192 + const struct dpsw_vlan_if_cfg *cfg);
14194 +int dpsw_vlan_remove_if_flooding(struct fsl_mc_io *mc_io,
14198 + const struct dpsw_vlan_if_cfg *cfg);
14200 +int dpsw_vlan_remove(struct fsl_mc_io *mc_io,
14206 + * struct dpsw_vlan_attr - VLAN attributes
14207 + * @fdb_id: Associated FDB ID
14208 + * @num_ifs: Number of interfaces
14209 + * @num_untagged_ifs: Number of untagged interfaces
14210 + * @num_flooding_ifs: Number of flooding interfaces
14212 +struct dpsw_vlan_attr {
14215 + u16 num_untagged_ifs;
14216 + u16 num_flooding_ifs;
14219 +int dpsw_vlan_get_attributes(struct fsl_mc_io *mc_io,
14223 + struct dpsw_vlan_attr *attr);
14225 +int dpsw_vlan_get_if(struct fsl_mc_io *mc_io,
14229 + struct dpsw_vlan_if_cfg *cfg);
14231 +int dpsw_vlan_get_if_flooding(struct fsl_mc_io *mc_io,
14235 + struct dpsw_vlan_if_cfg *cfg);
14237 +int dpsw_vlan_get_if_untagged(struct fsl_mc_io *mc_io,
14241 + struct dpsw_vlan_if_cfg *cfg);
14244 + * struct dpsw_fdb_cfg - FDB Configuration
14245 + * @num_fdb_entries: Number of FDB entries
14246 + * @fdb_aging_time: Aging time in seconds
14248 +struct dpsw_fdb_cfg {
14249 + u16 num_fdb_entries;
14250 + u16 fdb_aging_time;
14253 +int dpsw_fdb_add(struct fsl_mc_io *mc_io,
14257 + const struct dpsw_fdb_cfg *cfg);
14259 +int dpsw_fdb_remove(struct fsl_mc_io *mc_io,
14265 + * enum dpsw_fdb_entry_type - FDB Entry type - Static/Dynamic
14266 + * @DPSW_FDB_ENTRY_STATIC: Static entry
14267 + * @DPSW_FDB_ENTRY_DINAMIC: Dynamic entry
14269 +enum dpsw_fdb_entry_type {
14270 + DPSW_FDB_ENTRY_STATIC = 0,
14271 + DPSW_FDB_ENTRY_DINAMIC = 1
14275 + * struct dpsw_fdb_unicast_cfg - Unicast entry configuration
14276 + * @type: Select static or dynamic entry
14277 + * @mac_addr: MAC address
14278 + * @if_egress: Egress interface ID
14280 +struct dpsw_fdb_unicast_cfg {
14281 + enum dpsw_fdb_entry_type type;
14286 +int dpsw_fdb_add_unicast(struct fsl_mc_io *mc_io,
14290 + const struct dpsw_fdb_unicast_cfg *cfg);
14292 +int dpsw_fdb_get_unicast(struct fsl_mc_io *mc_io,
14296 + struct dpsw_fdb_unicast_cfg *cfg);
14298 +int dpsw_fdb_remove_unicast(struct fsl_mc_io *mc_io,
14302 + const struct dpsw_fdb_unicast_cfg *cfg);
14305 + * struct dpsw_fdb_multicast_cfg - Multi-cast entry configuration
14306 + * @type: Select static or dynamic entry
14307 + * @mac_addr: MAC address
14308 + * @num_ifs: Number of external and internal interfaces
14309 + * @if_id: Egress interface IDs
14311 +struct dpsw_fdb_multicast_cfg {
14312 + enum dpsw_fdb_entry_type type;
14315 + u16 if_id[DPSW_MAX_IF];
14318 +int dpsw_fdb_add_multicast(struct fsl_mc_io *mc_io,
14322 + const struct dpsw_fdb_multicast_cfg *cfg);
14324 +int dpsw_fdb_get_multicast(struct fsl_mc_io *mc_io,
14328 + struct dpsw_fdb_multicast_cfg *cfg);
14330 +int dpsw_fdb_remove_multicast(struct fsl_mc_io *mc_io,
14334 + const struct dpsw_fdb_multicast_cfg *cfg);
14337 + * enum dpsw_fdb_learning_mode - Auto-learning modes
14338 + * @DPSW_FDB_LEARNING_MODE_DIS: Disable Auto-learning
14339 + * @DPSW_FDB_LEARNING_MODE_HW: Enable HW auto-Learning
14340 + * @DPSW_FDB_LEARNING_MODE_NON_SECURE: Enable None secure learning by CPU
14341 + * @DPSW_FDB_LEARNING_MODE_SECURE: Enable secure learning by CPU
14343 + * NONE - SECURE LEARNING
14344 + * SMAC found DMAC found CTLU Action
14345 + * v v Forward frame to
14346 + * 1. DMAC destination
14347 + * - v Forward frame to
14348 + * 1. DMAC destination
14349 + * 2. Control interface
14350 + * v - Forward frame to
14351 + * 1. Flooding list of interfaces
14352 + * - - Forward frame to
14353 + * 1. Flooding list of interfaces
14354 + * 2. Control interface
14356 + * SMAC found DMAC found CTLU Action
14357 + * v v Forward frame to
14358 + * 1. DMAC destination
14359 + * - v Forward frame to
14360 + * 1. Control interface
14361 + * v - Forward frame to
14362 + * 1. Flooding list of interfaces
14363 + * - - Forward frame to
14364 + * 1. Control interface
14366 +enum dpsw_fdb_learning_mode {
14367 + DPSW_FDB_LEARNING_MODE_DIS = 0,
14368 + DPSW_FDB_LEARNING_MODE_HW = 1,
14369 + DPSW_FDB_LEARNING_MODE_NON_SECURE = 2,
14370 + DPSW_FDB_LEARNING_MODE_SECURE = 3
14373 +int dpsw_fdb_set_learning_mode(struct fsl_mc_io *mc_io,
14377 + enum dpsw_fdb_learning_mode mode);
14380 + * struct dpsw_fdb_attr - FDB Attributes
14381 + * @max_fdb_entries: Number of FDB entries
14382 + * @fdb_aging_time: Aging time in seconds
14383 + * @learning_mode: Learning mode
14384 + * @num_fdb_mc_groups: Current number of multicast groups
14385 + * @max_fdb_mc_groups: Maximum number of multicast groups
14387 +struct dpsw_fdb_attr {
14388 + u16 max_fdb_entries;
14389 + u16 fdb_aging_time;
14390 + enum dpsw_fdb_learning_mode learning_mode;
14391 + u16 num_fdb_mc_groups;
14392 + u16 max_fdb_mc_groups;
14395 +int dpsw_fdb_get_attributes(struct fsl_mc_io *mc_io,
14399 + struct dpsw_fdb_attr *attr);
14402 + * struct dpsw_acl_cfg - ACL Configuration
14403 + * @max_entries: Number of FDB entries
14405 +struct dpsw_acl_cfg {
14410 + * struct dpsw_acl_fields - ACL fields.
14411 + * @l2_dest_mac: Destination MAC address: BPDU, Multicast, Broadcast, Unicast,
14412 + * slow protocols, MVRP, STP
14413 + * @l2_source_mac: Source MAC address
14414 + * @l2_tpid: Layer 2 (Ethernet) protocol type, used to identify the following
14415 + * protocols: MPLS, PTP, PFC, ARP, Jumbo frames, LLDP, IEEE802.1ae,
14416 + * Q-in-Q, IPv4, IPv6, PPPoE
14417 + * @l2_pcp_dei: indicate which protocol is encapsulated in the payload
14418 + * @l2_vlan_id: layer 2 VLAN ID
14419 + * @l2_ether_type: layer 2 Ethernet type
14420 + * @l3_dscp: Layer 3 differentiated services code point
14421 + * @l3_protocol: Tells the Network layer at the destination host, to which
14422 + * Protocol this packet belongs to. The following protocol are
14423 + * supported: ICMP, IGMP, IPv4 (encapsulation), TCP, IPv6
14424 + * (encapsulation), GRE, PTP
14425 + * @l3_source_ip: Source IPv4 IP
14426 + * @l3_dest_ip: Destination IPv4 IP
14427 + * @l4_source_port: Source TCP/UDP Port
14428 + * @l4_dest_port: Destination TCP/UDP Port
14430 +struct dpsw_acl_fields {
14431 + u8 l2_dest_mac[6];
14432 + u8 l2_source_mac[6];
14436 + u16 l2_ether_type;
14439 + u32 l3_source_ip;
14441 + u16 l4_source_port;
14442 + u16 l4_dest_port;
14446 + * struct dpsw_acl_key - ACL key
14447 + * @match: Match fields
14448 + * @mask: Mask: b'1 - valid, b'0 don't care
14450 +struct dpsw_acl_key {
14451 + struct dpsw_acl_fields match;
14452 + struct dpsw_acl_fields mask;
14456 + * enum dpsw_acl_action
14457 + * @DPSW_ACL_ACTION_DROP: Drop frame
14458 + * @DPSW_ACL_ACTION_REDIRECT: Redirect to certain port
14459 + * @DPSW_ACL_ACTION_ACCEPT: Accept frame
14460 + * @DPSW_ACL_ACTION_REDIRECT_TO_CTRL_IF: Redirect to control interface
14462 +enum dpsw_acl_action {
14463 + DPSW_ACL_ACTION_DROP,
14464 + DPSW_ACL_ACTION_REDIRECT,
14465 + DPSW_ACL_ACTION_ACCEPT,
14466 + DPSW_ACL_ACTION_REDIRECT_TO_CTRL_IF
14470 + * struct dpsw_acl_result - ACL action
14471 + * @action: Action should be taken when ACL entry hit
14472 + * @if_id: Interface IDs to redirect frame. Valid only if redirect selected for
14475 +struct dpsw_acl_result {
14476 + enum dpsw_acl_action action;
14481 + * struct dpsw_acl_entry_cfg - ACL entry
14482 + * @key_iova: I/O virtual address of DMA-able memory filled with key after call
14483 + * to dpsw_acl_prepare_entry_cfg()
14484 + * @result: Required action when entry hit occurs
14485 + * @precedence: Precedence inside ACL 0 is lowest; This priority can not change
14486 + * during the lifetime of a Policy. It is user responsibility to
14487 + * space the priorities according to consequent rule additions.
14489 +struct dpsw_acl_entry_cfg {
14491 + struct dpsw_acl_result result;
14495 +int dpsw_acl_add(struct fsl_mc_io *mc_io,
14499 + const struct dpsw_acl_cfg *cfg);
14501 +int dpsw_acl_remove(struct fsl_mc_io *mc_io,
14506 +void dpsw_acl_prepare_entry_cfg(const struct dpsw_acl_key *key,
14507 + uint8_t *entry_cfg_buf);
14509 +int dpsw_acl_add_entry(struct fsl_mc_io *mc_io,
14513 + const struct dpsw_acl_entry_cfg *cfg);
14515 +int dpsw_acl_remove_entry(struct fsl_mc_io *mc_io,
14519 + const struct dpsw_acl_entry_cfg *cfg);
14522 + * struct dpsw_acl_if_cfg - List of interfaces to Associate with ACL
14523 + * @num_ifs: Number of interfaces
14524 + * @if_id: List of interfaces
14526 +struct dpsw_acl_if_cfg {
14528 + u16 if_id[DPSW_MAX_IF];
14531 +int dpsw_acl_add_if(struct fsl_mc_io *mc_io,
14535 + const struct dpsw_acl_if_cfg *cfg);
14537 +int dpsw_acl_remove_if(struct fsl_mc_io *mc_io,
14541 + const struct dpsw_acl_if_cfg *cfg);
14544 + * struct dpsw_acl_attr - ACL Attributes
14545 + * @max_entries: Max number of ACL entries
14546 + * @num_entries: Number of used ACL entries
14547 + * @num_ifs: Number of interfaces associated with ACL
14549 +struct dpsw_acl_attr {
14555 +int dpsw_acl_get_attributes(struct fsl_mc_io *mc_io,
14559 + struct dpsw_acl_attr *attr);
14561 + * struct dpsw_ctrl_if_attr - Control interface attributes
14562 + * @rx_fqid: Receive FQID
14563 + * @rx_err_fqid: Receive error FQID
14564 + * @tx_err_conf_fqid: Transmit error and confirmation FQID
14566 +struct dpsw_ctrl_if_attr {
14569 + u32 tx_err_conf_fqid;
14572 +int dpsw_ctrl_if_get_attributes(struct fsl_mc_io *mc_io,
14575 + struct dpsw_ctrl_if_attr *attr);
14578 + * Maximum number of DPBP
14580 +#define DPSW_MAX_DPBP 8
14583 + * struct dpsw_ctrl_if_pools_cfg - Control interface buffer pools configuration
14584 + * @num_dpbp: Number of DPBPs
14585 + * @pools: Array of buffer pools parameters; The number of valid entries
14586 + * must match 'num_dpbp' value
14588 +struct dpsw_ctrl_if_pools_cfg {
14591 + * struct pools - Buffer pools parameters
14592 + * @dpbp_id: DPBP object ID
14593 + * @buffer_size: Buffer size
14594 + * @backup_pool: Backup pool
14600 + } pools[DPSW_MAX_DPBP];
14603 +int dpsw_ctrl_if_set_pools(struct fsl_mc_io *mc_io,
14606 + const struct dpsw_ctrl_if_pools_cfg *cfg);
14608 +int dpsw_ctrl_if_enable(struct fsl_mc_io *mc_io,
14612 +int dpsw_ctrl_if_disable(struct fsl_mc_io *mc_io,
14616 +int dpsw_get_api_version(struct fsl_mc_io *mc_io,
14621 +#endif /* __FSL_DPSW_H */
14623 +++ b/drivers/staging/fsl-dpaa2/ethsw/switch.c
14625 +/* Copyright 2014-2015 Freescale Semiconductor Inc.
14627 + * Redistribution and use in source and binary forms, with or without
14628 + * modification, are permitted provided that the following conditions are met:
14629 + * * Redistributions of source code must retain the above copyright
14630 + * notice, this list of conditions and the following disclaimer.
14631 + * * Redistributions in binary form must reproduce the above copyright
14632 + * notice, this list of conditions and the following disclaimer in the
14633 + * documentation and/or other materials provided with the distribution.
14634 + * * Neither the name of Freescale Semiconductor nor the
14635 + * names of its contributors may be used to endorse or promote products
14636 + * derived from this software without specific prior written permission.
14639 + * ALTERNATIVELY, this software may be distributed under the terms of the
14640 + * GNU General Public License ("GPL") as published by the Free Software
14641 + * Foundation, either version 2 of that License or (at your option) any
14644 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
14645 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
14646 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
14647 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
14648 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
14649 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
14650 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
14651 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
14652 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
14653 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
14656 +#include <linux/module.h>
14657 +#include <linux/msi.h>
14659 +#include <linux/netdevice.h>
14660 +#include <linux/etherdevice.h>
14661 +#include <linux/rtnetlink.h>
14662 +#include <linux/if_vlan.h>
14664 +#include <uapi/linux/if_bridge.h>
14665 +#include <net/netlink.h>
14667 +#include "../../fsl-mc/include/mc.h"
14669 +#include "dpsw-cmd.h"
14671 +static const char ethsw_drv_version[] = "0.1";
14673 +/* Minimal supported DPSE version */
14674 +#define DPSW_MIN_VER_MAJOR 8
14675 +#define DPSW_MIN_VER_MINOR 0
14678 +#define DPSW_MAX_IRQ_NUM 2
14680 +#define ETHSW_VLAN_MEMBER 1
14681 +#define ETHSW_VLAN_UNTAGGED 2
14682 +#define ETHSW_VLAN_PVID 4
14683 +#define ETHSW_VLAN_GLOBAL 8
14685 +/* Maximum Frame Length supported by HW (currently 10k) */
14686 +#define DPAA2_MFL (10 * 1024)
14687 +#define ETHSW_MAX_FRAME_LENGTH (DPAA2_MFL - VLAN_ETH_HLEN - ETH_FCS_LEN)
14688 +#define ETHSW_L2_MAX_FRM(mtu) ((mtu) + VLAN_ETH_HLEN + ETH_FCS_LEN)
14690 +struct ethsw_port_priv {
14691 + struct net_device *netdev;
14692 + struct list_head list;
14694 + struct ethsw_dev_priv *ethsw_priv;
14697 + char vlans[VLAN_VID_MASK + 1];
14701 +struct ethsw_dev_priv {
14702 + struct net_device *netdev;
14703 + struct fsl_mc_io *mc_io;
14705 + struct dpsw_attr sw_attr;
14707 + /*TODO: redundant, we can use the slave dev list */
14708 + struct list_head port_list;
14713 + char vlans[VLAN_VID_MASK + 1];
14716 +static int ethsw_port_stop(struct net_device *netdev);
14717 +static int ethsw_port_open(struct net_device *netdev);
14719 +static inline void __get_priv(struct net_device *netdev,
14720 + struct ethsw_dev_priv **priv,
14721 + struct ethsw_port_priv **port_priv)
14723 + struct ethsw_dev_priv *_priv = NULL;
14724 + struct ethsw_port_priv *_port_priv = NULL;
14726 + if (netdev->flags & IFF_MASTER) {
14727 + _priv = netdev_priv(netdev);
14729 + _port_priv = netdev_priv(netdev);
14730 + _priv = _port_priv->ethsw_priv;
14736 + *port_priv = _port_priv;
14739 +/* -------------------------------------------------------------------------- */
14740 +/* ethsw netdevice ops */
14742 +static netdev_tx_t ethsw_dropframe(struct sk_buff *skb, struct net_device *dev)
14744 + /* we don't support I/O for now, drop the frame */
14745 + dev_kfree_skb_any(skb);
14746 + return NETDEV_TX_OK;
14749 +static int ethsw_open(struct net_device *netdev)
14751 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
14752 + struct list_head *pos;
14753 + struct ethsw_port_priv *port_priv = NULL;
14756 + err = dpsw_enable(priv->mc_io, 0, priv->dpsw_handle);
14758 + netdev_err(netdev, "dpsw_enable err %d\n", err);
14762 + list_for_each(pos, &priv->port_list) {
14763 + port_priv = list_entry(pos, struct ethsw_port_priv, list);
14764 + err = dev_open(port_priv->netdev);
14766 + netdev_err(port_priv->netdev, "dev_open err %d\n", err);
14772 +static int ethsw_stop(struct net_device *netdev)
14774 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
14775 + struct list_head *pos;
14776 + struct ethsw_port_priv *port_priv = NULL;
14779 + err = dpsw_disable(priv->mc_io, 0, priv->dpsw_handle);
14781 + netdev_err(netdev, "dpsw_disable err %d\n", err);
14785 + list_for_each(pos, &priv->port_list) {
14786 + port_priv = list_entry(pos, struct ethsw_port_priv, list);
14787 + err = dev_close(port_priv->netdev);
14789 + netdev_err(port_priv->netdev,
14790 + "dev_close err %d\n", err);
14796 +static int ethsw_add_vlan(struct net_device *netdev, u16 vid)
14798 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
14801 + struct dpsw_vlan_cfg vcfg = {
14802 + /* TODO: add support for VLAN private FDBs */
14805 + if (priv->vlans[vid]) {
14806 + netdev_err(netdev, "VLAN already configured\n");
14810 + err = dpsw_vlan_add(priv->mc_io, 0, priv->dpsw_handle, vid, &vcfg);
14812 + netdev_err(netdev, "dpsw_vlan_add err %d\n", err);
14815 + priv->vlans[vid] = ETHSW_VLAN_MEMBER;
14820 +static int ethsw_port_add_vlan(struct net_device *netdev, u16 vid, u16 flags)
14822 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
14823 + struct ethsw_dev_priv *priv = port_priv->ethsw_priv;
14826 + struct dpsw_vlan_if_cfg vcfg = {
14828 + .if_id[0] = port_priv->port_index,
14831 + if (port_priv->vlans[vid]) {
14832 + netdev_err(netdev, "VLAN already configured\n");
14836 + if (flags & BRIDGE_VLAN_INFO_PVID && netif_oper_up(netdev)) {
14837 + netdev_err(netdev, "interface must be down to change PVID!\n");
14841 + err = dpsw_vlan_add_if(priv->mc_io, 0, priv->dpsw_handle, vid, &vcfg);
14843 + netdev_err(netdev, "dpsw_vlan_add_if err %d\n", err);
14846 + port_priv->vlans[vid] = ETHSW_VLAN_MEMBER;
14848 + if (flags & BRIDGE_VLAN_INFO_UNTAGGED) {
14849 + err = dpsw_vlan_add_if_untagged(priv->mc_io, 0,
14850 + priv->dpsw_handle, vid, &vcfg);
14852 + netdev_err(netdev, "dpsw_vlan_add_if_untagged err %d\n",
14856 + port_priv->vlans[vid] |= ETHSW_VLAN_UNTAGGED;
14859 + if (flags & BRIDGE_VLAN_INFO_PVID) {
14860 + struct dpsw_tci_cfg tci_cfg = {
14861 + /* TODO: at least add better defaults if these cannot
14869 + err = dpsw_if_set_tci(priv->mc_io, 0, priv->dpsw_handle,
14870 + port_priv->port_index, &tci_cfg);
14872 + netdev_err(netdev, "dpsw_if_set_tci err %d\n", err);
14875 + port_priv->vlans[vid] |= ETHSW_VLAN_PVID;
14881 +static const struct nla_policy ifla_br_policy[IFLA_MAX + 1] = {
14882 + [IFLA_BRIDGE_FLAGS] = { .type = NLA_U16 },
14883 + [IFLA_BRIDGE_MODE] = { .type = NLA_U16 },
14884 + [IFLA_BRIDGE_VLAN_INFO] = { .type = NLA_BINARY,
14885 + .len = sizeof(struct bridge_vlan_info), },
14888 +static int ethsw_setlink_af_spec(struct net_device *netdev,
14889 + struct nlattr **tb)
14891 + struct bridge_vlan_info *vinfo;
14892 + struct ethsw_dev_priv *priv = NULL;
14893 + struct ethsw_port_priv *port_priv = NULL;
14896 + if (!tb[IFLA_BRIDGE_VLAN_INFO]) {
14897 + netdev_err(netdev, "no VLAN INFO in nlmsg\n");
14898 + return -EOPNOTSUPP;
14901 + vinfo = nla_data(tb[IFLA_BRIDGE_VLAN_INFO]);
14903 + if (!vinfo->vid || vinfo->vid > VLAN_VID_MASK)
14906 + __get_priv(netdev, &priv, &port_priv);
14908 + if (!port_priv || !priv->vlans[vinfo->vid]) {
14909 + /* command targets switch device or this is a new VLAN */
14910 + err = ethsw_add_vlan(priv->netdev, vinfo->vid);
14914 + /* command targets switch device; mark it*/
14916 + priv->vlans[vinfo->vid] |= ETHSW_VLAN_GLOBAL;
14920 + /* command targets switch port */
14921 + err = ethsw_port_add_vlan(netdev, vinfo->vid, vinfo->flags);
14929 +static const struct nla_policy ifla_brport_policy[IFLA_BRPORT_MAX + 1] = {
14930 + [IFLA_BRPORT_STATE] = { .type = NLA_U8 },
14931 + [IFLA_BRPORT_COST] = { .type = NLA_U32 },
14932 + [IFLA_BRPORT_PRIORITY] = { .type = NLA_U16 },
14933 + [IFLA_BRPORT_MODE] = { .type = NLA_U8 },
14934 + [IFLA_BRPORT_GUARD] = { .type = NLA_U8 },
14935 + [IFLA_BRPORT_PROTECT] = { .type = NLA_U8 },
14936 + [IFLA_BRPORT_LEARNING] = { .type = NLA_U8 },
14937 + [IFLA_BRPORT_UNICAST_FLOOD] = { .type = NLA_U8 },
14940 +static int ethsw_set_learning(struct net_device *netdev, u8 flag)
14942 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
14943 + enum dpsw_fdb_learning_mode learn_mode;
14947 + learn_mode = DPSW_FDB_LEARNING_MODE_HW;
14949 + learn_mode = DPSW_FDB_LEARNING_MODE_DIS;
14951 + err = dpsw_fdb_set_learning_mode(priv->mc_io, 0, priv->dpsw_handle,
14954 + netdev_err(netdev, "dpsw_fdb_set_learning_mode err %d\n", err);
14957 + priv->learning = !!flag;
14962 +static int ethsw_port_set_flood(struct net_device *netdev, u8 flag)
14964 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
14965 + struct ethsw_dev_priv *priv = port_priv->ethsw_priv;
14968 + err = dpsw_if_set_flooding(priv->mc_io, 0, priv->dpsw_handle,
14969 + port_priv->port_index, (int)flag);
14971 + netdev_err(netdev, "dpsw_fdb_set_learning_mode err %d\n", err);
14974 + priv->flood = !!flag;
14979 +static int ethsw_port_set_state(struct net_device *netdev, u8 state)
14981 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
14982 + struct ethsw_dev_priv *priv = port_priv->ethsw_priv;
14983 + u8 old_state = port_priv->stp_state;
14986 + struct dpsw_stp_cfg stp_cfg = {
14990 + /* TODO: check port state, interface may be down */
14992 + if (state > BR_STATE_BLOCKING)
14995 + if (state == port_priv->stp_state)
14998 + if (state == BR_STATE_DISABLED) {
14999 + port_priv->stp_state = state;
15001 + err = ethsw_port_stop(netdev);
15005 + err = dpsw_if_set_stp(priv->mc_io, 0, priv->dpsw_handle,
15006 + port_priv->port_index, &stp_cfg);
15008 + netdev_err(netdev, "dpsw_if_set_stp err %d\n", err);
15012 + port_priv->stp_state = state;
15014 + if (old_state == BR_STATE_DISABLED) {
15015 + err = ethsw_port_open(netdev);
15023 + port_priv->stp_state = old_state;
15027 +static int ethsw_setlink_protinfo(struct net_device *netdev,
15028 + struct nlattr **tb)
15030 + struct ethsw_dev_priv *priv;
15031 + struct ethsw_port_priv *port_priv = NULL;
15034 + __get_priv(netdev, &priv, &port_priv);
15036 + if (tb[IFLA_BRPORT_LEARNING]) {
15037 + u8 flag = nla_get_u8(tb[IFLA_BRPORT_LEARNING]);
15040 + netdev_warn(netdev,
15041 + "learning set on whole switch dev\n");
15043 + err = ethsw_set_learning(priv->netdev, flag);
15047 + } else if (tb[IFLA_BRPORT_UNICAST_FLOOD] && port_priv) {
15048 + u8 flag = nla_get_u8(tb[IFLA_BRPORT_UNICAST_FLOOD]);
15050 + err = ethsw_port_set_flood(port_priv->netdev, flag);
15054 + } else if (tb[IFLA_BRPORT_STATE] && port_priv) {
15055 + u8 state = nla_get_u8(tb[IFLA_BRPORT_STATE]);
15057 + err = ethsw_port_set_state(port_priv->netdev, state);
15062 + return -EOPNOTSUPP;
15068 +static int ethsw_setlink(struct net_device *netdev,
15069 + struct nlmsghdr *nlh,
15072 + struct nlattr *attr;
15073 + struct nlattr *tb[(IFLA_BRIDGE_MAX > IFLA_BRPORT_MAX) ?
15074 + IFLA_BRIDGE_MAX : IFLA_BRPORT_MAX + 1];
15077 + attr = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
15079 + err = nla_parse_nested(tb, IFLA_BRIDGE_MAX, attr,
15082 + netdev_err(netdev,
15083 + "nla_parse_nested for br_policy err %d\n",
15088 + err = ethsw_setlink_af_spec(netdev, tb);
15092 + attr = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_PROTINFO);
15094 + err = nla_parse_nested(tb, IFLA_BRPORT_MAX, attr,
15095 + ifla_brport_policy);
15097 + netdev_err(netdev,
15098 + "nla_parse_nested for brport_policy err %d\n",
15103 + err = ethsw_setlink_protinfo(netdev, tb);
15107 + netdev_err(netdev, "nlmsg_find_attr found no AF_SPEC/PROTINFO\n");
15108 + return -EOPNOTSUPP;
15111 +static int __nla_put_netdev(struct sk_buff *skb, struct net_device *netdev,
15112 + struct ethsw_dev_priv *priv)
15114 + u8 operstate = netif_running(netdev) ? netdev->operstate : IF_OPER_DOWN;
15118 + err = nla_put_string(skb, IFLA_IFNAME, netdev->name);
15120 + goto nla_put_err;
15121 + err = nla_put_u32(skb, IFLA_MASTER, priv->netdev->ifindex);
15123 + goto nla_put_err;
15124 + err = nla_put_u32(skb, IFLA_MTU, netdev->mtu);
15126 + goto nla_put_err;
15127 + err = nla_put_u8(skb, IFLA_OPERSTATE, operstate);
15129 + goto nla_put_err;
15130 + if (netdev->addr_len) {
15131 + err = nla_put(skb, IFLA_ADDRESS, netdev->addr_len,
15132 + netdev->dev_addr);
15134 + goto nla_put_err;
15137 + iflink = dev_get_iflink(netdev);
15138 + if (netdev->ifindex != iflink) {
15139 + err = nla_put_u32(skb, IFLA_LINK, iflink);
15141 + goto nla_put_err;
15147 + netdev_err(netdev, "nla_put_ err %d\n", err);
15151 +static int __nla_put_port(struct sk_buff *skb, struct net_device *netdev,
15152 + struct ethsw_port_priv *port_priv)
15154 + struct nlattr *nest;
15157 + u8 stp_state = port_priv->stp_state;
15159 + if (port_priv->stp_state == DPSW_STP_STATE_BLOCKING)
15160 + stp_state = BR_STATE_BLOCKING;
15162 + nest = nla_nest_start(skb, IFLA_PROTINFO | NLA_F_NESTED);
15164 + netdev_err(netdev, "nla_nest_start failed\n");
15168 + err = nla_put_u8(skb, IFLA_BRPORT_STATE, stp_state);
15170 + goto nla_put_err;
15171 + err = nla_put_u16(skb, IFLA_BRPORT_PRIORITY, 0);
15173 + goto nla_put_err;
15174 + err = nla_put_u32(skb, IFLA_BRPORT_COST, 0);
15176 + goto nla_put_err;
15177 + err = nla_put_u8(skb, IFLA_BRPORT_MODE, 0);
15179 + goto nla_put_err;
15180 + err = nla_put_u8(skb, IFLA_BRPORT_GUARD, 0);
15182 + goto nla_put_err;
15183 + err = nla_put_u8(skb, IFLA_BRPORT_PROTECT, 0);
15185 + goto nla_put_err;
15186 + err = nla_put_u8(skb, IFLA_BRPORT_FAST_LEAVE, 0);
15188 + goto nla_put_err;
15189 + err = nla_put_u8(skb, IFLA_BRPORT_LEARNING,
15190 + port_priv->ethsw_priv->learning);
15192 + goto nla_put_err;
15193 + err = nla_put_u8(skb, IFLA_BRPORT_UNICAST_FLOOD,
15194 + port_priv->ethsw_priv->flood);
15196 + goto nla_put_err;
15197 + nla_nest_end(skb, nest);
15202 + netdev_err(netdev, "nla_put_ err %d\n", err);
15203 + nla_nest_cancel(skb, nest);
15207 +static int __nla_put_vlan(struct sk_buff *skb, struct net_device *netdev,
15208 + struct ethsw_dev_priv *priv,
15209 + struct ethsw_port_priv *port_priv)
15211 + struct nlattr *nest;
15212 + struct bridge_vlan_info vinfo;
15213 + const char *vlans;
15217 + nest = nla_nest_start(skb, IFLA_AF_SPEC);
15219 + netdev_err(netdev, "nla_nest_start failed");
15224 + vlans = port_priv->vlans;
15226 + vlans = priv->vlans;
15228 + for (i = 0; i < VLAN_VID_MASK + 1; i++) {
15232 + if (vlans[i] & ETHSW_VLAN_UNTAGGED)
15233 + vinfo.flags |= BRIDGE_VLAN_INFO_UNTAGGED;
15235 + if (vlans[i] & ETHSW_VLAN_PVID)
15236 + vinfo.flags |= BRIDGE_VLAN_INFO_PVID;
15238 + if (vlans[i] & ETHSW_VLAN_MEMBER) {
15239 + err = nla_put(skb, IFLA_BRIDGE_VLAN_INFO,
15240 + sizeof(vinfo), &vinfo);
15242 + goto nla_put_err;
15246 + nla_nest_end(skb, nest);
15250 + netdev_err(netdev, "nla_put_ err %d\n", err);
15251 + nla_nest_cancel(skb, nest);
15255 +static int ethsw_getlink(struct sk_buff *skb, u32 pid, u32 seq,
15256 + struct net_device *netdev, u32 filter_mask,
15259 + struct ethsw_dev_priv *priv;
15260 + struct ethsw_port_priv *port_priv = NULL;
15261 + struct ifinfomsg *hdr;
15262 + struct nlmsghdr *nlh;
15265 + __get_priv(netdev, &priv, &port_priv);
15267 + nlh = nlmsg_put(skb, pid, seq, RTM_NEWLINK, sizeof(*hdr), NLM_F_MULTI);
15269 + return -EMSGSIZE;
15271 + hdr = nlmsg_data(nlh);
15272 + memset(hdr, 0, sizeof(*hdr));
15273 + hdr->ifi_family = AF_BRIDGE;
15274 + hdr->ifi_type = netdev->type;
15275 + hdr->ifi_index = netdev->ifindex;
15276 + hdr->ifi_flags = dev_get_flags(netdev);
15278 + err = __nla_put_netdev(skb, netdev, priv);
15280 + goto nla_put_err;
15283 + err = __nla_put_port(skb, netdev, port_priv);
15285 + goto nla_put_err;
15288 + /* Check if the VID information is requested */
15289 + if (filter_mask & RTEXT_FILTER_BRVLAN) {
15290 + err = __nla_put_vlan(skb, netdev, priv, port_priv);
15292 + goto nla_put_err;
15295 + nlmsg_end(skb, nlh);
15299 + nlmsg_cancel(skb, nlh);
15300 + return -EMSGSIZE;
15303 +static int ethsw_dellink_switch(struct ethsw_dev_priv *priv, u16 vid)
15305 + struct list_head *pos;
15306 + struct ethsw_port_priv *ppriv_local = NULL;
15309 + if (!priv->vlans[vid])
15312 + err = dpsw_vlan_remove(priv->mc_io, 0, priv->dpsw_handle, vid);
15314 + netdev_err(priv->netdev, "dpsw_vlan_remove err %d\n", err);
15317 + priv->vlans[vid] = 0;
15319 + list_for_each(pos, &priv->port_list) {
15320 + ppriv_local = list_entry(pos, struct ethsw_port_priv,
15322 + ppriv_local->vlans[vid] = 0;
15328 +static int ethsw_dellink_port(struct ethsw_dev_priv *priv,
15329 + struct ethsw_port_priv *port_priv,
15332 + struct list_head *pos;
15333 + struct ethsw_port_priv *ppriv_local = NULL;
15334 + struct dpsw_vlan_if_cfg vcfg = {
15336 + .if_id[0] = port_priv->port_index,
15338 + unsigned int count = 0;
15341 + if (!port_priv->vlans[vid])
15344 + /* VLAN will be deleted from switch if global flag is not set
15345 + * and is configured on only one port
15347 + if (!(priv->vlans[vid] & ETHSW_VLAN_GLOBAL)) {
15348 + list_for_each(pos, &priv->port_list) {
15349 + ppriv_local = list_entry(pos, struct ethsw_port_priv,
15351 + if (ppriv_local->vlans[vid] & ETHSW_VLAN_MEMBER)
15356 + return ethsw_dellink_switch(priv, vid);
15359 + err = dpsw_vlan_remove_if(priv->mc_io, 0, priv->dpsw_handle,
15362 + netdev_err(priv->netdev, "dpsw_vlan_remove_if err %d\n", err);
15365 + port_priv->vlans[vid] = 0;
15369 +static int ethsw_dellink(struct net_device *netdev,
15370 + struct nlmsghdr *nlh,
15373 + struct nlattr *tb[IFLA_BRIDGE_MAX + 1];
15374 + struct nlattr *spec;
15375 + struct bridge_vlan_info *vinfo;
15376 + struct ethsw_dev_priv *priv;
15377 + struct ethsw_port_priv *port_priv = NULL;
15380 + spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
15384 + err = nla_parse_nested(tb, IFLA_BRIDGE_MAX, spec, ifla_br_policy);
15388 + if (!tb[IFLA_BRIDGE_VLAN_INFO])
15389 + return -EOPNOTSUPP;
15391 + vinfo = nla_data(tb[IFLA_BRIDGE_VLAN_INFO]);
15393 + if (!vinfo->vid || vinfo->vid > VLAN_VID_MASK)
15396 + __get_priv(netdev, &priv, &port_priv);
15398 + /* decide if command targets switch device or port */
15400 + err = ethsw_dellink_switch(priv, vinfo->vid);
15402 + err = ethsw_dellink_port(priv, port_priv, vinfo->vid);
15407 +static const struct net_device_ops ethsw_ops = {
15408 + .ndo_open = ðsw_open,
15409 + .ndo_stop = ðsw_stop,
15411 + .ndo_bridge_setlink = ðsw_setlink,
15412 + .ndo_bridge_getlink = ðsw_getlink,
15413 + .ndo_bridge_dellink = ðsw_dellink,
15415 + .ndo_start_xmit = ðsw_dropframe,
15418 +/*--------------------------------------------------------------------------- */
15419 +/* switch port netdevice ops */
15421 +static int _ethsw_port_carrier_state_sync(struct net_device *netdev)
15423 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15424 + struct dpsw_link_state state;
15427 + err = dpsw_if_get_link_state(port_priv->ethsw_priv->mc_io, 0,
15428 + port_priv->ethsw_priv->dpsw_handle,
15429 + port_priv->port_index, &state);
15430 + if (unlikely(err)) {
15431 + netdev_err(netdev, "dpsw_if_get_link_state() err %d\n", err);
15435 + WARN_ONCE(state.up > 1, "Garbage read into link_state");
15438 + netif_carrier_on(port_priv->netdev);
15440 + netif_carrier_off(port_priv->netdev);
15445 +static int ethsw_port_open(struct net_device *netdev)
15447 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15450 + err = dpsw_if_enable(port_priv->ethsw_priv->mc_io, 0,
15451 + port_priv->ethsw_priv->dpsw_handle,
15452 + port_priv->port_index);
15454 + netdev_err(netdev, "dpsw_if_enable err %d\n", err);
15458 + /* sync carrier state */
15459 + err = _ethsw_port_carrier_state_sync(netdev);
15461 + netdev_err(netdev, "_ethsw_port_carrier_state_sync err %d\n",
15463 + goto err_carrier_sync;
15469 + dpsw_if_disable(port_priv->ethsw_priv->mc_io, 0,
15470 + port_priv->ethsw_priv->dpsw_handle,
15471 + port_priv->port_index);
15475 +static int ethsw_port_stop(struct net_device *netdev)
15477 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15480 + err = dpsw_if_disable(port_priv->ethsw_priv->mc_io, 0,
15481 + port_priv->ethsw_priv->dpsw_handle,
15482 + port_priv->port_index);
15484 + netdev_err(netdev, "dpsw_if_disable err %d\n", err);
15491 +static int ethsw_port_fdb_add_uc(struct net_device *netdev,
15492 + const unsigned char *addr)
15494 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15495 + struct dpsw_fdb_unicast_cfg entry = {0};
15498 + entry.if_egress = port_priv->port_index;
15499 + entry.type = DPSW_FDB_ENTRY_STATIC;
15500 + ether_addr_copy(entry.mac_addr, addr);
15502 + err = dpsw_fdb_add_unicast(port_priv->ethsw_priv->mc_io, 0,
15503 + port_priv->ethsw_priv->dpsw_handle,
15506 + netdev_err(netdev, "dpsw_fdb_add_unicast err %d\n", err);
15510 +static int ethsw_port_fdb_del_uc(struct net_device *netdev,
15511 + const unsigned char *addr)
15513 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15514 + struct dpsw_fdb_unicast_cfg entry = {0};
15517 + entry.if_egress = port_priv->port_index;
15518 + entry.type = DPSW_FDB_ENTRY_STATIC;
15519 + ether_addr_copy(entry.mac_addr, addr);
15521 + err = dpsw_fdb_remove_unicast(port_priv->ethsw_priv->mc_io, 0,
15522 + port_priv->ethsw_priv->dpsw_handle,
15525 + netdev_err(netdev, "dpsw_fdb_remove_unicast err %d\n", err);
15529 +static int ethsw_port_fdb_add_mc(struct net_device *netdev,
15530 + const unsigned char *addr)
15532 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15533 + struct dpsw_fdb_multicast_cfg entry = {0};
15536 + ether_addr_copy(entry.mac_addr, addr);
15537 + entry.type = DPSW_FDB_ENTRY_STATIC;
15538 + entry.num_ifs = 1;
15539 + entry.if_id[0] = port_priv->port_index;
15541 + err = dpsw_fdb_add_multicast(port_priv->ethsw_priv->mc_io, 0,
15542 + port_priv->ethsw_priv->dpsw_handle,
15545 + netdev_err(netdev, "dpsw_fdb_add_multicast err %d\n", err);
15549 +static int ethsw_port_fdb_del_mc(struct net_device *netdev,
15550 + const unsigned char *addr)
15552 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15553 + struct dpsw_fdb_multicast_cfg entry = {0};
15556 + ether_addr_copy(entry.mac_addr, addr);
15557 + entry.type = DPSW_FDB_ENTRY_STATIC;
15558 + entry.num_ifs = 1;
15559 + entry.if_id[0] = port_priv->port_index;
15561 + err = dpsw_fdb_remove_multicast(port_priv->ethsw_priv->mc_io, 0,
15562 + port_priv->ethsw_priv->dpsw_handle,
15565 + netdev_err(netdev, "dpsw_fdb_remove_multicast err %d\n", err);
15569 +static int _lookup_address(struct net_device *netdev, int is_uc,
15570 + const unsigned char *addr)
15572 + struct netdev_hw_addr *ha;
15573 + struct netdev_hw_addr_list *list = (is_uc) ? &netdev->uc : &netdev->mc;
15575 + netif_addr_lock_bh(netdev);
15576 + list_for_each_entry(ha, &list->list, list) {
15577 + if (ether_addr_equal(ha->addr, addr)) {
15578 + netif_addr_unlock_bh(netdev);
15582 + netif_addr_unlock_bh(netdev);
15586 +static int ethsw_port_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
15587 + struct net_device *netdev,
15588 + const unsigned char *addr, u16 vid,
15591 + struct list_head *pos;
15592 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15593 + struct ethsw_dev_priv *priv = port_priv->ethsw_priv;
15596 + /* TODO: add replace support when added to iproute bridge */
15597 + if (!(flags & NLM_F_REQUEST)) {
15598 + netdev_err(netdev,
15599 + "ethsw_port_fdb_add unexpected flags value %08x\n",
15604 + if (is_unicast_ether_addr(addr)) {
15605 + /* if entry cannot be replaced, return error if exists */
15606 + if (flags & NLM_F_EXCL || flags & NLM_F_APPEND) {
15607 + list_for_each(pos, &priv->port_list) {
15608 + port_priv = list_entry(pos,
15609 + struct ethsw_port_priv,
15611 + if (_lookup_address(port_priv->netdev,
15617 + err = ethsw_port_fdb_add_uc(netdev, addr);
15619 + netdev_err(netdev, "ethsw_port_fdb_add_uc err %d\n",
15624 + /* we might have replaced an existing entry for a different
15625 + * switch port, make sure the address doesn't linger in any
15626 + * port address list
15628 + list_for_each(pos, &priv->port_list) {
15629 + port_priv = list_entry(pos, struct ethsw_port_priv,
15631 + dev_uc_del(port_priv->netdev, addr);
15634 + err = dev_uc_add(netdev, addr);
15636 + netdev_err(netdev, "dev_uc_add err %d\n", err);
15640 + struct dpsw_fdb_multicast_cfg entry = {
15641 + .type = DPSW_FDB_ENTRY_STATIC,
15645 + /* check if address is already set on this port */
15646 + if (_lookup_address(netdev, 0, addr))
15649 + /* check if the address exists on other port */
15650 + ether_addr_copy(entry.mac_addr, addr);
15651 + err = dpsw_fdb_get_multicast(priv->mc_io, 0, priv->dpsw_handle,
15654 + /* entry exists, can we replace it? */
15655 + if (flags & NLM_F_EXCL)
15657 + } else if (err != -ENAVAIL) {
15658 + netdev_err(netdev, "dpsw_fdb_get_unicast err %d\n",
15663 + err = ethsw_port_fdb_add_mc(netdev, addr);
15665 + netdev_err(netdev, "ethsw_port_fdb_add_mc err %d\n",
15670 + err = dev_mc_add(netdev, addr);
15672 + netdev_err(netdev, "dev_mc_add err %d\n", err);
15680 +static int ethsw_port_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
15681 + struct net_device *netdev,
15682 + const unsigned char *addr, u16 vid)
15686 + if (is_unicast_ether_addr(addr)) {
15687 + err = ethsw_port_fdb_del_uc(netdev, addr);
15689 + netdev_err(netdev, "ethsw_port_fdb_del_uc err %d\n",
15694 + /* also delete if configured on port */
15695 + err = dev_uc_del(netdev, addr);
15696 + if (err && err != -ENOENT) {
15697 + netdev_err(netdev, "dev_uc_del err %d\n", err);
15701 + if (!_lookup_address(netdev, 0, addr))
15704 + err = dev_mc_del(netdev, addr);
15706 + netdev_err(netdev, "dev_mc_del err %d\n", err);
15710 + err = ethsw_port_fdb_del_mc(netdev, addr);
15712 + netdev_err(netdev, "ethsw_port_fdb_del_mc err %d\n",
15721 +void ethsw_port_get_stats(struct net_device *netdev,
15722 + struct rtnl_link_stats64 *storage)
15724 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15728 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15729 + port_priv->ethsw_priv->dpsw_handle,
15730 + port_priv->port_index,
15731 + DPSW_CNT_ING_FRAME, &storage->rx_packets);
15735 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15736 + port_priv->ethsw_priv->dpsw_handle,
15737 + port_priv->port_index,
15738 + DPSW_CNT_EGR_FRAME, &storage->tx_packets);
15742 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15743 + port_priv->ethsw_priv->dpsw_handle,
15744 + port_priv->port_index,
15745 + DPSW_CNT_ING_BYTE, &storage->rx_bytes);
15749 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15750 + port_priv->ethsw_priv->dpsw_handle,
15751 + port_priv->port_index,
15752 + DPSW_CNT_EGR_BYTE, &storage->tx_bytes);
15756 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15757 + port_priv->ethsw_priv->dpsw_handle,
15758 + port_priv->port_index,
15759 + DPSW_CNT_ING_FRAME_DISCARD,
15760 + &storage->rx_dropped);
15764 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15765 + port_priv->ethsw_priv->dpsw_handle,
15766 + port_priv->port_index,
15767 + DPSW_CNT_ING_FLTR_FRAME,
15771 + storage->rx_dropped += tmp;
15773 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15774 + port_priv->ethsw_priv->dpsw_handle,
15775 + port_priv->port_index,
15776 + DPSW_CNT_EGR_FRAME_DISCARD,
15777 + &storage->tx_dropped);
15784 + netdev_err(netdev, "dpsw_if_get_counter err %d\n", err);
15787 +static int ethsw_port_change_mtu(struct net_device *netdev, int mtu)
15789 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15792 + if (mtu < ETH_ZLEN || mtu > ETHSW_MAX_FRAME_LENGTH) {
15793 + netdev_err(netdev, "Invalid MTU %d. Valid range is: %d..%d\n",
15794 + mtu, ETH_ZLEN, ETHSW_MAX_FRAME_LENGTH);
15798 + err = dpsw_if_set_max_frame_length(port_priv->ethsw_priv->mc_io,
15800 + port_priv->ethsw_priv->dpsw_handle,
15801 + port_priv->port_index,
15802 + (u16)ETHSW_L2_MAX_FRM(mtu));
15804 + netdev_err(netdev,
15805 + "dpsw_if_set_max_frame_length() err %d\n", err);
15809 + netdev->mtu = mtu;
15813 +static const struct net_device_ops ethsw_port_ops = {
15814 + .ndo_open = ðsw_port_open,
15815 + .ndo_stop = ðsw_port_stop,
15817 + .ndo_fdb_add = ðsw_port_fdb_add,
15818 + .ndo_fdb_del = ðsw_port_fdb_del,
15819 + .ndo_fdb_dump = &ndo_dflt_fdb_dump,
15821 + .ndo_get_stats64 = ðsw_port_get_stats,
15822 + .ndo_change_mtu = ðsw_port_change_mtu,
15824 + .ndo_start_xmit = ðsw_dropframe,
15827 +static void ethsw_get_drvinfo(struct net_device *netdev,
15828 + struct ethtool_drvinfo *drvinfo)
15830 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15831 + u16 version_major, version_minor;
15834 + strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
15835 + strlcpy(drvinfo->version, ethsw_drv_version, sizeof(drvinfo->version));
15837 + err = dpsw_get_api_version(port_priv->ethsw_priv->mc_io, 0,
15841 + strlcpy(drvinfo->fw_version, "N/A",
15842 + sizeof(drvinfo->fw_version));
15844 + snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
15845 + "%u.%u", version_major, version_minor);
15847 + strlcpy(drvinfo->bus_info, dev_name(netdev->dev.parent->parent),
15848 + sizeof(drvinfo->bus_info));
15851 +static int ethsw_get_settings(struct net_device *netdev,
15852 + struct ethtool_cmd *cmd)
15854 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15855 + struct dpsw_link_state state = {0};
15858 + err = dpsw_if_get_link_state(port_priv->ethsw_priv->mc_io, 0,
15859 + port_priv->ethsw_priv->dpsw_handle,
15860 + port_priv->port_index,
15863 + netdev_err(netdev, "ERROR %d getting link state", err);
15867 + /* At the moment, we have no way of interrogating the DPMAC
15868 + * from the DPSW side or there may not exist a DPMAC at all.
15869 + * Report only autoneg state, duplexity and speed.
15871 + if (state.options & DPSW_LINK_OPT_AUTONEG)
15872 + cmd->autoneg = AUTONEG_ENABLE;
15873 + if (!(state.options & DPSW_LINK_OPT_HALF_DUPLEX))
15874 + cmd->autoneg = DUPLEX_FULL;
15875 + ethtool_cmd_speed_set(cmd, state.rate);
15881 +static int ethsw_set_settings(struct net_device *netdev,
15882 + struct ethtool_cmd *cmd)
15884 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15885 + struct dpsw_link_state state = {0};
15886 + struct dpsw_link_cfg cfg = {0};
15889 + netdev_dbg(netdev, "Setting link parameters...");
15891 + err = dpsw_if_get_link_state(port_priv->ethsw_priv->mc_io, 0,
15892 + port_priv->ethsw_priv->dpsw_handle,
15893 + port_priv->port_index,
15896 + netdev_err(netdev, "ERROR %d getting link state", err);
15900 + /* Due to a temporary MC limitation, the DPSW port must be down
15901 + * in order to be able to change link settings. Taking steps to let
15902 + * the user know that.
15904 + if (netif_running(netdev)) {
15905 + netdev_info(netdev,
15906 + "Sorry, interface must be brought down first.\n");
15910 + cfg.options = state.options;
15911 + cfg.rate = ethtool_cmd_speed(cmd);
15912 + if (cmd->autoneg == AUTONEG_ENABLE)
15913 + cfg.options |= DPSW_LINK_OPT_AUTONEG;
15915 + cfg.options &= ~DPSW_LINK_OPT_AUTONEG;
15916 + if (cmd->duplex == DUPLEX_HALF)
15917 + cfg.options |= DPSW_LINK_OPT_HALF_DUPLEX;
15919 + cfg.options &= ~DPSW_LINK_OPT_HALF_DUPLEX;
15921 + err = dpsw_if_set_link_cfg(port_priv->ethsw_priv->mc_io, 0,
15922 + port_priv->ethsw_priv->dpsw_handle,
15923 + port_priv->port_index,
15926 + /* ethtool will be loud enough if we return an error; no point
15927 + * in putting our own error message on the console by default
15929 + netdev_dbg(netdev, "ERROR %d setting link cfg", err);
15936 + enum dpsw_counter id;
15937 + char name[ETH_GSTRING_LEN];
15938 +} ethsw_ethtool_counters[] = {
15939 + {DPSW_CNT_ING_FRAME, "rx frames"},
15940 + {DPSW_CNT_ING_BYTE, "rx bytes"},
15941 + {DPSW_CNT_ING_FLTR_FRAME, "rx filtered frames"},
15942 + {DPSW_CNT_ING_FRAME_DISCARD, "rx discarded frames"},
15943 + {DPSW_CNT_ING_BCAST_FRAME, "rx b-cast frames"},
15944 + {DPSW_CNT_ING_BCAST_BYTES, "rx b-cast bytes"},
15945 + {DPSW_CNT_ING_MCAST_FRAME, "rx m-cast frames"},
15946 + {DPSW_CNT_ING_MCAST_BYTE, "rx m-cast bytes"},
15947 + {DPSW_CNT_EGR_FRAME, "tx frames"},
15948 + {DPSW_CNT_EGR_BYTE, "tx bytes"},
15949 + {DPSW_CNT_EGR_FRAME_DISCARD, "tx discarded frames"},
15953 +static int ethsw_ethtool_get_sset_count(struct net_device *dev, int sset)
15956 + case ETH_SS_STATS:
15957 + return ARRAY_SIZE(ethsw_ethtool_counters);
15959 + return -EOPNOTSUPP;
15963 +static void ethsw_ethtool_get_strings(struct net_device *netdev,
15964 + u32 stringset, u8 *data)
15968 + switch (stringset) {
15969 + case ETH_SS_STATS:
15970 + for (i = 0; i < ARRAY_SIZE(ethsw_ethtool_counters); i++)
15971 + memcpy(data + i * ETH_GSTRING_LEN,
15972 + ethsw_ethtool_counters[i].name, ETH_GSTRING_LEN);
15977 +static void ethsw_ethtool_get_stats(struct net_device *netdev,
15978 + struct ethtool_stats *stats,
15981 + struct ethsw_port_priv *port_priv = netdev_priv(netdev);
15985 + for (i = 0; i < ARRAY_SIZE(ethsw_ethtool_counters); i++) {
15986 + err = dpsw_if_get_counter(port_priv->ethsw_priv->mc_io, 0,
15987 + port_priv->ethsw_priv->dpsw_handle,
15988 + port_priv->port_index,
15989 + ethsw_ethtool_counters[i].id,
15992 + netdev_err(netdev, "dpsw_if_get_counter[%s] err %d\n",
15993 + ethsw_ethtool_counters[i].name, err);
15997 +static const struct ethtool_ops ethsw_port_ethtool_ops = {
15998 + .get_drvinfo = ðsw_get_drvinfo,
15999 + .get_link = ðtool_op_get_link,
16000 + .get_settings = ðsw_get_settings,
16001 + .set_settings = ðsw_set_settings,
16002 + .get_strings = ðsw_ethtool_get_strings,
16003 + .get_ethtool_stats = ðsw_ethtool_get_stats,
16004 + .get_sset_count = ðsw_ethtool_get_sset_count,
16007 +/* -------------------------------------------------------------------------- */
16008 +/* ethsw driver functions */
16010 +static int ethsw_links_state_update(struct ethsw_dev_priv *priv)
16012 + struct list_head *pos;
16013 + struct ethsw_port_priv *port_priv;
16016 + list_for_each(pos, &priv->port_list) {
16017 + port_priv = list_entry(pos, struct ethsw_port_priv,
16020 + err = _ethsw_port_carrier_state_sync(port_priv->netdev);
16022 + netdev_err(port_priv->netdev,
16023 + "_ethsw_port_carrier_state_sync err %d\n",
16030 +static irqreturn_t ethsw_irq0_handler(int irq_num, void *arg)
16032 + return IRQ_WAKE_THREAD;
16035 +static irqreturn_t _ethsw_irq0_handler_thread(int irq_num, void *arg)
16037 + struct device *dev = (struct device *)arg;
16038 + struct net_device *netdev = dev_get_drvdata(dev);
16039 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
16041 + struct fsl_mc_io *io = priv->mc_io;
16042 + u16 token = priv->dpsw_handle;
16043 + int irq_index = DPSW_IRQ_INDEX_IF;
16045 + /* Mask the events and the if_id reserved bits to be cleared on read */
16046 + u32 status = DPSW_IRQ_EVENT_LINK_CHANGED | 0xFFFF0000;
16049 + err = dpsw_get_irq_status(io, 0, token, irq_index, &status);
16050 + if (unlikely(err)) {
16051 + netdev_err(netdev, "Can't get irq status (err %d)", err);
16053 + err = dpsw_clear_irq_status(io, 0, token, irq_index,
16055 + if (unlikely(err))
16056 + netdev_err(netdev, "Can't clear irq status (err %d)",
16061 + if (status & DPSW_IRQ_EVENT_LINK_CHANGED) {
16062 + err = ethsw_links_state_update(priv);
16063 + if (unlikely(err))
16068 + return IRQ_HANDLED;
16071 +static int ethsw_setup_irqs(struct fsl_mc_device *sw_dev)
16073 + struct device *dev = &sw_dev->dev;
16074 + struct net_device *netdev = dev_get_drvdata(dev);
16075 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
16077 + struct fsl_mc_device_irq *irq;
16078 + const int irq_index = DPSW_IRQ_INDEX_IF;
16079 + u32 mask = DPSW_IRQ_EVENT_LINK_CHANGED;
16081 + err = fsl_mc_allocate_irqs(sw_dev);
16082 + if (unlikely(err)) {
16083 + dev_err(dev, "MC irqs allocation failed\n");
16087 + if (WARN_ON(sw_dev->obj_desc.irq_count != DPSW_MAX_IRQ_NUM)) {
16092 + err = dpsw_set_irq_enable(priv->mc_io, 0, priv->dpsw_handle,
16094 + if (unlikely(err)) {
16095 + dev_err(dev, "dpsw_set_irq_enable err %d\n", err);
16099 + irq = sw_dev->irqs[irq_index];
16101 + err = devm_request_threaded_irq(dev, irq->msi_desc->irq,
16102 + ethsw_irq0_handler,
16103 + _ethsw_irq0_handler_thread,
16104 + IRQF_NO_SUSPEND | IRQF_ONESHOT,
16105 + dev_name(dev), dev);
16106 + if (unlikely(err)) {
16107 + dev_err(dev, "devm_request_threaded_irq(): %d", err);
16111 + err = dpsw_set_irq_mask(priv->mc_io, 0, priv->dpsw_handle,
16112 + irq_index, mask);
16113 + if (unlikely(err)) {
16114 + dev_err(dev, "dpsw_set_irq_mask(): %d", err);
16115 + goto free_devm_irq;
16118 + err = dpsw_set_irq_enable(priv->mc_io, 0, priv->dpsw_handle,
16120 + if (unlikely(err)) {
16121 + dev_err(dev, "dpsw_set_irq_enable(): %d", err);
16122 + goto free_devm_irq;
16128 + devm_free_irq(dev, irq->msi_desc->irq, dev);
16130 + fsl_mc_free_irqs(sw_dev);
16134 +static void ethsw_teardown_irqs(struct fsl_mc_device *sw_dev)
16136 + struct device *dev = &sw_dev->dev;
16137 + struct net_device *netdev = dev_get_drvdata(dev);
16138 + struct ethsw_dev_priv *priv = netdev_priv(netdev);
16140 + dpsw_set_irq_enable(priv->mc_io, 0, priv->dpsw_handle,
16141 + DPSW_IRQ_INDEX_IF, 0);
16142 + devm_free_irq(dev,
16143 + sw_dev->irqs[DPSW_IRQ_INDEX_IF]->msi_desc->irq,
16145 + fsl_mc_free_irqs(sw_dev);
16149 +ethsw_init(struct fsl_mc_device *sw_dev)
16151 + struct device *dev = &sw_dev->dev;
16152 + struct ethsw_dev_priv *priv;
16153 + struct net_device *netdev;
16156 + u16 version_major, version_minor;
16157 + const struct dpsw_stp_cfg stp_cfg = {
16159 + .state = DPSW_STP_STATE_FORWARDING,
16162 + netdev = dev_get_drvdata(dev);
16163 + priv = netdev_priv(netdev);
16165 + priv->dev_id = sw_dev->obj_desc.id;
16167 + err = dpsw_open(priv->mc_io, 0, priv->dev_id, &priv->dpsw_handle);
16169 + dev_err(dev, "dpsw_open err %d\n", err);
16172 + if (!priv->dpsw_handle) {
16173 + dev_err(dev, "dpsw_open returned null handle but no error\n");
16178 + err = dpsw_get_attributes(priv->mc_io, 0, priv->dpsw_handle,
16181 + dev_err(dev, "dpsw_get_attributes err %d\n", err);
16185 + err = dpsw_get_api_version(priv->mc_io, 0,
16189 + dev_err(dev, "dpsw_get_api_version err %d\n", err);
16193 + /* Minimum supported DPSW version check */
16194 + if (version_major < DPSW_MIN_VER_MAJOR ||
16195 + (version_major == DPSW_MIN_VER_MAJOR &&
16196 + version_minor < DPSW_MIN_VER_MINOR)) {
16197 + dev_err(dev, "DPSW version %d:%d not supported. Use %d.%d or greater.\n",
16200 + DPSW_MIN_VER_MAJOR, DPSW_MIN_VER_MINOR);
16205 + err = dpsw_reset(priv->mc_io, 0, priv->dpsw_handle);
16207 + dev_err(dev, "dpsw_reset err %d\n", err);
16211 + err = dpsw_fdb_set_learning_mode(priv->mc_io, 0, priv->dpsw_handle, 0,
16212 + DPSW_FDB_LEARNING_MODE_HW);
16214 + dev_err(dev, "dpsw_fdb_set_learning_mode err %d\n", err);
16218 + for (i = 0; i < priv->sw_attr.num_ifs; i++) {
16219 + err = dpsw_if_set_stp(priv->mc_io, 0, priv->dpsw_handle, i,
16222 + dev_err(dev, "dpsw_if_set_stp err %d for port %d\n",
16227 + err = dpsw_if_set_broadcast(priv->mc_io, 0,
16228 + priv->dpsw_handle, i, 1);
16231 + "dpsw_if_set_broadcast err %d for port %d\n",
16240 + dpsw_close(priv->mc_io, 0, priv->dpsw_handle);
16246 +ethsw_takedown(struct fsl_mc_device *sw_dev)
16248 + struct device *dev = &sw_dev->dev;
16249 + struct net_device *netdev;
16250 + struct ethsw_dev_priv *priv;
16253 + netdev = dev_get_drvdata(dev);
16254 + priv = netdev_priv(netdev);
16256 + err = dpsw_close(priv->mc_io, 0, priv->dpsw_handle);
16258 + dev_warn(dev, "dpsw_close err %d\n", err);
16264 +ethsw_remove(struct fsl_mc_device *sw_dev)
16266 + struct device *dev;
16267 + struct net_device *netdev;
16268 + struct ethsw_dev_priv *priv;
16269 + struct ethsw_port_priv *port_priv;
16270 + struct list_head *pos;
16272 + dev = &sw_dev->dev;
16273 + netdev = dev_get_drvdata(dev);
16274 + priv = netdev_priv(netdev);
16276 + list_for_each(pos, &priv->port_list) {
16277 + port_priv = list_entry(pos, struct ethsw_port_priv, list);
16280 + netdev_upper_dev_unlink(port_priv->netdev, netdev);
16283 + unregister_netdev(port_priv->netdev);
16284 + free_netdev(port_priv->netdev);
16287 + ethsw_teardown_irqs(sw_dev);
16289 + unregister_netdev(netdev);
16291 + ethsw_takedown(sw_dev);
16292 + fsl_mc_portal_free(priv->mc_io);
16294 + dev_set_drvdata(dev, NULL);
16295 + free_netdev(netdev);
16301 +ethsw_probe(struct fsl_mc_device *sw_dev)
16303 + struct device *dev;
16304 + struct net_device *netdev = NULL;
16305 + struct ethsw_dev_priv *priv = NULL;
16308 + const char def_mcast[ETH_ALEN] = {
16309 + 0x01, 0x00, 0x5e, 0x00, 0x00, 0x01,
16311 + char port_name[IFNAMSIZ];
16313 + dev = &sw_dev->dev;
16315 + /* register switch device, it's for management only - no I/O */
16316 + netdev = alloc_etherdev(sizeof(*priv));
16318 + dev_err(dev, "alloc_etherdev error\n");
16321 + netdev->netdev_ops = ðsw_ops;
16323 + SET_NETDEV_DEV(netdev, dev);
16324 + dev_set_drvdata(dev, netdev);
16326 + priv = netdev_priv(netdev);
16327 + priv->netdev = netdev;
16329 + err = fsl_mc_portal_allocate(sw_dev, 0, &priv->mc_io);
16331 + dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
16332 + goto err_free_netdev;
16334 + if (!priv->mc_io) {
16335 + dev_err(dev, "fsl_mc_portal_allocate returned null handle but no error\n");
16337 + goto err_free_netdev;
16340 + err = ethsw_init(sw_dev);
16342 + dev_err(dev, "switch init err %d\n", err);
16343 + goto err_free_cmdport;
16346 + netdev->flags = netdev->flags | IFF_PROMISC | IFF_MASTER;
16348 + /* TODO: should we hold rtnl_lock here? We can't register_netdev under
16351 + dev_alloc_name(netdev, "sw%d");
16352 + err = register_netdev(netdev);
16354 + dev_err(dev, "register_netdev error %d\n", err);
16355 + goto err_takedown;
16358 + dev_info(dev, "register_netdev res %d\n", err);
16360 + /* VLAN 1 is implicitly configured on the switch */
16361 + priv->vlans[1] = ETHSW_VLAN_MEMBER;
16362 + /* Flooding, learning are implicitly enabled */
16363 + priv->learning = true;
16364 + priv->flood = true;
16366 + /* register switch ports */
16367 + snprintf(port_name, IFNAMSIZ, "%sp%%d", netdev->name);
16369 + INIT_LIST_HEAD(&priv->port_list);
16370 + for (i = 0; i < priv->sw_attr.num_ifs; i++) {
16371 + struct net_device *port_netdev;
16372 + struct ethsw_port_priv *port_priv;
16374 + port_netdev = alloc_etherdev(sizeof(struct ethsw_port_priv));
16375 + if (!port_netdev) {
16376 + dev_err(dev, "alloc_etherdev error\n");
16377 + goto err_takedown;
16380 + port_priv = netdev_priv(port_netdev);
16381 + port_priv->netdev = port_netdev;
16382 + port_priv->ethsw_priv = priv;
16384 + port_priv->port_index = i;
16385 + port_priv->stp_state = BR_STATE_FORWARDING;
16386 + /* VLAN 1 is configured by default on all switch ports */
16387 + port_priv->vlans[1] = ETHSW_VLAN_MEMBER | ETHSW_VLAN_UNTAGGED |
16390 + SET_NETDEV_DEV(port_netdev, dev);
16391 + port_netdev->netdev_ops = ðsw_port_ops;
16392 + port_netdev->ethtool_ops = ðsw_port_ethtool_ops;
16394 + port_netdev->flags = port_netdev->flags |
16395 + IFF_PROMISC | IFF_SLAVE;
16397 + dev_alloc_name(port_netdev, port_name);
16398 + err = register_netdev(port_netdev);
16400 + dev_err(dev, "register_netdev error %d\n", err);
16401 + free_netdev(port_netdev);
16402 + goto err_takedown;
16407 + err = netdev_master_upper_dev_link(port_netdev, netdev,
16410 + dev_err(dev, "netdev_master_upper_dev_link error %d\n",
16412 + unregister_netdev(port_netdev);
16413 + free_netdev(port_netdev);
16415 + goto err_takedown;
16418 + rtmsg_ifinfo(RTM_NEWLINK, port_netdev, IFF_SLAVE, GFP_KERNEL);
16422 + list_add(&port_priv->list, &priv->port_list);
16424 + /* TODO: implmenet set_rm_mode instead of this */
16425 + err = ethsw_port_fdb_add_mc(port_netdev, def_mcast);
16427 + dev_warn(&netdev->dev,
16428 + "ethsw_port_fdb_add_mc err %d\n", err);
16431 + /* the switch starts up enabled */
16433 + err = dev_open(netdev);
16436 + dev_warn(dev, "dev_open err %d\n", err);
16439 + err = ethsw_setup_irqs(sw_dev);
16440 + if (unlikely(err)) {
16441 + dev_warn(dev, "ethsw_setup_irqs err %d\n", err);
16442 + goto err_takedown;
16445 + dev_info(&netdev->dev,
16446 + "probed %d port switch\n", priv->sw_attr.num_ifs);
16450 + ethsw_remove(sw_dev);
16452 + fsl_mc_portal_free(priv->mc_io);
16454 + dev_set_drvdata(dev, NULL);
16455 + free_netdev(netdev);
16460 +static const struct fsl_mc_device_id ethsw_match_id_table[] = {
16462 + .vendor = FSL_MC_VENDOR_FREESCALE,
16463 + .obj_type = "dpsw",
16468 +static struct fsl_mc_driver eth_sw_drv = {
16470 + .name = KBUILD_MODNAME,
16471 + .owner = THIS_MODULE,
16473 + .probe = ethsw_probe,
16474 + .remove = ethsw_remove,
16475 + .match_id_table = ethsw_match_id_table,
16478 +module_fsl_mc_driver(eth_sw_drv);
16480 +MODULE_LICENSE("GPL");
16481 +MODULE_DESCRIPTION("DPAA2 Ethernet Switch Driver (prototype)");
16483 +++ b/drivers/staging/fsl-dpaa2/evb/Kconfig
16485 +config FSL_DPAA2_EVB
16486 + tristate "DPAA2 Edge Virtual Bridge"
16487 + depends on FSL_MC_BUS && FSL_DPAA2
16488 + select VLAN_8021Q
16491 + Prototype driver for DPAA2 Edge Virtual Bridge.
16493 +++ b/drivers/staging/fsl-dpaa2/evb/Makefile
16496 +obj-$(CONFIG_FSL_DPAA2_EVB) += dpaa2-evb.o
16498 +dpaa2-evb-objs := evb.o dpdmux.o
16501 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
16504 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
16506 +++ b/drivers/staging/fsl-dpaa2/evb/dpdmux-cmd.h
16508 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
16510 + * Redistribution and use in source and binary forms, with or without
16511 + * modification, are permitted provided that the following conditions are met:
16512 + * * Redistributions of source code must retain the above copyright
16513 + * notice, this list of conditions and the following disclaimer.
16514 + * * Redistributions in binary form must reproduce the above copyright
16515 + * notice, this list of conditions and the following disclaimer in the
16516 + * documentation and/or other materials provided with the distribution.
16517 + * * Neither the name of the above-listed copyright holders nor the
16518 + * names of any contributors may be used to endorse or promote products
16519 + * derived from this software without specific prior written permission.
16522 + * ALTERNATIVELY, this software may be distributed under the terms of the
16523 + * GNU General Public License ("GPL") as published by the Free Software
16524 + * Foundation, either version 2 of that License or (at your option) any
16527 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16528 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16529 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16530 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
16531 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
16532 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
16533 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
16534 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
16535 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
16536 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
16537 + * POSSIBILITY OF SUCH DAMAGE.
16539 +#ifndef _FSL_DPDMUX_CMD_H
16540 +#define _FSL_DPDMUX_CMD_H
16542 +/* DPDMUX Version */
16543 +#define DPDMUX_VER_MAJOR 6
16544 +#define DPDMUX_VER_MINOR 1
16546 +#define DPDMUX_CMD_BASE_VER 1
16547 +#define DPDMUX_CMD_ID_OFFSET 4
16549 +#define DPDMUX_CMD(id) (((id) << DPDMUX_CMD_ID_OFFSET) | DPDMUX_CMD_BASE_VER)
16552 +#define DPDMUX_CMDID_CLOSE DPDMUX_CMD(0x800)
16553 +#define DPDMUX_CMDID_OPEN DPDMUX_CMD(0x806)
16554 +#define DPDMUX_CMDID_CREATE DPDMUX_CMD(0x906)
16555 +#define DPDMUX_CMDID_DESTROY DPDMUX_CMD(0x986)
16556 +#define DPDMUX_CMDID_GET_API_VERSION DPDMUX_CMD(0xa06)
16558 +#define DPDMUX_CMDID_ENABLE DPDMUX_CMD(0x002)
16559 +#define DPDMUX_CMDID_DISABLE DPDMUX_CMD(0x003)
16560 +#define DPDMUX_CMDID_GET_ATTR DPDMUX_CMD(0x004)
16561 +#define DPDMUX_CMDID_RESET DPDMUX_CMD(0x005)
16562 +#define DPDMUX_CMDID_IS_ENABLED DPDMUX_CMD(0x006)
16564 +#define DPDMUX_CMDID_SET_IRQ_ENABLE DPDMUX_CMD(0x012)
16565 +#define DPDMUX_CMDID_GET_IRQ_ENABLE DPDMUX_CMD(0x013)
16566 +#define DPDMUX_CMDID_SET_IRQ_MASK DPDMUX_CMD(0x014)
16567 +#define DPDMUX_CMDID_GET_IRQ_MASK DPDMUX_CMD(0x015)
16568 +#define DPDMUX_CMDID_GET_IRQ_STATUS DPDMUX_CMD(0x016)
16569 +#define DPDMUX_CMDID_CLEAR_IRQ_STATUS DPDMUX_CMD(0x017)
16571 +#define DPDMUX_CMDID_SET_MAX_FRAME_LENGTH DPDMUX_CMD(0x0a1)
16573 +#define DPDMUX_CMDID_UL_RESET_COUNTERS DPDMUX_CMD(0x0a3)
16575 +#define DPDMUX_CMDID_IF_SET_ACCEPTED_FRAMES DPDMUX_CMD(0x0a7)
16576 +#define DPDMUX_CMDID_IF_GET_ATTR DPDMUX_CMD(0x0a8)
16577 +#define DPDMUX_CMDID_IF_ENABLE DPDMUX_CMD(0x0a9)
16578 +#define DPDMUX_CMDID_IF_DISABLE DPDMUX_CMD(0x0aa)
16580 +#define DPDMUX_CMDID_IF_ADD_L2_RULE DPDMUX_CMD(0x0b0)
16581 +#define DPDMUX_CMDID_IF_REMOVE_L2_RULE DPDMUX_CMD(0x0b1)
16582 +#define DPDMUX_CMDID_IF_GET_COUNTER DPDMUX_CMD(0x0b2)
16583 +#define DPDMUX_CMDID_IF_SET_LINK_CFG DPDMUX_CMD(0x0b3)
16584 +#define DPDMUX_CMDID_IF_GET_LINK_STATE DPDMUX_CMD(0x0b4)
16586 +#define DPDMUX_CMDID_SET_CUSTOM_KEY DPDMUX_CMD(0x0b5)
16587 +#define DPDMUX_CMDID_ADD_CUSTOM_CLS_ENTRY DPDMUX_CMD(0x0b6)
16588 +#define DPDMUX_CMDID_REMOVE_CUSTOM_CLS_ENTRY DPDMUX_CMD(0x0b7)
16590 +#define DPDMUX_MASK(field) \
16591 + GENMASK(DPDMUX_##field##_SHIFT + DPDMUX_##field##_SIZE - 1, \
16592 + DPDMUX_##field##_SHIFT)
16593 +#define dpdmux_set_field(var, field, val) \
16594 + ((var) |= (((val) << DPDMUX_##field##_SHIFT) & DPDMUX_MASK(field)))
16595 +#define dpdmux_get_field(var, field) \
16596 + (((var) & DPDMUX_MASK(field)) >> DPDMUX_##field##_SHIFT)
16598 +struct dpdmux_cmd_open {
16602 +struct dpdmux_cmd_create {
16608 + u16 adv_max_dmat_entries;
16609 + u16 adv_max_mc_groups;
16610 + u16 adv_max_vlan_ids;
16616 +struct dpdmux_cmd_destroy {
16620 +#define DPDMUX_ENABLE_SHIFT 0
16621 +#define DPDMUX_ENABLE_SIZE 1
16623 +struct dpdmux_rsp_is_enabled {
16627 +struct dpdmux_cmd_set_irq_enable {
16633 +struct dpdmux_cmd_get_irq_enable {
16638 +struct dpdmux_rsp_get_irq_enable {
16642 +struct dpdmux_cmd_set_irq_mask {
16647 +struct dpdmux_cmd_get_irq_mask {
16652 +struct dpdmux_rsp_get_irq_mask {
16656 +struct dpdmux_cmd_get_irq_status {
16661 +struct dpdmux_rsp_get_irq_status {
16665 +struct dpdmux_cmd_clear_irq_status {
16670 +struct dpdmux_rsp_get_attr {
16685 +struct dpdmux_cmd_set_max_frame_length {
16686 + u16 max_frame_length;
16689 +#define DPDMUX_ACCEPTED_FRAMES_TYPE_SHIFT 0
16690 +#define DPDMUX_ACCEPTED_FRAMES_TYPE_SIZE 4
16691 +#define DPDMUX_UNACCEPTED_FRAMES_ACTION_SHIFT 4
16692 +#define DPDMUX_UNACCEPTED_FRAMES_ACTION_SIZE 4
16694 +struct dpdmux_cmd_if_set_accepted_frames {
16696 + u8 frames_options;
16699 +struct dpdmux_cmd_if {
16703 +struct dpdmux_rsp_if_get_attr {
16707 + u8 accepted_frames_type;
16711 +struct dpdmux_cmd_if_l2_rule {
16724 +struct dpdmux_cmd_if_get_counter {
16729 +struct dpdmux_rsp_if_get_counter {
16734 +struct dpdmux_cmd_if_set_link_cfg {
16744 +struct dpdmux_cmd_if_get_link_state {
16748 +struct dpdmux_rsp_if_get_link_state {
16759 +struct dpdmux_rsp_get_api_version {
16764 +struct dpdmux_set_custom_key {
16766 + u64 key_cfg_iova;
16769 +struct dpdmux_cmd_add_custom_cls_entry {
16778 +struct dpdmux_cmd_remove_custom_cls_entry {
16786 +#endif /* _FSL_DPDMUX_CMD_H */
16788 +++ b/drivers/staging/fsl-dpaa2/evb/dpdmux.c
16790 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
16792 + * Redistribution and use in source and binary forms, with or without
16793 + * modification, are permitted provided that the following conditions are met:
16794 + * * Redistributions of source code must retain the above copyright
16795 + * notice, this list of conditions and the following disclaimer.
16796 + * * Redistributions in binary form must reproduce the above copyright
16797 + * notice, this list of conditions and the following disclaimer in the
16798 + * documentation and/or other materials provided with the distribution.
16799 + * * Neither the name of the above-listed copyright holders nor the
16800 + * names of any contributors may be used to endorse or promote products
16801 + * derived from this software without specific prior written permission.
16804 + * ALTERNATIVELY, this software may be distributed under the terms of the
16805 + * GNU General Public License ("GPL") as published by the Free Software
16806 + * Foundation, either version 2 of that License or (at your option) any
16809 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16810 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16811 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16812 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
16813 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
16814 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
16815 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
16816 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
16817 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
16818 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
16819 + * POSSIBILITY OF SUCH DAMAGE.
16821 +#include "../../fsl-mc/include/mc-sys.h"
16822 +#include "../../fsl-mc/include/mc-cmd.h"
16823 +#include "dpdmux.h"
16824 +#include "dpdmux-cmd.h"
16827 + * dpdmux_open() - Open a control session for the specified object
16828 + * @mc_io: Pointer to MC portal's I/O object
16829 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16830 + * @dpdmux_id: DPDMUX unique ID
16831 + * @token: Returned token; use in subsequent API calls
16833 + * This function can be used to open a control session for an
16834 + * already created object; an object may have been declared in
16835 + * the DPL or by calling the dpdmux_create() function.
16836 + * This function returns a unique authentication token,
16837 + * associated with the specific object ID and the specific MC
16838 + * portal; this token must be used in all subsequent commands for
16839 + * this specific object.
16841 + * Return: '0' on Success; Error code otherwise.
16843 +int dpdmux_open(struct fsl_mc_io *mc_io,
16848 + struct mc_command cmd = { 0 };
16849 + struct dpdmux_cmd_open *cmd_params;
16852 + /* prepare command */
16853 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_OPEN,
16856 + cmd_params = (struct dpdmux_cmd_open *)cmd.params;
16857 + cmd_params->dpdmux_id = cpu_to_le32(dpdmux_id);
16859 + /* send command to mc*/
16860 + err = mc_send_command(mc_io, &cmd);
16864 + /* retrieve response parameters */
16865 + *token = mc_cmd_hdr_read_token(&cmd);
16871 + * dpdmux_close() - Close the control session of the object
16872 + * @mc_io: Pointer to MC portal's I/O object
16873 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16874 + * @token: Token of DPDMUX object
16876 + * After this function is called, no further operations are
16877 + * allowed on the object without opening a new control session.
16879 + * Return: '0' on Success; Error code otherwise.
16881 +int dpdmux_close(struct fsl_mc_io *mc_io,
16885 + struct mc_command cmd = { 0 };
16887 + /* prepare command */
16888 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CLOSE,
16892 + /* send command to mc*/
16893 + return mc_send_command(mc_io, &cmd);
16897 + * dpdmux_create() - Create the DPDMUX object
16898 + * @mc_io: Pointer to MC portal's I/O object
16899 + * @dprc_token: Parent container token; '0' for default container
16900 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16901 + * @cfg: Configuration structure
16902 + * @obj_id: returned object id
16904 + * Create the DPDMUX object, allocate required resources and
16905 + * perform required initialization.
16907 + * The object can be created either by declaring it in the
16908 + * DPL file, or by calling this function.
16910 + * The function accepts an authentication token of a parent
16911 + * container that this object should be assigned to. The token
16912 + * can be '0' so the object will be assigned to the default container.
16913 + * The newly created object can be opened with the returned
16914 + * object id and using the container's associated tokens and MC portals.
16916 + * Return: '0' on Success; Error code otherwise.
16918 +int dpdmux_create(struct fsl_mc_io *mc_io,
16921 + const struct dpdmux_cfg *cfg,
16924 + struct mc_command cmd = { 0 };
16925 + struct dpdmux_cmd_create *cmd_params;
16928 + /* prepare command */
16929 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CREATE,
16932 + cmd_params = (struct dpdmux_cmd_create *)cmd.params;
16933 + cmd_params->method = cfg->method;
16934 + cmd_params->manip = cfg->manip;
16935 + cmd_params->num_ifs = cpu_to_le16(cfg->num_ifs);
16936 + cmd_params->adv_max_dmat_entries =
16937 + cpu_to_le16(cfg->adv.max_dmat_entries);
16938 + cmd_params->adv_max_mc_groups = cpu_to_le16(cfg->adv.max_mc_groups);
16939 + cmd_params->adv_max_vlan_ids = cpu_to_le16(cfg->adv.max_vlan_ids);
16940 + cmd_params->options = cpu_to_le64(cfg->adv.options);
16942 + /* send command to mc*/
16943 + err = mc_send_command(mc_io, &cmd);
16947 + /* retrieve response parameters */
16948 + *obj_id = mc_cmd_hdr_read_token(&cmd);
16954 + * dpdmux_destroy() - Destroy the DPDMUX object and release all its resources.
16955 + * @mc_io: Pointer to MC portal's I/O object
16956 + * @dprc_token: Parent container token; '0' for default container
16957 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16958 + * @object_id: The object id; it must be a valid id within the container that
16959 + * created this object;
16961 + * The function accepts the authentication token of the parent container that
16962 + * created the object (not the one that currently owns the object). The object
16963 + * is searched within parent using the provided 'object_id'.
16964 + * All tokens to the object must be closed before calling destroy.
16966 + * Return: '0' on Success; error code otherwise.
16968 +int dpdmux_destroy(struct fsl_mc_io *mc_io,
16973 + struct mc_command cmd = { 0 };
16974 + struct dpdmux_cmd_destroy *cmd_params;
16976 + /* prepare command */
16977 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_DESTROY,
16980 + cmd_params = (struct dpdmux_cmd_destroy *)cmd.params;
16981 + cmd_params->dpdmux_id = cpu_to_le32(object_id);
16983 + /* send command to mc*/
16984 + return mc_send_command(mc_io, &cmd);
16988 + * dpdmux_enable() - Enable DPDMUX functionality
16989 + * @mc_io: Pointer to MC portal's I/O object
16990 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
16991 + * @token: Token of DPDMUX object
16993 + * Return: '0' on Success; Error code otherwise.
16995 +int dpdmux_enable(struct fsl_mc_io *mc_io,
16999 + struct mc_command cmd = { 0 };
17001 + /* prepare command */
17002 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_ENABLE,
17006 + /* send command to mc*/
17007 + return mc_send_command(mc_io, &cmd);
17011 + * dpdmux_disable() - Disable DPDMUX functionality
17012 + * @mc_io: Pointer to MC portal's I/O object
17013 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17014 + * @token: Token of DPDMUX object
17016 + * Return: '0' on Success; Error code otherwise.
17018 +int dpdmux_disable(struct fsl_mc_io *mc_io,
17022 + struct mc_command cmd = { 0 };
17024 + /* prepare command */
17025 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_DISABLE,
17029 + /* send command to mc*/
17030 + return mc_send_command(mc_io, &cmd);
17034 + * dpdmux_is_enabled() - Check if the DPDMUX is enabled.
17035 + * @mc_io: Pointer to MC portal's I/O object
17036 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17037 + * @token: Token of DPDMUX object
17038 + * @en: Returns '1' if object is enabled; '0' otherwise
17040 + * Return: '0' on Success; Error code otherwise.
17042 +int dpdmux_is_enabled(struct fsl_mc_io *mc_io,
17047 + struct mc_command cmd = { 0 };
17048 + struct dpdmux_rsp_is_enabled *rsp_params;
17051 + /* prepare command */
17052 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IS_ENABLED,
17056 + /* send command to mc*/
17057 + err = mc_send_command(mc_io, &cmd);
17061 + /* retrieve response parameters */
17062 + rsp_params = (struct dpdmux_rsp_is_enabled *)cmd.params;
17063 + *en = dpdmux_get_field(rsp_params->en, ENABLE);
17069 + * dpdmux_reset() - Reset the DPDMUX, returns the object to initial state.
17070 + * @mc_io: Pointer to MC portal's I/O object
17071 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17072 + * @token: Token of DPDMUX object
17074 + * Return: '0' on Success; Error code otherwise.
17076 +int dpdmux_reset(struct fsl_mc_io *mc_io,
17080 + struct mc_command cmd = { 0 };
17082 + /* prepare command */
17083 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_RESET,
17087 + /* send command to mc*/
17088 + return mc_send_command(mc_io, &cmd);
17092 + * dpdmux_set_irq_enable() - Set overall interrupt state.
17093 + * @mc_io: Pointer to MC portal's I/O object
17094 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17095 + * @token: Token of DPDMUX object
17096 + * @irq_index: The interrupt index to configure
17097 + * @en: Interrupt state - enable = 1, disable = 0
17099 + * Allows GPP software to control when interrupts are generated.
17100 + * Each interrupt can have up to 32 causes. The enable/disable control's the
17101 + * overall interrupt state. if the interrupt is disabled no causes will cause
17104 + * Return: '0' on Success; Error code otherwise.
17106 +int dpdmux_set_irq_enable(struct fsl_mc_io *mc_io,
17112 + struct mc_command cmd = { 0 };
17113 + struct dpdmux_cmd_set_irq_enable *cmd_params;
17115 + /* prepare command */
17116 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_IRQ_ENABLE,
17119 + cmd_params = (struct dpdmux_cmd_set_irq_enable *)cmd.params;
17120 + cmd_params->enable = en;
17121 + cmd_params->irq_index = irq_index;
17123 + /* send command to mc*/
17124 + return mc_send_command(mc_io, &cmd);
17128 + * dpdmux_get_irq_enable() - Get overall interrupt state.
17129 + * @mc_io: Pointer to MC portal's I/O object
17130 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17131 + * @token: Token of DPDMUX object
17132 + * @irq_index: The interrupt index to configure
17133 + * @en: Returned interrupt state - enable = 1, disable = 0
17135 + * Return: '0' on Success; Error code otherwise.
17137 +int dpdmux_get_irq_enable(struct fsl_mc_io *mc_io,
17143 + struct mc_command cmd = { 0 };
17144 + struct dpdmux_cmd_get_irq_enable *cmd_params;
17145 + struct dpdmux_rsp_get_irq_enable *rsp_params;
17148 + /* prepare command */
17149 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ_ENABLE,
17152 + cmd_params = (struct dpdmux_cmd_get_irq_enable *)cmd.params;
17153 + cmd_params->irq_index = irq_index;
17155 + /* send command to mc*/
17156 + err = mc_send_command(mc_io, &cmd);
17160 + /* retrieve response parameters */
17161 + rsp_params = (struct dpdmux_rsp_get_irq_enable *)cmd.params;
17162 + *en = rsp_params->enable;
17168 + * dpdmux_set_irq_mask() - Set interrupt mask.
17169 + * @mc_io: Pointer to MC portal's I/O object
17170 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17171 + * @token: Token of DPDMUX object
17172 + * @irq_index: The interrupt index to configure
17173 + * @mask: event mask to trigger interrupt;
17175 + * 0 = ignore event
17176 + * 1 = consider event for asserting IRQ
17178 + * Every interrupt can have up to 32 causes and the interrupt model supports
17179 + * masking/unmasking each cause independently
17181 + * Return: '0' on Success; Error code otherwise.
17183 +int dpdmux_set_irq_mask(struct fsl_mc_io *mc_io,
17189 + struct mc_command cmd = { 0 };
17190 + struct dpdmux_cmd_set_irq_mask *cmd_params;
17192 + /* prepare command */
17193 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_IRQ_MASK,
17196 + cmd_params = (struct dpdmux_cmd_set_irq_mask *)cmd.params;
17197 + cmd_params->mask = cpu_to_le32(mask);
17198 + cmd_params->irq_index = irq_index;
17200 + /* send command to mc*/
17201 + return mc_send_command(mc_io, &cmd);
17205 + * dpdmux_get_irq_mask() - Get interrupt mask.
17206 + * @mc_io: Pointer to MC portal's I/O object
17207 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17208 + * @token: Token of DPDMUX object
17209 + * @irq_index: The interrupt index to configure
17210 + * @mask: Returned event mask to trigger interrupt
17212 + * Every interrupt can have up to 32 causes and the interrupt model supports
17213 + * masking/unmasking each cause independently
17215 + * Return: '0' on Success; Error code otherwise.
17217 +int dpdmux_get_irq_mask(struct fsl_mc_io *mc_io,
17223 + struct mc_command cmd = { 0 };
17224 + struct dpdmux_cmd_get_irq_mask *cmd_params;
17225 + struct dpdmux_rsp_get_irq_mask *rsp_params;
17228 + /* prepare command */
17229 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ_MASK,
17232 + cmd_params = (struct dpdmux_cmd_get_irq_mask *)cmd.params;
17233 + cmd_params->irq_index = irq_index;
17235 + /* send command to mc*/
17236 + err = mc_send_command(mc_io, &cmd);
17240 + /* retrieve response parameters */
17241 + rsp_params = (struct dpdmux_rsp_get_irq_mask *)cmd.params;
17242 + *mask = le32_to_cpu(rsp_params->mask);
17248 + * dpdmux_get_irq_status() - Get the current status of any pending interrupts.
17249 + * @mc_io: Pointer to MC portal's I/O object
17250 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17251 + * @token: Token of DPDMUX object
17252 + * @irq_index: The interrupt index to configure
17253 + * @status: Returned interrupts status - one bit per cause:
17254 + * 0 = no interrupt pending
17255 + * 1 = interrupt pending
17257 + * Return: '0' on Success; Error code otherwise.
17259 +int dpdmux_get_irq_status(struct fsl_mc_io *mc_io,
17265 + struct mc_command cmd = { 0 };
17266 + struct dpdmux_cmd_get_irq_status *cmd_params;
17267 + struct dpdmux_rsp_get_irq_status *rsp_params;
17270 + /* prepare command */
17271 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_IRQ_STATUS,
17274 + cmd_params = (struct dpdmux_cmd_get_irq_status *)cmd.params;
17275 + cmd_params->status = cpu_to_le32(*status);
17276 + cmd_params->irq_index = irq_index;
17278 + /* send command to mc*/
17279 + err = mc_send_command(mc_io, &cmd);
17283 + /* retrieve response parameters */
17284 + rsp_params = (struct dpdmux_rsp_get_irq_status *)cmd.params;
17285 + *status = le32_to_cpu(rsp_params->status);
17291 + * dpdmux_clear_irq_status() - Clear a pending interrupt's status
17292 + * @mc_io: Pointer to MC portal's I/O object
17293 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17294 + * @token: Token of DPDMUX object
17295 + * @irq_index: The interrupt index to configure
17296 + * @status: bits to clear (W1C) - one bit per cause:
17297 + * 0 = don't change
17298 + * 1 = clear status bit
17300 + * Return: '0' on Success; Error code otherwise.
17302 +int dpdmux_clear_irq_status(struct fsl_mc_io *mc_io,
17308 + struct mc_command cmd = { 0 };
17309 + struct dpdmux_cmd_clear_irq_status *cmd_params;
17311 + /* prepare command */
17312 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_CLEAR_IRQ_STATUS,
17315 + cmd_params = (struct dpdmux_cmd_clear_irq_status *)cmd.params;
17316 + cmd_params->status = cpu_to_le32(status);
17317 + cmd_params->irq_index = irq_index;
17319 + /* send command to mc*/
17320 + return mc_send_command(mc_io, &cmd);
17324 + * dpdmux_get_attributes() - Retrieve DPDMUX attributes
17325 + * @mc_io: Pointer to MC portal's I/O object
17326 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17327 + * @token: Token of DPDMUX object
17328 + * @attr: Returned object's attributes
17330 + * Return: '0' on Success; Error code otherwise.
17332 +int dpdmux_get_attributes(struct fsl_mc_io *mc_io,
17335 + struct dpdmux_attr *attr)
17337 + struct mc_command cmd = { 0 };
17338 + struct dpdmux_rsp_get_attr *rsp_params;
17341 + /* prepare command */
17342 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_ATTR,
17346 + /* send command to mc*/
17347 + err = mc_send_command(mc_io, &cmd);
17351 + /* retrieve response parameters */
17352 + rsp_params = (struct dpdmux_rsp_get_attr *)cmd.params;
17353 + attr->id = le32_to_cpu(rsp_params->id);
17354 + attr->options = le64_to_cpu(rsp_params->options);
17355 + attr->method = rsp_params->method;
17356 + attr->manip = rsp_params->manip;
17357 + attr->num_ifs = le16_to_cpu(rsp_params->num_ifs);
17358 + attr->mem_size = le16_to_cpu(rsp_params->mem_size);
17364 + * dpdmux_if_enable() - Enable Interface
17365 + * @mc_io: Pointer to MC portal's I/O object
17366 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17367 + * @token: Token of DPDMUX object
17368 + * @if_id: Interface Identifier
17370 + * Return: Completion status. '0' on Success; Error code otherwise.
17372 +int dpdmux_if_enable(struct fsl_mc_io *mc_io,
17377 + struct dpdmux_cmd_if *cmd_params;
17378 + struct mc_command cmd = { 0 };
17380 + /* prepare command */
17381 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_ENABLE,
17384 + cmd_params = (struct dpdmux_cmd_if *)cmd.params;
17385 + cmd_params->if_id = cpu_to_le16(if_id);
17387 + /* send command to mc*/
17388 + return mc_send_command(mc_io, &cmd);
17392 + * dpdmux_if_disable() - Disable Interface
17393 + * @mc_io: Pointer to MC portal's I/O object
17394 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17395 + * @token: Token of DPDMUX object
17396 + * @if_id: Interface Identifier
17398 + * Return: Completion status. '0' on Success; Error code otherwise.
17400 +int dpdmux_if_disable(struct fsl_mc_io *mc_io,
17405 + struct dpdmux_cmd_if *cmd_params;
17406 + struct mc_command cmd = { 0 };
17408 + /* prepare command */
17409 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_DISABLE,
17412 + cmd_params = (struct dpdmux_cmd_if *)cmd.params;
17413 + cmd_params->if_id = cpu_to_le16(if_id);
17415 + /* send command to mc*/
17416 + return mc_send_command(mc_io, &cmd);
17420 + * dpdmux_set_max_frame_length() - Set the maximum frame length in DPDMUX
17421 + * @mc_io: Pointer to MC portal's I/O object
17422 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17423 + * @token: Token of DPDMUX object
17424 + * @max_frame_length: The required maximum frame length
17426 + * Update the maximum frame length on all DMUX interfaces.
17427 + * In case of VEPA, the maximum frame length on all dmux interfaces
17428 + * will be updated with the minimum value of the mfls of the connected
17429 + * dpnis and the actual value of dmux mfl.
17431 + * Return: '0' on Success; Error code otherwise.
17433 +int dpdmux_set_max_frame_length(struct fsl_mc_io *mc_io,
17436 + u16 max_frame_length)
17438 + struct mc_command cmd = { 0 };
17439 + struct dpdmux_cmd_set_max_frame_length *cmd_params;
17441 + /* prepare command */
17442 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_MAX_FRAME_LENGTH,
17445 + cmd_params = (struct dpdmux_cmd_set_max_frame_length *)cmd.params;
17446 + cmd_params->max_frame_length = cpu_to_le16(max_frame_length);
17448 + /* send command to mc*/
17449 + return mc_send_command(mc_io, &cmd);
17453 + * dpdmux_ul_reset_counters() - Function resets the uplink counter
17454 + * @mc_io: Pointer to MC portal's I/O object
17455 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17456 + * @token: Token of DPDMUX object
17458 + * Return: '0' on Success; Error code otherwise.
17460 +int dpdmux_ul_reset_counters(struct fsl_mc_io *mc_io,
17464 + struct mc_command cmd = { 0 };
17466 + /* prepare command */
17467 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_UL_RESET_COUNTERS,
17471 + /* send command to mc*/
17472 + return mc_send_command(mc_io, &cmd);
17476 + * dpdmux_if_set_accepted_frames() - Set the accepted frame types
17477 + * @mc_io: Pointer to MC portal's I/O object
17478 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17479 + * @token: Token of DPDMUX object
17480 + * @if_id: Interface ID (0 for uplink, or 1-num_ifs);
17481 + * @cfg: Frame types configuration
17483 + * if 'DPDMUX_ADMIT_ONLY_VLAN_TAGGED' is set - untagged frames or
17484 + * priority-tagged frames are discarded.
17485 + * if 'DPDMUX_ADMIT_ONLY_UNTAGGED' is set - untagged frames or
17486 + * priority-tagged frames are accepted.
17487 + * if 'DPDMUX_ADMIT_ALL' is set (default mode) - all VLAN tagged,
17488 + * untagged and priority-tagged frame are accepted;
17490 + * Return: '0' on Success; Error code otherwise.
17492 +int dpdmux_if_set_accepted_frames(struct fsl_mc_io *mc_io,
17496 + const struct dpdmux_accepted_frames *cfg)
17498 + struct mc_command cmd = { 0 };
17499 + struct dpdmux_cmd_if_set_accepted_frames *cmd_params;
17501 + /* prepare command */
17502 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_SET_ACCEPTED_FRAMES,
17505 + cmd_params = (struct dpdmux_cmd_if_set_accepted_frames *)cmd.params;
17506 + cmd_params->if_id = cpu_to_le16(if_id);
17507 + dpdmux_set_field(cmd_params->frames_options, ACCEPTED_FRAMES_TYPE,
17509 + dpdmux_set_field(cmd_params->frames_options, UNACCEPTED_FRAMES_ACTION,
17510 + cfg->unaccept_act);
17512 + /* send command to mc*/
17513 + return mc_send_command(mc_io, &cmd);
17517 + * dpdmux_if_get_attributes() - Obtain DPDMUX interface attributes
17518 + * @mc_io: Pointer to MC portal's I/O object
17519 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17520 + * @token: Token of DPDMUX object
17521 + * @if_id: Interface ID (0 for uplink, or 1-num_ifs);
17522 + * @attr: Interface attributes
17524 + * Return: '0' on Success; Error code otherwise.
17526 +int dpdmux_if_get_attributes(struct fsl_mc_io *mc_io,
17530 + struct dpdmux_if_attr *attr)
17532 + struct mc_command cmd = { 0 };
17533 + struct dpdmux_cmd_if *cmd_params;
17534 + struct dpdmux_rsp_if_get_attr *rsp_params;
17537 + /* prepare command */
17538 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_ATTR,
17541 + cmd_params = (struct dpdmux_cmd_if *)cmd.params;
17542 + cmd_params->if_id = cpu_to_le16(if_id);
17544 + /* send command to mc*/
17545 + err = mc_send_command(mc_io, &cmd);
17549 + /* retrieve response parameters */
17550 + rsp_params = (struct dpdmux_rsp_if_get_attr *)cmd.params;
17551 + attr->rate = le32_to_cpu(rsp_params->rate);
17552 + attr->enabled = dpdmux_get_field(rsp_params->enabled, ENABLE);
17553 + attr->accept_frame_type =
17554 + dpdmux_get_field(rsp_params->accepted_frames_type,
17555 + ACCEPTED_FRAMES_TYPE);
17561 + * dpdmux_if_remove_l2_rule() - Remove L2 rule from DPDMUX table
17562 + * @mc_io: Pointer to MC portal's I/O object
17563 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17564 + * @token: Token of DPDMUX object
17565 + * @if_id: Destination interface ID
17568 + * Function removes a L2 rule from DPDMUX table
17569 + * or adds an interface to an existing multicast address
17571 + * Return: '0' on Success; Error code otherwise.
17573 +int dpdmux_if_remove_l2_rule(struct fsl_mc_io *mc_io,
17577 + const struct dpdmux_l2_rule *rule)
17579 + struct mc_command cmd = { 0 };
17580 + struct dpdmux_cmd_if_l2_rule *cmd_params;
17582 + /* prepare command */
17583 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_REMOVE_L2_RULE,
17586 + cmd_params = (struct dpdmux_cmd_if_l2_rule *)cmd.params;
17587 + cmd_params->if_id = cpu_to_le16(if_id);
17588 + cmd_params->vlan_id = cpu_to_le16(rule->vlan_id);
17589 + cmd_params->mac_addr5 = rule->mac_addr[5];
17590 + cmd_params->mac_addr4 = rule->mac_addr[4];
17591 + cmd_params->mac_addr3 = rule->mac_addr[3];
17592 + cmd_params->mac_addr2 = rule->mac_addr[2];
17593 + cmd_params->mac_addr1 = rule->mac_addr[1];
17594 + cmd_params->mac_addr0 = rule->mac_addr[0];
17596 + /* send command to mc*/
17597 + return mc_send_command(mc_io, &cmd);
17601 + * dpdmux_if_add_l2_rule() - Add L2 rule into DPDMUX table
17602 + * @mc_io: Pointer to MC portal's I/O object
17603 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17604 + * @token: Token of DPDMUX object
17605 + * @if_id: Destination interface ID
17608 + * Function adds a L2 rule into DPDMUX table
17609 + * or adds an interface to an existing multicast address
17611 + * Return: '0' on Success; Error code otherwise.
17613 +int dpdmux_if_add_l2_rule(struct fsl_mc_io *mc_io,
17617 + const struct dpdmux_l2_rule *rule)
17619 + struct mc_command cmd = { 0 };
17620 + struct dpdmux_cmd_if_l2_rule *cmd_params;
17622 + /* prepare command */
17623 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_ADD_L2_RULE,
17626 + cmd_params = (struct dpdmux_cmd_if_l2_rule *)cmd.params;
17627 + cmd_params->if_id = cpu_to_le16(if_id);
17628 + cmd_params->vlan_id = cpu_to_le16(rule->vlan_id);
17629 + cmd_params->mac_addr5 = rule->mac_addr[5];
17630 + cmd_params->mac_addr4 = rule->mac_addr[4];
17631 + cmd_params->mac_addr3 = rule->mac_addr[3];
17632 + cmd_params->mac_addr2 = rule->mac_addr[2];
17633 + cmd_params->mac_addr1 = rule->mac_addr[1];
17634 + cmd_params->mac_addr0 = rule->mac_addr[0];
17636 + /* send command to mc*/
17637 + return mc_send_command(mc_io, &cmd);
17641 + * dpdmux_if_get_counter() - Functions obtains specific counter of an interface
17642 + * @mc_io: Pointer to MC portal's I/O object
17643 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17644 + * @token: Token of DPDMUX object
17645 + * @if_id: Interface Id
17646 + * @counter_type: counter type
17647 + * @counter: Returned specific counter information
17649 + * Return: '0' on Success; Error code otherwise.
17651 +int dpdmux_if_get_counter(struct fsl_mc_io *mc_io,
17655 + enum dpdmux_counter_type counter_type,
17658 + struct mc_command cmd = { 0 };
17659 + struct dpdmux_cmd_if_get_counter *cmd_params;
17660 + struct dpdmux_rsp_if_get_counter *rsp_params;
17663 + /* prepare command */
17664 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_COUNTER,
17667 + cmd_params = (struct dpdmux_cmd_if_get_counter *)cmd.params;
17668 + cmd_params->if_id = cpu_to_le16(if_id);
17669 + cmd_params->counter_type = counter_type;
17671 + /* send command to mc*/
17672 + err = mc_send_command(mc_io, &cmd);
17676 + /* retrieve response parameters */
17677 + rsp_params = (struct dpdmux_rsp_if_get_counter *)cmd.params;
17678 + *counter = le64_to_cpu(rsp_params->counter);
17684 + * dpdmux_if_set_link_cfg() - set the link configuration.
17685 + * @mc_io: Pointer to MC portal's I/O object
17686 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17687 + * @token: Token of DPSW object
17688 + * @if_id: interface id
17689 + * @cfg: Link configuration
17691 + * Return: '0' on Success; Error code otherwise.
17693 +int dpdmux_if_set_link_cfg(struct fsl_mc_io *mc_io,
17697 + struct dpdmux_link_cfg *cfg)
17699 + struct mc_command cmd = { 0 };
17700 + struct dpdmux_cmd_if_set_link_cfg *cmd_params;
17702 + /* prepare command */
17703 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_SET_LINK_CFG,
17706 + cmd_params = (struct dpdmux_cmd_if_set_link_cfg *)cmd.params;
17707 + cmd_params->if_id = cpu_to_le16(if_id);
17708 + cmd_params->rate = cpu_to_le32(cfg->rate);
17709 + cmd_params->options = cpu_to_le64(cfg->options);
17711 + /* send command to mc*/
17712 + return mc_send_command(mc_io, &cmd);
17716 + * dpdmux_if_get_link_state - Return the link state
17717 + * @mc_io: Pointer to MC portal's I/O object
17718 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17719 + * @token: Token of DPSW object
17720 + * @if_id: interface id
17721 + * @state: link state
17723 + * @returns '0' on Success; Error code otherwise.
17725 +int dpdmux_if_get_link_state(struct fsl_mc_io *mc_io,
17729 + struct dpdmux_link_state *state)
17731 + struct mc_command cmd = { 0 };
17732 + struct dpdmux_cmd_if_get_link_state *cmd_params;
17733 + struct dpdmux_rsp_if_get_link_state *rsp_params;
17736 + /* prepare command */
17737 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_LINK_STATE,
17740 + cmd_params = (struct dpdmux_cmd_if_get_link_state *)cmd.params;
17741 + cmd_params->if_id = cpu_to_le16(if_id);
17743 + /* send command to mc*/
17744 + err = mc_send_command(mc_io, &cmd);
17748 + /* retrieve response parameters */
17749 + rsp_params = (struct dpdmux_rsp_if_get_link_state *)cmd.params;
17750 + state->rate = le32_to_cpu(rsp_params->rate);
17751 + state->options = le64_to_cpu(rsp_params->options);
17752 + state->up = dpdmux_get_field(rsp_params->up, ENABLE);
17758 + * dpdmux_set_custom_key - Set a custom classification key.
17760 + * This API is only available for DPDMUX instance created with
17761 + * DPDMUX_METHOD_CUSTOM. This API must be called before populating the
17762 + * classification table using dpdmux_add_custom_cls_entry.
17764 + * Calls to dpdmux_set_custom_key remove all existing classification entries
17765 + * that may have been added previously using dpdmux_add_custom_cls_entry.
17767 + * @mc_io: Pointer to MC portal's I/O object
17768 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17769 + * @token: Token of DPSW object
17770 + * @if_id: interface id
17771 + * @key_cfg_iova: DMA address of a configuration structure set up using
17772 + * dpkg_prepare_key_cfg. Maximum key size is 24 bytes.
17774 + * @returns '0' on Success; Error code otherwise.
17776 +int dpdmux_set_custom_key(struct fsl_mc_io *mc_io,
17779 + u64 key_cfg_iova)
17781 + struct dpdmux_set_custom_key *cmd_params;
17782 + struct mc_command cmd = { 0 };
17784 + /* prepare command */
17785 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_CUSTOM_KEY,
17788 + cmd_params = (struct dpdmux_set_custom_key *)cmd.params;
17789 + cmd_params->key_cfg_iova = cpu_to_le64(key_cfg_iova);
17791 + /* send command to mc*/
17792 + return mc_send_command(mc_io, &cmd);
17796 + * dpdmux_add_custom_cls_entry - Adds a custom classification entry.
17798 + * This API is only available for DPDMUX instances created with
17799 + * DPDMUX_METHOD_CUSTOM. Before calling this function a classification key
17800 + * composition rule must be set up using dpdmux_set_custom_key.
17802 + * @mc_io: Pointer to MC portal's I/O object
17803 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17804 + * @token: Token of DPSW object
17805 + * @rule: Classification rule to insert. Rules cannot be duplicated, if a
17806 + * matching rule already exists, the action will be replaced.
17807 + * @action: Action to perform for matching traffic.
17809 + * @returns '0' on Success; Error code otherwise.
17811 +int dpdmux_add_custom_cls_entry(struct fsl_mc_io *mc_io,
17814 + struct dpdmux_rule_cfg *rule,
17815 + struct dpdmux_cls_action *action)
17817 + struct dpdmux_cmd_add_custom_cls_entry *cmd_params;
17818 + struct mc_command cmd = { 0 };
17820 + /* prepare command */
17821 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_ADD_CUSTOM_CLS_ENTRY,
17825 + cmd_params = (struct dpdmux_cmd_add_custom_cls_entry *)cmd.params;
17826 + cmd_params->key_size = rule->key_size;
17827 + cmd_params->dest_if = cpu_to_le16(action->dest_if);
17828 + cmd_params->key_iova = cpu_to_le64(rule->key_iova);
17829 + cmd_params->mask_iova = cpu_to_le64(rule->mask_iova);
17831 + /* send command to mc*/
17832 + return mc_send_command(mc_io, &cmd);
17836 + * dpdmux_remove_custom_cls_entry - Removes a custom classification entry.
17838 + * This API is only available for DPDMUX instances created with
17839 + * DPDMUX_METHOD_CUSTOM. The API can be used to remove classification
17840 + * entries previously inserted using dpdmux_add_custom_cls_entry.
17842 + * @mc_io: Pointer to MC portal's I/O object
17843 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17844 + * @token: Token of DPSW object
17845 + * @rule: Classification rule to remove
17847 + * @returns '0' on Success; Error code otherwise.
17849 +int dpdmux_remove_custom_cls_entry(struct fsl_mc_io *mc_io,
17852 + struct dpdmux_rule_cfg *rule)
17854 + struct dpdmux_cmd_remove_custom_cls_entry *cmd_params;
17855 + struct mc_command cmd = { 0 };
17857 + /* prepare command */
17858 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_REMOVE_CUSTOM_CLS_ENTRY,
17861 + cmd_params = (struct dpdmux_cmd_remove_custom_cls_entry *)cmd.params;
17862 + cmd_params->key_size = rule->key_size;
17863 + cmd_params->key_iova = cpu_to_le64(rule->key_iova);
17864 + cmd_params->mask_iova = cpu_to_le64(rule->mask_iova);
17866 + /* send command to mc*/
17867 + return mc_send_command(mc_io, &cmd);
17871 + * dpdmux_get_api_version() - Get Data Path Demux API version
17872 + * @mc_io: Pointer to MC portal's I/O object
17873 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
17874 + * @major_ver: Major version of data path demux API
17875 + * @minor_ver: Minor version of data path demux API
17877 + * Return: '0' on Success; Error code otherwise.
17879 +int dpdmux_get_api_version(struct fsl_mc_io *mc_io,
17884 + struct mc_command cmd = { 0 };
17885 + struct dpdmux_rsp_get_api_version *rsp_params;
17888 + cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_GET_API_VERSION,
17892 + err = mc_send_command(mc_io, &cmd);
17896 + rsp_params = (struct dpdmux_rsp_get_api_version *)cmd.params;
17897 + *major_ver = le16_to_cpu(rsp_params->major);
17898 + *minor_ver = le16_to_cpu(rsp_params->minor);
17903 +++ b/drivers/staging/fsl-dpaa2/evb/dpdmux.h
17905 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
17907 + * Redistribution and use in source and binary forms, with or without
17908 + * modification, are permitted provided that the following conditions are met:
17909 + * * Redistributions of source code must retain the above copyright
17910 + * notice, this list of conditions and the following disclaimer.
17911 + * * Redistributions in binary form must reproduce the above copyright
17912 + * notice, this list of conditions and the following disclaimer in the
17913 + * documentation and/or other materials provided with the distribution.
17914 + * * Neither the name of the above-listed copyright holders nor the
17915 + * names of any contributors may be used to endorse or promote products
17916 + * derived from this software without specific prior written permission.
17919 + * ALTERNATIVELY, this software may be distributed under the terms of the
17920 + * GNU General Public License ("GPL") as published by the Free Software
17921 + * Foundation, either version 2 of that License or (at your option) any
17924 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17925 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17926 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17927 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
17928 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
17929 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
17930 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
17931 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
17932 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
17933 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
17934 + * POSSIBILITY OF SUCH DAMAGE.
17936 +#ifndef __FSL_DPDMUX_H
17937 +#define __FSL_DPDMUX_H
17941 +/* Data Path Demux API
17942 + * Contains API for handling DPDMUX topology and functionality
17945 +int dpdmux_open(struct fsl_mc_io *mc_io,
17950 +int dpdmux_close(struct fsl_mc_io *mc_io,
17955 + * DPDMUX general options
17959 + * Enable bridging between internal interfaces
17961 +#define DPDMUX_OPT_BRIDGE_EN 0x0000000000000002ULL
17964 + * Mask support for classification
17966 +#define DPDMUX_OPT_CLS_MASK_SUPPORT 0x0000000000000020ULL
17968 +#define DPDMUX_IRQ_INDEX_IF 0x0000
17969 +#define DPDMUX_IRQ_INDEX 0x0001
17972 + * IRQ event - Indicates that the link state changed
17974 +#define DPDMUX_IRQ_EVENT_LINK_CHANGED 0x0001
17977 + * enum dpdmux_manip - DPDMUX manipulation operations
17978 + * @DPDMUX_MANIP_NONE: No manipulation on frames
17979 + * @DPDMUX_MANIP_ADD_REMOVE_S_VLAN: Add S-VLAN on egress, remove it on ingress
17981 +enum dpdmux_manip {
17982 + DPDMUX_MANIP_NONE = 0x0,
17983 + DPDMUX_MANIP_ADD_REMOVE_S_VLAN = 0x1
17987 + * enum dpdmux_method - DPDMUX method options
17988 + * @DPDMUX_METHOD_NONE: no DPDMUX method
17989 + * @DPDMUX_METHOD_C_VLAN_MAC: DPDMUX based on C-VLAN and MAC address
17990 + * @DPDMUX_METHOD_MAC: DPDMUX based on MAC address
17991 + * @DPDMUX_METHOD_C_VLAN: DPDMUX based on C-VLAN
17992 + * @DPDMUX_METHOD_S_VLAN: DPDMUX based on S-VLAN
17994 +enum dpdmux_method {
17995 + DPDMUX_METHOD_NONE = 0x0,
17996 + DPDMUX_METHOD_C_VLAN_MAC = 0x1,
17997 + DPDMUX_METHOD_MAC = 0x2,
17998 + DPDMUX_METHOD_C_VLAN = 0x3,
17999 + DPDMUX_METHOD_S_VLAN = 0x4,
18000 + DPDMUX_METHOD_CUSTOM = 0x5
18004 + * struct dpdmux_cfg - DPDMUX configuration parameters
18005 + * @method: Defines the operation method for the DPDMUX address table
18006 + * @manip: Required manipulation operation
18007 + * @num_ifs: Number of interfaces (excluding the uplink interface)
18008 + * @adv: Advanced parameters; default is all zeros;
18009 + * use this structure to change default settings
18011 +struct dpdmux_cfg {
18012 + enum dpdmux_method method;
18013 + enum dpdmux_manip manip;
18016 + * struct adv - Advanced parameters
18017 + * @options: DPDMUX options - combination of 'DPDMUX_OPT_<X>' flags
18018 + * @max_dmat_entries: Maximum entries in DPDMUX address table
18019 + * 0 - indicates default: 64 entries per interface.
18020 + * @max_mc_groups: Number of multicast groups in DPDMUX table
18021 + * 0 - indicates default: 32 multicast groups
18022 + * @max_vlan_ids: max vlan ids allowed in the system -
18023 + * relevant only case of working in mac+vlan method.
18024 + * 0 - indicates default 16 vlan ids.
18028 + u16 max_dmat_entries;
18029 + u16 max_mc_groups;
18030 + u16 max_vlan_ids;
18034 +int dpdmux_create(struct fsl_mc_io *mc_io,
18037 + const struct dpdmux_cfg *cfg,
18040 +int dpdmux_destroy(struct fsl_mc_io *mc_io,
18045 +int dpdmux_enable(struct fsl_mc_io *mc_io,
18049 +int dpdmux_disable(struct fsl_mc_io *mc_io,
18053 +int dpdmux_is_enabled(struct fsl_mc_io *mc_io,
18058 +int dpdmux_reset(struct fsl_mc_io *mc_io,
18062 +int dpdmux_set_irq_enable(struct fsl_mc_io *mc_io,
18068 +int dpdmux_get_irq_enable(struct fsl_mc_io *mc_io,
18074 +int dpdmux_set_irq_mask(struct fsl_mc_io *mc_io,
18080 +int dpdmux_get_irq_mask(struct fsl_mc_io *mc_io,
18086 +int dpdmux_get_irq_status(struct fsl_mc_io *mc_io,
18092 +int dpdmux_clear_irq_status(struct fsl_mc_io *mc_io,
18099 + * struct dpdmux_attr - Structure representing DPDMUX attributes
18100 + * @id: DPDMUX object ID
18101 + * @options: Configuration options (bitmap)
18102 + * @method: DPDMUX address table method
18103 + * @manip: DPDMUX manipulation type
18104 + * @num_ifs: Number of interfaces (excluding the uplink interface)
18105 + * @mem_size: DPDMUX frame storage memory size
18107 +struct dpdmux_attr {
18110 + enum dpdmux_method method;
18111 + enum dpdmux_manip manip;
18116 +int dpdmux_get_attributes(struct fsl_mc_io *mc_io,
18119 + struct dpdmux_attr *attr);
18121 +int dpdmux_set_max_frame_length(struct fsl_mc_io *mc_io,
18124 + u16 max_frame_length);
18127 + * enum dpdmux_counter_type - Counter types
18128 + * @DPDMUX_CNT_ING_FRAME: Counts ingress frames
18129 + * @DPDMUX_CNT_ING_BYTE: Counts ingress bytes
18130 + * @DPDMUX_CNT_ING_FLTR_FRAME: Counts filtered ingress frames
18131 + * @DPDMUX_CNT_ING_FRAME_DISCARD: Counts discarded ingress frames
18132 + * @DPDMUX_CNT_ING_MCAST_FRAME: Counts ingress multicast frames
18133 + * @DPDMUX_CNT_ING_MCAST_BYTE: Counts ingress multicast bytes
18134 + * @DPDMUX_CNT_ING_BCAST_FRAME: Counts ingress broadcast frames
18135 + * @DPDMUX_CNT_ING_BCAST_BYTES: Counts ingress broadcast bytes
18136 + * @DPDMUX_CNT_EGR_FRAME: Counts egress frames
18137 + * @DPDMUX_CNT_EGR_BYTE: Counts egress bytes
18138 + * @DPDMUX_CNT_EGR_FRAME_DISCARD: Counts discarded egress frames
18140 +enum dpdmux_counter_type {
18141 + DPDMUX_CNT_ING_FRAME = 0x0,
18142 + DPDMUX_CNT_ING_BYTE = 0x1,
18143 + DPDMUX_CNT_ING_FLTR_FRAME = 0x2,
18144 + DPDMUX_CNT_ING_FRAME_DISCARD = 0x3,
18145 + DPDMUX_CNT_ING_MCAST_FRAME = 0x4,
18146 + DPDMUX_CNT_ING_MCAST_BYTE = 0x5,
18147 + DPDMUX_CNT_ING_BCAST_FRAME = 0x6,
18148 + DPDMUX_CNT_ING_BCAST_BYTES = 0x7,
18149 + DPDMUX_CNT_EGR_FRAME = 0x8,
18150 + DPDMUX_CNT_EGR_BYTE = 0x9,
18151 + DPDMUX_CNT_EGR_FRAME_DISCARD = 0xa
18155 + * enum dpdmux_accepted_frames_type - DPDMUX frame types
18156 + * @DPDMUX_ADMIT_ALL: The device accepts VLAN tagged, untagged and
18157 + * priority-tagged frames
18158 + * @DPDMUX_ADMIT_ONLY_VLAN_TAGGED: The device discards untagged frames or
18159 + * priority-tagged frames that are received on this
18161 + * @DPDMUX_ADMIT_ONLY_UNTAGGED: Untagged frames or priority-tagged frames
18162 + * received on this interface are accepted
18164 +enum dpdmux_accepted_frames_type {
18165 + DPDMUX_ADMIT_ALL = 0,
18166 + DPDMUX_ADMIT_ONLY_VLAN_TAGGED = 1,
18167 + DPDMUX_ADMIT_ONLY_UNTAGGED = 2
18171 + * enum dpdmux_action - DPDMUX action for un-accepted frames
18172 + * @DPDMUX_ACTION_DROP: Drop un-accepted frames
18173 + * @DPDMUX_ACTION_REDIRECT_TO_CTRL: Redirect un-accepted frames to the
18174 + * control interface
18176 +enum dpdmux_action {
18177 + DPDMUX_ACTION_DROP = 0,
18178 + DPDMUX_ACTION_REDIRECT_TO_CTRL = 1
18182 + * struct dpdmux_accepted_frames - Frame types configuration
18183 + * @type: Defines ingress accepted frames
18184 + * @unaccept_act: Defines action on frames not accepted
18186 +struct dpdmux_accepted_frames {
18187 + enum dpdmux_accepted_frames_type type;
18188 + enum dpdmux_action unaccept_act;
18191 +int dpdmux_if_set_accepted_frames(struct fsl_mc_io *mc_io,
18195 + const struct dpdmux_accepted_frames *cfg);
18198 + * struct dpdmux_if_attr - Structure representing frame types configuration
18199 + * @rate: Configured interface rate (in bits per second)
18200 + * @enabled: Indicates if interface is enabled
18201 + * @accept_frame_type: Indicates type of accepted frames for the interface
18203 +struct dpdmux_if_attr {
18206 + enum dpdmux_accepted_frames_type accept_frame_type;
18209 +int dpdmux_if_get_attributes(struct fsl_mc_io *mc_io,
18213 + struct dpdmux_if_attr *attr);
18215 +int dpdmux_if_enable(struct fsl_mc_io *mc_io,
18220 +int dpdmux_if_disable(struct fsl_mc_io *mc_io,
18226 + * struct dpdmux_l2_rule - Structure representing L2 rule
18227 + * @mac_addr: MAC address
18228 + * @vlan_id: VLAN ID
18230 +struct dpdmux_l2_rule {
18235 +int dpdmux_if_remove_l2_rule(struct fsl_mc_io *mc_io,
18239 + const struct dpdmux_l2_rule *rule);
18241 +int dpdmux_if_add_l2_rule(struct fsl_mc_io *mc_io,
18245 + const struct dpdmux_l2_rule *rule);
18247 +int dpdmux_if_get_counter(struct fsl_mc_io *mc_io,
18251 + enum dpdmux_counter_type counter_type,
18254 +int dpdmux_ul_reset_counters(struct fsl_mc_io *mc_io,
18259 + * Enable auto-negotiation
18261 +#define DPDMUX_LINK_OPT_AUTONEG 0x0000000000000001ULL
18263 + * Enable half-duplex mode
18265 +#define DPDMUX_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
18267 + * Enable pause frames
18269 +#define DPDMUX_LINK_OPT_PAUSE 0x0000000000000004ULL
18271 + * Enable a-symmetric pause frames
18273 +#define DPDMUX_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
18276 + * struct dpdmux_link_cfg - Structure representing DPDMUX link configuration
18278 + * @options: Mask of available options; use 'DPDMUX_LINK_OPT_<X>' values
18280 +struct dpdmux_link_cfg {
18285 +int dpdmux_if_set_link_cfg(struct fsl_mc_io *mc_io,
18289 + struct dpdmux_link_cfg *cfg);
18291 + * struct dpdmux_link_state - Structure representing DPDMUX link state
18293 + * @options: Mask of available options; use 'DPDMUX_LINK_OPT_<X>' values
18294 + * @up: 0 - down, 1 - up
18296 +struct dpdmux_link_state {
18302 +int dpdmux_if_get_link_state(struct fsl_mc_io *mc_io,
18306 + struct dpdmux_link_state *state);
18308 +int dpdmux_set_custom_key(struct fsl_mc_io *mc_io,
18311 + u64 key_cfg_iova);
18314 + * struct dpdmux_rule_cfg - Custom classification rule.
18316 + * @key_iova: DMA address of buffer storing the look-up value
18317 + * @mask_iova: DMA address of the mask used for TCAM classification
18318 + * @key_size: size, in bytes, of the look-up value. This must match the size
18319 + * of the look-up key defined using dpdmux_set_custom_key, otherwise the
18320 + * entry will never be hit
18322 +struct dpdmux_rule_cfg {
18329 + * struct dpdmux_cls_action - Action to execute for frames matching the
18330 + * classification entry
18332 + * @dest_if: Interface to forward the frames to. Port numbering is similar to
18333 + * the one used to connect interfaces:
18334 + * - 0 is the uplink port,
18335 + * - all others are downlink ports.
18337 +struct dpdmux_cls_action {
18341 +int dpdmux_add_custom_cls_entry(struct fsl_mc_io *mc_io,
18344 + struct dpdmux_rule_cfg *rule,
18345 + struct dpdmux_cls_action *action);
18347 +int dpdmux_remove_custom_cls_entry(struct fsl_mc_io *mc_io,
18350 + struct dpdmux_rule_cfg *rule);
18352 +int dpdmux_get_api_version(struct fsl_mc_io *mc_io,
18357 +#endif /* __FSL_DPDMUX_H */
18359 +++ b/drivers/staging/fsl-dpaa2/evb/evb.c
18361 +/* Copyright 2015 Freescale Semiconductor Inc.
18363 + * Redistribution and use in source and binary forms, with or without
18364 + * modification, are permitted provided that the following conditions are met:
18365 + * * Redistributions of source code must retain the above copyright
18366 + * notice, this list of conditions and the following disclaimer.
18367 + * * Redistributions in binary form must reproduce the above copyright
18368 + * notice, this list of conditions and the following disclaimer in the
18369 + * documentation and/or other materials provided with the distribution.
18370 + * * Neither the name of Freescale Semiconductor nor the
18371 + * names of its contributors may be used to endorse or promote products
18372 + * derived from this software without specific prior written permission.
18375 + * ALTERNATIVELY, this software may be distributed under the terms of the
18376 + * GNU General Public License ("GPL") as published by the Free Software
18377 + * Foundation, either version 2 of that License or (at your option) any
18380 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
18381 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18382 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18383 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
18384 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18385 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
18386 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
18387 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18388 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
18389 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
18391 +#include <linux/module.h>
18392 +#include <linux/msi.h>
18393 +#include <linux/netdevice.h>
18394 +#include <linux/etherdevice.h>
18395 +#include <linux/rtnetlink.h>
18396 +#include <linux/if_vlan.h>
18398 +#include <uapi/linux/if_bridge.h>
18399 +#include <net/netlink.h>
18401 +#include "../../fsl-mc/include/mc.h"
18403 +#include "dpdmux.h"
18404 +#include "dpdmux-cmd.h"
18406 +static const char evb_drv_version[] = "0.1";
18408 +/* Minimal supported DPDMUX version */
18409 +#define DPDMUX_MIN_VER_MAJOR 6
18410 +#define DPDMUX_MIN_VER_MINOR 0
18413 +#define DPDMUX_MAX_IRQ_NUM 2
18415 +/* MAX FRAME LENGTH (currently 10k) */
18416 +#define EVB_MAX_FRAME_LENGTH (10 * 1024)
18417 +/* MIN FRAME LENGTH (64 bytes + 4 bytes CRC) */
18418 +#define EVB_MIN_FRAME_LENGTH 68
18420 +struct evb_port_priv {
18421 + struct net_device *netdev;
18422 + struct list_head list;
18424 + struct evb_priv *evb_priv;
18425 + u8 vlans[VLAN_VID_MASK + 1];
18430 + struct evb_port_priv uplink;
18432 + struct fsl_mc_io *mc_io;
18433 + struct list_head port_list;
18434 + struct dpdmux_attr attr;
18439 +static int _evb_port_carrier_state_sync(struct net_device *netdev)
18441 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18442 + struct dpdmux_link_state state;
18445 + err = dpdmux_if_get_link_state(port_priv->evb_priv->mc_io, 0,
18446 + port_priv->evb_priv->mux_handle,
18447 + port_priv->port_index, &state);
18448 + if (unlikely(err)) {
18449 + netdev_err(netdev, "dpdmux_if_get_link_state() err %d\n", err);
18453 + WARN_ONCE(state.up > 1, "Garbage read into link_state");
18456 + netif_carrier_on(port_priv->netdev);
18458 + netif_carrier_off(port_priv->netdev);
18463 +static int evb_port_open(struct net_device *netdev)
18467 + /* FIXME: enable port when support added */
18469 + err = _evb_port_carrier_state_sync(netdev);
18471 + netdev_err(netdev, "ethsw_port_carrier_state_sync err %d\n",
18479 +static netdev_tx_t evb_dropframe(struct sk_buff *skb, struct net_device *dev)
18481 + /* we don't support I/O for now, drop the frame */
18482 + dev_kfree_skb_any(skb);
18483 + return NETDEV_TX_OK;
18486 +static int evb_links_state_update(struct evb_priv *priv)
18488 + struct evb_port_priv *port_priv;
18489 + struct list_head *pos;
18492 + list_for_each(pos, &priv->port_list) {
18493 + port_priv = list_entry(pos, struct evb_port_priv, list);
18495 + err = _evb_port_carrier_state_sync(port_priv->netdev);
18497 + netdev_err(port_priv->netdev,
18498 + "_evb_port_carrier_state_sync err %d\n",
18505 +static irqreturn_t evb_irq0_handler(int irq_num, void *arg)
18507 + return IRQ_WAKE_THREAD;
18510 +static irqreturn_t _evb_irq0_handler_thread(int irq_num, void *arg)
18512 + struct device *dev = (struct device *)arg;
18513 + struct fsl_mc_device *evb_dev = to_fsl_mc_device(dev);
18514 + struct net_device *netdev = dev_get_drvdata(dev);
18515 + struct evb_priv *priv = netdev_priv(netdev);
18516 + struct fsl_mc_io *io = priv->mc_io;
18517 + u16 token = priv->mux_handle;
18518 + int irq_index = DPDMUX_IRQ_INDEX_IF;
18520 + /* Mask the events and the if_id reserved bits to be cleared on read */
18521 + u32 status = DPDMUX_IRQ_EVENT_LINK_CHANGED | 0xFFFF0000;
18524 + /* Sanity check */
18525 + if (WARN_ON(!evb_dev || !evb_dev->irqs || !evb_dev->irqs[irq_index]))
18527 + if (WARN_ON(evb_dev->irqs[irq_index]->msi_desc->irq != (u32)irq_num))
18530 + err = dpdmux_get_irq_status(io, 0, token, irq_index, &status);
18531 + if (unlikely(err)) {
18532 + netdev_err(netdev, "Can't get irq status (err %d)", err);
18533 + err = dpdmux_clear_irq_status(io, 0, token, irq_index,
18535 + if (unlikely(err))
18536 + netdev_err(netdev, "Can't clear irq status (err %d)",
18541 + if (status & DPDMUX_IRQ_EVENT_LINK_CHANGED) {
18542 + err = evb_links_state_update(priv);
18543 + if (unlikely(err))
18548 + return IRQ_HANDLED;
18551 +static int evb_setup_irqs(struct fsl_mc_device *evb_dev)
18553 + struct device *dev = &evb_dev->dev;
18554 + struct net_device *netdev = dev_get_drvdata(dev);
18555 + struct evb_priv *priv = netdev_priv(netdev);
18557 + struct fsl_mc_device_irq *irq;
18558 + const int irq_index = DPDMUX_IRQ_INDEX_IF;
18559 + u32 mask = DPDMUX_IRQ_EVENT_LINK_CHANGED;
18561 + err = fsl_mc_allocate_irqs(evb_dev);
18562 + if (unlikely(err)) {
18563 + dev_err(dev, "MC irqs allocation failed\n");
18567 + if (WARN_ON(evb_dev->obj_desc.irq_count != DPDMUX_MAX_IRQ_NUM)) {
18572 + err = dpdmux_set_irq_enable(priv->mc_io, 0, priv->mux_handle,
18574 + if (unlikely(err)) {
18575 + dev_err(dev, "dpdmux_set_irq_enable err %d\n", err);
18579 + irq = evb_dev->irqs[irq_index];
18581 + err = devm_request_threaded_irq(dev, irq->msi_desc->irq,
18582 + evb_irq0_handler,
18583 + _evb_irq0_handler_thread,
18584 + IRQF_NO_SUSPEND | IRQF_ONESHOT,
18585 + dev_name(dev), dev);
18586 + if (unlikely(err)) {
18587 + dev_err(dev, "devm_request_threaded_irq(): %d", err);
18591 + err = dpdmux_set_irq_mask(priv->mc_io, 0, priv->mux_handle,
18592 + irq_index, mask);
18593 + if (unlikely(err)) {
18594 + dev_err(dev, "dpdmux_set_irq_mask(): %d", err);
18595 + goto free_devm_irq;
18598 + err = dpdmux_set_irq_enable(priv->mc_io, 0, priv->mux_handle,
18600 + if (unlikely(err)) {
18601 + dev_err(dev, "dpdmux_set_irq_enable(): %d", err);
18602 + goto free_devm_irq;
18608 + devm_free_irq(dev, irq->msi_desc->irq, dev);
18610 + fsl_mc_free_irqs(evb_dev);
18614 +static void evb_teardown_irqs(struct fsl_mc_device *evb_dev)
18616 + struct device *dev = &evb_dev->dev;
18617 + struct net_device *netdev = dev_get_drvdata(dev);
18618 + struct evb_priv *priv = netdev_priv(netdev);
18620 + dpdmux_set_irq_enable(priv->mc_io, 0, priv->mux_handle,
18621 + DPDMUX_IRQ_INDEX_IF, 0);
18623 + devm_free_irq(dev,
18624 + evb_dev->irqs[DPDMUX_IRQ_INDEX_IF]->msi_desc->irq,
18626 + fsl_mc_free_irqs(evb_dev);
18629 +static int evb_port_add_rule(struct net_device *netdev,
18630 + const unsigned char *addr, u16 vid)
18632 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18633 + struct dpdmux_l2_rule rule = { .vlan_id = vid };
18637 + ether_addr_copy(rule.mac_addr, addr);
18639 + err = dpdmux_if_add_l2_rule(port_priv->evb_priv->mc_io,
18641 + port_priv->evb_priv->mux_handle,
18642 + port_priv->port_index, &rule);
18643 + if (unlikely(err))
18644 + netdev_err(netdev, "dpdmux_if_add_l2_rule err %d\n", err);
18648 +static int evb_port_del_rule(struct net_device *netdev,
18649 + const unsigned char *addr, u16 vid)
18651 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18652 + struct dpdmux_l2_rule rule = { .vlan_id = vid };
18656 + ether_addr_copy(rule.mac_addr, addr);
18658 + err = dpdmux_if_remove_l2_rule(port_priv->evb_priv->mc_io,
18660 + port_priv->evb_priv->mux_handle,
18661 + port_priv->port_index, &rule);
18662 + if (unlikely(err))
18663 + netdev_err(netdev, "dpdmux_if_remove_l2_rule err %d\n", err);
18667 +static bool _lookup_address(struct net_device *netdev,
18668 + const unsigned char *addr)
18670 + struct netdev_hw_addr *ha;
18671 + struct netdev_hw_addr_list *list = (is_unicast_ether_addr(addr)) ?
18672 + &netdev->uc : &netdev->mc;
18674 + netif_addr_lock_bh(netdev);
18675 + list_for_each_entry(ha, &list->list, list) {
18676 + if (ether_addr_equal(ha->addr, addr)) {
18677 + netif_addr_unlock_bh(netdev);
18681 + netif_addr_unlock_bh(netdev);
18685 +static inline int evb_port_fdb_prep(struct nlattr *tb[],
18686 + struct net_device *netdev,
18687 + const unsigned char *addr, u16 *vid,
18690 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18691 + struct evb_priv *evb_priv = port_priv->evb_priv;
18695 + if (evb_priv->attr.method != DPDMUX_METHOD_MAC &&
18696 + evb_priv->attr.method != DPDMUX_METHOD_C_VLAN_MAC) {
18697 + netdev_err(netdev,
18698 + "EVB mode does not support MAC classification\n");
18699 + return -EOPNOTSUPP;
18702 + /* check if the address is configured on this port */
18703 + if (_lookup_address(netdev, addr)) {
18711 + if (tb[NDA_VLAN] && evb_priv->attr.method == DPDMUX_METHOD_C_VLAN_MAC) {
18712 + if (nla_len(tb[NDA_VLAN]) != sizeof(unsigned short)) {
18713 + netdev_err(netdev, "invalid vlan size %d\n",
18714 + nla_len(tb[NDA_VLAN]));
18718 + *vid = nla_get_u16(tb[NDA_VLAN]);
18720 + if (!*vid || *vid >= VLAN_VID_MASK) {
18721 + netdev_err(netdev, "invalid vid value 0x%04x\n", *vid);
18724 + } else if (evb_priv->attr.method == DPDMUX_METHOD_C_VLAN_MAC) {
18725 + netdev_err(netdev,
18726 + "EVB mode requires explicit VLAN configuration\n");
18728 + } else if (tb[NDA_VLAN]) {
18729 + netdev_warn(netdev, "VLAN not supported, argument ignored\n");
18735 +static int evb_port_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
18736 + struct net_device *netdev,
18737 + const unsigned char *addr, u16 vid, u16 flags)
18742 + /* TODO: add replace support when added to iproute bridge */
18743 + if (!(flags & NLM_F_REQUEST)) {
18744 + netdev_err(netdev,
18745 + "evb_port_fdb_add unexpected flags value %08x\n",
18750 + err = evb_port_fdb_prep(tb, netdev, addr, &_vid, 0);
18751 + if (unlikely(err))
18754 + err = evb_port_add_rule(netdev, addr, _vid);
18755 + if (unlikely(err))
18758 + if (is_unicast_ether_addr(addr)) {
18759 + err = dev_uc_add(netdev, addr);
18760 + if (unlikely(err)) {
18761 + netdev_err(netdev, "dev_uc_add err %d\n", err);
18765 + err = dev_mc_add(netdev, addr);
18766 + if (unlikely(err)) {
18767 + netdev_err(netdev, "dev_mc_add err %d\n", err);
18775 +static int evb_port_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
18776 + struct net_device *netdev,
18777 + const unsigned char *addr, u16 vid)
18782 + err = evb_port_fdb_prep(tb, netdev, addr, &_vid, 1);
18783 + if (unlikely(err))
18786 + err = evb_port_del_rule(netdev, addr, _vid);
18787 + if (unlikely(err))
18790 + if (is_unicast_ether_addr(addr)) {
18791 + err = dev_uc_del(netdev, addr);
18792 + if (unlikely(err)) {
18793 + netdev_err(netdev, "dev_uc_del err %d\n", err);
18797 + err = dev_mc_del(netdev, addr);
18798 + if (unlikely(err)) {
18799 + netdev_err(netdev, "dev_mc_del err %d\n", err);
18807 +static int evb_change_mtu(struct net_device *netdev,
18810 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18811 + struct evb_priv *evb_priv = port_priv->evb_priv;
18812 + struct list_head *pos;
18815 + /* This operation is not permitted on downlinks */
18816 + if (port_priv->port_index > 0)
18819 + if (mtu < EVB_MIN_FRAME_LENGTH || mtu > EVB_MAX_FRAME_LENGTH) {
18820 + netdev_err(netdev, "Invalid MTU %d. Valid range is: %d..%d\n",
18821 + mtu, EVB_MIN_FRAME_LENGTH, EVB_MAX_FRAME_LENGTH);
18825 + err = dpdmux_set_max_frame_length(evb_priv->mc_io,
18827 + evb_priv->mux_handle,
18830 + if (unlikely(err)) {
18831 + netdev_err(netdev, "dpdmux_ul_set_max_frame_length err %d\n",
18836 + /* Update the max frame length for downlinks */
18837 + list_for_each(pos, &evb_priv->port_list) {
18838 + port_priv = list_entry(pos, struct evb_port_priv, list);
18839 + port_priv->netdev->mtu = mtu;
18842 + netdev->mtu = mtu;
18846 +static const struct nla_policy ifla_br_policy[IFLA_MAX + 1] = {
18847 + [IFLA_BRIDGE_FLAGS] = { .type = NLA_U16 },
18848 + [IFLA_BRIDGE_MODE] = { .type = NLA_U16 },
18849 + [IFLA_BRIDGE_VLAN_INFO] = { .type = NLA_BINARY,
18850 + .len = sizeof(struct bridge_vlan_info), },
18853 +static int evb_setlink_af_spec(struct net_device *netdev,
18854 + struct nlattr **tb)
18856 + struct bridge_vlan_info *vinfo;
18857 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18860 + if (!tb[IFLA_BRIDGE_VLAN_INFO]) {
18861 + netdev_err(netdev, "no VLAN INFO in nlmsg\n");
18862 + return -EOPNOTSUPP;
18865 + vinfo = nla_data(tb[IFLA_BRIDGE_VLAN_INFO]);
18867 + if (!vinfo->vid || vinfo->vid > VLAN_VID_MASK)
18870 + err = evb_port_add_rule(netdev, NULL, vinfo->vid);
18871 + if (unlikely(err))
18874 + port_priv->vlans[vinfo->vid] = 1;
18879 +static int evb_setlink(struct net_device *netdev,
18880 + struct nlmsghdr *nlh,
18883 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18884 + struct evb_priv *evb_priv = port_priv->evb_priv;
18885 + struct nlattr *attr;
18886 + struct nlattr *tb[(IFLA_BRIDGE_MAX > IFLA_BRPORT_MAX) ?
18887 + IFLA_BRIDGE_MAX : IFLA_BRPORT_MAX + 1];
18890 + if (evb_priv->attr.method != DPDMUX_METHOD_C_VLAN &&
18891 + evb_priv->attr.method != DPDMUX_METHOD_S_VLAN) {
18892 + netdev_err(netdev,
18893 + "EVB mode does not support VLAN only classification\n");
18894 + return -EOPNOTSUPP;
18897 + attr = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
18899 + err = nla_parse_nested(tb, IFLA_BRIDGE_MAX, attr,
18901 + if (unlikely(err)) {
18902 + netdev_err(netdev,
18903 + "nla_parse_nested for br_policy err %d\n",
18908 + err = evb_setlink_af_spec(netdev, tb);
18912 + netdev_err(netdev, "nlmsg_find_attr found no AF_SPEC\n");
18913 + return -EOPNOTSUPP;
18916 +static int __nla_put_netdev(struct sk_buff *skb, struct net_device *netdev)
18918 + struct evb_port_priv *port_priv = netdev_priv(netdev);
18919 + struct evb_priv *evb_priv = port_priv->evb_priv;
18920 + u8 operstate = netif_running(netdev) ?
18921 + netdev->operstate : IF_OPER_DOWN;
18925 + err = nla_put_string(skb, IFLA_IFNAME, netdev->name);
18926 + if (unlikely(err))
18927 + goto nla_put_err;
18928 + err = nla_put_u32(skb, IFLA_MASTER, evb_priv->uplink.netdev->ifindex);
18929 + if (unlikely(err))
18930 + goto nla_put_err;
18931 + err = nla_put_u32(skb, IFLA_MTU, netdev->mtu);
18932 + if (unlikely(err))
18933 + goto nla_put_err;
18934 + err = nla_put_u8(skb, IFLA_OPERSTATE, operstate);
18935 + if (unlikely(err))
18936 + goto nla_put_err;
18937 + if (netdev->addr_len) {
18938 + err = nla_put(skb, IFLA_ADDRESS, netdev->addr_len,
18939 + netdev->dev_addr);
18940 + if (unlikely(err))
18941 + goto nla_put_err;
18944 + iflink = dev_get_iflink(netdev);
18945 + if (netdev->ifindex != iflink) {
18946 + err = nla_put_u32(skb, IFLA_LINK, iflink);
18947 + if (unlikely(err))
18948 + goto nla_put_err;
18954 + netdev_err(netdev, "nla_put_ err %d\n", err);
18958 +static int __nla_put_port(struct sk_buff *skb, struct net_device *netdev)
18960 + struct nlattr *nest;
18963 + nest = nla_nest_start(skb, IFLA_PROTINFO | NLA_F_NESTED);
18965 + netdev_err(netdev, "nla_nest_start failed\n");
18969 + err = nla_put_u8(skb, IFLA_BRPORT_STATE, BR_STATE_FORWARDING);
18970 + if (unlikely(err))
18971 + goto nla_put_err;
18972 + err = nla_put_u16(skb, IFLA_BRPORT_PRIORITY, 0);
18973 + if (unlikely(err))
18974 + goto nla_put_err;
18975 + err = nla_put_u32(skb, IFLA_BRPORT_COST, 0);
18976 + if (unlikely(err))
18977 + goto nla_put_err;
18978 + err = nla_put_u8(skb, IFLA_BRPORT_MODE, 0);
18979 + if (unlikely(err))
18980 + goto nla_put_err;
18981 + err = nla_put_u8(skb, IFLA_BRPORT_GUARD, 0);
18982 + if (unlikely(err))
18983 + goto nla_put_err;
18984 + err = nla_put_u8(skb, IFLA_BRPORT_PROTECT, 0);
18985 + if (unlikely(err))
18986 + goto nla_put_err;
18987 + err = nla_put_u8(skb, IFLA_BRPORT_FAST_LEAVE, 0);
18988 + if (unlikely(err))
18989 + goto nla_put_err;
18990 + err = nla_put_u8(skb, IFLA_BRPORT_LEARNING, 0);
18991 + if (unlikely(err))
18992 + goto nla_put_err;
18993 + err = nla_put_u8(skb, IFLA_BRPORT_UNICAST_FLOOD, 1);
18994 + if (unlikely(err))
18995 + goto nla_put_err;
18996 + nla_nest_end(skb, nest);
19001 + netdev_err(netdev, "nla_put_ err %d\n", err);
19002 + nla_nest_cancel(skb, nest);
19006 +static int __nla_put_vlan(struct sk_buff *skb, struct net_device *netdev)
19008 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19009 + struct nlattr *nest;
19010 + struct bridge_vlan_info vinfo;
19011 + const u8 *vlans = port_priv->vlans;
19015 + nest = nla_nest_start(skb, IFLA_AF_SPEC);
19017 + netdev_err(netdev, "nla_nest_start failed");
19021 + for (i = 0; i < VLAN_VID_MASK + 1; i++) {
19028 + err = nla_put(skb, IFLA_BRIDGE_VLAN_INFO,
19029 + sizeof(vinfo), &vinfo);
19030 + if (unlikely(err))
19031 + goto nla_put_err;
19034 + nla_nest_end(skb, nest);
19039 + netdev_err(netdev, "nla_put_ err %d\n", err);
19040 + nla_nest_cancel(skb, nest);
19044 +static int evb_getlink(struct sk_buff *skb, u32 pid, u32 seq,
19045 + struct net_device *netdev, u32 filter_mask, int nlflags)
19047 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19048 + struct evb_priv *evb_priv = port_priv->evb_priv;
19049 + struct ifinfomsg *hdr;
19050 + struct nlmsghdr *nlh;
19053 + if (evb_priv->attr.method != DPDMUX_METHOD_C_VLAN &&
19054 + evb_priv->attr.method != DPDMUX_METHOD_S_VLAN) {
19058 + nlh = nlmsg_put(skb, pid, seq, RTM_NEWLINK, sizeof(*hdr), NLM_F_MULTI);
19060 + return -EMSGSIZE;
19062 + hdr = nlmsg_data(nlh);
19063 + memset(hdr, 0, sizeof(*hdr));
19064 + hdr->ifi_family = AF_BRIDGE;
19065 + hdr->ifi_type = netdev->type;
19066 + hdr->ifi_index = netdev->ifindex;
19067 + hdr->ifi_flags = dev_get_flags(netdev);
19069 + err = __nla_put_netdev(skb, netdev);
19070 + if (unlikely(err))
19071 + goto nla_put_err;
19073 + err = __nla_put_port(skb, netdev);
19074 + if (unlikely(err))
19075 + goto nla_put_err;
19077 + /* Check if the VID information is requested */
19078 + if (filter_mask & RTEXT_FILTER_BRVLAN) {
19079 + err = __nla_put_vlan(skb, netdev);
19080 + if (unlikely(err))
19081 + goto nla_put_err;
19084 + nlmsg_end(skb, nlh);
19088 + nlmsg_cancel(skb, nlh);
19089 + return -EMSGSIZE;
19092 +static int evb_dellink(struct net_device *netdev,
19093 + struct nlmsghdr *nlh,
19096 + struct nlattr *tb[IFLA_BRIDGE_MAX + 1];
19097 + struct nlattr *spec;
19098 + struct bridge_vlan_info *vinfo;
19099 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19102 + spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
19106 + err = nla_parse_nested(tb, IFLA_BRIDGE_MAX, spec, ifla_br_policy);
19107 + if (unlikely(err))
19110 + if (!tb[IFLA_BRIDGE_VLAN_INFO])
19111 + return -EOPNOTSUPP;
19113 + vinfo = nla_data(tb[IFLA_BRIDGE_VLAN_INFO]);
19115 + if (!vinfo->vid || vinfo->vid > VLAN_VID_MASK)
19118 + err = evb_port_del_rule(netdev, NULL, vinfo->vid);
19119 + if (unlikely(err)) {
19120 + netdev_err(netdev, "evb_port_del_rule err %d\n", err);
19123 + port_priv->vlans[vinfo->vid] = 0;
19128 +void evb_port_get_stats(struct net_device *netdev,
19129 + struct rtnl_link_stats64 *storage)
19131 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19135 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19137 + port_priv->evb_priv->mux_handle,
19138 + port_priv->port_index,
19139 + DPDMUX_CNT_ING_FRAME, &storage->rx_packets);
19140 + if (unlikely(err))
19143 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19145 + port_priv->evb_priv->mux_handle,
19146 + port_priv->port_index,
19147 + DPDMUX_CNT_ING_BYTE, &storage->rx_bytes);
19148 + if (unlikely(err))
19151 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19153 + port_priv->evb_priv->mux_handle,
19154 + port_priv->port_index,
19155 + DPDMUX_CNT_ING_FLTR_FRAME, &tmp);
19156 + if (unlikely(err))
19159 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19161 + port_priv->evb_priv->mux_handle,
19162 + port_priv->port_index,
19163 + DPDMUX_CNT_ING_FRAME_DISCARD,
19164 + &storage->rx_dropped);
19165 + if (unlikely(err)) {
19166 + storage->rx_dropped = tmp;
19169 + storage->rx_dropped += tmp;
19171 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19173 + port_priv->evb_priv->mux_handle,
19174 + port_priv->port_index,
19175 + DPDMUX_CNT_ING_MCAST_FRAME,
19176 + &storage->multicast);
19177 + if (unlikely(err))
19180 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19182 + port_priv->evb_priv->mux_handle,
19183 + port_priv->port_index,
19184 + DPDMUX_CNT_EGR_FRAME, &storage->tx_packets);
19185 + if (unlikely(err))
19188 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19190 + port_priv->evb_priv->mux_handle,
19191 + port_priv->port_index,
19192 + DPDMUX_CNT_EGR_BYTE, &storage->tx_bytes);
19193 + if (unlikely(err))
19196 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19198 + port_priv->evb_priv->mux_handle,
19199 + port_priv->port_index,
19200 + DPDMUX_CNT_EGR_FRAME_DISCARD,
19201 + &storage->tx_dropped);
19202 + if (unlikely(err))
19208 + netdev_err(netdev, "dpdmux_if_get_counter err %d\n", err);
19211 +static const struct net_device_ops evb_port_ops = {
19212 + .ndo_open = &evb_port_open,
19214 + .ndo_start_xmit = &evb_dropframe,
19216 + .ndo_fdb_add = &evb_port_fdb_add,
19217 + .ndo_fdb_del = &evb_port_fdb_del,
19219 + .ndo_get_stats64 = &evb_port_get_stats,
19220 + .ndo_change_mtu = &evb_change_mtu,
19223 +static void evb_get_drvinfo(struct net_device *netdev,
19224 + struct ethtool_drvinfo *drvinfo)
19226 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19227 + u16 version_major, version_minor;
19230 + strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
19231 + strlcpy(drvinfo->version, evb_drv_version, sizeof(drvinfo->version));
19233 + err = dpdmux_get_api_version(port_priv->evb_priv->mc_io, 0,
19237 + strlcpy(drvinfo->fw_version, "N/A",
19238 + sizeof(drvinfo->fw_version));
19240 + snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
19241 + "%u.%u", version_major, version_minor);
19243 + strlcpy(drvinfo->bus_info, dev_name(netdev->dev.parent->parent),
19244 + sizeof(drvinfo->bus_info));
19247 +static int evb_get_settings(struct net_device *netdev,
19248 + struct ethtool_cmd *cmd)
19250 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19251 + struct dpdmux_link_state state = {0};
19254 + err = dpdmux_if_get_link_state(port_priv->evb_priv->mc_io, 0,
19255 + port_priv->evb_priv->mux_handle,
19256 + port_priv->port_index,
19259 + netdev_err(netdev, "ERROR %d getting link state", err);
19263 + /* At the moment, we have no way of interrogating the DPMAC
19264 + * from the DPDMUX side or there may not exist a DPMAC at all.
19265 + * Report only autoneg state, duplexity and speed.
19267 + if (state.options & DPDMUX_LINK_OPT_AUTONEG)
19268 + cmd->autoneg = AUTONEG_ENABLE;
19269 + if (!(state.options & DPDMUX_LINK_OPT_HALF_DUPLEX))
19270 + cmd->duplex = DUPLEX_FULL;
19271 + ethtool_cmd_speed_set(cmd, state.rate);
19277 +static int evb_set_settings(struct net_device *netdev,
19278 + struct ethtool_cmd *cmd)
19280 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19281 + struct dpdmux_link_state state = {0};
19282 + struct dpdmux_link_cfg cfg = {0};
19285 + netdev_dbg(netdev, "Setting link parameters...");
19287 + err = dpdmux_if_get_link_state(port_priv->evb_priv->mc_io, 0,
19288 + port_priv->evb_priv->mux_handle,
19289 + port_priv->port_index,
19292 + netdev_err(netdev, "ERROR %d getting link state", err);
19296 + /* Due to a temporary MC limitation, the DPDMUX port must be down
19297 + * in order to be able to change link settings. Taking steps to let
19298 + * the user know that.
19300 + if (netif_running(netdev)) {
19301 + netdev_info(netdev,
19302 + "Sorry, interface must be brought down first.\n");
19306 + cfg.options = state.options;
19307 + cfg.rate = ethtool_cmd_speed(cmd);
19308 + if (cmd->autoneg == AUTONEG_ENABLE)
19309 + cfg.options |= DPDMUX_LINK_OPT_AUTONEG;
19311 + cfg.options &= ~DPDMUX_LINK_OPT_AUTONEG;
19312 + if (cmd->duplex == DUPLEX_HALF)
19313 + cfg.options |= DPDMUX_LINK_OPT_HALF_DUPLEX;
19315 + cfg.options &= ~DPDMUX_LINK_OPT_HALF_DUPLEX;
19317 + err = dpdmux_if_set_link_cfg(port_priv->evb_priv->mc_io, 0,
19318 + port_priv->evb_priv->mux_handle,
19319 + port_priv->port_index,
19322 + /* ethtool will be loud enough if we return an error; no point
19323 + * in putting our own error message on the console by default
19325 + netdev_dbg(netdev, "ERROR %d setting link cfg", err);
19332 + enum dpdmux_counter_type id;
19333 + char name[ETH_GSTRING_LEN];
19334 +} evb_ethtool_counters[] = {
19335 + {DPDMUX_CNT_ING_FRAME, "rx frames"},
19336 + {DPDMUX_CNT_ING_BYTE, "rx bytes"},
19337 + {DPDMUX_CNT_ING_FLTR_FRAME, "rx filtered frames"},
19338 + {DPDMUX_CNT_ING_FRAME_DISCARD, "rx discarded frames"},
19339 + {DPDMUX_CNT_ING_BCAST_FRAME, "rx b-cast frames"},
19340 + {DPDMUX_CNT_ING_BCAST_BYTES, "rx b-cast bytes"},
19341 + {DPDMUX_CNT_ING_MCAST_FRAME, "rx m-cast frames"},
19342 + {DPDMUX_CNT_ING_MCAST_BYTE, "rx m-cast bytes"},
19343 + {DPDMUX_CNT_EGR_FRAME, "tx frames"},
19344 + {DPDMUX_CNT_EGR_BYTE, "tx bytes"},
19345 + {DPDMUX_CNT_EGR_FRAME_DISCARD, "tx discarded frames"},
19348 +static int evb_ethtool_get_sset_count(struct net_device *dev, int sset)
19351 + case ETH_SS_STATS:
19352 + return ARRAY_SIZE(evb_ethtool_counters);
19354 + return -EOPNOTSUPP;
19358 +static void evb_ethtool_get_strings(struct net_device *netdev,
19359 + u32 stringset, u8 *data)
19363 + switch (stringset) {
19364 + case ETH_SS_STATS:
19365 + for (i = 0; i < ARRAY_SIZE(evb_ethtool_counters); i++)
19366 + memcpy(data + i * ETH_GSTRING_LEN,
19367 + evb_ethtool_counters[i].name, ETH_GSTRING_LEN);
19372 +static void evb_ethtool_get_stats(struct net_device *netdev,
19373 + struct ethtool_stats *stats,
19376 + struct evb_port_priv *port_priv = netdev_priv(netdev);
19380 + for (i = 0; i < ARRAY_SIZE(evb_ethtool_counters); i++) {
19381 + err = dpdmux_if_get_counter(port_priv->evb_priv->mc_io,
19383 + port_priv->evb_priv->mux_handle,
19384 + port_priv->port_index,
19385 + evb_ethtool_counters[i].id,
19388 + netdev_err(netdev, "dpdmux_if_get_counter[%s] err %d\n",
19389 + evb_ethtool_counters[i].name, err);
19393 +static const struct ethtool_ops evb_port_ethtool_ops = {
19394 + .get_drvinfo = &evb_get_drvinfo,
19395 + .get_link = ðtool_op_get_link,
19396 + .get_settings = &evb_get_settings,
19397 + .set_settings = &evb_set_settings,
19398 + .get_strings = &evb_ethtool_get_strings,
19399 + .get_ethtool_stats = &evb_ethtool_get_stats,
19400 + .get_sset_count = &evb_ethtool_get_sset_count,
19403 +static int evb_open(struct net_device *netdev)
19405 + struct evb_priv *priv = netdev_priv(netdev);
19408 + err = dpdmux_enable(priv->mc_io, 0, priv->mux_handle);
19409 + if (unlikely(err))
19410 + netdev_err(netdev, "dpdmux_enable err %d\n", err);
19415 +static int evb_close(struct net_device *netdev)
19417 + struct evb_priv *priv = netdev_priv(netdev);
19420 + err = dpdmux_disable(priv->mc_io, 0, priv->mux_handle);
19421 + if (unlikely(err))
19422 + netdev_err(netdev, "dpdmux_disable err %d\n", err);
19427 +static const struct net_device_ops evb_ops = {
19428 + .ndo_start_xmit = &evb_dropframe,
19429 + .ndo_open = &evb_open,
19430 + .ndo_stop = &evb_close,
19432 + .ndo_bridge_setlink = &evb_setlink,
19433 + .ndo_bridge_getlink = &evb_getlink,
19434 + .ndo_bridge_dellink = &evb_dellink,
19436 + .ndo_get_stats64 = &evb_port_get_stats,
19437 + .ndo_change_mtu = &evb_change_mtu,
19440 +static int evb_takedown(struct fsl_mc_device *evb_dev)
19442 + struct device *dev = &evb_dev->dev;
19443 + struct net_device *netdev = dev_get_drvdata(dev);
19444 + struct evb_priv *priv = netdev_priv(netdev);
19447 + err = dpdmux_close(priv->mc_io, 0, priv->mux_handle);
19448 + if (unlikely(err))
19449 + dev_warn(dev, "dpdmux_close err %d\n", err);
19454 +static int evb_init(struct fsl_mc_device *evb_dev)
19456 + struct device *dev = &evb_dev->dev;
19457 + struct net_device *netdev = dev_get_drvdata(dev);
19458 + struct evb_priv *priv = netdev_priv(netdev);
19459 + u16 version_major;
19460 + u16 version_minor;
19463 + priv->dev_id = evb_dev->obj_desc.id;
19465 + err = dpdmux_open(priv->mc_io, 0, priv->dev_id, &priv->mux_handle);
19466 + if (unlikely(err)) {
19467 + dev_err(dev, "dpdmux_open err %d\n", err);
19470 + if (!priv->mux_handle) {
19471 + dev_err(dev, "dpdmux_open returned null handle but no error\n");
19476 + err = dpdmux_get_attributes(priv->mc_io, 0, priv->mux_handle,
19478 + if (unlikely(err)) {
19479 + dev_err(dev, "dpdmux_get_attributes err %d\n", err);
19483 + err = dpdmux_get_api_version(priv->mc_io, 0,
19486 + if (unlikely(err)) {
19487 + dev_err(dev, "dpdmux_get_api_version err %d\n", err);
19491 + /* Minimum supported DPDMUX version check */
19492 + if (version_major < DPDMUX_MIN_VER_MAJOR ||
19493 + (version_major == DPDMUX_MIN_VER_MAJOR &&
19494 + version_minor < DPDMUX_MIN_VER_MINOR)) {
19495 + dev_err(dev, "DPDMUX version %d.%d not supported. Use %d.%d or greater.\n",
19496 + version_major, version_minor,
19497 + DPDMUX_MIN_VER_MAJOR, DPDMUX_MIN_VER_MAJOR);
19502 + err = dpdmux_reset(priv->mc_io, 0, priv->mux_handle);
19503 + if (unlikely(err)) {
19504 + dev_err(dev, "dpdmux_reset err %d\n", err);
19511 + dpdmux_close(priv->mc_io, 0, priv->mux_handle);
19516 +static int evb_remove(struct fsl_mc_device *evb_dev)
19518 + struct device *dev = &evb_dev->dev;
19519 + struct net_device *netdev = dev_get_drvdata(dev);
19520 + struct evb_priv *priv = netdev_priv(netdev);
19521 + struct evb_port_priv *port_priv;
19522 + struct list_head *pos;
19524 + list_for_each(pos, &priv->port_list) {
19525 + port_priv = list_entry(pos, struct evb_port_priv, list);
19528 + netdev_upper_dev_unlink(port_priv->netdev, netdev);
19531 + unregister_netdev(port_priv->netdev);
19532 + free_netdev(port_priv->netdev);
19535 + evb_teardown_irqs(evb_dev);
19537 + unregister_netdev(netdev);
19539 + evb_takedown(evb_dev);
19540 + fsl_mc_portal_free(priv->mc_io);
19542 + dev_set_drvdata(dev, NULL);
19543 + free_netdev(netdev);
19548 +static int evb_probe(struct fsl_mc_device *evb_dev)
19550 + struct device *dev;
19551 + struct evb_priv *priv = NULL;
19552 + struct net_device *netdev = NULL;
19553 + char port_name[IFNAMSIZ];
19557 + dev = &evb_dev->dev;
19559 + /* register switch device, it's for management only - no I/O */
19560 + netdev = alloc_etherdev(sizeof(*priv));
19562 + dev_err(dev, "alloc_etherdev error\n");
19565 + netdev->netdev_ops = &evb_ops;
19567 + dev_set_drvdata(dev, netdev);
19569 + priv = netdev_priv(netdev);
19571 + err = fsl_mc_portal_allocate(evb_dev, 0, &priv->mc_io);
19572 + if (unlikely(err)) {
19573 + dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
19574 + goto err_free_netdev;
19576 + if (!priv->mc_io) {
19577 + dev_err(dev, "fsl_mc_portal_allocate returned null handle but no error\n");
19579 + goto err_free_netdev;
19582 + err = evb_init(evb_dev);
19583 + if (unlikely(err)) {
19584 + dev_err(dev, "evb init err %d\n", err);
19585 + goto err_free_cmdport;
19588 + INIT_LIST_HEAD(&priv->port_list);
19589 + netdev->flags |= IFF_PROMISC | IFF_MASTER;
19591 + dev_alloc_name(netdev, "evb%d");
19593 + /* register switch ports */
19594 + snprintf(port_name, IFNAMSIZ, "%sp%%d", netdev->name);
19596 + /* only register downlinks? */
19597 + for (i = 0; i < priv->attr.num_ifs + 1; i++) {
19598 + struct net_device *port_netdev;
19599 + struct evb_port_priv *port_priv;
19603 + alloc_etherdev(sizeof(struct evb_port_priv));
19604 + if (!port_netdev) {
19605 + dev_err(dev, "alloc_etherdev error\n");
19606 + goto err_takedown;
19609 + port_priv = netdev_priv(port_netdev);
19611 + port_netdev->flags |= IFF_PROMISC | IFF_SLAVE;
19613 + dev_alloc_name(port_netdev, port_name);
19615 + port_netdev = netdev;
19616 + port_priv = &priv->uplink;
19619 + port_priv->netdev = port_netdev;
19620 + port_priv->evb_priv = priv;
19621 + port_priv->port_index = i;
19623 + SET_NETDEV_DEV(port_netdev, dev);
19626 + port_netdev->netdev_ops = &evb_port_ops;
19628 + err = register_netdev(port_netdev);
19630 + dev_err(dev, "register_netdev err %d\n", err);
19631 + free_netdev(port_netdev);
19632 + goto err_takedown;
19636 + err = netdev_master_upper_dev_link(port_netdev, netdev,
19638 + if (unlikely(err)) {
19639 + dev_err(dev, "netdev_master_upper_dev_link err %d\n",
19641 + unregister_netdev(port_netdev);
19642 + free_netdev(port_netdev);
19644 + goto err_takedown;
19646 + rtmsg_ifinfo(RTM_NEWLINK, port_netdev,
19647 + IFF_SLAVE, GFP_KERNEL);
19650 + list_add(&port_priv->list, &priv->port_list);
19652 + err = register_netdev(netdev);
19655 + dev_err(dev, "register_netdev error %d\n", err);
19656 + goto err_takedown;
19660 + port_netdev->ethtool_ops = &evb_port_ethtool_ops;
19662 + /* ports are up from init */
19664 + err = dev_open(port_netdev);
19666 + if (unlikely(err))
19667 + dev_warn(dev, "dev_open err %d\n", err);
19671 + err = evb_setup_irqs(evb_dev);
19672 + if (unlikely(err)) {
19673 + dev_warn(dev, "evb_setup_irqs err %d\n", err);
19674 + goto err_takedown;
19677 + dev_info(dev, "probed evb device with %d ports\n",
19678 + priv->attr.num_ifs);
19682 + evb_remove(evb_dev);
19684 + fsl_mc_portal_free(priv->mc_io);
19689 +static const struct fsl_mc_device_id evb_match_id_table[] = {
19691 + .vendor = FSL_MC_VENDOR_FREESCALE,
19692 + .obj_type = "dpdmux",
19697 +static struct fsl_mc_driver evb_drv = {
19699 + .name = KBUILD_MODNAME,
19700 + .owner = THIS_MODULE,
19702 + .probe = evb_probe,
19703 + .remove = evb_remove,
19704 + .match_id_table = evb_match_id_table,
19707 +module_fsl_mc_driver(evb_drv);
19709 +MODULE_LICENSE("GPL");
19710 +MODULE_DESCRIPTION("Layerscape DPAA Edge Virtual Bridge driver (prototype)");
19712 +++ b/drivers/staging/fsl-dpaa2/mac/Kconfig
19714 +config FSL_DPAA2_MAC
19715 + tristate "DPAA2 MAC / PHY interface"
19716 + depends on FSL_MC_BUS && FSL_DPAA2
19717 + select MDIO_BUS_MUX_MMIOREG
19718 + select FSL_XGMAC_MDIO
19721 + Prototype driver for DPAA2 MAC / PHY interface object.
19722 + This driver works as a proxy between phylib including phy drivers and
19723 + the MC firmware. It receives updates on link state changes from PHY
19724 + lib and forwards them to MC and receives interrupt from MC whenever
19725 + a request is made to change the link state.
19728 +config FSL_DPAA2_MAC_NETDEVS
19729 + bool "Expose net interfaces for PHYs"
19731 + depends on FSL_DPAA2_MAC
19733 + Exposes macX net interfaces which allow direct control over MACs and
19736 + Leave disabled if unsure.
19738 +++ b/drivers/staging/fsl-dpaa2/mac/Makefile
19741 +obj-$(CONFIG_FSL_DPAA2_MAC) += dpaa2-mac.o
19743 +dpaa2-mac-objs := mac.o dpmac.o
19746 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
19749 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
19751 +++ b/drivers/staging/fsl-dpaa2/mac/dpmac-cmd.h
19753 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
19755 + * Redistribution and use in source and binary forms, with or without
19756 + * modification, are permitted provided that the following conditions are met:
19757 + * * Redistributions of source code must retain the above copyright
19758 + * notice, this list of conditions and the following disclaimer.
19759 + * * Redistributions in binary form must reproduce the above copyright
19760 + * notice, this list of conditions and the following disclaimer in the
19761 + * documentation and/or other materials provided with the distribution.
19762 + * * Neither the name of the above-listed copyright holders nor the
19763 + * names of any contributors may be used to endorse or promote products
19764 + * derived from this software without specific prior written permission.
19767 + * ALTERNATIVELY, this software may be distributed under the terms of the
19768 + * GNU General Public License ("GPL") as published by the Free Software
19769 + * Foundation, either version 2 of that License or (at your option) any
19772 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19773 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19774 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19775 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
19776 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19777 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19778 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
19779 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
19780 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
19781 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19782 + * POSSIBILITY OF SUCH DAMAGE.
19784 +#ifndef _FSL_DPMAC_CMD_H
19785 +#define _FSL_DPMAC_CMD_H
19787 +/* DPMAC Version */
19788 +#define DPMAC_VER_MAJOR 4
19789 +#define DPMAC_VER_MINOR 2
19790 +#define DPMAC_CMD_BASE_VERSION 1
19791 +#define DPMAC_CMD_ID_OFFSET 4
19793 +#define DPMAC_CMD(id) (((id) << DPMAC_CMD_ID_OFFSET) | DPMAC_CMD_BASE_VERSION)
19796 +#define DPMAC_CMDID_CLOSE DPMAC_CMD(0x800)
19797 +#define DPMAC_CMDID_OPEN DPMAC_CMD(0x80c)
19798 +#define DPMAC_CMDID_CREATE DPMAC_CMD(0x90c)
19799 +#define DPMAC_CMDID_DESTROY DPMAC_CMD(0x98c)
19800 +#define DPMAC_CMDID_GET_API_VERSION DPMAC_CMD(0xa0c)
19802 +#define DPMAC_CMDID_GET_ATTR DPMAC_CMD(0x004)
19803 +#define DPMAC_CMDID_RESET DPMAC_CMD(0x005)
19805 +#define DPMAC_CMDID_SET_IRQ_ENABLE DPMAC_CMD(0x012)
19806 +#define DPMAC_CMDID_GET_IRQ_ENABLE DPMAC_CMD(0x013)
19807 +#define DPMAC_CMDID_SET_IRQ_MASK DPMAC_CMD(0x014)
19808 +#define DPMAC_CMDID_GET_IRQ_MASK DPMAC_CMD(0x015)
19809 +#define DPMAC_CMDID_GET_IRQ_STATUS DPMAC_CMD(0x016)
19810 +#define DPMAC_CMDID_CLEAR_IRQ_STATUS DPMAC_CMD(0x017)
19812 +#define DPMAC_CMDID_GET_LINK_CFG DPMAC_CMD(0x0c2)
19813 +#define DPMAC_CMDID_SET_LINK_STATE DPMAC_CMD(0x0c3)
19814 +#define DPMAC_CMDID_GET_COUNTER DPMAC_CMD(0x0c4)
19816 +#define DPMAC_CMDID_SET_PORT_MAC_ADDR DPMAC_CMD(0x0c5)
19818 +/* Macros for accessing command fields smaller than 1byte */
19819 +#define DPMAC_MASK(field) \
19820 + GENMASK(DPMAC_##field##_SHIFT + DPMAC_##field##_SIZE - 1, \
19821 + DPMAC_##field##_SHIFT)
19822 +#define dpmac_set_field(var, field, val) \
19823 + ((var) |= (((val) << DPMAC_##field##_SHIFT) & DPMAC_MASK(field)))
19824 +#define dpmac_get_field(var, field) \
19825 + (((var) & DPMAC_MASK(field)) >> DPMAC_##field##_SHIFT)
19827 +struct dpmac_cmd_open {
19831 +struct dpmac_cmd_create {
19835 +struct dpmac_cmd_destroy {
19839 +struct dpmac_cmd_set_irq_enable {
19845 +struct dpmac_cmd_get_irq_enable {
19850 +struct dpmac_rsp_get_irq_enable {
19854 +struct dpmac_cmd_set_irq_mask {
19859 +struct dpmac_cmd_get_irq_mask {
19864 +struct dpmac_rsp_get_irq_mask {
19868 +struct dpmac_cmd_get_irq_status {
19873 +struct dpmac_rsp_get_irq_status {
19877 +struct dpmac_cmd_clear_irq_status {
19882 +struct dpmac_rsp_get_attributes {
19889 +struct dpmac_rsp_get_link_cfg {
19894 +#define DPMAC_STATE_SIZE 1
19895 +#define DPMAC_STATE_SHIFT 0
19897 +struct dpmac_cmd_set_link_state {
19901 + /* only least significant bit is valid */
19905 +struct dpmac_cmd_get_counter {
19909 +struct dpmac_rsp_get_counter {
19914 +struct dpmac_rsp_get_api_version {
19919 +struct dpmac_cmd_set_port_mac_addr {
19924 +#endif /* _FSL_DPMAC_CMD_H */
19926 +++ b/drivers/staging/fsl-dpaa2/mac/dpmac.c
19928 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
19930 + * Redistribution and use in source and binary forms, with or without
19931 + * modification, are permitted provided that the following conditions are met:
19932 + * * Redistributions of source code must retain the above copyright
19933 + * notice, this list of conditions and the following disclaimer.
19934 + * * Redistributions in binary form must reproduce the above copyright
19935 + * notice, this list of conditions and the following disclaimer in the
19936 + * documentation and/or other materials provided with the distribution.
19937 + * * Neither the name of the above-listed copyright holders nor the
19938 + * names of any contributors may be used to endorse or promote products
19939 + * derived from this software without specific prior written permission.
19942 + * ALTERNATIVELY, this software may be distributed under the terms of the
19943 + * GNU General Public License ("GPL") as published by the Free Software
19944 + * Foundation, either version 2 of that License or (at your option) any
19947 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19948 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19949 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19950 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
19951 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19952 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
19953 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
19954 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
19955 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
19956 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19957 + * POSSIBILITY OF SUCH DAMAGE.
19959 +#include "../../fsl-mc/include/mc-sys.h"
19960 +#include "../../fsl-mc/include/mc-cmd.h"
19961 +#include "dpmac.h"
19962 +#include "dpmac-cmd.h"
19965 + * dpmac_open() - Open a control session for the specified object.
19966 + * @mc_io: Pointer to MC portal's I/O object
19967 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
19968 + * @dpmac_id: DPMAC unique ID
19969 + * @token: Returned token; use in subsequent API calls
19971 + * This function can be used to open a control session for an
19972 + * already created object; an object may have been declared in
19973 + * the DPL or by calling the dpmac_create function.
19974 + * This function returns a unique authentication token,
19975 + * associated with the specific object ID and the specific MC
19976 + * portal; this token must be used in all subsequent commands for
19977 + * this specific object
19979 + * Return: '0' on Success; Error code otherwise.
19981 +int dpmac_open(struct fsl_mc_io *mc_io,
19986 + struct dpmac_cmd_open *cmd_params;
19987 + struct mc_command cmd = { 0 };
19990 + /* prepare command */
19991 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_OPEN,
19994 + cmd_params = (struct dpmac_cmd_open *)cmd.params;
19995 + cmd_params->dpmac_id = cpu_to_le32(dpmac_id);
19997 + /* send command to mc*/
19998 + err = mc_send_command(mc_io, &cmd);
20002 + /* retrieve response parameters */
20003 + *token = mc_cmd_hdr_read_token(&cmd);
20009 + * dpmac_close() - Close the control session of the object
20010 + * @mc_io: Pointer to MC portal's I/O object
20011 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20012 + * @token: Token of DPMAC object
20014 + * After this function is called, no further operations are
20015 + * allowed on the object without opening a new control session.
20017 + * Return: '0' on Success; Error code otherwise.
20019 +int dpmac_close(struct fsl_mc_io *mc_io,
20023 + struct mc_command cmd = { 0 };
20025 + /* prepare command */
20026 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CLOSE, cmd_flags,
20029 + /* send command to mc*/
20030 + return mc_send_command(mc_io, &cmd);
20034 + * dpmac_create() - Create the DPMAC object.
20035 + * @mc_io: Pointer to MC portal's I/O object
20036 + * @dprc_token: Parent container token; '0' for default container
20037 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20038 + * @cfg: Configuration structure
20039 + * @obj_id: Returned object id
20041 + * Create the DPMAC object, allocate required resources and
20042 + * perform required initialization.
20044 + * The function accepts an authentication token of a parent
20045 + * container that this object should be assigned to. The token
20046 + * can be '0' so the object will be assigned to the default container.
20047 + * The newly created object can be opened with the returned
20048 + * object id and using the container's associated tokens and MC portals.
20050 + * Return: '0' on Success; Error code otherwise.
20052 +int dpmac_create(struct fsl_mc_io *mc_io,
20055 + const struct dpmac_cfg *cfg,
20058 + struct dpmac_cmd_create *cmd_params;
20059 + struct mc_command cmd = { 0 };
20062 + /* prepare command */
20063 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CREATE,
20066 + cmd_params = (struct dpmac_cmd_create *)cmd.params;
20067 + cmd_params->mac_id = cpu_to_le32(cfg->mac_id);
20069 + /* send command to mc*/
20070 + err = mc_send_command(mc_io, &cmd);
20074 + /* retrieve response parameters */
20075 + *obj_id = mc_cmd_read_object_id(&cmd);
20081 + * dpmac_destroy() - Destroy the DPMAC object and release all its resources.
20082 + * @mc_io: Pointer to MC portal's I/O object
20083 + * @dprc_token: Parent container token; '0' for default container
20084 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20085 + * @object_id: The object id; it must be a valid id within the container that
20086 + * created this object;
20088 + * The function accepts the authentication token of the parent container that
20089 + * created the object (not the one that currently owns the object). The object
20090 + * is searched within parent using the provided 'object_id'.
20091 + * All tokens to the object must be closed before calling destroy.
20093 + * Return: '0' on Success; error code otherwise.
20095 +int dpmac_destroy(struct fsl_mc_io *mc_io,
20100 + struct dpmac_cmd_destroy *cmd_params;
20101 + struct mc_command cmd = { 0 };
20103 + /* prepare command */
20104 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_DESTROY,
20107 + cmd_params = (struct dpmac_cmd_destroy *)cmd.params;
20108 + cmd_params->dpmac_id = cpu_to_le32(object_id);
20110 + /* send command to mc*/
20111 + return mc_send_command(mc_io, &cmd);
20115 + * dpmac_set_irq_enable() - Set overall interrupt state.
20116 + * @mc_io: Pointer to MC portal's I/O object
20117 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20118 + * @token: Token of DPMAC object
20119 + * @irq_index: The interrupt index to configure
20120 + * @en: Interrupt state - enable = 1, disable = 0
20122 + * Allows GPP software to control when interrupts are generated.
20123 + * Each interrupt can have up to 32 causes. The enable/disable control's the
20124 + * overall interrupt state. if the interrupt is disabled no causes will cause
20127 + * Return: '0' on Success; Error code otherwise.
20129 +int dpmac_set_irq_enable(struct fsl_mc_io *mc_io,
20135 + struct dpmac_cmd_set_irq_enable *cmd_params;
20136 + struct mc_command cmd = { 0 };
20138 + /* prepare command */
20139 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_IRQ_ENABLE,
20142 + cmd_params = (struct dpmac_cmd_set_irq_enable *)cmd.params;
20143 + cmd_params->irq_index = irq_index;
20144 + cmd_params->enable = en;
20146 + /* send command to mc*/
20147 + return mc_send_command(mc_io, &cmd);
20151 + * dpmac_get_irq_enable() - Get overall interrupt state
20152 + * @mc_io: Pointer to MC portal's I/O object
20153 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20154 + * @token: Token of DPMAC object
20155 + * @irq_index: The interrupt index to configure
20156 + * @en: Returned interrupt state - enable = 1, disable = 0
20158 + * Return: '0' on Success; Error code otherwise.
20160 +int dpmac_get_irq_enable(struct fsl_mc_io *mc_io,
20166 + struct dpmac_cmd_get_irq_enable *cmd_params;
20167 + struct dpmac_rsp_get_irq_enable *rsp_params;
20168 + struct mc_command cmd = { 0 };
20171 + /* prepare command */
20172 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ_ENABLE,
20175 + cmd_params = (struct dpmac_cmd_get_irq_enable *)cmd.params;
20176 + cmd_params->irq_index = irq_index;
20178 + /* send command to mc*/
20179 + err = mc_send_command(mc_io, &cmd);
20183 + /* retrieve response parameters */
20184 + rsp_params = (struct dpmac_rsp_get_irq_enable *)cmd.params;
20185 + *en = rsp_params->enabled;
20191 + * dpmac_set_irq_mask() - Set interrupt mask.
20192 + * @mc_io: Pointer to MC portal's I/O object
20193 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20194 + * @token: Token of DPMAC object
20195 + * @irq_index: The interrupt index to configure
20196 + * @mask: Event mask to trigger interrupt;
20198 + * 0 = ignore event
20199 + * 1 = consider event for asserting IRQ
20201 + * Every interrupt can have up to 32 causes and the interrupt model supports
20202 + * masking/unmasking each cause independently
20204 + * Return: '0' on Success; Error code otherwise.
20206 +int dpmac_set_irq_mask(struct fsl_mc_io *mc_io,
20212 + struct dpmac_cmd_set_irq_mask *cmd_params;
20213 + struct mc_command cmd = { 0 };
20215 + /* prepare command */
20216 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_IRQ_MASK,
20219 + cmd_params = (struct dpmac_cmd_set_irq_mask *)cmd.params;
20220 + cmd_params->mask = cpu_to_le32(mask);
20221 + cmd_params->irq_index = irq_index;
20223 + /* send command to mc*/
20224 + return mc_send_command(mc_io, &cmd);
20228 + * dpmac_get_irq_mask() - Get interrupt mask.
20229 + * @mc_io: Pointer to MC portal's I/O object
20230 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20231 + * @token: Token of DPMAC object
20232 + * @irq_index: The interrupt index to configure
20233 + * @mask: Returned event mask to trigger interrupt
20235 + * Every interrupt can have up to 32 causes and the interrupt model supports
20236 + * masking/unmasking each cause independently
20238 + * Return: '0' on Success; Error code otherwise.
20240 +int dpmac_get_irq_mask(struct fsl_mc_io *mc_io,
20246 + struct dpmac_cmd_get_irq_mask *cmd_params;
20247 + struct dpmac_rsp_get_irq_mask *rsp_params;
20248 + struct mc_command cmd = { 0 };
20251 + /* prepare command */
20252 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ_MASK,
20255 + cmd_params = (struct dpmac_cmd_get_irq_mask *)cmd.params;
20256 + cmd_params->irq_index = irq_index;
20258 + /* send command to mc*/
20259 + err = mc_send_command(mc_io, &cmd);
20263 + /* retrieve response parameters */
20264 + rsp_params = (struct dpmac_rsp_get_irq_mask *)cmd.params;
20265 + *mask = le32_to_cpu(rsp_params->mask);
20271 + * dpmac_get_irq_status() - Get the current status of any pending interrupts.
20273 + * @mc_io: Pointer to MC portal's I/O object
20274 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20275 + * @token: Token of DPMAC object
20276 + * @irq_index: The interrupt index to configure
20277 + * @status: Returned interrupts status - one bit per cause:
20278 + * 0 = no interrupt pending
20279 + * 1 = interrupt pending
20281 + * Return: '0' on Success; Error code otherwise.
20283 +int dpmac_get_irq_status(struct fsl_mc_io *mc_io,
20289 + struct dpmac_cmd_get_irq_status *cmd_params;
20290 + struct dpmac_rsp_get_irq_status *rsp_params;
20291 + struct mc_command cmd = { 0 };
20294 + /* prepare command */
20295 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_IRQ_STATUS,
20298 + cmd_params = (struct dpmac_cmd_get_irq_status *)cmd.params;
20299 + cmd_params->status = cpu_to_le32(*status);
20300 + cmd_params->irq_index = irq_index;
20302 + /* send command to mc*/
20303 + err = mc_send_command(mc_io, &cmd);
20307 + /* retrieve response parameters */
20308 + rsp_params = (struct dpmac_rsp_get_irq_status *)cmd.params;
20309 + *status = le32_to_cpu(rsp_params->status);
20315 + * dpmac_clear_irq_status() - Clear a pending interrupt's status
20317 + * @mc_io: Pointer to MC portal's I/O object
20318 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20319 + * @token: Token of DPMAC object
20320 + * @irq_index: The interrupt index to configure
20321 + * @status: Bits to clear (W1C) - one bit per cause:
20322 + * 0 = don't change
20323 + * 1 = clear status bit
20325 + * Return: '0' on Success; Error code otherwise.
20327 +int dpmac_clear_irq_status(struct fsl_mc_io *mc_io,
20333 + struct dpmac_cmd_clear_irq_status *cmd_params;
20334 + struct mc_command cmd = { 0 };
20336 + /* prepare command */
20337 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_CLEAR_IRQ_STATUS,
20340 + cmd_params = (struct dpmac_cmd_clear_irq_status *)cmd.params;
20341 + cmd_params->status = cpu_to_le32(status);
20342 + cmd_params->irq_index = irq_index;
20344 + /* send command to mc*/
20345 + return mc_send_command(mc_io, &cmd);
20349 + * dpmac_get_attributes - Retrieve DPMAC attributes.
20351 + * @mc_io: Pointer to MC portal's I/O object
20352 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20353 + * @token: Token of DPMAC object
20354 + * @attr: Returned object's attributes
20356 + * Return: '0' on Success; Error code otherwise.
20358 +int dpmac_get_attributes(struct fsl_mc_io *mc_io,
20361 + struct dpmac_attr *attr)
20363 + struct dpmac_rsp_get_attributes *rsp_params;
20364 + struct mc_command cmd = { 0 };
20367 + /* prepare command */
20368 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_ATTR,
20372 + /* send command to mc*/
20373 + err = mc_send_command(mc_io, &cmd);
20377 + /* retrieve response parameters */
20378 + rsp_params = (struct dpmac_rsp_get_attributes *)cmd.params;
20379 + attr->eth_if = rsp_params->eth_if;
20380 + attr->link_type = rsp_params->link_type;
20381 + attr->id = le16_to_cpu(rsp_params->id);
20382 + attr->max_rate = le32_to_cpu(rsp_params->max_rate);
20388 + * dpmac_get_link_cfg() - Get Ethernet link configuration
20389 + * @mc_io: Pointer to opaque I/O object
20390 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20391 + * @token: Token of DPMAC object
20392 + * @cfg: Returned structure with the link configuration
20394 + * Return: '0' on Success; Error code otherwise.
20396 +int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,
20399 + struct dpmac_link_cfg *cfg)
20401 + struct dpmac_rsp_get_link_cfg *rsp_params;
20402 + struct mc_command cmd = { 0 };
20405 + /* prepare command */
20406 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_LINK_CFG,
20410 + /* send command to mc*/
20411 + err = mc_send_command(mc_io, &cmd);
20415 + rsp_params = (struct dpmac_rsp_get_link_cfg *)cmd.params;
20416 + cfg->options = le64_to_cpu(rsp_params->options);
20417 + cfg->rate = le32_to_cpu(rsp_params->rate);
20423 + * dpmac_set_link_state() - Set the Ethernet link status
20424 + * @mc_io: Pointer to opaque I/O object
20425 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20426 + * @token: Token of DPMAC object
20427 + * @link_state: Link state configuration
20429 + * Return: '0' on Success; Error code otherwise.
20431 +int dpmac_set_link_state(struct fsl_mc_io *mc_io,
20434 + struct dpmac_link_state *link_state)
20436 + struct dpmac_cmd_set_link_state *cmd_params;
20437 + struct mc_command cmd = { 0 };
20439 + /* prepare command */
20440 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_LINK_STATE,
20443 + cmd_params = (struct dpmac_cmd_set_link_state *)cmd.params;
20444 + cmd_params->options = cpu_to_le64(link_state->options);
20445 + cmd_params->rate = cpu_to_le32(link_state->rate);
20446 + cmd_params->up = dpmac_get_field(link_state->up, STATE);
20448 + /* send command to mc*/
20449 + return mc_send_command(mc_io, &cmd);
20453 + * dpmac_get_counter() - Read a specific DPMAC counter
20454 + * @mc_io: Pointer to opaque I/O object
20455 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20456 + * @token: Token of DPMAC object
20457 + * @type: The requested counter
20458 + * @counter: Returned counter value
20460 + * Return: The requested counter; '0' otherwise.
20462 +int dpmac_get_counter(struct fsl_mc_io *mc_io,
20465 + enum dpmac_counter type,
20468 + struct dpmac_cmd_get_counter *dpmac_cmd;
20469 + struct dpmac_rsp_get_counter *dpmac_rsp;
20470 + struct mc_command cmd = { 0 };
20473 + /* prepare command */
20474 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_COUNTER,
20477 + dpmac_cmd = (struct dpmac_cmd_get_counter *)cmd.params;
20478 + dpmac_cmd->type = type;
20480 + /* send command to mc*/
20481 + err = mc_send_command(mc_io, &cmd);
20485 + dpmac_rsp = (struct dpmac_rsp_get_counter *)cmd.params;
20486 + *counter = le64_to_cpu(dpmac_rsp->counter);
20492 +int dpmac_set_port_mac_addr(struct fsl_mc_io *mc_io,
20495 + const u8 addr[6])
20497 + struct dpmac_cmd_set_port_mac_addr *dpmac_cmd;
20498 + struct mc_command cmd = { 0 };
20500 + /* prepare command */
20501 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_SET_PORT_MAC_ADDR,
20504 + dpmac_cmd = (struct dpmac_cmd_set_port_mac_addr *)cmd.params;
20505 + dpmac_cmd->addr[0] = addr[5];
20506 + dpmac_cmd->addr[1] = addr[4];
20507 + dpmac_cmd->addr[2] = addr[3];
20508 + dpmac_cmd->addr[3] = addr[2];
20509 + dpmac_cmd->addr[4] = addr[1];
20510 + dpmac_cmd->addr[5] = addr[0];
20512 + /* send command to mc*/
20513 + return mc_send_command(mc_io, &cmd);
20517 + * dpmac_get_api_version() - Get Data Path MAC version
20518 + * @mc_io: Pointer to MC portal's I/O object
20519 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20520 + * @major_ver: Major version of data path mac API
20521 + * @minor_ver: Minor version of data path mac API
20523 + * Return: '0' on Success; Error code otherwise.
20525 +int dpmac_get_api_version(struct fsl_mc_io *mc_io,
20530 + struct dpmac_rsp_get_api_version *rsp_params;
20531 + struct mc_command cmd = { 0 };
20534 + cmd.header = mc_encode_cmd_header(DPMAC_CMDID_GET_API_VERSION,
20538 + err = mc_send_command(mc_io, &cmd);
20542 + rsp_params = (struct dpmac_rsp_get_api_version *)cmd.params;
20543 + *major_ver = le16_to_cpu(rsp_params->major);
20544 + *minor_ver = le16_to_cpu(rsp_params->minor);
20549 +++ b/drivers/staging/fsl-dpaa2/mac/dpmac.h
20551 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
20553 + * Redistribution and use in source and binary forms, with or without
20554 + * modification, are permitted provided that the following conditions are met:
20555 + * * Redistributions of source code must retain the above copyright
20556 + * notice, this list of conditions and the following disclaimer.
20557 + * * Redistributions in binary form must reproduce the above copyright
20558 + * notice, this list of conditions and the following disclaimer in the
20559 + * documentation and/or other materials provided with the distribution.
20560 + * * Neither the name of the above-listed copyright holders nor the
20561 + * names of any contributors may be used to endorse or promote products
20562 + * derived from this software without specific prior written permission.
20565 + * ALTERNATIVELY, this software may be distributed under the terms of the
20566 + * GNU General Public License ("GPL") as published by the Free Software
20567 + * Foundation, either version 2 of that License or (at your option) any
20570 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20571 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20572 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20573 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
20574 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20575 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
20576 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
20577 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
20578 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
20579 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
20580 + * POSSIBILITY OF SUCH DAMAGE.
20582 +#ifndef __FSL_DPMAC_H
20583 +#define __FSL_DPMAC_H
20585 +/* Data Path MAC API
20586 + * Contains initialization APIs and runtime control APIs for DPMAC
20591 +int dpmac_open(struct fsl_mc_io *mc_io,
20596 +int dpmac_close(struct fsl_mc_io *mc_io,
20601 + * enum dpmac_link_type - DPMAC link type
20602 + * @DPMAC_LINK_TYPE_NONE: No link
20603 + * @DPMAC_LINK_TYPE_FIXED: Link is fixed type
20604 + * @DPMAC_LINK_TYPE_PHY: Link by PHY ID
20605 + * @DPMAC_LINK_TYPE_BACKPLANE: Backplane link type
20607 +enum dpmac_link_type {
20608 + DPMAC_LINK_TYPE_NONE,
20609 + DPMAC_LINK_TYPE_FIXED,
20610 + DPMAC_LINK_TYPE_PHY,
20611 + DPMAC_LINK_TYPE_BACKPLANE
20615 + * enum dpmac_eth_if - DPMAC Ethrnet interface
20616 + * @DPMAC_ETH_IF_MII: MII interface
20617 + * @DPMAC_ETH_IF_RMII: RMII interface
20618 + * @DPMAC_ETH_IF_SMII: SMII interface
20619 + * @DPMAC_ETH_IF_GMII: GMII interface
20620 + * @DPMAC_ETH_IF_RGMII: RGMII interface
20621 + * @DPMAC_ETH_IF_SGMII: SGMII interface
20622 + * @DPMAC_ETH_IF_QSGMII: QSGMII interface
20623 + * @DPMAC_ETH_IF_XAUI: XAUI interface
20624 + * @DPMAC_ETH_IF_XFI: XFI interface
20626 +enum dpmac_eth_if {
20627 + DPMAC_ETH_IF_MII,
20628 + DPMAC_ETH_IF_RMII,
20629 + DPMAC_ETH_IF_SMII,
20630 + DPMAC_ETH_IF_GMII,
20631 + DPMAC_ETH_IF_RGMII,
20632 + DPMAC_ETH_IF_SGMII,
20633 + DPMAC_ETH_IF_QSGMII,
20634 + DPMAC_ETH_IF_XAUI,
20639 + * struct dpmac_cfg - Structure representing DPMAC configuration
20640 + * @mac_id: Represents the Hardware MAC ID; in case of multiple WRIOP,
20641 + * the MAC IDs are continuous.
20642 + * For example: 2 WRIOPs, 16 MACs in each:
20643 + * MAC IDs for the 1st WRIOP: 1-16,
20644 + * MAC IDs for the 2nd WRIOP: 17-32.
20646 +struct dpmac_cfg {
20650 +int dpmac_create(struct fsl_mc_io *mc_io,
20653 + const struct dpmac_cfg *cfg,
20656 +int dpmac_destroy(struct fsl_mc_io *mc_io,
20662 + * DPMAC IRQ Index and Events
20668 +#define DPMAC_IRQ_INDEX 0
20670 + * IRQ event - indicates a change in link state
20672 +#define DPMAC_IRQ_EVENT_LINK_CFG_REQ 0x00000001
20674 + * IRQ event - Indicates that the link state changed
20676 +#define DPMAC_IRQ_EVENT_LINK_CHANGED 0x00000002
20678 +int dpmac_set_irq_enable(struct fsl_mc_io *mc_io,
20684 +int dpmac_get_irq_enable(struct fsl_mc_io *mc_io,
20690 +int dpmac_set_irq_mask(struct fsl_mc_io *mc_io,
20696 +int dpmac_get_irq_mask(struct fsl_mc_io *mc_io,
20702 +int dpmac_get_irq_status(struct fsl_mc_io *mc_io,
20708 +int dpmac_clear_irq_status(struct fsl_mc_io *mc_io,
20715 + * struct dpmac_attr - Structure representing DPMAC attributes
20716 + * @id: DPMAC object ID
20717 + * @max_rate: Maximum supported rate - in Mbps
20718 + * @eth_if: Ethernet interface
20719 + * @link_type: link type
20721 +struct dpmac_attr {
20724 + enum dpmac_eth_if eth_if;
20725 + enum dpmac_link_type link_type;
20728 +int dpmac_get_attributes(struct fsl_mc_io *mc_io,
20731 + struct dpmac_attr *attr);
20734 + * DPMAC link configuration/state options
20738 + * Enable auto-negotiation
20740 +#define DPMAC_LINK_OPT_AUTONEG 0x0000000000000001ULL
20742 + * Enable half-duplex mode
20744 +#define DPMAC_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
20746 + * Enable pause frames
20748 +#define DPMAC_LINK_OPT_PAUSE 0x0000000000000004ULL
20750 + * Enable a-symmetric pause frames
20752 +#define DPMAC_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
20755 + * struct dpmac_link_cfg - Structure representing DPMAC link configuration
20756 + * @rate: Link's rate - in Mbps
20757 + * @options: Enable/Disable DPMAC link cfg features (bitmap)
20759 +struct dpmac_link_cfg {
20764 +int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,
20767 + struct dpmac_link_cfg *cfg);
20770 + * struct dpmac_link_state - DPMAC link configuration request
20771 + * @rate: Rate in Mbps
20772 + * @options: Enable/Disable DPMAC link cfg features (bitmap)
20773 + * @up: Link state
20775 +struct dpmac_link_state {
20781 +int dpmac_set_link_state(struct fsl_mc_io *mc_io,
20784 + struct dpmac_link_state *link_state);
20787 + * enum dpmac_counter - DPMAC counter types
20788 + * @DPMAC_CNT_ING_FRAME_64: counts 64-bytes frames, good or bad.
20789 + * @DPMAC_CNT_ING_FRAME_127: counts 65- to 127-bytes frames, good or bad.
20790 + * @DPMAC_CNT_ING_FRAME_255: counts 128- to 255-bytes frames, good or bad.
20791 + * @DPMAC_CNT_ING_FRAME_511: counts 256- to 511-bytes frames, good or bad.
20792 + * @DPMAC_CNT_ING_FRAME_1023: counts 512- to 1023-bytes frames, good or bad.
20793 + * @DPMAC_CNT_ING_FRAME_1518: counts 1024- to 1518-bytes frames, good or bad.
20794 + * @DPMAC_CNT_ING_FRAME_1519_MAX: counts 1519-bytes frames and larger
20795 + * (up to max frame length specified),
20797 + * @DPMAC_CNT_ING_FRAG: counts frames which are shorter than 64 bytes received
20798 + * with a wrong CRC
20799 + * @DPMAC_CNT_ING_JABBER: counts frames longer than the maximum frame length
20800 + * specified, with a bad frame check sequence.
20801 + * @DPMAC_CNT_ING_FRAME_DISCARD: counts dropped frames due to internal errors.
20802 + * Occurs when a receive FIFO overflows.
20803 + * Includes also frames truncated as a result of
20804 + * the receive FIFO overflow.
20805 + * @DPMAC_CNT_ING_ALIGN_ERR: counts frames with an alignment error
20806 + * (optional used for wrong SFD).
20807 + * @DPMAC_CNT_EGR_UNDERSIZED: counts frames transmitted that was less than 64
20808 + * bytes long with a good CRC.
20809 + * @DPMAC_CNT_ING_OVERSIZED: counts frames longer than the maximum frame length
20810 + * specified, with a good frame check sequence.
20811 + * @DPMAC_CNT_ING_VALID_PAUSE_FRAME: counts valid pause frames (regular and PFC)
20812 + * @DPMAC_CNT_EGR_VALID_PAUSE_FRAME: counts valid pause frames transmitted
20813 + * (regular and PFC).
20814 + * @DPMAC_CNT_ING_BYTE: counts bytes received except preamble for all valid
20815 + * frames and valid pause frames.
20816 + * @DPMAC_CNT_ING_MCAST_FRAME: counts received multicast frames.
20817 + * @DPMAC_CNT_ING_BCAST_FRAME: counts received broadcast frames.
20818 + * @DPMAC_CNT_ING_ALL_FRAME: counts each good or bad frames received.
20819 + * @DPMAC_CNT_ING_UCAST_FRAME: counts received unicast frames.
20820 + * @DPMAC_CNT_ING_ERR_FRAME: counts frames received with an error
20821 + * (except for undersized/fragment frame).
20822 + * @DPMAC_CNT_EGR_BYTE: counts bytes transmitted except preamble for all valid
20823 + * frames and valid pause frames transmitted.
20824 + * @DPMAC_CNT_EGR_MCAST_FRAME: counts transmitted multicast frames.
20825 + * @DPMAC_CNT_EGR_BCAST_FRAME: counts transmitted broadcast frames.
20826 + * @DPMAC_CNT_EGR_UCAST_FRAME: counts transmitted unicast frames.
20827 + * @DPMAC_CNT_EGR_ERR_FRAME: counts frames transmitted with an error.
20828 + * @DPMAC_CNT_ING_GOOD_FRAME: counts frames received without error, including
20830 + * @DPMAC_CNT_ENG_GOOD_FRAME: counts frames transmitted without error, including
20833 +enum dpmac_counter {
20834 + DPMAC_CNT_ING_FRAME_64,
20835 + DPMAC_CNT_ING_FRAME_127,
20836 + DPMAC_CNT_ING_FRAME_255,
20837 + DPMAC_CNT_ING_FRAME_511,
20838 + DPMAC_CNT_ING_FRAME_1023,
20839 + DPMAC_CNT_ING_FRAME_1518,
20840 + DPMAC_CNT_ING_FRAME_1519_MAX,
20841 + DPMAC_CNT_ING_FRAG,
20842 + DPMAC_CNT_ING_JABBER,
20843 + DPMAC_CNT_ING_FRAME_DISCARD,
20844 + DPMAC_CNT_ING_ALIGN_ERR,
20845 + DPMAC_CNT_EGR_UNDERSIZED,
20846 + DPMAC_CNT_ING_OVERSIZED,
20847 + DPMAC_CNT_ING_VALID_PAUSE_FRAME,
20848 + DPMAC_CNT_EGR_VALID_PAUSE_FRAME,
20849 + DPMAC_CNT_ING_BYTE,
20850 + DPMAC_CNT_ING_MCAST_FRAME,
20851 + DPMAC_CNT_ING_BCAST_FRAME,
20852 + DPMAC_CNT_ING_ALL_FRAME,
20853 + DPMAC_CNT_ING_UCAST_FRAME,
20854 + DPMAC_CNT_ING_ERR_FRAME,
20855 + DPMAC_CNT_EGR_BYTE,
20856 + DPMAC_CNT_EGR_MCAST_FRAME,
20857 + DPMAC_CNT_EGR_BCAST_FRAME,
20858 + DPMAC_CNT_EGR_UCAST_FRAME,
20859 + DPMAC_CNT_EGR_ERR_FRAME,
20860 + DPMAC_CNT_ING_GOOD_FRAME,
20861 + DPMAC_CNT_ENG_GOOD_FRAME
20864 +int dpmac_get_counter(struct fsl_mc_io *mc_io,
20867 + enum dpmac_counter type,
20871 + * dpmac_set_port_mac_addr() - Set a MAC address associated with the physical
20872 + * port. This is not used for filtering, MAC is always in
20873 + * promiscuous mode, it is passed to DPNIs through DPNI API for
20874 + * application used.
20875 + * @mc_io: Pointer to opaque I/O object
20876 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
20877 + * @token: Token of DPMAC object
20878 + * @addr: MAC address to set
20880 + * Return: The requested counter; '0' otherwise.
20882 +int dpmac_set_port_mac_addr(struct fsl_mc_io *mc_io,
20885 + const u8 addr[6]);
20887 +int dpmac_get_api_version(struct fsl_mc_io *mc_io,
20892 +#endif /* __FSL_DPMAC_H */
20894 +++ b/drivers/staging/fsl-dpaa2/mac/mac.c
20896 +/* Copyright 2015 Freescale Semiconductor Inc.
20898 + * Redistribution and use in source and binary forms, with or without
20899 + * modification, are permitted provided that the following conditions are met:
20900 + * * Redistributions of source code must retain the above copyright
20901 + * notice, this list of conditions and the following disclaimer.
20902 + * * Redistributions in binary form must reproduce the above copyright
20903 + * notice, this list of conditions and the following disclaimer in the
20904 + * documentation and/or other materials provided with the distribution.
20905 + * * Neither the name of Freescale Semiconductor nor the
20906 + * names of its contributors may be used to endorse or promote products
20907 + * derived from this software without specific prior written permission.
20910 + * ALTERNATIVELY, this software may be distributed under the terms of the
20911 + * GNU General Public License ("GPL") as published by the Free Software
20912 + * Foundation, either version 2 of that License or (at your option) any
20915 + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
20916 + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20917 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20918 + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
20919 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20920 + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20921 + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
20922 + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20923 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
20924 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20927 +#include <linux/module.h>
20929 +#include <linux/netdevice.h>
20930 +#include <linux/etherdevice.h>
20931 +#include <linux/msi.h>
20932 +#include <linux/rtnetlink.h>
20933 +#include <linux/if_vlan.h>
20935 +#include <uapi/linux/if_bridge.h>
20936 +#include <net/netlink.h>
20938 +#include <linux/of.h>
20939 +#include <linux/of_mdio.h>
20940 +#include <linux/of_net.h>
20941 +#include <linux/phy.h>
20942 +#include <linux/phy_fixed.h>
20944 +#include "../../fsl-mc/include/mc.h"
20945 +#include "../../fsl-mc/include/mc-sys.h"
20947 +#include "dpmac.h"
20948 +#include "dpmac-cmd.h"
20950 +struct dpaa2_mac_priv {
20951 + struct net_device *netdev;
20952 + struct fsl_mc_device *mc_dev;
20953 + struct dpmac_attr attr;
20954 + struct dpmac_link_state old_state;
20957 +/* TODO: fix the 10G modes, mapping can't be right:
20958 + * XGMII is paralel
20959 + * XAUI is serial, using 8b/10b encoding
20960 + * XFI is also serial but using 64b/66b encoding
20961 + * they can't all map to XGMII...
20963 + * This must be kept in sync with enum dpmac_eth_if.
20965 +static phy_interface_t dpaa2_mac_iface_mode[] = {
20966 + PHY_INTERFACE_MODE_MII, /* DPMAC_ETH_IF_MII */
20967 + PHY_INTERFACE_MODE_RMII, /* DPMAC_ETH_IF_RMII */
20968 + PHY_INTERFACE_MODE_SMII, /* DPMAC_ETH_IF_SMII */
20969 + PHY_INTERFACE_MODE_GMII, /* DPMAC_ETH_IF_GMII */
20970 + PHY_INTERFACE_MODE_RGMII, /* DPMAC_ETH_IF_RGMII */
20971 + PHY_INTERFACE_MODE_SGMII, /* DPMAC_ETH_IF_SGMII */
20972 + PHY_INTERFACE_MODE_QSGMII, /* DPMAC_ETH_IF_QSGMII */
20973 + PHY_INTERFACE_MODE_XGMII, /* DPMAC_ETH_IF_XAUI */
20974 + PHY_INTERFACE_MODE_XGMII, /* DPMAC_ETH_IF_XFI */
20977 +static void dpaa2_mac_link_changed(struct net_device *netdev)
20979 + struct phy_device *phydev;
20980 + struct dpmac_link_state state = { 0 };
20981 + struct dpaa2_mac_priv *priv = netdev_priv(netdev);
20984 + /* the PHY just notified us of link state change */
20985 + phydev = netdev->phydev;
20987 + state.up = !!phydev->link;
20988 + if (phydev->link) {
20989 + state.rate = phydev->speed;
20991 + if (!phydev->duplex)
20992 + state.options |= DPMAC_LINK_OPT_HALF_DUPLEX;
20993 + if (phydev->autoneg)
20994 + state.options |= DPMAC_LINK_OPT_AUTONEG;
20996 + netif_carrier_on(netdev);
20998 + netif_carrier_off(netdev);
21001 + if (priv->old_state.up != state.up ||
21002 + priv->old_state.rate != state.rate ||
21003 + priv->old_state.options != state.options) {
21004 + priv->old_state = state;
21005 + phy_print_status(phydev);
21008 + /* We must interrogate MC at all times, because we don't know
21009 + * when and whether a potential DPNI may have read the link state.
21011 + err = dpmac_set_link_state(priv->mc_dev->mc_io, 0,
21012 + priv->mc_dev->mc_handle, &state);
21013 + if (unlikely(err))
21014 + dev_err(&priv->mc_dev->dev, "dpmac_set_link_state: %d\n", err);
21017 +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS
21018 +static netdev_tx_t dpaa2_mac_drop_frame(struct sk_buff *skb,
21019 + struct net_device *dev)
21021 + /* we don't support I/O for now, drop the frame */
21022 + dev_kfree_skb_any(skb);
21023 + return NETDEV_TX_OK;
21026 +static int dpaa2_mac_open(struct net_device *netdev)
21028 + /* start PHY state machine */
21029 + phy_start(netdev->phydev);
21034 +static int dpaa2_mac_stop(struct net_device *netdev)
21036 + if (!netdev->phydev)
21039 + /* stop PHY state machine */
21040 + phy_stop(netdev->phydev);
21042 + /* signal link down to firmware */
21043 + netdev->phydev->link = 0;
21044 + dpaa2_mac_link_changed(netdev);
21050 +static int dpaa2_mac_get_settings(struct net_device *netdev,
21051 + struct ethtool_cmd *cmd)
21053 + return phy_ethtool_gset(netdev->phydev, cmd);
21056 +static int dpaa2_mac_set_settings(struct net_device *netdev,
21057 + struct ethtool_cmd *cmd)
21059 + return phy_ethtool_sset(netdev->phydev, cmd);
21062 +static void dpaa2_mac_get_stats(struct net_device *netdev,
21063 + struct rtnl_link_stats64 *storage)
21065 + struct dpaa2_mac_priv *priv = netdev_priv(netdev);
21069 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21070 + DPMAC_CNT_EGR_MCAST_FRAME,
21071 + &storage->tx_packets);
21074 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21075 + DPMAC_CNT_EGR_BCAST_FRAME, &tmp);
21078 + storage->tx_packets += tmp;
21079 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21080 + DPMAC_CNT_EGR_UCAST_FRAME, &tmp);
21083 + storage->tx_packets += tmp;
21085 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21086 + DPMAC_CNT_EGR_UNDERSIZED, &storage->tx_dropped);
21089 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21090 + DPMAC_CNT_EGR_BYTE, &storage->tx_bytes);
21093 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21094 + DPMAC_CNT_EGR_ERR_FRAME, &storage->tx_errors);
21098 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21099 + DPMAC_CNT_ING_ALL_FRAME, &storage->rx_packets);
21102 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21103 + DPMAC_CNT_ING_MCAST_FRAME, &storage->multicast);
21106 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21107 + DPMAC_CNT_ING_FRAME_DISCARD,
21108 + &storage->rx_dropped);
21111 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21112 + DPMAC_CNT_ING_ALIGN_ERR, &storage->rx_errors);
21115 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21116 + DPMAC_CNT_ING_OVERSIZED, &tmp);
21119 + storage->rx_errors += tmp;
21120 + err = dpmac_get_counter(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle,
21121 + DPMAC_CNT_ING_BYTE, &storage->rx_bytes);
21127 + netdev_err(netdev, "dpmac_get_counter err %d\n", err);
21131 + enum dpmac_counter id;
21132 + char name[ETH_GSTRING_LEN];
21133 +} dpaa2_mac_counters[] = {
21134 + {DPMAC_CNT_ING_ALL_FRAME, "rx all frames"},
21135 + {DPMAC_CNT_ING_GOOD_FRAME, "rx frames ok"},
21136 + {DPMAC_CNT_ING_ERR_FRAME, "rx frame errors"},
21137 + {DPMAC_CNT_ING_FRAME_DISCARD, "rx frame discards"},
21138 + {DPMAC_CNT_ING_UCAST_FRAME, "rx u-cast"},
21139 + {DPMAC_CNT_ING_BCAST_FRAME, "rx b-cast"},
21140 + {DPMAC_CNT_ING_MCAST_FRAME, "rx m-cast"},
21141 + {DPMAC_CNT_ING_FRAME_64, "rx 64 bytes"},
21142 + {DPMAC_CNT_ING_FRAME_127, "rx 65-127 bytes"},
21143 + {DPMAC_CNT_ING_FRAME_255, "rx 128-255 bytes"},
21144 + {DPMAC_CNT_ING_FRAME_511, "rx 256-511 bytes"},
21145 + {DPMAC_CNT_ING_FRAME_1023, "rx 512-1023 bytes"},
21146 + {DPMAC_CNT_ING_FRAME_1518, "rx 1024-1518 bytes"},
21147 + {DPMAC_CNT_ING_FRAME_1519_MAX, "rx 1519-max bytes"},
21148 + {DPMAC_CNT_ING_FRAG, "rx frags"},
21149 + {DPMAC_CNT_ING_JABBER, "rx jabber"},
21150 + {DPMAC_CNT_ING_ALIGN_ERR, "rx align errors"},
21151 + {DPMAC_CNT_ING_OVERSIZED, "rx oversized"},
21152 + {DPMAC_CNT_ING_VALID_PAUSE_FRAME, "rx pause"},
21153 + {DPMAC_CNT_ING_BYTE, "rx bytes"},
21154 + {DPMAC_CNT_ENG_GOOD_FRAME, "tx frames ok"},
21155 + {DPMAC_CNT_EGR_UCAST_FRAME, "tx u-cast"},
21156 + {DPMAC_CNT_EGR_MCAST_FRAME, "tx m-cast"},
21157 + {DPMAC_CNT_EGR_BCAST_FRAME, "tx b-cast"},
21158 + {DPMAC_CNT_EGR_ERR_FRAME, "tx frame errors"},
21159 + {DPMAC_CNT_EGR_UNDERSIZED, "tx undersized"},
21160 + {DPMAC_CNT_EGR_VALID_PAUSE_FRAME, "tx b-pause"},
21161 + {DPMAC_CNT_EGR_BYTE, "tx bytes"},
21165 +static void dpaa2_mac_get_strings(struct net_device *netdev,
21166 + u32 stringset, u8 *data)
21170 + switch (stringset) {
21171 + case ETH_SS_STATS:
21172 + for (i = 0; i < ARRAY_SIZE(dpaa2_mac_counters); i++)
21173 + memcpy(data + i * ETH_GSTRING_LEN,
21174 + dpaa2_mac_counters[i].name,
21175 + ETH_GSTRING_LEN);
21180 +static void dpaa2_mac_get_ethtool_stats(struct net_device *netdev,
21181 + struct ethtool_stats *stats,
21184 + struct dpaa2_mac_priv *priv = netdev_priv(netdev);
21188 + for (i = 0; i < ARRAY_SIZE(dpaa2_mac_counters); i++) {
21189 + err = dpmac_get_counter(priv->mc_dev->mc_io,
21191 + priv->mc_dev->mc_handle,
21192 + dpaa2_mac_counters[i].id, &data[i]);
21194 + netdev_err(netdev, "dpmac_get_counter[%s] err %d\n",
21195 + dpaa2_mac_counters[i].name, err);
21199 +static int dpaa2_mac_get_sset_count(struct net_device *dev, int sset)
21202 + case ETH_SS_STATS:
21203 + return ARRAY_SIZE(dpaa2_mac_counters);
21205 + return -EOPNOTSUPP;
21209 +static const struct net_device_ops dpaa2_mac_ndo_ops = {
21210 + .ndo_start_xmit = &dpaa2_mac_drop_frame,
21211 + .ndo_open = &dpaa2_mac_open,
21212 + .ndo_stop = &dpaa2_mac_stop,
21213 + .ndo_get_stats64 = &dpaa2_mac_get_stats,
21216 +static const struct ethtool_ops dpaa2_mac_ethtool_ops = {
21217 + .get_settings = &dpaa2_mac_get_settings,
21218 + .set_settings = &dpaa2_mac_set_settings,
21219 + .get_strings = &dpaa2_mac_get_strings,
21220 + .get_ethtool_stats = &dpaa2_mac_get_ethtool_stats,
21221 + .get_sset_count = &dpaa2_mac_get_sset_count,
21223 +#endif /* CONFIG_FSL_DPAA2_MAC_NETDEVS */
21225 +static void configure_link(struct dpaa2_mac_priv *priv,
21226 + struct dpmac_link_cfg *cfg)
21228 + struct phy_device *phydev = priv->netdev->phydev;
21230 + if (unlikely(!phydev))
21233 + phydev->speed = cfg->rate;
21234 + phydev->duplex = !!(cfg->options & DPMAC_LINK_OPT_HALF_DUPLEX);
21236 + if (cfg->options & DPMAC_LINK_OPT_AUTONEG) {
21237 + phydev->autoneg = 1;
21238 + phydev->advertising |= ADVERTISED_Autoneg;
21240 + phydev->autoneg = 0;
21241 + phydev->advertising &= ~ADVERTISED_Autoneg;
21244 + phy_start_aneg(phydev);
21247 +static irqreturn_t dpaa2_mac_irq_handler(int irq_num, void *arg)
21249 + struct device *dev = (struct device *)arg;
21250 + struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
21251 + struct dpaa2_mac_priv *priv = dev_get_drvdata(dev);
21252 + struct dpmac_link_cfg link_cfg;
21256 + err = dpmac_get_irq_status(mc_dev->mc_io, 0, mc_dev->mc_handle,
21257 + DPMAC_IRQ_INDEX, &status);
21258 + if (unlikely(err || !status))
21261 + /* DPNI-initiated link configuration; 'ifconfig up' also calls this */
21262 + if (status & DPMAC_IRQ_EVENT_LINK_CFG_REQ) {
21263 + err = dpmac_get_link_cfg(mc_dev->mc_io, 0, mc_dev->mc_handle,
21265 + if (unlikely(err))
21268 + configure_link(priv, &link_cfg);
21272 + dpmac_clear_irq_status(mc_dev->mc_io, 0, mc_dev->mc_handle,
21273 + DPMAC_IRQ_INDEX, status);
21275 + return IRQ_HANDLED;
21278 +static int setup_irqs(struct fsl_mc_device *mc_dev)
21281 + struct fsl_mc_device_irq *irq;
21283 + err = fsl_mc_allocate_irqs(mc_dev);
21285 + dev_err(&mc_dev->dev, "fsl_mc_allocate_irqs err %d\n", err);
21289 + irq = mc_dev->irqs[0];
21290 + err = devm_request_threaded_irq(&mc_dev->dev, irq->msi_desc->irq,
21291 + NULL, &dpaa2_mac_irq_handler,
21292 + IRQF_NO_SUSPEND | IRQF_ONESHOT,
21293 + dev_name(&mc_dev->dev), &mc_dev->dev);
21295 + dev_err(&mc_dev->dev, "devm_request_threaded_irq err %d\n",
21300 + err = dpmac_set_irq_mask(mc_dev->mc_io, 0, mc_dev->mc_handle,
21301 + DPMAC_IRQ_INDEX, DPMAC_IRQ_EVENT_LINK_CFG_REQ);
21303 + dev_err(&mc_dev->dev, "dpmac_set_irq_mask err %d\n", err);
21306 + err = dpmac_set_irq_enable(mc_dev->mc_io, 0, mc_dev->mc_handle,
21307 + DPMAC_IRQ_INDEX, 1);
21309 + dev_err(&mc_dev->dev, "dpmac_set_irq_enable err %d\n", err);
21316 + fsl_mc_free_irqs(mc_dev);
21321 +static void teardown_irqs(struct fsl_mc_device *mc_dev)
21325 + err = dpmac_set_irq_enable(mc_dev->mc_io, 0, mc_dev->mc_handle,
21326 + DPMAC_IRQ_INDEX, 0);
21328 + dev_err(&mc_dev->dev, "dpmac_set_irq_enable err %d\n", err);
21330 + fsl_mc_free_irqs(mc_dev);
21333 +static struct device_node *find_dpmac_node(struct device *dev, u16 dpmac_id)
21335 + struct device_node *dpmacs, *dpmac = NULL;
21336 + struct device_node *mc_node = dev->of_node;
21340 + dpmacs = of_find_node_by_name(mc_node, "dpmacs");
21342 + dev_err(dev, "No dpmacs subnode in device-tree\n");
21346 + while ((dpmac = of_get_next_child(dpmacs, dpmac))) {
21347 + err = of_property_read_u32(dpmac, "reg", &id);
21350 + if (id == dpmac_id)
21357 +static int dpaa2_mac_probe(struct fsl_mc_device *mc_dev)
21359 + struct device *dev;
21360 + struct dpaa2_mac_priv *priv = NULL;
21361 + struct device_node *phy_node, *dpmac_node;
21362 + struct net_device *netdev;
21363 + phy_interface_t if_mode;
21366 + dev = &mc_dev->dev;
21368 + /* prepare a net_dev structure to make the phy lib API happy */
21369 + netdev = alloc_etherdev(sizeof(*priv));
21371 + dev_err(dev, "alloc_etherdev error\n");
21375 + priv = netdev_priv(netdev);
21376 + priv->mc_dev = mc_dev;
21377 + priv->netdev = netdev;
21379 + SET_NETDEV_DEV(netdev, dev);
21381 +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS
21382 + snprintf(netdev->name, IFNAMSIZ, "mac%d", mc_dev->obj_desc.id);
21385 + dev_set_drvdata(dev, priv);
21387 + err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
21388 + if (err || !mc_dev->mc_io) {
21389 + dev_err(dev, "fsl_mc_portal_allocate error: %d\n", err);
21391 + goto err_free_netdev;
21394 + err = dpmac_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
21395 + &mc_dev->mc_handle);
21396 + if (err || !mc_dev->mc_handle) {
21397 + dev_err(dev, "dpmac_open error: %d\n", err);
21399 + goto err_free_mcp;
21402 + err = dpmac_get_attributes(mc_dev->mc_io, 0,
21403 + mc_dev->mc_handle, &priv->attr);
21405 + dev_err(dev, "dpmac_get_attributes err %d\n", err);
21410 + /* Look up the DPMAC node in the device-tree. */
21411 + dpmac_node = find_dpmac_node(dev, priv->attr.id);
21412 + if (!dpmac_node) {
21413 + dev_err(dev, "No dpmac@%d subnode found.\n", priv->attr.id);
21418 + err = setup_irqs(mc_dev);
21424 +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS
21425 + /* OPTIONAL, register netdev just to make it visible to the user */
21426 + netdev->netdev_ops = &dpaa2_mac_ndo_ops;
21427 + netdev->ethtool_ops = &dpaa2_mac_ethtool_ops;
21429 + /* phy starts up enabled so netdev should be up too */
21430 + netdev->flags |= IFF_UP;
21432 + err = register_netdev(priv->netdev);
21434 + dev_err(dev, "register_netdev error %d\n", err);
21436 + goto err_free_irq;
21438 +#endif /* CONFIG_FSL_DPAA2_MAC_NETDEVS */
21440 + /* probe the PHY as a fixed-link if the link type declared in DPC
21441 + * explicitly mandates this
21444 + phy_node = of_parse_phandle(dpmac_node, "phy-handle", 0);
21446 + goto probe_fixed_link;
21449 + if (priv->attr.eth_if < ARRAY_SIZE(dpaa2_mac_iface_mode)) {
21450 + if_mode = dpaa2_mac_iface_mode[priv->attr.eth_if];
21451 + dev_dbg(dev, "\tusing if mode %s for eth_if %d\n",
21452 + phy_modes(if_mode), priv->attr.eth_if);
21454 + dev_warn(dev, "Unexpected interface mode %d, will probe as fixed link\n",
21455 + priv->attr.eth_if);
21456 + goto probe_fixed_link;
21459 + /* try to connect to the PHY */
21460 + netdev->phydev = of_phy_connect(netdev, phy_node,
21461 + &dpaa2_mac_link_changed, 0, if_mode);
21462 + if (!netdev->phydev) {
21463 + /* No need for dev_err(); the kernel's loud enough as it is. */
21464 + dev_dbg(dev, "Can't of_phy_connect() now.\n");
21465 + /* We might be waiting for the MDIO MUX to probe, so defer
21466 + * our own probing.
21468 + err = -EPROBE_DEFER;
21471 + dev_info(dev, "Connected to %s PHY.\n", phy_modes(if_mode));
21474 + if (!netdev->phydev) {
21475 + struct fixed_phy_status status = {
21477 + /* fixed-phys don't support 10Gbps speed for now */
21482 + /* try to register a fixed link phy */
21483 + netdev->phydev = fixed_phy_register(PHY_POLL, &status, -1,
21485 + if (!netdev->phydev || IS_ERR(netdev->phydev)) {
21486 + dev_err(dev, "error trying to register fixed PHY\n");
21487 + /* So we don't crash unregister_netdev() later on */
21488 + netdev->phydev = NULL;
21492 + dev_info(dev, "Registered fixed PHY.\n");
21495 + /* start PHY state machine */
21496 +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS
21497 + dpaa2_mac_open(netdev);
21498 +#else /* CONFIG_FSL_DPAA2_MAC_NETDEVS */
21499 + phy_start(netdev->phydev);
21500 +#endif /* CONFIG_FSL_DPAA2_MAC_NETDEVS */
21505 +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS
21506 + unregister_netdev(netdev);
21509 + teardown_irqs(mc_dev);
21511 + dpmac_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
21513 + fsl_mc_portal_free(mc_dev->mc_io);
21515 + free_netdev(netdev);
21520 +static int dpaa2_mac_remove(struct fsl_mc_device *mc_dev)
21522 + struct device *dev = &mc_dev->dev;
21523 + struct dpaa2_mac_priv *priv = dev_get_drvdata(dev);
21525 +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS
21526 + unregister_netdev(priv->netdev);
21528 + teardown_irqs(priv->mc_dev);
21529 + dpmac_close(priv->mc_dev->mc_io, 0, priv->mc_dev->mc_handle);
21530 + fsl_mc_portal_free(priv->mc_dev->mc_io);
21531 + free_netdev(priv->netdev);
21533 + dev_set_drvdata(dev, NULL);
21539 +static const struct fsl_mc_device_id dpaa2_mac_match_id_table[] = {
21541 + .vendor = FSL_MC_VENDOR_FREESCALE,
21542 + .obj_type = "dpmac",
21544 + { .vendor = 0x0 }
21546 +MODULE_DEVICE_TABLE(fslmc, dpaa2_mac_match_id_table);
21548 +static struct fsl_mc_driver dpaa2_mac_drv = {
21550 + .name = KBUILD_MODNAME,
21551 + .owner = THIS_MODULE,
21553 + .probe = dpaa2_mac_probe,
21554 + .remove = dpaa2_mac_remove,
21555 + .match_id_table = dpaa2_mac_match_id_table,
21558 +module_fsl_mc_driver(dpaa2_mac_drv);
21560 +MODULE_LICENSE("GPL");
21561 +MODULE_DESCRIPTION("DPAA2 PHY proxy interface driver");
21563 +++ b/drivers/staging/fsl-dpaa2/rtc/Makefile
21566 +obj-$(CONFIG_PTP_1588_CLOCK_DPAA2) += dpaa2-rtc.o
21568 +dpaa2-rtc-objs := rtc.o dprtc.o
21571 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
21574 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
21576 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
21578 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
21580 + * Redistribution and use in source and binary forms, with or without
21581 + * modification, are permitted provided that the following conditions are met:
21582 + * * Redistributions of source code must retain the above copyright
21583 + * notice, this list of conditions and the following disclaimer.
21584 + * * Redistributions in binary form must reproduce the above copyright
21585 + * notice, this list of conditions and the following disclaimer in the
21586 + * documentation and/or other materials provided with the distribution.
21587 + * * Neither the name of the above-listed copyright holders nor the
21588 + * names of any contributors may be used to endorse or promote products
21589 + * derived from this software without specific prior written permission.
21592 + * ALTERNATIVELY, this software may be distributed under the terms of the
21593 + * GNU General Public License ("GPL") as published by the Free Software
21594 + * Foundation, either version 2 of that License or (at your option) any
21597 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21598 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21599 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21600 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
21601 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21602 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21603 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
21604 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
21605 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
21606 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
21607 + * POSSIBILITY OF SUCH DAMAGE.
21609 +#ifndef _FSL_DPRTC_CMD_H
21610 +#define _FSL_DPRTC_CMD_H
21612 +/* DPRTC Version */
21613 +#define DPRTC_VER_MAJOR 2
21614 +#define DPRTC_VER_MINOR 0
21616 +/* Command versioning */
21617 +#define DPRTC_CMD_BASE_VERSION 1
21618 +#define DPRTC_CMD_ID_OFFSET 4
21620 +#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
21623 +#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
21624 +#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
21625 +#define DPRTC_CMDID_CREATE DPRTC_CMD(0x910)
21626 +#define DPRTC_CMDID_DESTROY DPRTC_CMD(0x990)
21627 +#define DPRTC_CMDID_GET_API_VERSION DPRTC_CMD(0xa10)
21629 +#define DPRTC_CMDID_ENABLE DPRTC_CMD(0x002)
21630 +#define DPRTC_CMDID_DISABLE DPRTC_CMD(0x003)
21631 +#define DPRTC_CMDID_GET_ATTR DPRTC_CMD(0x004)
21632 +#define DPRTC_CMDID_RESET DPRTC_CMD(0x005)
21633 +#define DPRTC_CMDID_IS_ENABLED DPRTC_CMD(0x006)
21635 +#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
21636 +#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
21637 +#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD(0x014)
21638 +#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
21639 +#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
21640 +#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
21642 +#define DPRTC_CMDID_SET_CLOCK_OFFSET DPRTC_CMD(0x1d0)
21643 +#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
21644 +#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
21645 +#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
21646 +#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
21647 +#define DPRTC_CMDID_SET_ALARM DPRTC_CMD(0x1d5)
21648 +#define DPRTC_CMDID_SET_PERIODIC_PULSE DPRTC_CMD(0x1d6)
21649 +#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE DPRTC_CMD(0x1d7)
21650 +#define DPRTC_CMDID_SET_EXT_TRIGGER DPRTC_CMD(0x1d8)
21651 +#define DPRTC_CMDID_CLEAR_EXT_TRIGGER DPRTC_CMD(0x1d9)
21652 +#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP DPRTC_CMD(0x1dA)
21654 +/* Macros for accessing command fields smaller than 1byte */
21655 +#define DPRTC_MASK(field) \
21656 + GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
21657 + DPRTC_##field##_SHIFT)
21658 +#define dprtc_get_field(var, field) \
21659 + (((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
21661 +#pragma pack(push, 1)
21662 +struct dprtc_cmd_open {
21663 + uint32_t dprtc_id;
21666 +struct dprtc_cmd_destroy {
21667 + uint32_t object_id;
21670 +#define DPRTC_ENABLE_SHIFT 0
21671 +#define DPRTC_ENABLE_SIZE 1
21673 +struct dprtc_rsp_is_enabled {
21677 +struct dprtc_cmd_get_irq {
21679 + uint8_t irq_index;
21682 +struct dprtc_cmd_set_irq_enable {
21685 + uint8_t irq_index;
21688 +struct dprtc_rsp_get_irq_enable {
21692 +struct dprtc_cmd_set_irq_mask {
21694 + uint8_t irq_index;
21697 +struct dprtc_rsp_get_irq_mask {
21701 +struct dprtc_cmd_get_irq_status {
21703 + uint8_t irq_index;
21706 +struct dprtc_rsp_get_irq_status {
21710 +struct dprtc_cmd_clear_irq_status {
21712 + uint8_t irq_index;
21715 +struct dprtc_rsp_get_attributes {
21720 +struct dprtc_cmd_set_clock_offset {
21724 +struct dprtc_get_freq_compensation {
21725 + uint32_t freq_compensation;
21728 +struct dprtc_time {
21732 +struct dprtc_rsp_get_api_version {
21737 +#endif /* _FSL_DPRTC_CMD_H */
21739 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.c
21741 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
21743 + * Redistribution and use in source and binary forms, with or without
21744 + * modification, are permitted provided that the following conditions are met:
21745 + * * Redistributions of source code must retain the above copyright
21746 + * notice, this list of conditions and the following disclaimer.
21747 + * * Redistributions in binary form must reproduce the above copyright
21748 + * notice, this list of conditions and the following disclaimer in the
21749 + * documentation and/or other materials provided with the distribution.
21750 + * * Neither the name of the above-listed copyright holders nor the
21751 + * names of any contributors may be used to endorse or promote products
21752 + * derived from this software without specific prior written permission.
21755 + * ALTERNATIVELY, this software may be distributed under the terms of the
21756 + * GNU General Public License ("GPL") as published by the Free Software
21757 + * Foundation, either version 2 of that License or (at your option) any
21760 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21761 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21762 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21763 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
21764 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21765 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21766 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
21767 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
21768 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
21769 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
21770 + * POSSIBILITY OF SUCH DAMAGE.
21772 +#include "../../fsl-mc/include/mc-sys.h"
21773 +#include "../../fsl-mc/include/mc-cmd.h"
21774 +#include "dprtc.h"
21775 +#include "dprtc-cmd.h"
21778 + * dprtc_open() - Open a control session for the specified object.
21779 + * @mc_io: Pointer to MC portal's I/O object
21780 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21781 + * @dprtc_id: DPRTC unique ID
21782 + * @token: Returned token; use in subsequent API calls
21784 + * This function can be used to open a control session for an
21785 + * already created object; an object may have been declared in
21786 + * the DPL or by calling the dprtc_create function.
21787 + * This function returns a unique authentication token,
21788 + * associated with the specific object ID and the specific MC
21789 + * portal; this token must be used in all subsequent commands for
21790 + * this specific object
21792 + * Return: '0' on Success; Error code otherwise.
21794 +int dprtc_open(struct fsl_mc_io *mc_io,
21795 + uint32_t cmd_flags,
21799 + struct dprtc_cmd_open *cmd_params;
21800 + struct mc_command cmd = { 0 };
21803 + /* prepare command */
21804 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
21807 + cmd_params = (struct dprtc_cmd_open *)cmd.params;
21808 + cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
21810 + /* send command to mc*/
21811 + err = mc_send_command(mc_io, &cmd);
21815 + /* retrieve response parameters */
21816 + *token = mc_cmd_hdr_read_token(&cmd);
21822 + * dprtc_close() - Close the control session of the object
21823 + * @mc_io: Pointer to MC portal's I/O object
21824 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21825 + * @token: Token of DPRTC object
21827 + * After this function is called, no further operations are
21828 + * allowed on the object without opening a new control session.
21830 + * Return: '0' on Success; Error code otherwise.
21832 +int dprtc_close(struct fsl_mc_io *mc_io,
21833 + uint32_t cmd_flags,
21836 + struct mc_command cmd = { 0 };
21838 + /* prepare command */
21839 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
21842 + /* send command to mc*/
21843 + return mc_send_command(mc_io, &cmd);
21847 + * dprtc_create() - Create the DPRTC object.
21848 + * @mc_io: Pointer to MC portal's I/O object
21849 + * @dprc_token: Parent container token; '0' for default container
21850 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21851 + * @cfg: Configuration structure
21852 + * @obj_id: Returned object id
21854 + * Create the DPRTC object, allocate required resources and
21855 + * perform required initialization.
21857 + * The function accepts an authentication token of a parent
21858 + * container that this object should be assigned to. The token
21859 + * can be '0' so the object will be assigned to the default container.
21860 + * The newly created object can be opened with the returned
21861 + * object id and using the container's associated tokens and MC portals.
21863 + * Return: '0' on Success; Error code otherwise.
21865 +int dprtc_create(struct fsl_mc_io *mc_io,
21866 + uint16_t dprc_token,
21867 + uint32_t cmd_flags,
21868 + const struct dprtc_cfg *cfg,
21869 + uint32_t *obj_id)
21871 + struct mc_command cmd = { 0 };
21874 + (void)(cfg); /* unused */
21876 + /* prepare command */
21877 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
21881 + /* send command to mc*/
21882 + err = mc_send_command(mc_io, &cmd);
21886 + /* retrieve response parameters */
21887 + *obj_id = mc_cmd_read_object_id(&cmd);
21893 + * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
21894 + * @mc_io: Pointer to MC portal's I/O object
21895 + * @dprc_token: Parent container token; '0' for default container
21896 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21897 + * @object_id: The object id; it must be a valid id within the container that
21898 + * created this object;
21900 + * The function accepts the authentication token of the parent container that
21901 + * created the object (not the one that currently owns the object). The object
21902 + * is searched within parent using the provided 'object_id'.
21903 + * All tokens to the object must be closed before calling destroy.
21905 + * Return: '0' on Success; error code otherwise.
21907 +int dprtc_destroy(struct fsl_mc_io *mc_io,
21908 + uint16_t dprc_token,
21909 + uint32_t cmd_flags,
21910 + uint32_t object_id)
21912 + struct dprtc_cmd_destroy *cmd_params;
21913 + struct mc_command cmd = { 0 };
21915 + /* prepare command */
21916 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
21919 + cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
21920 + cmd_params->object_id = cpu_to_le32(object_id);
21922 + /* send command to mc*/
21923 + return mc_send_command(mc_io, &cmd);
21926 +int dprtc_enable(struct fsl_mc_io *mc_io,
21927 + uint32_t cmd_flags,
21930 + struct mc_command cmd = { 0 };
21932 + /* prepare command */
21933 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
21936 + /* send command to mc*/
21937 + return mc_send_command(mc_io, &cmd);
21940 +int dprtc_disable(struct fsl_mc_io *mc_io,
21941 + uint32_t cmd_flags,
21944 + struct mc_command cmd = { 0 };
21946 + /* prepare command */
21947 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
21951 + /* send command to mc*/
21952 + return mc_send_command(mc_io, &cmd);
21955 +int dprtc_is_enabled(struct fsl_mc_io *mc_io,
21956 + uint32_t cmd_flags,
21960 + struct dprtc_rsp_is_enabled *rsp_params;
21961 + struct mc_command cmd = { 0 };
21964 + /* prepare command */
21965 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
21968 + /* send command to mc*/
21969 + err = mc_send_command(mc_io, &cmd);
21973 + /* retrieve response parameters */
21974 + rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
21975 + *en = dprtc_get_field(rsp_params->en, ENABLE);
21980 +int dprtc_reset(struct fsl_mc_io *mc_io,
21981 + uint32_t cmd_flags,
21984 + struct mc_command cmd = { 0 };
21986 + /* prepare command */
21987 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
21991 + /* send command to mc*/
21992 + return mc_send_command(mc_io, &cmd);
21996 + * dprtc_set_irq_enable() - Set overall interrupt state.
21997 + * @mc_io: Pointer to MC portal's I/O object
21998 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
21999 + * @token: Token of DPRTC object
22000 + * @irq_index: The interrupt index to configure
22001 + * @en: Interrupt state - enable = 1, disable = 0
22003 + * Allows GPP software to control when interrupts are generated.
22004 + * Each interrupt can have up to 32 causes. The enable/disable control's the
22005 + * overall interrupt state. if the interrupt is disabled no causes will cause
22008 + * Return: '0' on Success; Error code otherwise.
22010 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
22011 + uint32_t cmd_flags,
22013 + uint8_t irq_index,
22016 + struct dprtc_cmd_set_irq_enable *cmd_params;
22017 + struct mc_command cmd = { 0 };
22019 + /* prepare command */
22020 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
22023 + cmd_params = (struct dprtc_cmd_set_irq_enable *)cmd.params;
22024 + cmd_params->irq_index = irq_index;
22025 + cmd_params->en = en;
22027 + /* send command to mc*/
22028 + return mc_send_command(mc_io, &cmd);
22032 + * dprtc_get_irq_enable() - Get overall interrupt state
22033 + * @mc_io: Pointer to MC portal's I/O object
22034 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22035 + * @token: Token of DPRTC object
22036 + * @irq_index: The interrupt index to configure
22037 + * @en: Returned interrupt state - enable = 1, disable = 0
22039 + * Return: '0' on Success; Error code otherwise.
22041 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
22042 + uint32_t cmd_flags,
22044 + uint8_t irq_index,
22047 + struct dprtc_rsp_get_irq_enable *rsp_params;
22048 + struct dprtc_cmd_get_irq *cmd_params;
22049 + struct mc_command cmd = { 0 };
22052 + /* prepare command */
22053 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
22056 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
22057 + cmd_params->irq_index = irq_index;
22059 + /* send command to mc*/
22060 + err = mc_send_command(mc_io, &cmd);
22064 + /* retrieve response parameters */
22065 + rsp_params = (struct dprtc_rsp_get_irq_enable *)cmd.params;
22066 + *en = rsp_params->en;
22072 + * dprtc_set_irq_mask() - Set interrupt mask.
22073 + * @mc_io: Pointer to MC portal's I/O object
22074 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22075 + * @token: Token of DPRTC object
22076 + * @irq_index: The interrupt index to configure
22077 + * @mask: Event mask to trigger interrupt;
22079 + * 0 = ignore event
22080 + * 1 = consider event for asserting IRQ
22082 + * Every interrupt can have up to 32 causes and the interrupt model supports
22083 + * masking/unmasking each cause independently
22085 + * Return: '0' on Success; Error code otherwise.
22087 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
22088 + uint32_t cmd_flags,
22090 + uint8_t irq_index,
22093 + struct dprtc_cmd_set_irq_mask *cmd_params;
22094 + struct mc_command cmd = { 0 };
22096 + /* prepare command */
22097 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
22100 + cmd_params = (struct dprtc_cmd_set_irq_mask *)cmd.params;
22101 + cmd_params->mask = cpu_to_le32(mask);
22102 + cmd_params->irq_index = irq_index;
22104 + /* send command to mc*/
22105 + return mc_send_command(mc_io, &cmd);
22109 + * dprtc_get_irq_mask() - Get interrupt mask.
22110 + * @mc_io: Pointer to MC portal's I/O object
22111 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22112 + * @token: Token of DPRTC object
22113 + * @irq_index: The interrupt index to configure
22114 + * @mask: Returned event mask to trigger interrupt
22116 + * Every interrupt can have up to 32 causes and the interrupt model supports
22117 + * masking/unmasking each cause independently
22119 + * Return: '0' on Success; Error code otherwise.
22121 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
22122 + uint32_t cmd_flags,
22124 + uint8_t irq_index,
22127 + struct dprtc_rsp_get_irq_mask *rsp_params;
22128 + struct dprtc_cmd_get_irq *cmd_params;
22129 + struct mc_command cmd = { 0 };
22132 + /* prepare command */
22133 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
22136 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
22137 + cmd_params->irq_index = irq_index;
22139 + /* send command to mc*/
22140 + err = mc_send_command(mc_io, &cmd);
22144 + /* retrieve response parameters */
22145 + rsp_params = (struct dprtc_rsp_get_irq_mask *)cmd.params;
22146 + *mask = le32_to_cpu(rsp_params->mask);
22152 + * dprtc_get_irq_status() - Get the current status of any pending interrupts.
22154 + * @mc_io: Pointer to MC portal's I/O object
22155 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22156 + * @token: Token of DPRTC object
22157 + * @irq_index: The interrupt index to configure
22158 + * @status: Returned interrupts status - one bit per cause:
22159 + * 0 = no interrupt pending
22160 + * 1 = interrupt pending
22162 + * Return: '0' on Success; Error code otherwise.
22164 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
22165 + uint32_t cmd_flags,
22167 + uint8_t irq_index,
22168 + uint32_t *status)
22170 + struct dprtc_cmd_get_irq_status *cmd_params;
22171 + struct dprtc_rsp_get_irq_status *rsp_params;
22172 + struct mc_command cmd = { 0 };
22175 + /* prepare command */
22176 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
22179 + cmd_params = (struct dprtc_cmd_get_irq_status *)cmd.params;
22180 + cmd_params->status = cpu_to_le32(*status);
22181 + cmd_params->irq_index = irq_index;
22183 + /* send command to mc*/
22184 + err = mc_send_command(mc_io, &cmd);
22188 + /* retrieve response parameters */
22189 + rsp_params = (struct dprtc_rsp_get_irq_status *)cmd.params;
22190 + *status = rsp_params->status;
22196 + * dprtc_clear_irq_status() - Clear a pending interrupt's status
22198 + * @mc_io: Pointer to MC portal's I/O object
22199 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22200 + * @token: Token of DPRTC object
22201 + * @irq_index: The interrupt index to configure
22202 + * @status: Bits to clear (W1C) - one bit per cause:
22203 + * 0 = don't change
22204 + * 1 = clear status bit
22206 + * Return: '0' on Success; Error code otherwise.
22208 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
22209 + uint32_t cmd_flags,
22211 + uint8_t irq_index,
22214 + struct dprtc_cmd_clear_irq_status *cmd_params;
22215 + struct mc_command cmd = { 0 };
22217 + /* prepare command */
22218 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
22221 + cmd_params = (struct dprtc_cmd_clear_irq_status *)cmd.params;
22222 + cmd_params->irq_index = irq_index;
22223 + cmd_params->status = cpu_to_le32(status);
22225 + /* send command to mc*/
22226 + return mc_send_command(mc_io, &cmd);
22230 + * dprtc_get_attributes - Retrieve DPRTC attributes.
22232 + * @mc_io: Pointer to MC portal's I/O object
22233 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22234 + * @token: Token of DPRTC object
22235 + * @attr: Returned object's attributes
22237 + * Return: '0' on Success; Error code otherwise.
22239 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
22240 + uint32_t cmd_flags,
22242 + struct dprtc_attr *attr)
22244 + struct dprtc_rsp_get_attributes *rsp_params;
22245 + struct mc_command cmd = { 0 };
22248 + /* prepare command */
22249 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
22253 + /* send command to mc*/
22254 + err = mc_send_command(mc_io, &cmd);
22258 + /* retrieve response parameters */
22259 + rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
22260 + attr->id = le32_to_cpu(rsp_params->id);
22266 + * dprtc_set_clock_offset() - Sets the clock's offset
22267 + * (usually relative to another clock).
22269 + * @mc_io: Pointer to MC portal's I/O object
22270 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22271 + * @token: Token of DPRTC object
22272 + * @offset: New clock offset (in nanoseconds).
22274 + * Return: '0' on Success; Error code otherwise.
22276 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
22277 + uint32_t cmd_flags,
22281 + struct dprtc_cmd_set_clock_offset *cmd_params;
22282 + struct mc_command cmd = { 0 };
22284 + /* prepare command */
22285 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
22288 + cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
22289 + cmd_params->offset = cpu_to_le64(offset);
22291 + /* send command to mc*/
22292 + return mc_send_command(mc_io, &cmd);
22296 + * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
22298 + * @mc_io: Pointer to MC portal's I/O object
22299 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22300 + * @token: Token of DPRTC object
22301 + * @freq_compensation: The new frequency compensation value to set.
22303 + * Return: '0' on Success; Error code otherwise.
22305 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
22306 + uint32_t cmd_flags,
22308 + uint32_t freq_compensation)
22310 + struct dprtc_get_freq_compensation *cmd_params;
22311 + struct mc_command cmd = { 0 };
22313 + /* prepare command */
22314 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
22317 + cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
22318 + cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
22320 + /* send command to mc*/
22321 + return mc_send_command(mc_io, &cmd);
22325 + * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
22327 + * @mc_io: Pointer to MC portal's I/O object
22328 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22329 + * @token: Token of DPRTC object
22330 + * @freq_compensation: Frequency compensation value
22332 + * Return: '0' on Success; Error code otherwise.
22334 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
22335 + uint32_t cmd_flags,
22337 + uint32_t *freq_compensation)
22339 + struct dprtc_get_freq_compensation *rsp_params;
22340 + struct mc_command cmd = { 0 };
22343 + /* prepare command */
22344 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
22348 + /* send command to mc*/
22349 + err = mc_send_command(mc_io, &cmd);
22353 + /* retrieve response parameters */
22354 + rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
22355 + *freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
22361 + * dprtc_get_time() - Returns the current RTC time.
22363 + * @mc_io: Pointer to MC portal's I/O object
22364 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22365 + * @token: Token of DPRTC object
22366 + * @time: Current RTC time.
22368 + * Return: '0' on Success; Error code otherwise.
22370 +int dprtc_get_time(struct fsl_mc_io *mc_io,
22371 + uint32_t cmd_flags,
22375 + struct dprtc_time *rsp_params;
22376 + struct mc_command cmd = { 0 };
22379 + /* prepare command */
22380 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
22384 + /* send command to mc*/
22385 + err = mc_send_command(mc_io, &cmd);
22389 + /* retrieve response parameters */
22390 + rsp_params = (struct dprtc_time *)cmd.params;
22391 + *time = le64_to_cpu(rsp_params->time);
22397 + * dprtc_set_time() - Updates current RTC time.
22399 + * @mc_io: Pointer to MC portal's I/O object
22400 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22401 + * @token: Token of DPRTC object
22402 + * @time: New RTC time.
22404 + * Return: '0' on Success; Error code otherwise.
22406 +int dprtc_set_time(struct fsl_mc_io *mc_io,
22407 + uint32_t cmd_flags,
22411 + struct dprtc_time *cmd_params;
22412 + struct mc_command cmd = { 0 };
22414 + /* prepare command */
22415 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
22418 + cmd_params = (struct dprtc_time *)cmd.params;
22419 + cmd_params->time = cpu_to_le64(time);
22421 + /* send command to mc*/
22422 + return mc_send_command(mc_io, &cmd);
22426 + * dprtc_set_alarm() - Defines and sets alarm.
22428 + * @mc_io: Pointer to MC portal's I/O object
22429 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22430 + * @token: Token of DPRTC object
22431 + * @time: In nanoseconds, the time when the alarm
22432 + * should go off - must be a multiple of
22435 + * Return: '0' on Success; Error code otherwise.
22437 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
22438 + uint32_t cmd_flags,
22439 + uint16_t token, uint64_t time)
22441 + struct dprtc_time *cmd_params;
22442 + struct mc_command cmd = { 0 };
22444 + /* prepare command */
22445 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
22448 + cmd_params = (struct dprtc_time *)cmd.params;
22449 + cmd_params->time = cpu_to_le64(time);
22451 + /* send command to mc*/
22452 + return mc_send_command(mc_io, &cmd);
22456 + * dprtc_get_api_version() - Get Data Path Real Time Counter API version
22457 + * @mc_io: Pointer to MC portal's I/O object
22458 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
22459 + * @major_ver: Major version of data path real time counter API
22460 + * @minor_ver: Minor version of data path real time counter API
22462 + * Return: '0' on Success; Error code otherwise.
22464 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
22465 + uint32_t cmd_flags,
22466 + uint16_t *major_ver,
22467 + uint16_t *minor_ver)
22469 + struct dprtc_rsp_get_api_version *rsp_params;
22470 + struct mc_command cmd = { 0 };
22473 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
22477 + err = mc_send_command(mc_io, &cmd);
22481 + rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
22482 + *major_ver = le16_to_cpu(rsp_params->major);
22483 + *minor_ver = le16_to_cpu(rsp_params->minor);
22488 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.h
22490 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
22492 + * Redistribution and use in source and binary forms, with or without
22493 + * modification, are permitted provided that the following conditions are met:
22494 + * * Redistributions of source code must retain the above copyright
22495 + * notice, this list of conditions and the following disclaimer.
22496 + * * Redistributions in binary form must reproduce the above copyright
22497 + * notice, this list of conditions and the following disclaimer in the
22498 + * documentation and/or other materials provided with the distribution.
22499 + * * Neither the name of the above-listed copyright holders nor the
22500 + * names of any contributors may be used to endorse or promote products
22501 + * derived from this software without specific prior written permission.
22504 + * ALTERNATIVELY, this software may be distributed under the terms of the
22505 + * GNU General Public License ("GPL") as published by the Free Software
22506 + * Foundation, either version 2 of that License or (at your option) any
22509 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22510 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22511 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22512 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
22513 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22514 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22515 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22516 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
22517 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22518 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
22519 + * POSSIBILITY OF SUCH DAMAGE.
22521 +#ifndef __FSL_DPRTC_H
22522 +#define __FSL_DPRTC_H
22524 +/* Data Path Real Time Counter API
22525 + * Contains initialization APIs and runtime control APIs for RTC
22531 + * Number of irq's
22533 +#define DPRTC_MAX_IRQ_NUM 1
22534 +#define DPRTC_IRQ_INDEX 0
22537 + * Interrupt event masks:
22541 + * Interrupt event mask indicating alarm event had occurred
22543 +#define DPRTC_EVENT_ALARM 0x40000000
22545 + * Interrupt event mask indicating periodic pulse event had occurred
22547 +#define DPRTC_EVENT_PPS 0x08000000
22549 +int dprtc_open(struct fsl_mc_io *mc_io,
22550 + uint32_t cmd_flags,
22552 + uint16_t *token);
22554 +int dprtc_close(struct fsl_mc_io *mc_io,
22555 + uint32_t cmd_flags,
22559 + * struct dprtc_cfg - Structure representing DPRTC configuration
22560 + * @options: place holder
22562 +struct dprtc_cfg {
22563 + uint32_t options;
22566 +int dprtc_create(struct fsl_mc_io *mc_io,
22567 + uint16_t dprc_token,
22568 + uint32_t cmd_flags,
22569 + const struct dprtc_cfg *cfg,
22570 + uint32_t *obj_id);
22572 +int dprtc_destroy(struct fsl_mc_io *mc_io,
22573 + uint16_t dprc_token,
22574 + uint32_t cmd_flags,
22575 + uint32_t object_id);
22577 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
22578 + uint32_t cmd_flags,
22582 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
22583 + uint32_t cmd_flags,
22585 + uint32_t freq_compensation);
22587 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
22588 + uint32_t cmd_flags,
22590 + uint32_t *freq_compensation);
22592 +int dprtc_get_time(struct fsl_mc_io *mc_io,
22593 + uint32_t cmd_flags,
22597 +int dprtc_set_time(struct fsl_mc_io *mc_io,
22598 + uint32_t cmd_flags,
22602 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
22603 + uint32_t cmd_flags,
22607 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
22608 + uint32_t cmd_flags,
22610 + uint8_t irq_index,
22613 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
22614 + uint32_t cmd_flags,
22616 + uint8_t irq_index,
22619 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
22620 + uint32_t cmd_flags,
22622 + uint8_t irq_index,
22625 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
22626 + uint32_t cmd_flags,
22628 + uint8_t irq_index,
22631 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
22632 + uint32_t cmd_flags,
22634 + uint8_t irq_index,
22635 + uint32_t *status);
22637 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
22638 + uint32_t cmd_flags,
22640 + uint8_t irq_index,
22641 + uint32_t status);
22644 + * struct dprtc_attr - Structure representing DPRTC attributes
22645 + * @id: DPRTC object ID
22647 +struct dprtc_attr {
22651 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
22652 + uint32_t cmd_flags,
22654 + struct dprtc_attr *attr);
22656 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
22657 + uint32_t cmd_flags,
22658 + uint16_t *major_ver,
22659 + uint16_t *minor_ver);
22661 +#endif /* __FSL_DPRTC_H */
22663 +++ b/drivers/staging/fsl-dpaa2/rtc/rtc.c
22665 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
22667 + * Redistribution and use in source and binary forms, with or without
22668 + * modification, are permitted provided that the following conditions are met:
22669 + * * Redistributions of source code must retain the above copyright
22670 + * notice, this list of conditions and the following disclaimer.
22671 + * * Redistributions in binary form must reproduce the above copyright
22672 + * notice, this list of conditions and the following disclaimer in the
22673 + * documentation and/or other materials provided with the distribution.
22674 + * * Neither the name of the above-listed copyright holders nor the
22675 + * names of any contributors may be used to endorse or promote products
22676 + * derived from this software without specific prior written permission.
22679 + * ALTERNATIVELY, this software may be distributed under the terms of the
22680 + * GNU General Public License ("GPL") as published by the Free Software
22681 + * Foundation, either version 2 of that License or (at your option) any
22684 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22685 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22686 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22687 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
22688 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22689 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22690 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22691 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
22692 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
22693 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
22694 + * POSSIBILITY OF SUCH DAMAGE.
22697 +#include <linux/module.h>
22698 +#include <linux/ptp_clock_kernel.h>
22700 +#include "../../fsl-mc/include/mc.h"
22701 +#include "../../fsl-mc/include/mc-sys.h"
22703 +#include "dprtc.h"
22704 +#include "dprtc-cmd.h"
22706 +#define N_EXT_TS 2
22708 +struct ptp_clock *clock;
22709 +struct fsl_mc_device *rtc_mc_dev;
22710 +u32 freqCompensation;
22712 +/* PTP clock operations */
22713 +static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
22716 + u32 diff, tmr_add;
22719 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
22720 + struct device *dev = &mc_dev->dev;
22727 + tmr_add = freqCompensation;
22730 + diff = div_u64(adj, 1000000000ULL);
22732 + tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
22734 + err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
22735 + mc_dev->mc_handle, tmr_add);
22737 + dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
22741 +static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
22745 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
22746 + struct device *dev = &mc_dev->dev;
22748 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
22750 + dev_err(dev, "dprtc_get_time err %d\n", err);
22756 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
22758 + dev_err(dev, "dprtc_set_time err %d\n", err);
22764 +static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
22769 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
22770 + struct device *dev = &mc_dev->dev;
22772 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
22774 + dev_err(dev, "dprtc_get_time err %d\n", err);
22778 + ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
22779 + ts->tv_nsec = remainder;
22783 +static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
22784 + const struct timespec *ts)
22788 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
22789 + struct device *dev = &mc_dev->dev;
22791 + ns = ts->tv_sec * 1000000000ULL;
22792 + ns += ts->tv_nsec;
22794 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
22796 + dev_err(dev, "dprtc_set_time err %d\n", err);
22800 +static struct ptp_clock_info ptp_dpaa2_caps = {
22801 + .owner = THIS_MODULE,
22802 + .name = "dpaa2 clock",
22803 + .max_adj = 512000,
22805 + .n_ext_ts = N_EXT_TS,
22809 + .adjfreq = ptp_dpaa2_adjfreq,
22810 + .adjtime = ptp_dpaa2_adjtime,
22811 + .gettime64 = ptp_dpaa2_gettime,
22812 + .settime64 = ptp_dpaa2_settime,
22815 +static int rtc_probe(struct fsl_mc_device *mc_dev)
22817 + struct device *dev;
22819 + int dpaa2_phc_index;
22825 + dev = &mc_dev->dev;
22827 + err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
22828 + if (unlikely(err)) {
22829 + dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
22832 + if (!mc_dev->mc_io) {
22834 + "fsl_mc_portal_allocate returned null handle but no error\n");
22839 + err = dprtc_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
22840 + &mc_dev->mc_handle);
22842 + dev_err(dev, "dprtc_open err %d\n", err);
22843 + goto err_free_mcp;
22845 + if (!mc_dev->mc_handle) {
22846 + dev_err(dev, "dprtc_open returned null handle but no error\n");
22848 + goto err_free_mcp;
22851 + rtc_mc_dev = mc_dev;
22853 + err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
22854 + mc_dev->mc_handle, &tmr_add);
22856 + dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
22859 + freqCompensation = tmr_add;
22861 + clock = ptp_clock_register(&ptp_dpaa2_caps, dev);
22862 + if (IS_ERR(clock)) {
22863 + err = PTR_ERR(clock);
22866 + dpaa2_phc_index = ptp_clock_index(clock);
22870 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
22872 + fsl_mc_portal_free(mc_dev->mc_io);
22877 +static int rtc_remove(struct fsl_mc_device *mc_dev)
22879 + ptp_clock_unregister(clock);
22880 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
22881 + fsl_mc_portal_free(mc_dev->mc_io);
22886 +static const struct fsl_mc_device_id rtc_match_id_table[] = {
22888 + .vendor = FSL_MC_VENDOR_FREESCALE,
22889 + .obj_type = "dprtc",
22894 +static struct fsl_mc_driver rtc_drv = {
22896 + .name = KBUILD_MODNAME,
22897 + .owner = THIS_MODULE,
22899 + .probe = rtc_probe,
22900 + .remove = rtc_remove,
22901 + .match_id_table = rtc_match_id_table,
22904 +module_fsl_mc_driver(rtc_drv);
22906 +MODULE_LICENSE("GPL");
22907 +MODULE_DESCRIPTION("DPAA2 RTC (PTP 1588 clock) driver (prototype)");