1 From fe22151c95c02c6bb145ea6c3685941e8fb09d60 Mon Sep 17 00:00:00 2001
2 From: Yangbo Lu <yangbo.lu@nxp.com>
3 Date: Thu, 5 Jul 2018 17:43:16 +0800
4 Subject: [PATCH 32/32] kvm: support layerscape
6 This is an integrated patch for layerscape kvm support.
8 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
9 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
10 Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
11 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
13 arch/arm/include/asm/kvm_mmu.h | 3 +-
14 arch/arm/kvm/mmu.c | 56 ++++++++++++++++++++++++++++++--
15 arch/arm64/include/asm/kvm_mmu.h | 14 ++++++--
16 virt/kvm/arm/vgic/vgic-its.c | 24 +++++++++++---
17 virt/kvm/arm/vgic/vgic-v2.c | 3 +-
18 5 files changed, 88 insertions(+), 12 deletions(-)
20 --- a/arch/arm/include/asm/kvm_mmu.h
21 +++ b/arch/arm/include/asm/kvm_mmu.h
22 @@ -55,7 +55,8 @@ void stage2_unmap_vm(struct kvm *kvm);
23 int kvm_alloc_stage2_pgd(struct kvm *kvm);
24 void kvm_free_stage2_pgd(struct kvm *kvm);
25 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
26 - phys_addr_t pa, unsigned long size, bool writable);
27 + phys_addr_t pa, unsigned long size, bool writable,
30 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
32 --- a/arch/arm/kvm/mmu.c
33 +++ b/arch/arm/kvm/mmu.c
34 @@ -1020,9 +1020,11 @@ static int stage2_pmdp_test_and_clear_yo
35 * @guest_ipa: The IPA at which to insert the mapping
36 * @pa: The physical address of the device
37 * @size: The size of the mapping
38 + * @prot: S2 page translation bits
40 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
41 - phys_addr_t pa, unsigned long size, bool writable)
42 + phys_addr_t pa, unsigned long size, bool writable,
45 phys_addr_t addr, end;
47 @@ -1033,7 +1035,7 @@ int kvm_phys_addr_ioremap(struct kvm *kv
48 pfn = __phys_to_pfn(pa);
50 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
51 - pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
52 + pte_t pte = pfn_pte(pfn, prot);
55 pte = kvm_s2pte_mkwrite(pte);
56 @@ -1057,6 +1059,30 @@ out:
61 +static pgprot_t stage1_to_stage2_pgprot(pgprot_t prot)
63 + switch (pgprot_val(prot) & PTE_ATTRINDX_MASK) {
64 + case PTE_ATTRINDX(MT_DEVICE_nGnRE):
65 + case PTE_ATTRINDX(MT_DEVICE_nGnRnE):
66 + case PTE_ATTRINDX(MT_DEVICE_GRE):
67 + return PAGE_S2_DEVICE;
68 + case PTE_ATTRINDX(MT_NORMAL_NC):
69 + case PTE_ATTRINDX(MT_NORMAL):
70 + return (pgprot_val(prot) & PTE_SHARED)
75 + return PAGE_S2_DEVICE;
78 +static pgprot_t stage1_to_stage2_pgprot(pgprot_t prot)
80 + return PAGE_S2_DEVICE;
84 static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
86 kvm_pfn_t pfn = *pfnp;
87 @@ -1308,6 +1334,19 @@ static int user_mem_abort(struct kvm_vcp
89 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
91 + if (!is_vm_hugetlb_page(vma)) {
96 + pte = get_locked_pte(current->mm, memslot->userspace_addr, &ptl);
97 + prot = stage1_to_stage2_pgprot(__pgprot(pte_val(*pte)));
98 + pte_unmap_unlock(pte, ptl);
100 + if (pgprot_val(prot) == pgprot_val(PAGE_S2_NS))
101 + mem_type = PAGE_S2_NS;
105 * Pages belonging to memslots that don't have the same
106 * alignment for userspace and IPA cannot be mapped using
107 @@ -1345,6 +1384,11 @@ static int user_mem_abort(struct kvm_vcp
108 if (is_error_noslot_pfn(pfn))
112 + if (pgprot_val(mem_type) == pgprot_val(PAGE_S2_NS)) {
113 + flags |= KVM_S2PTE_FLAG_IS_IOMAP;
116 if (kvm_is_device_pfn(pfn)) {
117 mem_type = PAGE_S2_DEVICE;
118 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
119 @@ -1882,6 +1926,9 @@ int kvm_arch_prepare_memory_region(struc
120 gpa_t gpa = mem->guest_phys_addr +
121 (vm_start - mem->userspace_addr);
127 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
128 pa += vm_start - vma->vm_start;
129 @@ -1891,10 +1938,13 @@ int kvm_arch_prepare_memory_region(struc
133 + pte = get_locked_pte(current->mm, mem->userspace_addr, &ptl);
134 + prot = stage1_to_stage2_pgprot(__pgprot(pte_val(*pte)));
135 + pte_unmap_unlock(pte, ptl);
137 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
144 --- a/arch/arm64/include/asm/kvm_mmu.h
145 +++ b/arch/arm64/include/asm/kvm_mmu.h
146 @@ -167,7 +167,8 @@ void stage2_unmap_vm(struct kvm *kvm);
147 int kvm_alloc_stage2_pgd(struct kvm *kvm);
148 void kvm_free_stage2_pgd(struct kvm *kvm);
149 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
150 - phys_addr_t pa, unsigned long size, bool writable);
151 + phys_addr_t pa, unsigned long size, bool writable,
154 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
156 @@ -274,8 +275,15 @@ static inline void __coherent_cache_gues
158 static inline void __kvm_flush_dcache_pte(pte_t pte)
160 - struct page *page = pte_page(pte);
161 - kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
162 + if (pfn_valid(pte_pfn(pte))) {
163 + struct page *page = pte_page(pte);
164 + kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
166 + void __iomem *va = ioremap_cache_ns(pte_pfn(pte) << PAGE_SHIFT, PAGE_SIZE);
168 + kvm_flush_dcache_to_poc(va, PAGE_SIZE);
173 static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
174 --- a/virt/kvm/arm/vgic/vgic-its.c
175 +++ b/virt/kvm/arm/vgic/vgic-its.c
176 @@ -176,6 +176,8 @@ static struct its_itte *find_itte(struct
178 #define GIC_LPI_OFFSET 8192
180 +#define VITS_TYPER_DEVBITS 17
183 * Finds and returns a collection in the ITS collection table.
184 * Must be called with the its_lock mutex held.
185 @@ -375,7 +377,7 @@ static unsigned long vgic_mmio_read_its_
186 * To avoid memory waste in the guest, we keep the number of IDBits and
187 * DevBits low - as least for the time being.
189 - reg |= 0x0f << GITS_TYPER_DEVBITS_SHIFT;
190 + reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
191 reg |= 0x0f << GITS_TYPER_IDBITS_SHIFT;
193 return extract_bytes(reg, addr & 7, len);
194 @@ -601,16 +603,30 @@ static int vgic_its_cmd_handle_movi(stru
195 * Check whether an ID can be stored into the corresponding guest table.
196 * For a direct table this is pretty easy, but gets a bit nasty for
197 * indirect tables. We check whether the resulting guest physical address
198 - * is actually valid (covered by a memslot and guest accessbible).
199 + * is actually valid (covered by a memslot and guest accessible).
200 * For this we have to read the respective first level entry.
202 -static bool vgic_its_check_id(struct vgic_its *its, u64 baser, int id)
203 +static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id)
205 int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
206 + u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
212 + case GITS_BASER_TYPE_DEVICE:
213 + if (id >= BIT_ULL(VITS_TYPER_DEVBITS))
216 + case GITS_BASER_TYPE_COLLECTION:
217 + /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
218 + if (id >= BIT_ULL(16))
225 if (!(baser & GITS_BASER_INDIRECT)) {
228 --- a/virt/kvm/arm/vgic/vgic-v2.c
229 +++ b/virt/kvm/arm/vgic/vgic-v2.c
230 @@ -290,7 +290,8 @@ int vgic_v2_map_resources(struct kvm *kv
231 if (!static_branch_unlikely(&vgic_v2_cpuif_trap)) {
232 ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base,
233 kvm_vgic_global_state.vcpu_base,
234 - KVM_VGIC_V2_CPU_SIZE, true);
235 + KVM_VGIC_V2_CPU_SIZE, true,
238 kvm_err("Unable to remap VGIC CPU to VCPU\n");