1 From c918c472546afa83a619ae3cb1a9d7d346c6e288 Mon Sep 17 00:00:00 2001
2 From: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
3 Date: Wed, 29 Nov 2017 15:27:57 +0530
4 Subject: [PATCH 154/173] phy: Add 2.5G SGMII interface mode
6 Add 2.5G SGMII interface mode(PHY_INTERFACE_MODE_2500SGMII)
7 in existing phy_interface list
9 Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
11 include/linux/phy.h | 3 +++
12 1 file changed, 3 insertions(+)
14 --- a/drivers/net/phy/phy-core.c
15 +++ b/drivers/net/phy/phy-core.c
16 @@ -136,6 +136,7 @@ int phy_interface_num_ports(phy_interfac
17 case PHY_INTERFACE_MODE_RXAUI:
18 case PHY_INTERFACE_MODE_XAUI:
19 case PHY_INTERFACE_MODE_1000BASEKX:
20 + case PHY_INTERFACE_MODE_2500SGMII:
22 case PHY_INTERFACE_MODE_QSGMII:
23 case PHY_INTERFACE_MODE_QUSGMII:
24 --- a/drivers/net/phy/phylink.c
25 +++ b/drivers/net/phy/phylink.c
26 @@ -400,6 +400,7 @@ void phylink_get_linkmodes(unsigned long
30 + case PHY_INTERFACE_MODE_2500SGMII:
31 case PHY_INTERFACE_MODE_2500BASEX:
34 @@ -654,6 +655,10 @@ static int phylink_parse_mode(struct phy
35 phylink_set(pl->supported, 2500baseX_Full);
38 + case PHY_INTERFACE_MODE_2500SGMII:
39 + phylink_set(pl->supported, 2500baseT_Full);
42 case PHY_INTERFACE_MODE_5GBASER:
43 phylink_set(pl->supported, 5000baseT_Full);
45 --- a/include/linux/phy.h
46 +++ b/include/linux/phy.h
47 @@ -157,6 +157,7 @@ typedef enum {
48 PHY_INTERFACE_MODE_10GKR,
49 PHY_INTERFACE_MODE_QUSGMII,
50 PHY_INTERFACE_MODE_1000BASEKX,
51 + PHY_INTERFACE_MODE_2500SGMII,
52 PHY_INTERFACE_MODE_MAX,
55 @@ -276,6 +277,8 @@ static inline const char *phy_modes(phy_
57 case PHY_INTERFACE_MODE_QUSGMII:
59 + case PHY_INTERFACE_MODE_2500SGMII:
60 + return "sgmii-2500";