target/linux/layerscape/patches-5.4/701-net-0278-enetc-export-enetc_mdio-definitionns-to-include-linu.patch

   1 From 210fde07cd9e3f2dc826f538ccec4e90b54eb7e5 Mon Sep 17 00:00:00 2001
   2 From: Vladimir Oltean <vladimir.oltean@nxp.com>
   3 Date: Fri, 22 Nov 2019 17:47:56 +0200
   4 Subject: [PATCH] enetc: export enetc_mdio definitionns to include/linux/fsl
   5
   6 The Felix DSA switch has an internal MDIO bus that has the same register
   7 map as the ENETC one, so the accessors can be reused.
   8
   9 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
  10 ---
  11  drivers/net/ethernet/freescale/enetc/enetc_mdio.c  | 18 +++++++++-
  12  drivers/net/ethernet/freescale/enetc/enetc_mdio.h  | 12 -------
  13  .../net/ethernet/freescale/enetc/enetc_pci_mdio.c  | 41 +++++++++++++---------
  14  include/linux/fsl/enetc_mdio.h                     | 21 +++++++++++
  15  4 files changed, 62 insertions(+), 30 deletions(-)
  16  delete mode 100644 drivers/net/ethernet/freescale/enetc/enetc_mdio.h
  17  create mode 100644 include/linux/fsl/enetc_mdio.h
  18
  19 --- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
  20 +++ b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
  21 @@ -1,13 +1,13 @@
  22  // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  23  /* Copyright 2019 NXP */
  24
  25 +#include <linux/fsl/enetc_mdio.h>
  26  #include <linux/mdio.h>
  27  #include <linux/of_mdio.h>
  28  #include <linux/iopoll.h>
  29  #include <linux/of.h>
  30
  31  #include "enetc_pf.h"
  32 -#include "enetc_mdio.h"
  33
  34  #define        ENETC_MDIO_CFG  0x0     /* MDIO configuration and status */
  35  #define        ENETC_MDIO_CTL  0x4     /* MDIO control */
  36 @@ -99,6 +99,7 @@ int enetc_mdio_write(struct mii_bus *bus
  37
  38         return 0;
  39  }
  40 +EXPORT_SYMBOL_GPL(enetc_mdio_write);
  41
  42  int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
  43  {
  44 @@ -154,6 +155,21 @@ int enetc_mdio_read(struct mii_bus *bus,
  45
  46         return value;
  47  }
  48 +EXPORT_SYMBOL_GPL(enetc_mdio_read);
  49 +
  50 +struct enetc_hw *enetc_hw_alloc(struct device *dev, void __iomem *port_regs)
  51 +{
  52 +       struct enetc_hw *hw;
  53 +
  54 +       hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
  55 +       if (!hw)
  56 +               return ERR_PTR(-ENOMEM);
  57 +
  58 +       hw->port = port_regs;
  59 +
  60 +       return hw;
  61 +}
  62 +EXPORT_SYMBOL_GPL(enetc_hw_alloc);
  63
  64  int enetc_mdio_probe(struct enetc_pf *pf)
  65  {
  66 --- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.h
  67 +++ /dev/null
  68 @@ -1,12 +0,0 @@
  69 -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
  70 -/* Copyright 2019 NXP */
  71 -
  72 -#include <linux/phy.h>
  73 -
  74 -struct enetc_mdio_priv {
  75 -       struct enetc_hw *hw;
  76 -       int mdio_base;
  77 -};
  78 -
  79 -int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value);
  80 -int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum);
  81 --- a/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c
  82 +++ b/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c
  83 @@ -1,8 +1,8 @@
  84  // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  85  /* Copyright 2019 NXP */
  86 +#include <linux/fsl/enetc_mdio.h>
  87  #include <linux/of_mdio.h>
  88  #include "enetc_pf.h"
  89 -#include "enetc_mdio.h"
  90
  91  #define ENETC_MDIO_DEV_ID      0xee01
  92  #define ENETC_MDIO_DEV_NAME    "FSL PCIe IE Central MDIO"
  93 @@ -14,17 +14,29 @@ static int enetc_pci_mdio_probe(struct p
  94  {
  95         struct enetc_mdio_priv *mdio_priv;
  96         struct device *dev = &pdev->dev;
  97 +       void __iomem *port_regs;
  98         struct enetc_hw *hw;
  99         struct mii_bus *bus;
 100         int err;
 101
 102 -       hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
 103 -       if (!hw)
 104 -               return -ENOMEM;
 105 +       port_regs = pci_iomap(pdev, 0, 0);
 106 +       if (!port_regs) {
 107 +               dev_err(dev, "iomap failed\n");
 108 +               err = -ENXIO;
 109 +               goto err_ioremap;
 110 +       }
 111 +
 112 +       hw = enetc_hw_alloc(dev, port_regs);
 113 +       if (IS_ERR(enetc_hw_alloc)) {
 114 +               err = PTR_ERR(hw);
 115 +               goto err_hw_alloc;
 116 +       }
 117
 118         bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));
 119 -       if (!bus)
 120 -               return -ENOMEM;
 121 +       if (!bus) {
 122 +               err = -ENOMEM;
 123 +               goto err_mdiobus_alloc;
 124 +       }
 125
 126         bus->name = ENETC_MDIO_BUS_NAME;
 127         bus->read = enetc_mdio_read;
 128 @@ -39,7 +51,7 @@ static int enetc_pci_mdio_probe(struct p
 129         err = pci_enable_device_mem(pdev);
 130         if (err) {
 131                 dev_err(dev, "device enable failed\n");
 132 -               return err;
 133 +               goto err_pci_enable;
 134         }
 135
 136         err = pci_request_region(pdev, 0, KBUILD_MODNAME);
 137 @@ -48,13 +60,6 @@ static int enetc_pci_mdio_probe(struct p
 138                 goto err_pci_mem_reg;
 139         }
 140
 141 -       hw->port = pci_iomap(pdev, 0, 0);
 142 -       if (!hw->port) {
 143 -               err = -ENXIO;
 144 -               dev_err(dev, "iomap failed\n");
 145 -               goto err_ioremap;
 146 -       }
 147 -
 148         err = of_mdiobus_register(bus, dev->of_node);
 149         if (err)
 150                 goto err_mdiobus_reg;
 151 @@ -64,12 +69,14 @@ static int enetc_pci_mdio_probe(struct p
 152         return 0;
 153
 154  err_mdiobus_reg:
 155 -       iounmap(mdio_priv->hw->port);
 156 -err_ioremap:
 157         pci_release_mem_regions(pdev);
 158  err_pci_mem_reg:
 159         pci_disable_device(pdev);
 160 -
 161 +err_pci_enable:
 162 +err_mdiobus_alloc:
 163 +       iounmap(port_regs);
 164 +err_hw_alloc:
 165 +err_ioremap:
 166         return err;
 167  }
 168
 169 --- /dev/null
 170 +++ b/include/linux/fsl/enetc_mdio.h
 171 @@ -0,0 +1,21 @@
 172 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
 173 +/* Copyright 2019 NXP */
 174 +
 175 +#include <linux/phy.h>
 176 +
 177 +/* PCS registers */
 178 +#define ENETC_PCS_LINK_TIMER1          0x12
 179 +#define ENETC_PCS_LINK_TIMER1_VAL      0x06a0
 180 +#define ENETC_PCS_LINK_TIMER2          0x13
 181 +#define ENETC_PCS_LINK_TIMER2_VAL      0x0003
 182 +#define ENETC_PCS_IF_MODE              0x14
 183 +#define ENETC_PCS_IF_MODE_SGMII_AN     0x0003
 184 +
 185 +struct enetc_mdio_priv {
 186 +       struct enetc_hw *hw;
 187 +       int mdio_base;
 188 +};
 189 +
 190 +int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value);
 191 +int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum);
 192 +struct enetc_hw *enetc_hw_alloc(struct device *dev, void __iomem *port_regs);