kernel: bump 5.4 to 5.4.153
[openwrt/staging/chunkeey.git] / target / linux / layerscape / patches-5.4 / 701-net-0309-staging-fsl_ppfe-enable-hif-event-from-userspace.patch
1 From 0c072b46ecc8689be160bfdc750e95ad9879d706 Mon Sep 17 00:00:00 2001
2 From: Akhil Goyal <akhil.goyal@nxp.com>
3 Date: Thu, 5 Jul 2018 20:14:21 +0530
4 Subject: [PATCH] staging: fsl_ppfe: enable hif event from userspace
5
6 HIF interrupts are enabled using ioctl from user space,
7 and epoll wait from user space wakes up when there is an HIF
8 interrupt.
9
10 Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
11 ---
12 drivers/staging/fsl_ppfe/pfe_cdev.c | 57 +++++++++++++++++++++++++++++++++++++
13 drivers/staging/fsl_ppfe/pfe_cdev.h | 5 ++--
14 2 files changed, 60 insertions(+), 2 deletions(-)
15
16 --- a/drivers/staging/fsl_ppfe/pfe_cdev.c
17 +++ b/drivers/staging/fsl_ppfe/pfe_cdev.c
18 @@ -20,11 +20,18 @@
19 * - used for interacting with the kernel layer for link status
20 */
21
22 +#include <linux/eventfd.h>
23 +#include <linux/irqreturn.h>
24 +#include <linux/io.h>
25 +#include <asm/irq.h>
26 +
27 #include "pfe_cdev.h"
28 +#include "pfe_mod.h"
29
30 static int pfe_majno;
31 static struct class *pfe_char_class;
32 static struct device *pfe_char_dev;
33 +struct eventfd_ctx *g_trigger;
34
35 struct pfe_shared_info link_states[PFE_CDEV_ETH_COUNT];
36
37 @@ -80,10 +87,44 @@ static ssize_t pfe_cdev_write(struct fil
38
39 static int pfe_cdev_release(struct inode *inp, struct file *fp)
40 {
41 + if (g_trigger) {
42 + free_irq(pfe->hif_irq, g_trigger);
43 + eventfd_ctx_put(g_trigger);
44 + g_trigger = NULL;
45 + }
46 +
47 pr_info("PFE_CDEV: Device successfully closed\n");
48 return 0;
49 }
50
51 +/*
52 + * hif_us_isr-
53 + * This ISR routine processes Rx/Tx done interrupts from the HIF hardware block
54 + */
55 +static irqreturn_t hif_us_isr(int irq, void *arg)
56 +{
57 + struct eventfd_ctx *trigger = (struct eventfd_ctx *)arg;
58 + int int_status;
59 + int int_enable_mask;
60 +
61 + /*Read hif interrupt source register */
62 + int_status = readl_relaxed(HIF_INT_SRC);
63 + int_enable_mask = readl_relaxed(HIF_INT_ENABLE);
64 +
65 + if ((int_status & HIF_INT) == 0)
66 + return IRQ_NONE;
67 +
68 + if (int_status & HIF_RXPKT_INT) {
69 + int_enable_mask &= ~(HIF_RXPKT_INT);
70 + eventfd_signal(trigger, 1);
71 + }
72 +
73 + /*Disable interrupts, they will be enabled after they are serviced */
74 + writel_relaxed(int_enable_mask, HIF_INT_ENABLE);
75 +
76 + return IRQ_HANDLED;
77 +}
78 +
79 static long pfe_cdev_ioctl(struct file *fp, unsigned int cmd,
80 unsigned long arg)
81 {
82 @@ -105,6 +146,22 @@ static long pfe_cdev_ioctl(struct file *
83 pr_debug("Returning state=%d for ETH1\n", *argp);
84 ret = 0;
85 break;
86 + case PFE_CDEV_HIF_INTR_EN:
87 + /* Return success/failure */
88 + g_trigger = eventfd_ctx_fdget(*argp);
89 + if (IS_ERR(g_trigger))
90 + return PTR_ERR(g_trigger);
91 + ret = request_irq(pfe->hif_irq, hif_us_isr, 0, "pfe_hif",
92 + g_trigger);
93 + if (ret) {
94 + pr_err("%s: failed to get the hif IRQ = %d\n",
95 + __func__, pfe->hif_irq);
96 + eventfd_ctx_put(g_trigger);
97 + g_trigger = NULL;
98 + }
99 + pr_debug("request_irq for hif interrupt: %d\n", pfe->hif_irq);
100 + ret = 0;
101 + break;
102 default:
103 pr_info("Unsupport cmd (%d) for PFE CDEV.\n", cmd);
104 break;
105 --- a/drivers/staging/fsl_ppfe/pfe_cdev.h
106 +++ b/drivers/staging/fsl_ppfe/pfe_cdev.h
107 @@ -43,8 +43,9 @@ struct pfe_shared_info {
108 extern struct pfe_shared_info link_states[PFE_CDEV_ETH_COUNT];
109
110 /* IOCTL Commands */
111 -#define PFE_CDEV_ETH0_STATE_GET 0
112 -#define PFE_CDEV_ETH1_STATE_GET 1
113 +#define PFE_CDEV_ETH0_STATE_GET _IOR('R', 0, int)
114 +#define PFE_CDEV_ETH1_STATE_GET _IOR('R', 1, int)
115 +#define PFE_CDEV_HIF_INTR_EN _IOWR('R', 2, int)
116
117 int pfe_cdev_init(void);
118 void pfe_cdev_exit(void);