target/linux/layerscape/patches-5.4/701-net-0372-Revert-enetc-Set-MDIO_CFG_HOLD-to-the-recommended-va.patch

   1 From d93ca8d9c8365cf533f88582c57c83cb50fe598a Mon Sep 17 00:00:00 2001
   2 From: Vladimir Oltean <vladimir.oltean@nxp.com>
   3 Date: Mon, 6 Jan 2020 14:31:13 +0200
   4 Subject: [PATCH] Revert "enetc: Set MDIO_CFG_HOLD to the recommended value of
   5  2"
   6
   7 This reverts commit 3f643e4af035886cd2ca4bf79967098cfe55b40b.
   8
   9 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
  10 ---
  11  drivers/net/ethernet/freescale/enetc/enetc_mdio.c | 12 ++++--------
  12  1 file changed, 4 insertions(+), 8 deletions(-)
  13
  14 --- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
  15 +++ b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
  16 @@ -31,19 +31,15 @@ static inline void _enetc_mdio_wr(struct
  17         _enetc_mdio_wr(mdio_priv, ENETC_##off, val)
  18  #define enetc_mdio_rd_reg(off) enetc_mdio_rd(mdio_priv, off)
  19
  20 +#define ENETC_MDC_DIV          258
  21 +
  22  #define MDIO_CFG_CLKDIV(x)     ((((x) >> 1) & 0xff) << 8)
  23  #define MDIO_CFG_BSY           BIT(0)
  24  #define MDIO_CFG_RD_ER         BIT(1)
  25 -#define MDIO_CFG_HOLD(x)       (((x) << 2) & GENMASK(4, 2))
  26  #define MDIO_CFG_ENC45         BIT(6)
  27   /* external MDIO only - driven on neg MDC edge */
  28  #define MDIO_CFG_NEG           BIT(23)
  29
  30 -#define ENETC_EMDIO_CFG \
  31 -       (MDIO_CFG_HOLD(2) | \
  32 -        MDIO_CFG_CLKDIV(258) | \
  33 -        MDIO_CFG_NEG)
  34 -
  35  #define MDIO_CTL_DEV_ADDR(x)   ((x) & 0x1f)
  36  #define MDIO_CTL_PORT_ADDR(x)  (((x) & 0x1f) << 5)
  37  #define MDIO_CTL_READ          BIT(15)
  38 @@ -65,7 +61,7 @@ int enetc_mdio_write(struct mii_bus *bus
  39         u16 dev_addr;
  40         int ret;
  41
  42 -       mdio_cfg = ENETC_EMDIO_CFG;
  43 +       mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG;
  44         if (regnum & MII_ADDR_C45) {
  45                 dev_addr = (regnum >> 16) & 0x1f;
  46                 mdio_cfg |= MDIO_CFG_ENC45;
  47 @@ -112,7 +108,7 @@ int enetc_mdio_read(struct mii_bus *bus,
  48         u16 dev_addr, value;
  49         int ret;
  50
  51 -       mdio_cfg = ENETC_EMDIO_CFG;
  52 +       mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG;
  53         if (regnum & MII_ADDR_C45) {
  54                 dev_addr = (regnum >> 16) & 0x1f;
  55                 mdio_cfg |= MDIO_CFG_ENC45;