2 * Moschip MCS814x generic interrupt controller routines
4 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
6 * Licensed under the GPLv2
8 #include <linux/init.h>
12 #include <linux/of_address.h>
13 #include <linux/irqdomain.h>
15 #include <asm/exception.h>
16 #include <asm/mach/irq.h>
18 #define MCS814X_IRQ_ICR 0x00
19 #define MCS814X_IRQ_ISR 0x04
20 #define MCS814X_IRQ_MASK 0x20
21 #define MCS814X_IRQ_STS0 0x40
23 void __iomem
*mcs814x_intc_base
;
25 static void __init
mcs814x_alloc_gc(void __iomem
*base
, unsigned int irq_start
,
28 struct irq_chip_generic
*gc
;
29 struct irq_chip_type
*ct
;
31 gc
= irq_alloc_generic_chip("mcs814x-intc", 1,
32 irq_start
, base
, handle_level_irq
);
34 panic("unable to allocate generic irq chip");
37 ct
->chip
.irq_ack
= irq_gc_unmask_enable_reg
;
38 ct
->chip
.irq_mask
= irq_gc_mask_clr_bit
;
39 ct
->chip
.irq_unmask
= irq_gc_mask_set_bit
;
40 ct
->regs
.mask
= MCS814X_IRQ_MASK
;
41 ct
->regs
.enable
= MCS814X_IRQ_ICR
;
43 irq_setup_generic_chip(gc
, IRQ_MSK(num
), IRQ_GC_INIT_MASK_CACHE
,
46 /* Clear all interrupts */
47 __raw_writel(0xffffffff, base
+ MCS814X_IRQ_ICR
);
50 static const struct of_device_id mcs814x_intc_ids
[] = {
51 { .compatible
= "moschip,mcs814x-intc" },
55 void __init
mcs814x_of_irq_init(void)
57 struct device_node
*np
;
59 np
= of_find_matching_node(NULL
, mcs814x_intc_ids
);
61 panic("unable to find compatible intc node in dtb\n");
63 mcs814x_intc_base
= of_iomap(np
, 0);
64 if (!mcs814x_intc_base
)
65 panic("unable to map intc cpu registers\n");
67 irq_domain_add_simple(np
, 0);
71 mcs814x_alloc_gc(mcs814x_intc_base
, 0, 32);