2 * Moschip MCS8140 Ethernet MAC driver
4 * Copyright (C) 2003, Moschip Semiconductors
5 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
9 #include <linux/module.h>
10 #include <linux/slab.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/ethtool.h>
17 #include <linux/mii.h>
19 #include <linux/interrupt.h>
20 #include <linux/platform_device.h>
22 #include <linux/irq.h>
23 #include <linux/err.h>
24 #include <linux/phy.h>
25 #include <linux/clk.h>
26 #include <linux/dma-mapping.h>
28 #include <asm/unaligned.h>
29 #include <asm/sizes.h>
31 /* Hardware registers */
32 #define MAC_BASE_ADDR ((priv->mac_base))
34 #define CTRL_REG (MAC_BASE_ADDR)
35 #define MII_BUSY (1 << 0)
36 #define MII_WRITE (1 << 1)
37 #define RX_ENABLE (1 << 2)
38 #define TX_ENABLE (1 << 3)
39 #define DEFER_CHECK (1 << 5)
40 #define STRIP_PAD (1 << 8)
41 #define DRTRY_DISABLE (1 << 10)
42 #define FULL_DUPLEX (1 << 20)
43 #define HBD_DISABLE (1 << 28)
44 #define MAC_ADDR_HIGH_REG (MAC_BASE_ADDR + 0x04)
45 #define MAC_ADDR_LOW_REG (MAC_BASE_ADDR + 0x08)
46 #define MII_ADDR_REG (MAC_BASE_ADDR + 0x14)
47 #define MII_ADDR_SHIFT (11)
48 #define MII_REG_SHIFT (6)
49 #define MII_DATA_REG (MAC_BASE_ADDR + 0x18)
50 /* Link interrupt registers */
51 #define LINK_INT_CSR (MAC_BASE_ADDR + 0xD0)
52 #define LINK_INT_EN (1 << 0)
53 #define LINK_PHY_ADDR_SHIFT (1)
54 #define LINK_PHY_REG_SHIFT (6)
55 #define LINK_BIT_UP_SHIFT (11)
56 #define LINK_UP (1 << 16)
57 #define LINK_INT_POLL_TIME (MAC_BASE_ADDR + 0xD4)
58 #define LINK_POLL_MASK ((1 << 20) - 1)
60 #define DMA_CHAN_WIDTH 32
64 /* Receive DMA registers */
65 #define RX_DMA_BASE ((priv->dma_base) + \
66 (DMA_CHAN_WIDTH * DMA_RX_CHAN))
67 #define RX_BUFFER_ADDR (RX_DMA_BASE + 0x00)
68 #define RX_MAX_BYTES (RX_DMA_BASE + 0x04)
69 #define RX_ACT_BYTES (RX_DMA_BASE + 0x08)
70 #define RX_START_DMA (RX_DMA_BASE + 0x0C)
71 #define RX_DMA_ENABLE (1 << 0)
72 #define RX_DMA_RESET (1 << 1)
73 #define RX_DMA_STATUS_FIFO (1 << 12)
74 #define RX_DMA_ENH (RX_DMA_BASE + 0x14)
75 #define RX_DMA_INT_ENABLE (1 << 1)
77 /* Transmit DMA registers */
78 #define TX_DMA_BASE ((priv->dma_base) + \
79 (DMA_CHAN_WIDTH * DMA_TX_CHAN))
80 #define TX_BUFFER_ADDR (TX_DMA_BASE + 0x00)
81 #define TX_PKT_BYTES (TX_DMA_BASE + 0x04)
82 #define TX_BYTES_SENT (TX_DMA_BASE + 0x08)
83 #define TX_START_DMA (TX_DMA_BASE + 0x0C)
84 #define TX_DMA_ENABLE (1 << 0)
85 #define TX_DMA_START_FRAME (1 << 2)
86 #define TX_DMA_END_FRAME (1 << 3)
87 #define TX_DMA_PAD_DISABLE (1 << 8)
88 #define TX_DMA_CRC_DISABLE (1 << 9)
89 #define TX_DMA_FIFO_FULL (1 << 16)
90 #define TX_DMA_FIFO_EMPTY (1 << 17)
91 #define TX_DMA_STATUS_AVAIL (1 << 18)
92 #define TX_DMA_RESET (1 << 24)
93 #define TX_DMA_STATUS (TX_DMA_BASE + 0x10)
94 #define TX_DMA_ENH (TX_DMA_BASE + 0x14)
95 #define TX_DMA_ENH_ENABLE (1 << 0)
96 #define TX_DMA_INT_FIFO (1 << 1)
98 #define RX_ALLOC_SIZE SZ_2K
99 #define MAX_ETH_FRAME_SIZE 1536
100 #define RX_SKB_TAILROOM 128
101 #define RX_SKB_HEADROOM (RX_ALLOC_SIZE - \
102 (MAX_ETH_FRAME_SIZE + RX_SKB_TAILROOM) + 0)
104 /* WDT Late COL Lenght COL Type */
105 #define ERROR_FILTER_MASK ((1<<14) | (1<<15) | (1<<16) | (1<<17) | (0<<18) | \
106 /* MII Dribbling CRC Len/type Control */\
107 (1<<19) | (1<<20) | (1<<21) | (0<<24) | (1<<25) | \
110 #define TX_RING_SIZE 30
111 #define RX_RING_SIZE 30
113 static inline u32
nuport_mac_readl(void __iomem
*reg
)
115 return __raw_readl(reg
);
118 static inline u8
nuport_mac_readb(void __iomem
*reg
)
120 return __raw_readb(reg
);
123 static inline void nuport_mac_writel(u32 value
, void __iomem
*reg
)
125 __raw_writel(value
, reg
);
128 static inline void nuport_mac_writeb(u8 value
, void __iomem
*reg
)
130 __raw_writel(value
, reg
);
133 /* MAC private data */
134 struct nuport_mac_priv
{
137 void __iomem
*mac_base
;
138 void __iomem
*dma_base
;
143 struct clk
*emac_clk
;
144 struct clk
*ephy_clk
;
146 /* Transmit buffers */
147 struct sk_buff
*tx_skb
[TX_RING_SIZE
];
148 unsigned int valid_txskb
[TX_RING_SIZE
];
151 unsigned int tx_full
;
153 /* Receive buffers */
154 struct sk_buff
*rx_skb
[RX_RING_SIZE
];
155 unsigned int irq_rxskb
[RX_RING_SIZE
];
156 int pkt_len
[RX_RING_SIZE
];
159 unsigned int rx_full
;
161 unsigned int first_pkt
;
164 struct napi_struct napi
;
165 struct net_device
*dev
;
166 struct platform_device
*pdev
;
167 struct mii_bus
*mii_bus
;
168 struct phy_device
*phydev
;
172 unsigned int buffer_shifting_len
;
175 static inline int nuport_mac_mii_busy_wait(struct nuport_mac_priv
*priv
)
178 unsigned long finish
= jiffies
+ 3 * HZ
;
182 if (!(nuport_mac_readl(MII_ADDR_REG
) & MII_BUSY
))
185 } while (!time_after_eq(curr
, finish
));
190 /* Read from PHY registers */
191 static int nuport_mac_mii_read(struct mii_bus
*bus
,
192 int mii_id
, int regnum
)
194 struct net_device
*dev
= bus
->priv
;
195 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
199 ret
= nuport_mac_mii_busy_wait(priv
);
203 val
|= (mii_id
<< MII_ADDR_SHIFT
) | (regnum
<< MII_REG_SHIFT
) | MII_BUSY
;
204 nuport_mac_writel(val
, MII_ADDR_REG
);
205 ret
= nuport_mac_mii_busy_wait(priv
);
209 return nuport_mac_readl(MII_DATA_REG
);
212 static int nuport_mac_mii_write(struct mii_bus
*bus
, int mii_id
,
213 int regnum
, u16 value
)
215 struct net_device
*dev
= bus
->priv
;
216 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
220 ret
= nuport_mac_mii_busy_wait(priv
);
224 val
|= (mii_id
<< MII_ADDR_SHIFT
) | (regnum
<< MII_REG_SHIFT
);
225 val
|= MII_BUSY
| MII_WRITE
;
226 nuport_mac_writel(value
, MII_DATA_REG
);
227 nuport_mac_writel(val
, MII_ADDR_REG
);
229 return nuport_mac_mii_busy_wait(priv
);
232 static int nuport_mac_mii_reset(struct mii_bus
*bus
)
237 static int nuport_mac_start_tx_dma(struct nuport_mac_priv
*priv
,
242 unsigned int timeout
= 2048;
245 reg
= nuport_mac_readl(TX_START_DMA
);
246 if (!(reg
& TX_DMA_ENABLE
)) {
247 netdev_dbg(priv
->dev
, "dma ready\n");
256 p
= dma_map_single(&priv
->pdev
->dev
, skb
->data
,
257 skb
->len
, DMA_TO_DEVICE
);
259 /* enable enhanced mode */
260 nuport_mac_writel(TX_DMA_ENH_ENABLE
, TX_DMA_ENH
);
261 nuport_mac_writel(p
, TX_BUFFER_ADDR
);
262 nuport_mac_writel((skb
->len
) - 1, TX_PKT_BYTES
);
264 reg
= TX_DMA_ENABLE
| TX_DMA_START_FRAME
| TX_DMA_END_FRAME
;
265 nuport_mac_writel(reg
, TX_START_DMA
);
270 static void nuport_mac_reset_tx_dma(struct nuport_mac_priv
*priv
)
274 reg
= nuport_mac_readl(TX_START_DMA
);
276 nuport_mac_writel(reg
, TX_START_DMA
);
279 static int nuport_mac_start_rx_dma(struct nuport_mac_priv
*priv
,
284 unsigned int timeout
= 2048;
287 reg
= nuport_mac_readl(RX_START_DMA
);
288 if (!(reg
& RX_DMA_ENABLE
)) {
289 netdev_dbg(priv
->dev
, "dma ready\n");
298 p
= dma_map_single(&priv
->pdev
->dev
, skb
->data
,
299 RX_ALLOC_SIZE
, DMA_FROM_DEVICE
);
301 nuport_mac_writel(p
, RX_BUFFER_ADDR
);
303 nuport_mac_writel(RX_DMA_ENABLE
, RX_START_DMA
);
308 static void nuport_mac_reset_rx_dma(struct nuport_mac_priv
*priv
)
312 reg
= nuport_mac_readl(RX_START_DMA
);
314 nuport_mac_writel(reg
, RX_START_DMA
);
317 /* I suppose this might do something, but I am not sure actually */
318 static void nuport_mac_disable_rx_dma(struct nuport_mac_priv
*priv
)
322 reg
= nuport_mac_readl(RX_DMA_ENH
);
323 reg
&= ~RX_DMA_INT_ENABLE
;
324 nuport_mac_writel(reg
, RX_DMA_ENH
);
327 static void nuport_mac_enable_rx_dma(struct nuport_mac_priv
*priv
)
331 reg
= nuport_mac_readl(RX_DMA_ENH
);
332 reg
|= RX_DMA_INT_ENABLE
;
333 nuport_mac_writel(reg
, RX_DMA_ENH
);
336 /* Add packets to the transmit queue */
337 static int nuport_mac_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
340 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
343 if (netif_queue_stopped(dev
)) {
344 netdev_warn(dev
, "netif queue was stopped, restarting\n");
345 netif_start_queue(dev
);
348 spin_lock_irqsave(&priv
->lock
, flags
);
349 if (priv
->first_pkt
) {
350 ret
= nuport_mac_start_tx_dma(priv
, skb
);
352 netif_stop_queue(dev
);
353 spin_unlock_irqrestore(&priv
->lock
, flags
);
354 netdev_err(dev
, "transmit path busy\n");
355 return NETDEV_TX_BUSY
;
360 priv
->tx_skb
[priv
->cur_tx
] = skb
;
361 dev
->stats
.tx_bytes
+= skb
->len
;
362 dev
->stats
.tx_packets
++;
363 priv
->valid_txskb
[priv
->cur_tx
] = 1;
365 dev
->trans_start
= jiffies
;
367 if (priv
->cur_tx
>= TX_RING_SIZE
)
370 spin_unlock_irqrestore(&priv
->lock
, flags
);
372 if (priv
->valid_txskb
[priv
->cur_tx
]) {
374 netdev_err(dev
, "stopping queue\n");
375 netif_stop_queue(dev
);
381 static void nuport_mac_adjust_link(struct net_device
*dev
)
383 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
384 struct phy_device
*phydev
= priv
->phydev
;
385 unsigned int status_changed
= 0;
390 if (priv
->old_link
!= phydev
->link
) {
392 priv
->old_link
= phydev
->link
;
395 if (phydev
->link
& (priv
->old_duplex
!= phydev
->duplex
)) {
396 reg
= nuport_mac_readl(CTRL_REG
);
397 if (phydev
->duplex
== DUPLEX_FULL
)
401 nuport_mac_writel(reg
, CTRL_REG
);
404 priv
->old_duplex
= phydev
->duplex
;
410 pr_info("%s: link %s", dev
->name
, phydev
->link
?
413 pr_cont(" - %d/%s", phydev
->speed
,
414 phydev
->duplex
== DUPLEX_FULL
? "full" : "half");
419 static irqreturn_t
nuport_mac_link_interrupt(int irq
, void *dev_id
)
421 struct net_device
*dev
= dev_id
;
422 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
426 reg
= nuport_mac_readl(LINK_INT_CSR
);
427 phy_addr
= (reg
>> LINK_PHY_ADDR_SHIFT
) & (PHY_MAX_ADDR
- 1);
429 if (phy_addr
!= priv
->phydev
->addr
) {
430 netdev_err(dev
, "spurious PHY irq (phy: %d)\n", phy_addr
);
434 priv
->phydev
->link
= (reg
& LINK_UP
);
435 nuport_mac_adjust_link(dev
);
440 static irqreturn_t
nuport_mac_tx_interrupt(int irq
, void *dev_id
)
442 struct net_device
*dev
= (struct net_device
*)dev_id
;
443 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
449 spin_lock_irqsave(&priv
->lock
, flags
);
450 /* clear status word available if ready */
451 reg
= nuport_mac_readl(TX_START_DMA
);
452 if (reg
& TX_DMA_STATUS_AVAIL
) {
453 nuport_mac_writel(reg
, TX_START_DMA
);
454 reg
= nuport_mac_readl(TX_DMA_STATUS
);
457 dev
->stats
.tx_errors
++;
459 netdev_dbg(dev
, "no status word: %08x\n", reg
);
461 skb
= priv
->tx_skb
[priv
->dma_tx
];
462 priv
->tx_skb
[priv
->dma_tx
] = NULL
;
463 priv
->valid_txskb
[priv
->dma_tx
] = 0;
464 dev_kfree_skb_irq(skb
);
467 if (priv
->dma_tx
>= TX_RING_SIZE
)
470 if (!priv
->valid_txskb
[priv
->dma_tx
])
473 ret
= nuport_mac_start_tx_dma(priv
, priv
->tx_skb
[priv
->dma_tx
]);
475 netdev_err(dev
, "failed to restart TX dma\n");
479 netdev_dbg(dev
, "restarting transmit queue\n");
480 netif_wake_queue(dev
);
484 spin_unlock_irqrestore(&priv
->lock
, flags
);
489 static unsigned int nuport_mac_has_work(struct nuport_mac_priv
*priv
)
493 for (i
= 0; i
< RX_RING_SIZE
; i
++)
500 static irqreturn_t
nuport_mac_rx_interrupt(int irq
, void *dev_id
)
502 struct net_device
*dev
= (struct net_device
*)dev_id
;
503 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
507 spin_lock_irqsave(&priv
->lock
, flags
);
508 if (!priv
->rx_full
) {
509 priv
->pkt_len
[priv
->dma_rx
] = nuport_mac_readl(RX_ACT_BYTES
) - 4;
510 priv
->irq_rxskb
[priv
->dma_rx
] = 0;
513 if (priv
->dma_rx
>= RX_RING_SIZE
)
518 if (priv
->irq_rxskb
[priv
->dma_rx
] == 1) {
519 ret
= nuport_mac_start_rx_dma(priv
, priv
->rx_skb
[priv
->dma_rx
]);
521 netdev_err(dev
, "failed to start rx dma\n");
524 netdev_dbg(dev
, "RX ring full\n");
527 if (likely(nuport_mac_has_work(priv
))) {
528 /* find a way to disable DMA rx irq */
529 nuport_mac_disable_rx_dma(priv
);
530 napi_schedule(&priv
->napi
);
532 spin_unlock_irqrestore(&priv
->lock
, flags
);
537 /* Process received packets in tasklet */
538 static int nuport_mac_rx(struct net_device
*dev
, int limit
)
540 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
545 while (count
< limit
&& !priv
->irq_rxskb
[priv
->cur_rx
]) {
546 skb
= priv
->rx_skb
[priv
->cur_rx
];
547 len
= priv
->pkt_len
[priv
->cur_rx
];
549 /* Remove 2 bytes added by RX buffer shifting */
550 len
= len
- priv
->buffer_shifting_len
;
551 skb
->data
= skb
->data
+ priv
->buffer_shifting_len
;
553 /* Get packet status */
554 status
= get_unaligned((u32
*) (skb
->data
+ len
));
557 /* packet filter failed */
558 if (!(status
& (1 << 30))) {
559 dev_kfree_skb_irq(skb
);
564 if (status
& (1 << 31)) {
565 dev
->stats
.rx_missed_errors
++;
566 dev_kfree_skb_irq(skb
);
570 /* Not ethernet type */
571 if ((!(status
& (1 << 18))) || (status
& ERROR_FILTER_MASK
))
572 dev
->stats
.rx_errors
++;
574 if (len
> MAX_ETH_FRAME_SIZE
) {
575 dev_kfree_skb_irq(skb
);
580 skb
->protocol
= eth_type_trans(skb
, dev
);
581 dev
->stats
.rx_packets
++;
583 if (status
& (1 << 29))
584 skb
->pkt_type
= PACKET_OTHERHOST
;
585 if (status
& (1 << 27))
586 skb
->pkt_type
= PACKET_MULTICAST
;
587 if (status
& (1 << 28))
588 skb
->pkt_type
= PACKET_BROADCAST
;
590 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
592 /* Pass the received packet to network layer */
593 status
= netif_receive_skb(skb
);
594 if (status
!= NET_RX_DROP
)
595 dev
->stats
.rx_bytes
+= len
- 4; /* Without CRC */
597 dev
->stats
.rx_dropped
++;
599 dev
->last_rx
= jiffies
;
602 skb
= netdev_alloc_skb(dev
, RX_ALLOC_SIZE
);
603 skb_reserve(skb
, RX_SKB_HEADROOM
);
604 priv
->rx_skb
[priv
->cur_rx
] = skb
;
605 priv
->irq_rxskb
[priv
->cur_rx
] = 1;
608 if (priv
->cur_rx
>= RX_RING_SIZE
)
616 static int nuport_mac_poll(struct napi_struct
*napi
, int budget
)
618 struct nuport_mac_priv
*priv
=
619 container_of(napi
, struct nuport_mac_priv
, napi
);
620 struct net_device
*dev
= priv
->dev
;
623 work_done
= nuport_mac_rx(dev
, budget
);
625 if (work_done
< budget
) {
627 nuport_mac_enable_rx_dma(priv
);
633 static void nuport_mac_init_tx_ring(struct nuport_mac_priv
*priv
)
637 priv
->cur_tx
= priv
->dma_tx
= priv
->tx_full
= 0;
638 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
639 priv
->tx_skb
[i
] = NULL
;
640 priv
->valid_txskb
[i
] = 0;
645 static int nuport_mac_init_rx_ring(struct net_device
*dev
)
647 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
651 priv
->cur_rx
= priv
->dma_rx
= priv
->rx_full
= 0;
653 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
654 skb
= netdev_alloc_skb(dev
, RX_ALLOC_SIZE
);
657 skb_reserve(skb
, RX_SKB_HEADROOM
);
658 priv
->rx_skb
[i
] = skb
;
659 priv
->irq_rxskb
[i
] = 1;
665 static void nuport_mac_free_rx_ring(struct nuport_mac_priv
*priv
)
669 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
670 if (!priv
->rx_skb
[i
])
673 dev_kfree_skb(priv
->rx_skb
[i
]);
674 priv
->rx_skb
[i
] = NULL
;
678 static void nuport_mac_read_mac_address(struct net_device
*dev
)
680 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
683 for (i
= 0; i
< 4; i
++)
684 dev
->dev_addr
[i
] = nuport_mac_readb(MAC_ADDR_LOW_REG
+ i
);
685 dev
->dev_addr
[4] = nuport_mac_readb(MAC_ADDR_HIGH_REG
);
686 dev
->dev_addr
[5] = nuport_mac_readb(MAC_ADDR_HIGH_REG
+ 1);
688 if (!is_valid_ether_addr(dev
->dev_addr
)) {
689 dev_info(&priv
->pdev
->dev
, "using random address\n");
690 random_ether_addr(dev
->dev_addr
);
694 static int nuport_mac_change_mac_address(struct net_device
*dev
, void *mac_addr
)
696 struct sockaddr
*addr
= mac_addr
;
697 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
698 unsigned long *temp
= (unsigned long *)dev
->dev_addr
;
701 if (netif_running(dev
))
704 memcpy(dev
->dev_addr
, addr
->sa_data
, ETH_ALEN
);
706 spin_lock_irq(&priv
->lock
);
708 nuport_mac_writel(*temp
, MAC_ADDR_LOW_REG
);
709 temp
= (unsigned long *)(dev
->dev_addr
+ 4);
710 nuport_mac_writel(*temp
, MAC_ADDR_HIGH_REG
);
712 low
= nuport_mac_readl(MAC_ADDR_LOW_REG
);
713 high
= nuport_mac_readl(MAC_ADDR_HIGH_REG
);
715 spin_unlock_irq(&priv
->lock
);
720 static int nuport_mac_open(struct net_device
*dev
)
723 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
727 ret
= clk_enable(priv
->emac_clk
);
729 netdev_err(dev
, "failed to enable EMAC clock\n");
733 /* Set MAC into full duplex mode by default */
734 reg
|= RX_ENABLE
| TX_ENABLE
;
735 reg
|= DEFER_CHECK
| STRIP_PAD
| DRTRY_DISABLE
;
736 reg
|= FULL_DUPLEX
| HBD_DISABLE
;
737 nuport_mac_writel(reg
, CTRL_REG
);
739 /* set mac address in hardware in case it was not already */
740 nuport_mac_change_mac_address(dev
, dev
->dev_addr
);
742 ret
= request_irq(priv
->link_irq
, &nuport_mac_link_interrupt
,
745 netdev_err(dev
, "unable to request link interrupt\n");
749 phy_start(priv
->phydev
);
751 /* Enable link interrupt monitoring for our PHY address */
752 reg
= LINK_INT_EN
| (priv
->phydev
->addr
<< LINK_PHY_ADDR_SHIFT
);
753 /* MII_BMSR register to be watched */
754 reg
|= (1 << LINK_PHY_REG_SHIFT
);
755 /* BMSR_STATUS to be watched in particular */
756 reg
|= (2 << LINK_BIT_UP_SHIFT
);
758 spin_lock_irqsave(&priv
->lock
, flags
);
759 nuport_mac_writel(reg
, LINK_INT_CSR
);
760 nuport_mac_writel(LINK_POLL_MASK
, LINK_INT_POLL_TIME
);
761 spin_unlock_irqrestore(&priv
->lock
, flags
);
763 ret
= request_irq(priv
->tx_irq
, &nuport_mac_tx_interrupt
,
766 netdev_err(dev
, "unable to request rx interrupt\n");
770 napi_enable(&priv
->napi
);
772 ret
= request_irq(priv
->rx_irq
, &nuport_mac_rx_interrupt
,
775 netdev_err(dev
, "unable to request tx interrupt\n");
779 netif_start_queue(dev
);
781 nuport_mac_init_tx_ring(priv
);
783 ret
= nuport_mac_init_rx_ring(dev
);
785 netdev_err(dev
, "rx ring init failed\n");
789 nuport_mac_reset_tx_dma(priv
);
790 nuport_mac_reset_rx_dma(priv
);
793 return nuport_mac_start_rx_dma(priv
, priv
->rx_skb
[0]);
796 nuport_mac_free_rx_ring(priv
);
797 free_irq(priv
->rx_irq
, dev
);
799 free_irq(priv
->tx_irq
, dev
);
801 free_irq(priv
->link_irq
, dev
);
803 clk_disable(priv
->emac_clk
);
807 static int nuport_mac_close(struct net_device
*dev
)
809 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
811 spin_lock_irq(&priv
->lock
);
812 napi_disable(&priv
->napi
);
813 netif_stop_queue(dev
);
815 free_irq(priv
->link_irq
, dev
);
816 /* disable PHY polling */
817 nuport_mac_writel(0, LINK_INT_CSR
);
818 nuport_mac_writel(0, LINK_INT_POLL_TIME
);
819 phy_stop(priv
->phydev
);
821 free_irq(priv
->tx_irq
, dev
);
822 free_irq(priv
->rx_irq
, dev
);
823 spin_unlock_irq(&priv
->lock
);
825 nuport_mac_free_rx_ring(priv
);
827 clk_disable(priv
->emac_clk
);
832 static void nuport_mac_tx_timeout(struct net_device
*dev
)
834 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
837 netdev_warn(dev
, "transmit timeout, attempting recovery\n");
839 netdev_info(dev
, "TX DMA regs\n");
840 for (i
= 0; i
< DMA_CHAN_WIDTH
; i
+= 4)
841 netdev_info(dev
, "[%02x]: 0x%08x\n", i
, nuport_mac_readl(TX_DMA_BASE
+ i
));
842 netdev_info(dev
, "RX DMA regs\n");
843 for (i
= 0; i
< DMA_CHAN_WIDTH
; i
+= 4)
844 netdev_info(dev
, "[%02x]: 0x%08x\n", i
, nuport_mac_readl(RX_DMA_BASE
+ i
));
846 nuport_mac_init_tx_ring(priv
);
847 nuport_mac_reset_tx_dma(priv
);
849 netif_wake_queue(dev
);
852 static int nuport_mac_mii_probe(struct net_device
*dev
)
854 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
855 struct phy_device
*phydev
= NULL
;
858 ret
= clk_enable(priv
->ephy_clk
);
860 netdev_err(dev
, "unable to enable ePHY clk\n");
864 phydev
= phy_find_first(priv
->mii_bus
);
866 netdev_err(dev
, "no PHYs found\n");
871 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
),
872 nuport_mac_adjust_link
, 0,
873 PHY_INTERFACE_MODE_MII
);
874 if (IS_ERR(phydev
)) {
875 netdev_err(dev
, "could not attach PHY\n");
876 ret
= PTR_ERR(phydev
);
880 phydev
->supported
&= PHY_BASIC_FEATURES
;
881 phydev
->advertising
= phydev
->supported
;
882 priv
->phydev
= phydev
;
884 priv
->old_duplex
= -1;
886 dev_info(&priv
->pdev
->dev
, "attached PHY driver [%s] "
887 "(mii_bus:phy_addr=%d)\n",
888 phydev
->drv
->name
, phydev
->addr
);
893 /* disable the Ethernet PHY clock for the moment */
894 clk_disable(priv
->ephy_clk
);
899 static void nuport_mac_ethtool_drvinfo(struct net_device
*dev
,
900 struct ethtool_drvinfo
*info
)
902 strncpy(info
->driver
, "nuport-mac", sizeof(info
->driver
));
903 strncpy(info
->version
, "0.1", sizeof(info
->version
));
904 strncpy(info
->fw_version
, "N/A", sizeof(info
->fw_version
));
905 strncpy(info
->bus_info
, "internal", sizeof(info
->bus_info
));
907 info
->testinfo_len
= 0;
908 info
->regdump_len
= 0;
909 info
->eedump_len
= 0;
912 static int nuport_mac_ethtool_get_settings(struct net_device
*dev
,
913 struct ethtool_cmd
*cmd
)
915 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
918 return phy_ethtool_gset(priv
->phydev
, cmd
);
923 static int nuport_mac_ethtool_set_settings(struct net_device
*dev
,
924 struct ethtool_cmd
*cmd
)
926 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
929 return phy_ethtool_sset(priv
->phydev
, cmd
);
934 static void nuport_mac_set_msglevel(struct net_device
*dev
, u32 msg_level
)
936 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
938 priv
->msg_level
= msg_level
;
941 static u32
nuport_mac_get_msglevel(struct net_device
*dev
)
943 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
945 return priv
->msg_level
;
948 static const struct ethtool_ops nuport_mac_ethtool_ops
= {
949 .get_drvinfo
= nuport_mac_ethtool_drvinfo
,
950 .get_link
= ethtool_op_get_link
,
951 .get_settings
= nuport_mac_ethtool_get_settings
,
952 .set_settings
= nuport_mac_ethtool_set_settings
,
953 .set_msglevel
= nuport_mac_set_msglevel
,
954 .get_msglevel
= nuport_mac_get_msglevel
,
957 static const struct net_device_ops nuport_mac_ops
= {
958 .ndo_open
= nuport_mac_open
,
959 .ndo_stop
= nuport_mac_close
,
960 .ndo_start_xmit
= nuport_mac_start_xmit
,
961 .ndo_change_mtu
= eth_change_mtu
,
962 .ndo_validate_addr
= eth_validate_addr
,
963 .ndo_set_mac_address
= nuport_mac_change_mac_address
,
964 .ndo_tx_timeout
= nuport_mac_tx_timeout
,
967 static int __init
nuport_mac_probe(struct platform_device
*pdev
)
969 struct net_device
*dev
;
970 struct nuport_mac_priv
*priv
= NULL
;
971 struct resource
*regs
, *dma
;
973 int rx_irq
, tx_irq
, link_irq
;
975 const unsigned int *intspec
;
977 dev
= alloc_etherdev(sizeof(struct nuport_mac_priv
));
979 dev_err(&pdev
->dev
, "no memory for net_device\n");
983 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
984 dma
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
986 dev_err(&pdev
->dev
, "failed to get regs resources\n");
991 rx_irq
= platform_get_irq(pdev
, 0);
992 tx_irq
= platform_get_irq(pdev
, 1);
993 link_irq
= platform_get_irq(pdev
, 2);
994 if (rx_irq
< 0 || tx_irq
< 0 || link_irq
< 0) {
999 platform_set_drvdata(pdev
, dev
);
1000 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1001 priv
= netdev_priv(dev
);
1004 spin_lock_init(&priv
->lock
);
1006 intspec
= of_get_property(pdev
->dev
.of_node
,
1007 "nuport-mac,buffer-shifting", NULL
);
1009 priv
->buffer_shifting_len
= 0;
1011 priv
->buffer_shifting_len
= 2;
1013 priv
->mac_base
= devm_ioremap(&pdev
->dev
,
1014 regs
->start
, resource_size(regs
));
1015 if (!priv
->mac_base
) {
1016 dev_err(&pdev
->dev
, "failed to remap regs\n");
1021 priv
->dma_base
= devm_ioremap(&pdev
->dev
,
1022 dma
->start
, resource_size(dma
));
1023 if (!priv
->dma_base
) {
1024 dev_err(&pdev
->dev
, "failed to remap dma-regs\n");
1029 priv
->emac_clk
= clk_get(&pdev
->dev
, "emac");
1030 if (IS_ERR_OR_NULL(priv
->emac_clk
)) {
1031 dev_err(&pdev
->dev
, "failed to get emac clk\n");
1032 ret
= PTR_ERR(priv
->emac_clk
);
1036 priv
->ephy_clk
= clk_get(&pdev
->dev
, "ephy");
1037 if (IS_ERR_OR_NULL(priv
->ephy_clk
)) {
1038 dev_err(&pdev
->dev
, "failed to get ephy clk\n");
1039 ret
= PTR_ERR(priv
->ephy_clk
);
1043 priv
->link_irq
= link_irq
;
1044 priv
->rx_irq
= rx_irq
;
1045 priv
->tx_irq
= tx_irq
;
1046 priv
->msg_level
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
| NETIF_MSG_LINK
;
1047 dev
->netdev_ops
= &nuport_mac_ops
;
1048 dev
->ethtool_ops
= &nuport_mac_ethtool_ops
;
1049 dev
->watchdog_timeo
= HZ
;
1050 dev
->flags
= IFF_BROADCAST
; /* Supports Broadcast */
1051 dev
->tx_queue_len
= TX_RING_SIZE
/ 2;
1053 netif_napi_add(dev
, &priv
->napi
, nuport_mac_poll
, 64);
1055 priv
->mii_bus
= mdiobus_alloc();
1056 if (!priv
->mii_bus
) {
1057 dev_err(&pdev
->dev
, "mii bus allocation failed\n");
1061 priv
->mii_bus
->priv
= dev
;
1062 priv
->mii_bus
->read
= nuport_mac_mii_read
;
1063 priv
->mii_bus
->write
= nuport_mac_mii_write
;
1064 priv
->mii_bus
->reset
= nuport_mac_mii_reset
;
1065 priv
->mii_bus
->name
= "nuport-mac-mii";
1066 priv
->mii_bus
->phy_mask
= (1 << 0);
1067 snprintf(priv
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s", pdev
->name
);
1068 priv
->mii_bus
->irq
= kzalloc(PHY_MAX_ADDR
* sizeof(int), GFP_KERNEL
);
1069 if (!priv
->mii_bus
->irq
) {
1070 dev_err(&pdev
->dev
, "failed to allocate mii_bus irqs\n");
1075 /* We support PHY interrupts routed back to the MAC */
1076 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
1077 priv
->mii_bus
->irq
[i
] = PHY_IGNORE_INTERRUPT
;
1079 ret
= mdiobus_register(priv
->mii_bus
);
1081 dev_err(&pdev
->dev
, "failed to register mii_bus\n");
1085 ret
= nuport_mac_mii_probe(dev
);
1087 dev_err(&pdev
->dev
, "failed to probe MII bus\n");
1088 goto out_mdio_unregister
;
1091 ret
= register_netdev(dev
);
1093 dev_err(&pdev
->dev
, "failed to register net_device\n");
1094 goto out_mdio_probe
;
1097 /* read existing mac address */
1098 nuport_mac_read_mac_address(dev
);
1100 dev_info(&pdev
->dev
, "registered (MAC: %pM)\n", dev
->dev_addr
);
1105 phy_disconnect(priv
->phydev
);
1106 out_mdio_unregister
:
1107 mdiobus_unregister(priv
->mii_bus
);
1109 kfree(priv
->mii_bus
->irq
);
1111 mdiobus_free(priv
->mii_bus
);
1113 platform_set_drvdata(pdev
, NULL
);
1115 clk_put(priv
->ephy_clk
);
1116 clk_put(priv
->emac_clk
);
1118 platform_set_drvdata(pdev
, NULL
);
1122 static int nuport_mac_remove(struct platform_device
*pdev
)
1124 struct net_device
*dev
= platform_get_drvdata(pdev
);
1125 struct nuport_mac_priv
*priv
= netdev_priv(dev
);
1127 unregister_netdev(dev
);
1128 phy_disconnect(priv
->phydev
);
1129 mdiobus_unregister(priv
->mii_bus
);
1130 kfree(priv
->mii_bus
->irq
);
1131 mdiobus_free(priv
->mii_bus
);
1132 clk_put(priv
->ephy_clk
);
1133 clk_put(priv
->emac_clk
);
1136 platform_set_drvdata(pdev
, NULL
);
1141 static struct of_device_id nuport_eth_ids
[] __initdata
= {
1142 {.compatible
= "moschip,nuport-mac",},
1146 static struct platform_driver nuport_eth_driver
= {
1148 .name
= "nuport-mac",
1149 .owner
= THIS_MODULE
,
1150 .of_match_table
= nuport_eth_ids
,
1152 .probe
= nuport_mac_probe
,
1153 .remove
= __devexit_p(nuport_mac_remove
),
1156 module_platform_driver(nuport_eth_driver
);
1158 MODULE_AUTHOR("Moschip Semiconductors Ltd.");
1159 MODULE_DESCRIPTION("Moschip MCS8140 Ethernet MAC driver");
1160 MODULE_LICENSE("GPL");