1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
10 model = "Buffalo WSR-2533DHP2";
11 compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622";
15 led-boot = &power_green;
16 led-failsafe = &power_amber;
17 led-running = &power_green;
18 led-upgrade = &power_green;
22 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
26 reg = <0 0x40000000 0 0x0F000000>;
30 compatible = "gpio-leds";
33 label = "amber:wireless";
34 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
37 power_amber: power_amber {
38 label = "amber:power";
39 gpios = <&pio 3 GPIO_ACTIVE_LOW>;
42 power_green: power_green {
43 label = "green:power";
44 gpios = <&pio 4 GPIO_ACTIVE_LOW>;
49 label = "green:wireless";
50 gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
54 label = "green:internet";
55 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
59 label = "green:router";
60 gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
65 compatible = "gpio-keys";
66 poll-interval = <100>;
70 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
71 linux,code = <KEY_RESTART>;
74 /* GPIO 1 and 16 are a tri-state switch button with
79 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
81 linux,input-type = <EV_SW>;
86 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
88 linux,input-type = <EV_SW>;
91 /* GPIO 18 is a switch button with AUTO / MANUAL. */
94 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
96 linux,input-type = <EV_SW>;
101 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
102 linux,code = <KEY_WPS_BUTTON>;
107 compatible = "mediatek,rtk-gsw";
108 mediatek,ethsys = <ðsys>;
109 mediatek,mdio = <&mdio>;
110 mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>;
115 proc-supply = <&mt6380_vcpu_reg>;
116 sram-supply = <&mt6380_vm_reg>;
120 proc-supply = <&mt6380_vcpu_reg>;
121 sram-supply = <&mt6380_vm_reg>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pcie0_pins>;
134 compatible = "mediatek,mt76";
135 reg = <0x0000 0 0 0 0>;
136 mediatek,mtd-eeprom = <&factory 0x5000>;
137 ieee80211-freq-limit = <5000000 6000000>;
145 groups = "mdc_mdio", "rgmii_via_gmac2";
149 /* Parallel nand is shared pin with eMMC */
150 parallel_nand_pins: parallel-nand-pins {
157 pins = "NCEB", "NWEB", "NREB",
158 "NDL4", "NDL5", "NDL6",
159 "NDL7", "NRB", "NCLE",
160 "NALE", "NDL0", "NDL1",
163 drive-strength = <8>;
168 pcie0_pins: pcie0-pins {
171 groups = "pcie0_pad_perst",
177 pmic_bus_pins: pmic-bus-pins {
184 pwm7_pins: pwm1-2-pins {
187 groups = "pwm_ch7_2";
191 uart0_pins: uart0-pins {
194 groups = "uart0_0_tx_rx" ;
198 watchdog_pins: watchdog-pins {
200 function = "watchdog";
211 pinctrl-names = "default";
212 pinctrl-0 = <ð_pins>;
216 compatible = "mediatek,eth-mac";
219 phy-connection-type = "2500base-x";
221 mtd-mac-address = <&factory 0x4>;
222 mtd-mac-address-increment = <(-1)>;
232 #address-cells = <1>;
238 pinctrl-names = "default";
239 pinctrl-0 = <¶llel_nand_pins>;
244 nand-ecc-mode = "hw";
247 compatible = "fixed-partitions";
248 #address-cells = <1>;
259 reg = <0x80000 0x40000>;
264 label = "Bootloader";
265 reg = <0xc0000 0x80000>;
271 reg = <0x140000 0x80000>;
274 factory: partition@1c0000 {
276 reg = <0x1c0000 0x40000>;
281 compatible = "brcm,trx";
282 brcm,trx-magic = <0x32504844>;
284 reg = <0x200000 0x3a00000>;
289 reg = <0x3c00000 0x3a00000>;
294 reg = <0x7600000 0x200000>;
299 label = "board_data";
300 reg = <0x7800000 0x200000>;
308 pinctrl-names = "default";
309 pinctrl-0 = <&pwm7_pins>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pmic_bus_pins>;
320 pinctrl-names = "default";
321 pinctrl-0 = <&uart0_pins>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&watchdog_pins>;
334 mediatek,mtd-eeprom = <&factory 0x0>;