1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
11 compatible = "linksys,e8450", "mediatek,mt7622";
15 led-boot = &led_power;
16 led-failsafe = &led_power;
17 led-running = &led_power;
18 led-upgrade = &led_power;
22 stdout-path = "serial0:115200n8";
23 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
28 proc-supply = <&mt6380_vcpu_reg>;
29 sram-supply = <&mt6380_vm_reg>;
33 proc-supply = <&mt6380_vcpu_reg>;
34 sram-supply = <&mt6380_vm_reg>;
39 compatible = "gpio-keys";
43 linux,code = <KEY_RESTART>;
44 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_WPS_BUTTON>;
50 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
55 compatible = "gpio-leds";
57 led_power: power_blue {
59 gpios = <&pio 95 GPIO_ACTIVE_LOW>;
64 label = "power:orange";
65 gpios = <&pio 96 GPIO_ACTIVE_LOW>;
66 default-state = "off";
71 gpios = <&pio 97 GPIO_ACTIVE_LOW>;
72 default-state = "off";
76 label = "inet:orange";
77 gpios = <&pio 98 GPIO_ACTIVE_LOW>;
78 default-state = "off";
83 reg = <0 0x40000000 0 0x40000000>;
86 reg_1p8v: regulator-1p8v {
87 compatible = "regulator-fixed";
88 regulator-name = "fixed-1.8V";
89 regulator-min-microvolt = <1800000>;
90 regulator-max-microvolt = <1800000>;
94 reg_3p3v: regulator-3p3v {
95 compatible = "regulator-fixed";
96 regulator-name = "fixed-3.3V";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
103 reg_5v: regulator-5v {
104 compatible = "regulator-fixed";
105 regulator-name = "fixed-5V";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&irrx_pins>;
124 pinctrl-names = "default";
125 pinctrl-0 = <ð_pins>;
129 compatible = "mediatek,eth-mac";
131 phy-mode = "2500base-x";
141 #address-cells = <1>;
145 compatible = "mediatek,mt7531";
147 interrupt-controller;
148 #interrupt-cells = <1>;
149 interrupt-parent = <&pio>;
150 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
151 reset-gpios = <&pio 54 0>;
154 #address-cells = <1>;
186 phy-mode = "2500base-x";
201 pinctrl-names = "default";
202 pinctrl-0 = <&pcie0_pins>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pcie1_pins>;
216 groups = "mdc_mdio", "rgmii_via_gmac2";
220 irrx_pins: irrx-pins {
227 irtx_pins: irtx-pins {
234 pcie0_pins: pcie0-pins {
237 groups = "pcie0_pad_perst",
243 pcie1_pins: pcie1-pins {
246 groups = "pcie1_pad_perst",
252 pmic_bus_pins: pmic-bus-pins {
259 pwm7_pins: pwm1-2-pins {
262 groups = "pwm_ch7_2";
266 wled_pins: wled-pins {
273 /* Serial NAND is shared pin with SPI-NOR */
274 serial_nand_pins: serial-nand-pins {
281 spic0_pins: spic0-pins {
288 spic1_pins: spic1-pins {
295 uart0_pins: uart0-pins {
298 groups = "uart0_0_tx_rx" ;
302 uart2_pins: uart2-pins {
305 groups = "uart2_1_tx_rx" ;
309 watchdog_pins: watchdog-pins {
311 function = "watchdog";
318 pinctrl-names = "default";
319 pinctrl-0 = <&pwm7_pins>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&pmic_bus_pins>;
340 compatible = "mediatek,mt76";
341 reg = <0x0000 0 0 0 0>;
342 ieee80211-freq-limit = <5000000 6000000>;
343 mediatek,disable-radar-background;
352 pinctrl-names = "default";
353 pinctrl-0 = <&serial_nand_pins>;
357 compatible = "spi-nand";
359 spi-tx-bus-width = <4>;
360 spi-rx-bus-width = <4>;
361 nand-ecc-engine = <&snfi>;
366 pinctrl-names = "default";
367 pinctrl-0 = <&spic0_pins>;
372 pinctrl-names = "default";
373 pinctrl-0 = <&spic1_pins>;
378 vusb33-supply = <®_3p3v>;
379 vbus-supply = <®_5v>;
388 pinctrl-names = "default";
389 pinctrl-0 = <&uart0_pins>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&uart2_pins>;
404 pinctrl-names = "default";
405 pinctrl-0 = <&watchdog_pins>;