target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6
   7 #include "mt7622.dtsi"
   8 #include "mt6380.dtsi"
   9
  10 / {
  11         compatible = "linksys,e8450", "mediatek,mt7622";
  12
  13         aliases {
  14                 serial0 = &uart0;
  15                 led-boot = &led_power;
  16                 led-failsafe = &led_power;
  17                 led-running = &led_power;
  18                 led-upgrade = &led_power;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n8";
  23                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         proc-supply = <&mt6380_vcpu_reg>;
  29                         sram-supply = <&mt6380_vm_reg>;
  30                 };
  31
  32                 cpu@1 {
  33                         proc-supply = <&mt6380_vcpu_reg>;
  34                         sram-supply = <&mt6380_vm_reg>;
  35                 };
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 factory {
  42                         label = "reset";
  43                         linux,code = <KEY_RESTART>;
  44                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  45                 };
  46
  47                 wps {
  48                         label = "wps";
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         gpio-leds {
  55                 compatible = "gpio-leds";
  56
  57                 led_power: power_blue {
  58                         label = "power:blue";
  59                         gpios = <&pio 95 GPIO_ACTIVE_LOW>;
  60                         default-state = "on";
  61                 };
  62
  63                 power_orange {
  64                         label = "power:orange";
  65                         gpios = <&pio 96 GPIO_ACTIVE_LOW>;
  66                         default-state = "off";
  67                 };
  68
  69                 inet_blue {
  70                         label = "inet:blue";
  71                         gpios = <&pio 97 GPIO_ACTIVE_LOW>;
  72                         default-state = "off";
  73                 };
  74
  75                 inet_orange {
  76                         label = "inet:orange";
  77                         gpios = <&pio 98 GPIO_ACTIVE_LOW>;
  78                         default-state = "off";
  79                 };
  80         };
  81
  82         memory {
  83                 reg = <0 0x40000000 0 0x40000000>;
  84         };
  85
  86         reg_1p8v: regulator-1p8v {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "fixed-1.8V";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <1800000>;
  91                 regulator-always-on;
  92         };
  93
  94         reg_3p3v: regulator-3p3v {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "fixed-3.3V";
  97                 regulator-min-microvolt = <3300000>;
  98                 regulator-max-microvolt = <3300000>;
  99                 regulator-boot-on;
 100                 regulator-always-on;
 101         };
 102
 103         reg_5v: regulator-5v {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "fixed-5V";
 106                 regulator-min-microvolt = <5000000>;
 107                 regulator-max-microvolt = <5000000>;
 108                 regulator-boot-on;
 109                 regulator-always-on;
 110         };
 111 };
 112
 113 &btif {
 114         status = "okay";
 115 };
 116
 117 &cir {
 118         pinctrl-names = "default";
 119         pinctrl-0 = <&irrx_pins>;
 120         status = "okay";
 121 };
 122
 123 &eth {
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&eth_pins>;
 126         status = "okay";
 127
 128         gmac0: mac@0 {
 129                 compatible = "mediatek,eth-mac";
 130                 reg = <0>;
 131                 phy-mode = "2500base-x";
 132
 133                 fixed-link {
 134                         speed = <2500>;
 135                         full-duplex;
 136                         pause;
 137                 };
 138         };
 139
 140         mdio-bus {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143
 144                 switch@0 {
 145                         compatible = "mediatek,mt7531";
 146                         reg = <0>;
 147                         interrupt-controller;
 148                         #interrupt-cells = <1>;
 149                         interrupt-parent = <&pio>;
 150                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 151                         reset-gpios = <&pio 54 0>;
 152
 153                         ports {
 154                                 #address-cells = <1>;
 155                                 #size-cells = <0>;
 156
 157                                 port@0 {
 158                                         reg = <0>;
 159                                         label = "lan1";
 160                                 };
 161
 162                                 port@1 {
 163                                         reg = <1>;
 164                                         label = "lan2";
 165                                 };
 166
 167                                 port@2 {
 168                                         reg = <2>;
 169                                         label = "lan3";
 170                                 };
 171
 172                                 port@3 {
 173                                         reg = <3>;
 174                                         label = "lan4";
 175                                 };
 176
 177                                 wan: port@4 {
 178                                         reg = <4>;
 179                                         label = "wan";
 180                                 };
 181
 182                                 port@6 {
 183                                         reg = <6>;
 184                                         ethernet = <&gmac0>;
 185                                         phy-mode = "2500base-x";
 186
 187                                         fixed-link {
 188                                                 speed = <2500>;
 189                                                 full-duplex;
 190                                                 pause;
 191                                         };
 192                                 };
 193                         };
 194                 };
 195
 196         };
 197 };
 198
 199 &pcie0 {
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&pcie0_pins>;
 202         status = "okay";
 203 };
 204
 205 &pcie1 {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&pcie1_pins>;
 208         status = "okay";
 209 };
 210
 211 &pio {
 212         eth_pins: eth-pins {
 213                 mux {
 214                         function = "eth";
 215                         groups = "mdc_mdio", "rgmii_via_gmac2";
 216                 };
 217         };
 218
 219         irrx_pins: irrx-pins {
 220                 mux {
 221                         function = "ir";
 222                         groups =  "ir_1_rx";
 223                 };
 224         };
 225
 226         irtx_pins: irtx-pins {
 227                 mux {
 228                         function = "ir";
 229                         groups =  "ir_1_tx";
 230                 };
 231         };
 232
 233         pcie0_pins: pcie0-pins {
 234                 mux {
 235                         function = "pcie";
 236                         groups = "pcie0_pad_perst",
 237                                  "pcie0_1_waken",
 238                                  "pcie0_1_clkreq";
 239                 };
 240         };
 241
 242         pcie1_pins: pcie1-pins {
 243                 mux {
 244                         function = "pcie";
 245                         groups = "pcie1_pad_perst",
 246                                  "pcie1_0_waken",
 247                                  "pcie1_0_clkreq";
 248                 };
 249         };
 250
 251         pmic_bus_pins: pmic-bus-pins {
 252                 mux {
 253                         function = "pmic";
 254                         groups = "pmic_bus";
 255                 };
 256         };
 257
 258         pwm7_pins: pwm1-2-pins {
 259                 mux {
 260                         function = "pwm";
 261                         groups = "pwm_ch7_2";
 262                 };
 263         };
 264
 265         wled_pins: wled-pins {
 266                 mux {
 267                         function = "led";
 268                         groups = "wled";
 269                 };
 270         };
 271
 272         /* Serial NAND is shared pin with SPI-NOR */
 273         serial_nand_pins: serial-nand-pins {
 274                 mux {
 275                         function = "flash";
 276                         groups = "snfi";
 277                 };
 278         };
 279
 280         spic0_pins: spic0-pins {
 281                 mux {
 282                         function = "spi";
 283                         groups = "spic0_0";
 284                 };
 285         };
 286
 287         spic1_pins: spic1-pins {
 288                 mux {
 289                         function = "spi";
 290                         groups = "spic1_0";
 291                 };
 292         };
 293
 294         uart0_pins: uart0-pins {
 295                 mux {
 296                         function = "uart";
 297                         groups = "uart0_0_tx_rx" ;
 298                 };
 299         };
 300
 301         uart2_pins: uart2-pins {
 302                 mux {
 303                         function = "uart";
 304                         groups = "uart2_1_tx_rx" ;
 305                 };
 306         };
 307
 308         watchdog_pins: watchdog-pins {
 309                 mux {
 310                         function = "watchdog";
 311                         groups = "watchdog";
 312                 };
 313         };
 314 };
 315
 316 &pwm {
 317         pinctrl-names = "default";
 318         pinctrl-0 = <&pwm7_pins>;
 319         status = "okay";
 320 };
 321
 322 &pwrap {
 323         pinctrl-names = "default";
 324         pinctrl-0 = <&pmic_bus_pins>;
 325
 326         status = "okay";
 327 };
 328
 329 &sata {
 330         status = "disabled";
 331 };
 332
 333 &sata_phy {
 334         status = "disabled";
 335 };
 336
 337 &slot0 {
 338         wmac1: wifi@0,0 {
 339                 compatible = "mediatek,mt76";
 340                 reg = <0x0000 0 0 0 0>;
 341                 ieee80211-freq-limit = <5000000 6000000>;
 342                 mediatek,disable-radar-background;
 343         };
 344 };
 345
 346 &bch {
 347         status = "okay";
 348 };
 349
 350 &snfi {
 351         pinctrl-names = "default";
 352         pinctrl-0 = <&serial_nand_pins>;
 353         status = "okay";
 354
 355         snand: flash@0 {
 356                 compatible = "spi-nand";
 357                 reg = <0>;
 358                 spi-tx-bus-width = <4>;
 359                 spi-rx-bus-width = <4>;
 360                 nand-ecc-engine = <&snfi>;
 361         };
 362 };
 363
 364 &spi0 {
 365         pinctrl-names = "default";
 366         pinctrl-0 = <&spic0_pins>;
 367         status = "okay";
 368 };
 369
 370 &spi1 {
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&spic1_pins>;
 373         status = "okay";
 374 };
 375
 376 &ssusb {
 377         vusb33-supply = <&reg_3p3v>;
 378         vbus-supply = <&reg_5v>;
 379         status = "okay";
 380 };
 381
 382 &u3phy {
 383         status = "okay";
 384 };
 385
 386 &uart0 {
 387         pinctrl-names = "default";
 388         pinctrl-0 = <&uart0_pins>;
 389         status = "okay";
 390 };
 391
 392 &uart2 {
 393         pinctrl-names = "default";
 394         pinctrl-0 = <&uart2_pins>;
 395         status = "okay";
 396 };
 397
 398 &rtc {
 399         status = "disabled";
 400 };
 401
 402 &watchdog {
 403         pinctrl-names = "default";
 404         pinctrl-0 = <&watchdog_pins>;
 405         status = "okay";
 406 };