target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6
   7 #include "mt7622.dtsi"
   8 #include "mt6380.dtsi"
   9
  10 / {
  11         compatible = "linksys,e8450", "mediatek,mt7622";
  12
  13         aliases {
  14                 serial0 = &uart0;
  15                 led-boot = &led_power;
  16                 led-failsafe = &led_power;
  17                 led-running = &led_power;
  18                 led-upgrade = &led_power;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n8";
  23                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         proc-supply = <&mt6380_vcpu_reg>;
  29                         sram-supply = <&mt6380_vm_reg>;
  30                 };
  31
  32                 cpu@1 {
  33                         proc-supply = <&mt6380_vcpu_reg>;
  34                         sram-supply = <&mt6380_vm_reg>;
  35                 };
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 factory {
  42                         label = "reset";
  43                         linux,code = <KEY_RESTART>;
  44                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  45                 };
  46
  47                 wps {
  48                         label = "wps";
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         gpio-leds {
  55                 compatible = "gpio-leds";
  56
  57                 led_power: power_blue {
  58                         label = "power:blue";
  59                         gpios = <&pio 95 GPIO_ACTIVE_LOW>;
  60                         default-state = "on";
  61                 };
  62
  63                 power_orange {
  64                         label = "power:orange";
  65                         gpios = <&pio 96 GPIO_ACTIVE_LOW>;
  66                         default-state = "off";
  67                 };
  68
  69                 inet_blue {
  70                         label = "inet:blue";
  71                         gpios = <&pio 97 GPIO_ACTIVE_LOW>;
  72                         default-state = "off";
  73                 };
  74
  75                 inet_orange {
  76                         label = "inet:orange";
  77                         gpios = <&pio 98 GPIO_ACTIVE_LOW>;
  78                         default-state = "off";
  79                 };
  80         };
  81
  82         memory {
  83                 reg = <0 0x40000000 0 0x40000000>;
  84         };
  85
  86         reg_1p8v: regulator-1p8v {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "fixed-1.8V";
  89                 regulator-min-microvolt = <1800000>;
  90                 regulator-max-microvolt = <1800000>;
  91                 regulator-always-on;
  92         };
  93
  94         reg_3p3v: regulator-3p3v {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "fixed-3.3V";
  97                 regulator-min-microvolt = <3300000>;
  98                 regulator-max-microvolt = <3300000>;
  99                 regulator-boot-on;
 100                 regulator-always-on;
 101         };
 102
 103         reg_5v: regulator-5v {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "fixed-5V";
 106                 regulator-min-microvolt = <5000000>;
 107                 regulator-max-microvolt = <5000000>;
 108                 regulator-boot-on;
 109                 regulator-always-on;
 110         };
 111 };
 112
 113 &bch {
 114         status = "okay";
 115 };
 116
 117 &btif {
 118         status = "okay";
 119 };
 120
 121 &cir {
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&irrx_pins>;
 124         status = "okay";
 125 };
 126
 127 &eth {
 128         pinctrl-names = "default";
 129         pinctrl-0 = <&eth_pins>;
 130         status = "okay";
 131
 132         gmac0: mac@0 {
 133                 compatible = "mediatek,eth-mac";
 134                 reg = <0>;
 135                 phy-mode = "2500base-x";
 136
 137                 fixed-link {
 138                         speed = <2500>;
 139                         full-duplex;
 140                         pause;
 141                 };
 142         };
 143
 144         mdio-bus {
 145                 #address-cells = <1>;
 146                 #size-cells = <0>;
 147
 148                 switch@0 {
 149                         compatible = "mediatek,mt7531";
 150                         reg = <0>;
 151                         reset-gpios = <&pio 54 0>;
 152
 153                         ports {
 154                                 #address-cells = <1>;
 155                                 #size-cells = <0>;
 156
 157                                 port@0 {
 158                                         reg = <0>;
 159                                         label = "lan1";
 160                                 };
 161
 162                                 port@1 {
 163                                         reg = <1>;
 164                                         label = "lan2";
 165                                 };
 166
 167                                 port@2 {
 168                                         reg = <2>;
 169                                         label = "lan3";
 170                                 };
 171
 172                                 port@3 {
 173                                         reg = <3>;
 174                                         label = "lan4";
 175                                 };
 176
 177                                 wan: port@4 {
 178                                         reg = <4>;
 179                                         label = "wan";
 180                                 };
 181
 182                                 port@6 {
 183                                         reg = <6>;
 184                                         label = "cpu";
 185                                         ethernet = <&gmac0>;
 186                                         phy-mode = "2500base-x";
 187
 188                                         fixed-link {
 189                                                 speed = <2500>;
 190                                                 full-duplex;
 191                                                 pause;
 192                                         };
 193                                 };
 194                         };
 195                 };
 196
 197         };
 198 };
 199
 200 &pcie0 {
 201         pinctrl-names = "default";
 202         pinctrl-0 = <&pcie0_pins>;
 203         status = "okay";
 204 };
 205
 206 &pcie1 {
 207         pinctrl-names = "default";
 208         pinctrl-0 = <&pcie1_pins>;
 209         status = "okay";
 210 };
 211
 212 &pio {
 213         /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
 214          * SATA functions. i.e. output-high: PCIe, output-low: SATA
 215          */
 216 //      asm_sel {
 217 //              gpio-hog;
 218 //              gpios = <90 GPIO_ACTIVE_HIGH>;
 219 //              output-high;
 220 //      };
 221
 222         eth_pins: eth-pins {
 223                 mux {
 224                         function = "eth";
 225                         groups = "mdc_mdio", "rgmii_via_gmac2";
 226                 };
 227         };
 228
 229         irrx_pins: irrx-pins {
 230                 mux {
 231                         function = "ir";
 232                         groups =  "ir_1_rx";
 233                 };
 234         };
 235
 236         irtx_pins: irtx-pins {
 237                 mux {
 238                         function = "ir";
 239                         groups =  "ir_1_tx";
 240                 };
 241         };
 242
 243         pcie0_pins: pcie0-pins {
 244                 mux {
 245                         function = "pcie";
 246                         groups = "pcie0_pad_perst",
 247                                  "pcie0_1_waken",
 248                                  "pcie0_1_clkreq";
 249                 };
 250         };
 251
 252         pcie1_pins: pcie1-pins {
 253                 mux {
 254                         function = "pcie";
 255                         groups = "pcie1_pad_perst",
 256                                  "pcie1_0_waken",
 257                                  "pcie1_0_clkreq";
 258                 };
 259         };
 260
 261         pmic_bus_pins: pmic-bus-pins {
 262                 mux {
 263                         function = "pmic";
 264                         groups = "pmic_bus";
 265                 };
 266         };
 267
 268         pwm7_pins: pwm1-2-pins {
 269                 mux {
 270                         function = "pwm";
 271                         groups = "pwm_ch7_2";
 272                 };
 273         };
 274
 275         wled_pins: wled-pins {
 276                 mux {
 277                         function = "led";
 278                         groups = "wled";
 279                 };
 280         };
 281
 282         /* Serial NAND is shared pin with SPI-NOR */
 283         serial_nand_pins: serial-nand-pins {
 284                 mux {
 285                         function = "flash";
 286                         groups = "snfi";
 287                 };
 288         };
 289
 290         spic0_pins: spic0-pins {
 291                 mux {
 292                         function = "spi";
 293                         groups = "spic0_0";
 294                 };
 295         };
 296
 297         spic1_pins: spic1-pins {
 298                 mux {
 299                         function = "spi";
 300                         groups = "spic1_0";
 301                 };
 302         };
 303
 304         uart0_pins: uart0-pins {
 305                 mux {
 306                         function = "uart";
 307                         groups = "uart0_0_tx_rx" ;
 308                 };
 309         };
 310
 311         uart2_pins: uart2-pins {
 312                 mux {
 313                         function = "uart";
 314                         groups = "uart2_1_tx_rx" ;
 315                 };
 316         };
 317
 318         watchdog_pins: watchdog-pins {
 319                 mux {
 320                         function = "watchdog";
 321                         groups = "watchdog";
 322                 };
 323         };
 324 };
 325
 326 &pwm {
 327         pinctrl-names = "default";
 328         pinctrl-0 = <&pwm7_pins>;
 329         status = "okay";
 330 };
 331
 332 &pwrap {
 333         pinctrl-names = "default";
 334         pinctrl-0 = <&pmic_bus_pins>;
 335
 336         status = "okay";
 337 };
 338
 339 &sata {
 340         status = "disabled";
 341 };
 342
 343 &sata_phy {
 344         status = "disabled";
 345 };
 346
 347 &slot0 {
 348         wmac1: mt7915@0,0 {
 349                 reg = <0x0000 0 0 0 0>;
 350                 ieee80211-freq-limit = <5000000 6000000>;
 351         };
 352 };
 353
 354 &snfi {
 355         pinctrl-names = "default";
 356         pinctrl-0 = <&serial_nand_pins>;
 357         status = "okay";
 358
 359         snand: spi_nand@0 {
 360                 #address-cells = <1>;
 361                 #size-cells = <1>;
 362                 compatible = "spi-nand";
 363                 spi-max-frequency = <104000000>;
 364                 reg = <0>;
 365         };
 366 };
 367
 368 &spi0 {
 369         pinctrl-names = "default";
 370         pinctrl-0 = <&spic0_pins>;
 371         status = "okay";
 372 };
 373
 374 &spi1 {
 375         pinctrl-names = "default";
 376         pinctrl-0 = <&spic1_pins>;
 377         status = "okay";
 378 };
 379
 380 &ssusb {
 381         vusb33-supply = <&reg_3p3v>;
 382         vbus-supply = <&reg_5v>;
 383         status = "okay";
 384 };
 385
 386 &u3phy {
 387         status = "okay";
 388 };
 389
 390 &uart0 {
 391         pinctrl-names = "default";
 392         pinctrl-0 = <&uart0_pins>;
 393         status = "okay";
 394 };
 395
 396 &uart2 {
 397         pinctrl-names = "default";
 398         pinctrl-0 = <&uart2_pins>;
 399         status = "okay";
 400 };
 401
 402 &rtc {
 403         status = "disabled";
 404 };
 405
 406 &watchdog {
 407         pinctrl-names = "default";
 408         pinctrl-0 = <&watchdog_pins>;
 409         status = "okay";
 410 };