1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
11 model = "Ruijie RG-EW3200GX PRO";
12 compatible = "ruijie,rg-ew3200gx-pro", "mediatek,mt7622";
16 label-mac-device = &gmac0;
17 led-boot = &led_system;
18 led-failsafe = &led_system;
19 led-running = &led_system;
20 led-upgrade = &led_system;
25 stdout-path = "serial0:115200n1";
26 bootargs = "console=ttyS0,115200n1 swiotlb=512";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
42 compatible = "gpio-keys";
46 linux,code = <KEY_RESTART>;
47 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
52 linux,code = <KEY_WPS_BUTTON>;
53 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
58 compatible = "gpio-leds";
62 gpios = <&pio 79 GPIO_ACTIVE_LOW>;
67 gpios = <&pio 82 GPIO_ACTIVE_LOW>;
70 led_system: system_blue {
71 label = "blue:system";
72 gpios = <&pio 81 GPIO_ACTIVE_LOW>;
78 reg = <0 0x40000000 0 0x40000000>;
85 pinctrl-names = "default";
86 pinctrl-0 = <ð_pins>;
89 compatible = "mediatek,eth-mac";
91 phy-connection-type = "2500base-x";
100 #address-cells = <1>;
104 compatible = "mediatek,mt7531";
106 reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
110 interrupt-parent = <&pio>;
111 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
114 #address-cells = <1>;
146 phy-mode = "2500base-x";
162 pinctrl-names = "default";
163 pinctrl-0 = <&pcie0_pins>;
168 reg = <0x0000 0 0 0 0>;
169 mediatek,mtd-eeprom = <&factory 0x5000>;
170 ieee80211-freq-limit = <5000000 6000000>;
175 epa_elna_pins: epa-elna-pins {
178 groups = "antsel0", "antsel1", "antsel2", "antsel3",
179 "antsel4", "antsel5", "antsel6", "antsel7",
180 "antsel8", "antsel9", "antsel12", "antsel13",
181 "antsel14", "antsel15", "antsel16", "antsel17";
188 groups = "mdc_mdio", "rgmii_via_gmac2";
192 pcie0_pins: pcie0-pins {
195 groups = "pcie0_pad_perst",
201 pmic_bus_pins: pmic-bus-pins {
208 spi_nor_pins: spi-nor-pins {
215 uart0_pins: uart0-pins {
218 groups = "uart0_0_tx_rx";
222 watchdog_pins: watchdog-pins {
224 function = "watchdog";
233 pinctrl-names = "default";
234 pinctrl-0 = <&pmic_bus_pins>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&spi_nor_pins>;
244 compatible = "jedec,spi-nor";
246 spi-max-frequency = <50000000>;
249 compatible = "fixed-partitions";
250 #address-cells = <1>;
261 reg = <0x40000 0x20000>;
267 reg = <0x60000 0x50000>;
272 label = "u-boot-env";
273 reg = <0xb0000 0x20000>;
276 factory: partition@D0000 {
278 reg = <0xd0000 0x80000>;
283 label = "product_info";
284 reg = <0x150000 0x10000>;
290 reg = <0x160000 0x10000>;
295 compatible = "denx,fit";
297 reg = <0x170000 0xe90000>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&uart0_pins>;
317 pinctrl-names = "default";
318 pinctrl-0 = <&watchdog_pins>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&epa_elna_pins>;
326 mediatek,mtd-eeprom = <&factory 0x0>;