1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
11 model = "TOTOLINK A8000RU";
12 compatible = "totolink,a8000ru", "mediatek,mt7622";
15 label-mac-device = &gmac0;
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
24 stdout-path = "serial0:115200n8";
25 bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
30 proc-supply = <&mt6380_vcpu_reg>;
31 sram-supply = <&mt6380_vm_reg>;
35 proc-supply = <&mt6380_vcpu_reg>;
36 sram-supply = <&mt6380_vm_reg>;
41 compatible = "gpio-keys";
45 linux,code = <KEY_RESTART>;
46 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
51 linux,code = <KEY_WPS_BUTTON>;
52 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
57 compatible = "gpio-leds";
59 led_status: status_red {
61 gpios = <&pio 81 GPIO_ACTIVE_LOW>;
66 reg_1p8v: regulator-1p8v {
67 compatible = "regulator-fixed";
68 regulator-name = "fixed-1.8V";
69 regulator-min-microvolt = <1800000>;
70 regulator-max-microvolt = <1800000>;
74 reg_3p3v: regulator-3p3v {
75 compatible = "regulator-fixed";
76 regulator-name = "fixed-3.3V";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
84 compatible = "mediatek,rtk-gsw";
85 mediatek,ethsys = <ðsys>;
86 mediatek,mdio = <&mdio>;
87 mediatek,reset-pin = <&pio 54 0>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pcie0_pins>;
100 reg = <0x0000 0 0 0 0>;
101 mediatek,mtd-eeprom = <&factory 0x5000>;
102 ieee80211-freq-limit = <5490000 6000000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pcie1_pins>;
114 reg = <0x0000 0 0 0 0>;
115 mediatek,mtd-eeprom = <&factory 0x10000>;
116 ieee80211-freq-limit = <5000000 5490000>;
124 groups = "mdc_mdio", "rgmii_via_gmac2";
128 pcie0_pins: pcie0-pins {
131 groups = "pcie0_pad_perst",
137 pcie1_pins: pcie1-pins {
140 groups = "pcie1_pad_perst",
146 pmic_bus_pins: pmic-bus-pins {
153 /* serial NAND is shared pin with SPI-NOR */
154 serial_nand_pins: serial-nand-pins {
161 uart0_pins: uart0-pins {
164 groups = "uart0_0_tx_rx" ;
168 watchdog_pins: watchdog-pins {
170 function = "watchdog";
175 epa_elna_pins: epa-elna-pins {
178 groups = "antsel0", "antsel1", "antsel2", "antsel3",
179 "antsel4", "antsel5", "antsel6", "antsel7",
180 "antsel8", "antsel9", "antsel12", "antsel13",
181 "antsel14", "antsel15", "antsel16", "antsel17";
188 pinctrl-names = "default";
189 pinctrl-0 = <ð_pins>;
192 compatible = "mediatek,eth-mac";
194 nvmem-cells = <&macaddr_factory_2a>;
195 nvmem-cell-names = "mac-address";
196 phy-connection-type = "2500base-x";
205 compatible = "mediatek,eth-mac";
208 nvmem-cells = <&macaddr_factory_24>;
209 nvmem-cell-names = "mac-address";
218 #address-cells = <1>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pmic_bus_pins>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&serial_nand_pins>;
237 compatible = "fixed-partitions";
238 #address-cells = <1>;
249 reg = <0x80000 0x40000>;
255 reg = <0xc0000 0x80000>;
260 label = "u-boot-env";
261 reg = <0x140000 0x80000>;
265 factory: partition@1c0000 {
267 reg = <0x1c0000 0x40000>;
273 reg = <0x200000 0x6400000>;
278 reg = <0x6600000 0x100000>;
281 /* size of this partition varies due to BMT & bad blocks. */
290 compatible = "nvmem-cells";
291 #address-cells = <1>;
294 macaddr_factory_24: macaddr@24 {
298 macaddr_factory_2a: macaddr@2a {
304 vusb33-supply = <®_3p3v>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&uart0_pins>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&watchdog_pins>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&epa_elna_pins>;
327 mediatek,mtd-eeprom = <&factory 0x0>;