target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi

   1 /*
   2  * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
   3  *
   4  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   5  */
   6
   7 #include <dt-bindings/input/input.h>
   8 #include "mt7623.dtsi"
   9 #include "mt6323.dtsi"
  10
  11 / {
  12         compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
  13
  14         aliases {
  15                 serial2 = &uart2;
  16         };
  17
  18         chosen {
  19                 bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
  20                 stdout-path = "serial2:115200n8";
  21         };
  22
  23         cpus {
  24                 cpu@0 {
  25                         proc-supply = <&mt6323_vproc_reg>;
  26                 };
  27
  28                 cpu@1 {
  29                         proc-supply = <&mt6323_vproc_reg>;
  30                 };
  31
  32                 cpu@2 {
  33                         proc-supply = <&mt6323_vproc_reg>;
  34                 };
  35
  36                 cpu@3 {
  37                         proc-supply = <&mt6323_vproc_reg>;
  38                 };
  39         };
  40
  41         reg_1p8v: regulator-1p8v {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "fixed-1.8V";
  44                 regulator-min-microvolt = <1800000>;
  45                 regulator-max-microvolt = <1800000>;
  46                 regulator-boot-on;
  47                 regulator-always-on;
  48         };
  49
  50         reg_3p3v: regulator-3p3v {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "fixed-3.3V";
  53                 regulator-min-microvolt = <3300000>;
  54                 regulator-max-microvolt = <3300000>;
  55                 regulator-boot-on;
  56                 regulator-always-on;
  57         };
  58
  59         reg_5v: regulator-5v {
  60                 compatible = "regulator-fixed";
  61                 regulator-name = "fixed-5V";
  62                 regulator-min-microvolt = <5000000>;
  63                 regulator-max-microvolt = <5000000>;
  64                 regulator-boot-on;
  65                 regulator-always-on;
  66         };
  67
  68         gpio-keys {
  69                 compatible = "gpio-keys";
  70                 pinctrl-names = "default";
  71                 pinctrl-0 = <&key_pins_a>;
  72
  73                 factory {
  74                         label = "factory";
  75                         linux,code = <KEY_RESTART>;
  76                         gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  77                 };
  78         };
  79
  80         leds {
  81                 compatible = "gpio-leds";
  82                 pinctrl-names = "default";
  83                 pinctrl-0 = <&led_pins_unielec>;
  84
  85                 led3 {
  86                         label = "u7623-01:green:led3";
  87                         gpios = <&pio 14 GPIO_ACTIVE_LOW>;
  88                 };
  89
  90                 led4 {
  91                         label = "u7623-01:green:led4";
  92                         gpios = <&pio 15 GPIO_ACTIVE_LOW>;
  93                 };
  94         };
  95 };
  96
  97 &crypto {
  98         status = "okay";
  99 };
 100
 101 &eth {
 102         status = "okay";
 103
 104         gmac0: mac@0 {
 105                 compatible = "mediatek,eth-mac";
 106                 reg = <0>;
 107                 phy-mode = "trgmii";
 108
 109                 fixed-link {
 110                         speed = <1000>;
 111                         full-duplex;
 112                         pause;
 113                 };
 114         };
 115
 116         mdio: mdio-bus {
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119
 120                 mt7530: switch@0 {
 121                         compatible = "mediatek,mt7530";
 122                 };
 123         };
 124 };
 125
 126 &mt7530 {
 127         compatible = "mediatek,mt7530";
 128         #address-cells = <1>;
 129         #size-cells = <0>;
 130         reg = <0>;
 131         pinctrl-names = "default";
 132         mediatek,mcm;
 133         resets = <&ethsys 2>;
 134         reset-names = "mcm";
 135         core-supply = <&mt6323_vpa_reg>;
 136         io-supply = <&mt6323_vemc3v3_reg>;
 137
 138         dsa,mii-bus = <&mdio>;
 139
 140         ports {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143                 reg = <0>;
 144
 145                 port@0 {
 146                         reg = <0>;
 147                         label = "lan0";
 148                         cpu = <&cpu_port0>;
 149                 };
 150
 151                 port@1 {
 152                         reg = <1>;
 153                         label = "lan1";
 154                         cpu = <&cpu_port0>;
 155                 };
 156
 157                 port@2 {
 158                         reg = <2>;
 159                         label = "lan2";
 160                         cpu = <&cpu_port0>;
 161                 };
 162
 163                 port@3 {
 164                         reg = <3>;
 165                         label = "lan3";
 166                         cpu = <&cpu_port0>;
 167                 };
 168
 169                 port@4 {
 170                         reg = <4>;
 171                         label = "wan";
 172                         cpu = <&cpu_port0>;
 173                 };
 174
 175                 cpu_port0: port@6 {
 176                         reg = <6>;
 177                         label = "cpu";
 178                         ethernet = <&gmac0>;
 179                         phy-mode = "trgmii";
 180
 181                         fixed-link {
 182                                 speed = <1000>;
 183                                 full-duplex;
 184                         };
 185                 };
 186         };
 187 };
 188
 189 &mmc0 {
 190         pinctrl-names = "default", "state_uhs";
 191         pinctrl-0 = <&mmc0_pins_default>;
 192         pinctrl-1 = <&mmc0_pins_uhs>;
 193         status = "okay";
 194         bus-width = <8>;
 195         max-frequency = <50000000>;
 196         cap-mmc-highspeed;
 197         vmmc-supply = <&reg_3p3v>;
 198         vqmmc-supply = <&reg_1p8v>;
 199         non-removable;
 200 };
 201
 202 &pio {
 203         key_pins_a: keys-alt {
 204                 pins-keys {
 205                         pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
 206                                  <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
 207                         input-enable;
 208                 };
 209         };
 210
 211         led_pins_unielec: leds-unielec {
 212                 pins-leds {
 213                         pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
 214                                  <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
 215                 };
 216         };
 217
 218         mmc0_pins_default: mmc0default {
 219                 pins_cmd_dat {
 220                         pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 221                                  <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
 222                                  <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
 223                                  <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
 224                                  <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
 225                                  <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
 226                                  <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
 227                                  <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
 228                                  <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
 229                         input-enable;
 230                         bias-pull-up;
 231                 };
 232
 233                 pins_clk {
 234                         pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
 235                         bias-pull-down;
 236                 };
 237
 238                 pins_rst {
 239                         pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
 240                         bias-pull-up;
 241                 };
 242         };
 243
 244         mmc0_pins_uhs: mmc0 {
 245                 pins_cmd_dat {
 246                         pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 247                                  <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
 248                                  <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
 249                                  <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
 250                                  <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
 251                                  <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
 252                                  <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
 253                                  <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
 254                                  <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
 255                         input-enable;
 256                         drive-strength = <MTK_DRIVE_2mA>;
 257                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 258                 };
 259
 260                 pins_clk {
 261                         pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
 262                         drive-strength = <MTK_DRIVE_2mA>;
 263                         bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
 264                 };
 265
 266                 pins_rst {
 267                         pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
 268                         bias-pull-up;
 269                 };
 270         };
 271
 272         pcie_default: pcie_pin_default {
 273                 pins_cmd_dat {
 274                         pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
 275                                  <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
 276                         bias-disable;
 277                 };
 278         };
 279 };
 280
 281 &pwm {
 282         pinctrl-names = "default";
 283         pinctrl-0 = <&pwm_pins_a>;
 284         status = "okay";
 285 };
 286
 287 &pwrap {
 288         mt6323 {
 289                 mt6323led: led {
 290                         compatible = "mediatek,mt6323-led";
 291                         #address-cells = <1>;
 292                         #size-cells = <0>;
 293
 294                         led@0 {
 295                                 reg = <0>;
 296                                 label = "led0";
 297                         };
 298                 };
 299         };
 300 };
 301
 302 &uart2 {
 303         pinctrl-names = "default";
 304         pinctrl-0 = <&uart2_pins_b>;
 305         status = "okay";
 306 };
 307
 308 &usb1 {
 309         vusb33-supply = <&reg_3p3v>;
 310         vbus-supply = <&reg_3p3v>;
 311         status = "okay";
 312 };
 313
 314 &u3phy1 {
 315         status = "okay";
 316 };
 317
 318 &u3phy2 {
 319         status = "okay";
 320         mediatek,phy-switch = <&hifsys>;
 321 };
 322
 323 &pcie {
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&pcie_default>;
 326         status = "okay";
 327
 328         pcie@1,0 {
 329                 status = "okay";
 330         };
 331
 332         pcie@2,0 {
 333                 status = "okay";
 334         };
 335 };
 336
 337 &pcie1_phy {
 338         status = "okay";
 339 };
 340