1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/input/input.h>
8 model = "ipTIME A6004MX";
9 compatible = "iptime,a6004mx", "mediatek,mt7629";
13 led-failsafe = &led_cpu;
14 led-running = &led_cpu;
15 led-upgrade = &led_cpu;
20 stdout-path = "serial0:115200n8";
21 bootargs-override = "console=ttyS0,115200n8";
25 compatible = "gpio-leds";
29 gpios = <&pio 57 GPIO_ACTIVE_LOW>;
33 label = "orange:wlan5g";
34 gpios = <&pio 22 GPIO_ACTIVE_LOW>;
35 // linux,default-trigger = "phy0radio";
39 label = "orange:wlan2g";
40 gpios = <&pio 21 GPIO_ACTIVE_LOW>;
41 // linux,default-trigger = "phy1radio";
46 gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
51 compatible = "gpio-keys";
55 linux,code = <KEY_RESTART>;
56 gpios = <&pio 60 GPIO_ACTIVE_LOW>;
61 linux,code = <KEY_WPS_BUTTON>;
62 gpios = <&pio 58 GPIO_ACTIVE_LOW>;
67 device_type = "memory";
68 reg = <0x40000000 0x10000000>;
71 reg_3p3v: regulator-3p3v {
72 compatible = "regulator-fixed";
73 regulator-name = "fixed-3.3V";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
80 reg_5v: regulator-5v {
81 compatible = "regulator-fixed";
82 regulator-name = "fixed-5V";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
91 pinctrl-names = "default";
92 pinctrl-0 = <ð_pins>;
93 pinctrl-1 = <&ephy_leds_pins>;
97 compatible = "mediatek,eth-mac";
99 phy-mode = "2500base-x";
100 nvmem-cells = <&macaddr_factory_4>;
101 nvmem-cell-names = "mac-address";
102 mac-address-increment = <3>;
112 compatible = "mediatek,eth-mac";
115 phy-handle = <&phy0>;
116 nvmem-cells = <&macaddr_factory_4>;
117 nvmem-cell-names = "mac-address";
118 mac-address-increment = <1>;
122 #address-cells = <1>;
125 phy0: ethernet-phy@0 {
130 compatible = "mediatek,mt7531";
132 reset-gpios = <&pio 28 0>;
133 interrupt-controller;
134 #interrupt-cells = <1>;
135 interrupt-parent = <&pio>;
136 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
139 #address-cells = <1>;
166 phy-mode = "2500base-x";
184 pinctrl-names = "default";
185 pinctrl-0 = <&serial_nand_pins>;
188 compatible = "spi-nand";
190 spi-tx-bus-width = <4>;
191 spi-rx-bus-width = <4>;
192 nand-ecc-engine = <&snfi>;
196 compatible = "fixed-partitions";
197 #address-cells = <1>;
201 label = "Bootloader";
202 reg = <0x0 0x100000>;
208 reg = <0x100000 0x40000>;
213 reg = <0x140000 0x80000>;
216 compatible = "nvmem-cells";
217 #address-cells = <1>;
220 macaddr_factory_4: macaddr@4 {
227 reg = <0x1c0000 0x7400000>;
228 compatible = "denx,fit";
229 openwrt,fit-offset = <0x800>;
243 ephy_leds_pins: ephy-leds-pins {
246 groups = "ephy_leds";
250 /* Serial NAND is shared pin with SPI-NOR */
251 serial_nand_pins: serial-nand-pins {
258 uart0_pins: uart0-pins {
261 groups = "uart0_txd_rxd" ;
265 watchdog_pins: watchdog-pins {
267 function = "watchdog";
274 vusb33-supply = <®_3p3v>;
275 vbus-supply = <®_5v>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&uart0_pins>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&watchdog_pins>;
290 interrupt-controller;
291 #interrupt-cells = <1>;
292 interrupt-parent = <&pio>;
293 interrupts = <GIC_SPI 0x80 IRQ_TYPE_EDGE_FALLING>;