target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "mt7981.dtsi"
   8
   9 / {
  10         model = "Cetron CT3003";
  11         compatible = "cetron,ct3003", "mediatek,mt7981";
  12
  13         aliases {
  14                 serial0 = &uart0;
  15                 label-mac-device = &gmac0;
  16                 led-boot = &led_status_red;
  17                 led-failsafe = &led_status_red;
  18                 led-running = &led_status_green;
  19                 led-upgrade = &led_status_green;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         memory {
  27                 reg = <0 0x40000000 0 0x10000000>;
  28         };
  29
  30         gpio-keys {
  31                 compatible = "gpio-keys";
  32
  33                 reset {
  34                         label = "reset";
  35                         linux,code = <KEY_RESTART>;
  36                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 wps {
  40                         label = "wps";
  41                         linux,code = <KEY_WPS_BUTTON>;
  42                         gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  43                 };
  44         };
  45
  46         leds {
  47                 compatible = "gpio-leds";
  48
  49                 led_status_red: led_status_red {
  50                         label = "red:status";
  51                         gpios = <&pio 3 GPIO_ACTIVE_LOW>;
  52                 };
  53
  54                 led_status_green: led_status_green {
  55                         label = "green:status";
  56                         gpios = <&pio 7 GPIO_ACTIVE_LOW>;
  57                 };
  58         };
  59 };
  60
  61 &eth {
  62         status = "okay";
  63
  64         gmac0: mac@0 {
  65                 compatible = "mediatek,eth-mac";
  66                 reg = <0>;
  67                 phy-mode = "2500base-x";
  68
  69                 nvmem-cells = <&macaddr_art_0 0>;
  70                 nvmem-cell-names = "mac-address";
  71
  72                 fixed-link {
  73                         speed = <2500>;
  74                         full-duplex;
  75                         pause;
  76                 };
  77         };
  78 };
  79
  80 &mdio_bus {
  81         switch: switch@1f {
  82                 compatible = "mediatek,mt7531";
  83                 reg = <31>;
  84                 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
  85                 interrupt-controller;
  86                 #interrupt-cells = <1>;
  87                 interrupt-parent = <&pio>;
  88                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
  89         };
  90 };
  91
  92 &spi0 {
  93         pinctrl-names = "default";
  94         pinctrl-0 = <&spi0_flash_pins>;
  95         status = "okay";
  96
  97         spi_nand@0 {
  98                 compatible = "spi-nand";
  99                 #address-cells = <1>;
 100                 #size-cells = <1>;
 101                 reg = <0>;
 102
 103                 spi-max-frequency = <52000000>;
 104                 spi-tx-bus-width = <4>;
 105                 spi-rx-bus-width = <4>;
 106
 107                 mediatek,nmbm;
 108                 mediatek,bmt-max-ratio = <1>;
 109                 mediatek,bmt-max-reserved-blocks = <64>;
 110
 111                 partitions {
 112                         compatible = "fixed-partitions";
 113                         #address-cells = <1>;
 114                         #size-cells = <1>;
 115
 116                         partition@0 {
 117                                 label = "BL2";
 118                                 reg = <0x0000000 0x0100000>;
 119                                 read-only;
 120                         };
 121
 122                         partition@100000 {
 123                                 label = "u-boot-env";
 124                                 reg = <0x0100000 0x0080000>;
 125                         };
 126
 127                         partition@180000 {
 128                                 label = "art";
 129                                 reg = <0x0180000 0x0100000>;
 130                                 read-only;
 131
 132                                 nvmem-layout {
 133                                         compatible = "fixed-layout";
 134                                         #address-cells = <1>;
 135                                         #size-cells = <1>;
 136
 137                                         macaddr_art_0: macaddr@0 {
 138                                                 compatible = "mac-base";
 139                                                 reg = <0x0 0x6>;
 140                                                 #nvmem-cell-cells = <1>;
 141                                         };
 142                                 };
 143                         };
 144
 145                         factory: partition@280000 {
 146                                 label = "Factory";
 147                                 reg = <0x0280000 0x0100000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@380000 {
 152                                 label = "FIP";
 153                                 reg = <0x0380000 0x0200000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@580000 {
 158                                 label = "ubi";
 159                                 reg = <0x0580000 0x2000000>;
 160                         };
 161
 162                         partition@2580000 {
 163                                 label = "ubi_backup";
 164                                 reg = <0x2580000 0x2000000>;
 165                         };
 166
 167                         partition@4580000 {
 168                                 label = "Config_backup";
 169                                 reg = <0x4580000 0x0400000>;
 170                         };
 171                 };
 172         };
 173 };
 174
 175 &switch {
 176         ports {
 177                 #address-cells = <1>;
 178                 #size-cells = <0>;
 179
 180                 port@0 {
 181                         reg = <0>;
 182                         label = "lan1";
 183                 };
 184
 185                 port@1 {
 186                         reg = <1>;
 187                         label = "lan2";
 188                 };
 189
 190                 port@2 {
 191                         reg = <2>;
 192                         label = "lan3";
 193                 };
 194
 195                 port@3 {
 196                         reg = <3>;
 197                         label = "wan";
 198                         nvmem-cells = <&macaddr_art_0 3>;
 199                         nvmem-cell-names = "mac-address";
 200                 };
 201
 202                 port@6 {
 203                         reg = <6>;
 204                         ethernet = <&gmac0>;
 205                         phy-mode = "2500base-x";
 206
 207                         fixed-link {
 208                                 speed = <2500>;
 209                                 full-duplex;
 210                                 pause;
 211                         };
 212                 };
 213         };
 214 };
 215
 216 &pio {
 217         spi0_flash_pins: spi0-pins {
 218                 mux {
 219                         function = "spi";
 220                         groups = "spi0", "spi0_wp_hold";
 221                 };
 222
 223                 conf-pu {
 224                         pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 225                         drive-strength = <MTK_DRIVE_8mA>;
 226                         bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
 227                 };
 228
 229                 conf-pd {
 230                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 231                         drive-strength = <MTK_DRIVE_8mA>;
 232                         bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 233                 };
 234         };
 235 };
 236
 237 &uart0 {
 238         status = "okay";
 239 };
 240
 241 &watchdog {
 242         status = "okay";
 243 };
 244
 245 &wifi {
 246         status = "okay";
 247
 248         mediatek,mtd-eeprom = <&factory 0x0>;
 249 };