1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
11 model = "Cetron CT3003";
12 compatible = "cetron,ct3003", "mediatek,mt7981";
16 label-mac-device = &gmac0;
17 led-boot = &led_status_red;
18 led-failsafe = &led_status_red;
19 led-running = &led_status_green;
20 led-upgrade = &led_status_green;
24 stdout-path = "serial0:115200n8";
28 reg = <0 0x40000000 0 0x10000000>;
32 compatible = "gpio-keys";
36 linux,code = <KEY_RESTART>;
37 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_WPS_BUTTON>;
43 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
48 compatible = "gpio-leds";
50 led_status_red: led_status_red {
51 function = LED_FUNCTION_STATUS;
52 color = <LED_COLOR_ID_RED>;
53 gpios = <&pio 3 GPIO_ACTIVE_LOW>;
56 led_status_green: led_status_green {
57 function = LED_FUNCTION_STATUS;
58 color = <LED_COLOR_ID_GREEN>;
59 gpios = <&pio 7 GPIO_ACTIVE_LOW>;
68 compatible = "mediatek,eth-mac";
70 phy-mode = "2500base-x";
72 nvmem-cells = <&macaddr_art_0 0>;
73 nvmem-cell-names = "mac-address";
85 compatible = "mediatek,mt7531";
87 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
89 #interrupt-cells = <1>;
90 interrupt-parent = <&pio>;
91 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&spi0_flash_pins>;
101 compatible = "spi-nand";
102 #address-cells = <1>;
106 spi-max-frequency = <52000000>;
107 spi-tx-bus-width = <4>;
108 spi-rx-bus-width = <4>;
111 mediatek,bmt-max-ratio = <1>;
112 mediatek,bmt-max-reserved-blocks = <64>;
115 compatible = "fixed-partitions";
116 #address-cells = <1>;
121 reg = <0x0000000 0x0100000>;
126 label = "u-boot-env";
127 reg = <0x0100000 0x0080000>;
132 reg = <0x0180000 0x0100000>;
136 compatible = "fixed-layout";
137 #address-cells = <1>;
140 macaddr_art_0: macaddr@0 {
141 compatible = "mac-base";
143 #nvmem-cell-cells = <1>;
148 factory: partition@280000 {
150 reg = <0x0280000 0x0100000>;
156 reg = <0x0380000 0x0200000>;
162 reg = <0x0580000 0x2000000>;
166 label = "ubi_backup";
167 reg = <0x2580000 0x2000000>;
171 label = "Config_backup";
172 reg = <0x4580000 0x0400000>;
180 #address-cells = <1>;
201 nvmem-cells = <&macaddr_art_0 3>;
202 nvmem-cell-names = "mac-address";
208 phy-mode = "2500base-x";
220 spi0_flash_pins: spi0-pins {
223 groups = "spi0", "spi0_wp_hold";
227 pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
228 drive-strength = <MTK_DRIVE_8mA>;
229 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
233 pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
234 drive-strength = <MTK_DRIVE_8mA>;
235 bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
251 mediatek,mtd-eeprom = <&factory 0x0>;