1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 compatible = "cmcc,rax3000m", "mediatek,mt7981";
12 nvmem-cells = <&macaddr_factory_2a 0>;
13 nvmem-cell-names = "mac-address";
20 nvmem-cells = <&macaddr_factory_24 0>;
21 nvmem-cell-names = "mac-address";
28 spi0_flash_pins: spi0-pins {
31 groups = "spi0", "spi0_wp_hold";
35 pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
37 mediatek,pull-up-adv = <0>; /* bias-disable */
41 pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
43 mediatek,pull-up-adv = <0>; /* bias-disable */
52 pinctrl-names = "default";
53 pinctrl-0 = <&spi0_flash_pins>;
57 compatible = "spi-nand";
62 spi-max-frequency = <52000000>;
63 spi-tx-bus-width = <4>;
64 spi-rx-bus-width = <4>;
67 compatible = "fixed-partitions";
73 reg = <0x00000 0x0100000>;
79 reg = <0x100000 0x80000>;
82 factory: partition@180000 {
84 reg = <0x180000 0x200000>;
88 compatible = "fixed-layout";
92 macaddr_factory_24: macaddr@24 {
93 compatible = "mac-base";
95 #nvmem-cell-cells = <1>;
98 macaddr_factory_2a: macaddr@2a {
99 compatible = "mac-base";
101 #nvmem-cell-cells = <1>;
108 reg = <0x380000 0x200000>;
114 reg = <0x580000 0x7200000>;
124 mediatek,mtd-eeprom = <&factory 0x0>;