1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 model = "Cudy WR3000 v1";
9 compatible = "cudy,wr3000-v1", "mediatek,mt7981";
13 label-mac-device = &lan1;
14 led-boot = &led_status;
15 led-failsafe = &led_status;
16 led-running = &led_status;
17 led-upgrade = &led_status;
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-keys";
30 linux,code = <KEY_RESTART>;
31 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_WPS_BUTTON>;
37 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
42 compatible = "gpio-leds";
45 label = "blue:status";
46 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
50 label = "blue:internet";
51 gpios = <&pio 11 GPIO_ACTIVE_LOW>;
56 gpios = <&pio 5 GPIO_ACTIVE_LOW>;
61 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
66 gpios = <&pio 6 GPIO_ACTIVE_LOW>;
67 linux,default-trigger = "phy0tpt";
72 gpios = <&pio 7 GPIO_ACTIVE_LOW>;
73 linux,default-trigger = "phy1tpt";
87 pinctrl-names = "default";
88 pinctrl-0 = <&mdio_pins>;
93 compatible = "mediatek,eth-mac";
95 phy-mode = "2500base-x";
97 nvmem-cell-names = "mac-address";
98 nvmem-cells = <&macaddr_bdinfo_de00>;
108 compatible = "mediatek,eth-mac";
116 compatible = "mediatek,mt7531";
118 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&spi0_flash_pins>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&spi2_flash_pins>;
134 #address-cells = <1>;
137 compatible = "jedec,spi-nor";
140 spi-max-frequency = <25000000>;
141 spi-tx-bus-width = <4>;
142 spi-rx-bus-width = <4>;
145 compatible = "fixed-partitions";
146 #address-cells = <1>;
151 reg = <0x00000 0x40000>;
156 label = "u-boot-env";
157 reg = <0x40000 0x10000>;
161 factory: partition@50000 {
163 reg = <0x50000 0x10000>;
167 bdinfo: partition@60000 {
169 reg = <0x60000 0x10000>;
173 compatible = "fixed-layout";
174 #address-cells = <1>;
177 macaddr_bdinfo_de00: macaddr@de00 {
185 reg = <0x70000 0x80000>;
190 compatible = "denx,fit";
192 reg = <0xf0000 0xf10000>;
199 spi0_flash_pins: spi0-pins {
202 groups = "spi0", "spi0_wp_hold";
206 spi2_flash_pins: spi2-pins {
209 groups = "spi2", "spi2_wp_hold";
213 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
214 drive-strength = <8>;
215 bias-pull-up = <103>;
219 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
220 drive-strength = <8>;
221 bias-pull-down = <103>;
228 #address-cells = <1>;
235 nvmem-cell-names = "mac-address";
236 nvmem-cells = <&macaddr_bdinfo_de00>;
237 mac-address-increment = <1>;
244 nvmem-cell-names = "mac-address";
245 nvmem-cells = <&macaddr_bdinfo_de00>;
252 nvmem-cell-names = "mac-address";
253 nvmem-cells = <&macaddr_bdinfo_de00>;
260 nvmem-cell-names = "mac-address";
261 nvmem-cells = <&macaddr_bdinfo_de00>;
268 phy-mode = "2500base-x";
281 mediatek,mtd-eeprom = <&factory 0x0>;