mediatek: add support for the GL.iNet GL-MT3000
[openwrt/staging/jow.git] / target / linux / mediatek / dts / mt7981b-glinet-gl-mt3000.dts
1 /dts-v1/;
2
3 #include "mt7981.dtsi"
4
5 / {
6 model = "GL.iNet GL-MT3000";
7 compatible = "glinet,gl-mt3000", "mediatek,mt7981";
8
9 aliases {
10 led-boot = &led_lightblue;
11 led-failsafe = &led_lightblue;
12 led-running = &led_white;
13 led-upgrade = &led_lightblue;
14 serial0 = &uart0;
15 };
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 gpio-keys {
22 compatible = "gpio-keys";
23
24 reset {
25 label = "reset";
26 linux,code = <KEY_RESTART>;
27 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
28 };
29
30 mode {
31 label = "mode";
32 linux,input-type = <EV_SW>;
33 linux,code = <BTN_0>;
34 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
35 debounce-interval = <60>;
36 };
37 };
38
39 leds {
40 compatible = "gpio-leds";
41
42 led_lightblue: led@0 {
43 label = "blue:run";
44 gpios = <&pio 31 GPIO_ACTIVE_LOW>;
45 };
46
47 led_white: led@1 {
48 label = "white:system";
49 gpios = <&pio 30 GPIO_ACTIVE_LOW>;
50 };
51 };
52
53 fan_5v: regulator-fan-5v {
54 compatible = "regulator-fixed";
55 regulator-name = "fan";
56 regulator-min-microvolt = <5000000>;
57 regulator-max-microvolt = <5000000>;
58 gpio = <&pio 28 GPIO_ACTIVE_HIGH>;
59 enable-active-high;
60 regulator-boot-on;
61 };
62
63 usb_vbus: regulator-usb-vbus {
64 compatible = "regulator-fixed";
65 regulator-name = "usb_vbus";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
68 gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
69 enable-active-high;
70 regulator-boot-on;
71 };
72 };
73
74 &uart0 {
75 status = "okay";
76 };
77
78 &watchdog {
79 status = "okay";
80 };
81
82 &eth {
83 pinctrl-names = "default";
84 pinctrl-0 = <&mdio_pins>;
85
86 status = "okay";
87
88 gmac0: mac@0 {
89 compatible = "mediatek,eth-mac";
90 reg = <0>;
91 phy-mode = "2500base-x";
92 phy-handle = <&phy0>;
93 nvmem-cells = <&macaddr>;
94 nvmem-cell-names = "mac-address";
95 };
96
97 gmac1: mac@1 {
98 compatible = "mediatek,eth-mac";
99 reg = <1>;
100 phy-mode = "gmii";
101 phy-handle = <&int_gbe_phy>;
102 nvmem-cells = <&macaddr>;
103 nvmem-cell-names = "mac-address";
104 mac-address-increment = <1>;
105 };
106 };
107
108 &mdio_bus {
109 reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
110 reset-delay-us = <600>;
111 reset-post-delay-us = <20000>;
112
113 phy0: ethernet-phy@5 {
114 reg = <5>;
115 compatible = "ethernet-phy-ieee802.3-c45";
116 phy-mode = "2500base-x";
117 };
118 };
119
120 &pwm {
121 pinctrl-names = "default";
122 pinctrl-0 = <&pwm_pins>;
123
124 status = "okay";
125 };
126
127 &fan {
128 pwms = <&pwm 0 40000 0>;
129 fan-supply = <&fan_5v>;
130 interrupt-parent = <&pio>;
131 interrupts = <29 IRQ_TYPE_EDGE_RISING>;
132 status = "okay";
133 };
134
135 &spi0 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&spi0_flash_pins>;
138 status = "okay";
139
140 spi_nand: flash@0 {
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "spi-nand";
144 reg = <0>;
145 spi-max-frequency = <52000000>;
146
147 spi-cal-enable;
148 spi-cal-mode = "read-data";
149 spi-cal-datalen = <7>;
150 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
151 spi-cal-addrlen = <5>;
152 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
153
154 spi-tx-buswidth = <4>;
155 spi-rx-buswidth = <4>;
156 mediatek,nmbm;
157 mediatek,bmt-max-ratio = <1>;
158 mediatek,bmt-max-reserved-blocks = <64>;
159
160 partitions {
161 compatible = "fixed-partitions";
162 #address-cells = <1>;
163 #size-cells = <1>;
164
165 partition@0 {
166 label = "BL2";
167 reg = <0x00000 0x0100000>;
168 read-only;
169 };
170
171 partition@100000 {
172 label = "u-boot-env";
173 reg = <0x0100000 0x0080000>;
174 };
175
176 factory: partition@180000 {
177 label = "Factory";
178 reg = <0x180000 0x0200000>;
179 read-only;
180
181 compatible = "nvmem-cells";
182 #address-cells = <1>;
183 #size-cells = <1>;
184
185 macaddr: macaddr@a {
186 reg = <0xa 0x6>;
187 };
188 };
189
190 partition@380000 {
191 label = "FIP";
192 reg = <0x380000 0x0200000>;
193 read-only;
194 };
195
196 partition@580000 {
197 label = "log";
198 reg = <0x580000 0x0040000>;
199 };
200
201 partition@5c0000 {
202 label = "ubi";
203 reg = <0x5c0000 0xf640000>;
204 compatible = "linux,ubi";
205 };
206 };
207 };
208 };
209
210 &pio {
211 spi0_flash_pins: spi0-pins {
212 mux {
213 function = "spi";
214 groups = "spi0", "spi0_wp_hold";
215 };
216 };
217
218 pwm_pins: pwm0-pins {
219 mux {
220 function = "pwm";
221 groups = "pwm0_1";
222 };
223 };
224 };
225
226 &usb_phy {
227 status = "okay";
228 };
229
230 &xhci {
231 vbus-supply = <&usb_vbus>;
232
233 status = "okay";
234 };
235
236 &wifi {
237 mediatek,mtd-eeprom = <&factory 0x0>;
238
239 status = "okay";
240 };