37b381d9842318115abc006bd49c1ce3c3c2ae2e
[openwrt/staging/jow.git] / target / linux / mediatek / dts / mt7981b-yuncore-ax835.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2
3 /dts-v1/;
4
5 #include "mt7981.dtsi"
6
7 / {
8 compatible = "yuncore,ax835", "mediatek,mt7981";
9 model = "YunCore AX835";
10
11 aliases {
12 ethernet0 = &gmac0;
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 serial0 = &uart0;
18 };
19
20 chosen {
21 stdout-path = "serial0:115200n8";
22 };
23
24 gpio-keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "reset";
29 linux,code = <KEY_RESTART>;
30 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
31 };
32 };
33
34 reg_led_vbus {
35 compatible = "regulator-fixed";
36 regulator-name = "led_vbus";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-always-on;
40 gpio = <&pio 5 GPIO_ACTIVE_HIGH>;
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 led_system: led_system {
47 label = "red:system";
48 gpios = <&pio 4 GPIO_ACTIVE_LOW>;
49 };
50
51 led_wifi24 {
52 label = "green:wifi2";
53 gpios = <&pio 34 GPIO_ACTIVE_LOW>;
54 linux,default-trigger = "phy0tpt";
55 };
56
57 led_wifi5 {
58 label = "blue:wifi5";
59 gpios = <&pio 35 GPIO_ACTIVE_LOW>;
60 linux,default-trigger = "phy1tpt";
61 };
62
63 led_hwwatchdog {
64 // a gpio-wdt watchdog couldn't be made to work.
65 // the device rebooted after 5 minutes.
66 label = "hwwatchdog";
67 gpios = <&pio 7 GPIO_ACTIVE_LOW>;
68 linux,default-trigger = "timer";
69 led-pattern = <1000>, <1000>;
70 };
71
72 // there's another "syswatchdog" on gpio2
73 };
74 };
75
76 &eth {
77 pinctrl-names = "default";
78 pinctrl-0 = <&mdio_pins>;
79
80 status = "okay";
81
82 gmac0: mac@0 {
83 compatible = "mediatek,eth-mac";
84 reg = <0>;
85 phy-mode = "2500base-x";
86
87 nvmem-cell-names = "mac-address";
88 nvmem-cells = <&macaddr_factory_2a>;
89
90 fixed-link {
91 speed = <2500>;
92 full-duplex;
93 pause;
94 };
95 };
96 };
97
98 &mdio_bus {
99 switch: switch@1f {
100 compatible = "mediatek,mt7531";
101 reg = <31>;
102 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
103 };
104 };
105
106 &pio {
107 spi0_flash_pins: spi0-pins {
108 mux {
109 function = "spi";
110 groups = "spi0", "spi0_wp_hold";
111 };
112 };
113
114 spi2_flash_pins: spi2-pins {
115 mux {
116 function = "spi";
117 groups = "spi2", "spi2_wp_hold";
118 };
119
120 conf-pu {
121 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
122 drive-strength = <8>;
123 bias-pull-up = <103>;
124 };
125
126 conf-pd {
127 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
128 drive-strength = <8>;
129 bias-pull-down = <103>;
130 };
131 };
132 };
133
134 &spi0 {
135 pinctrl-names = "default";
136 pinctrl-0 = <&spi0_flash_pins>;
137 status = "disabled";
138 };
139
140 &spi2 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&spi2_flash_pins>;
143 status = "okay";
144
145 flash@0 {
146 #address-cells = <1>;
147 #size-cells = <1>;
148
149 compatible = "jedec,spi-nor";
150 reg = <0>;
151
152 spi-max-frequency = <52000000>;
153 spi-tx-buswidth = <4>;
154 spi-rx-buswidth = <4>;
155
156 partitions {
157 compatible = "fixed-partitions";
158 #address-cells = <1>;
159 #size-cells = <1>;
160
161 partition@00000 {
162 label = "BL2";
163 reg = <0x00000 0x40000>;
164 read-only;
165 };
166
167 partition@40000 {
168 label = "u-boot-env";
169 reg = <0x40000 0x10000>;
170 read-only;
171 };
172
173 factory: partition@50000 {
174 label = "Factory";
175 reg = <0x50000 0x10000>;
176 read-only;
177
178 nvmem-layout {
179 compatible = "fixed-layout";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 eeprom_factory: eeprom@0 {
184 reg = <0x0 0x1000>;
185 };
186
187 macaddr_factory_4: macaddr@4 {
188 reg = <0x4 0x6>;
189 };
190
191 macaddr_factory_24: macaddr@24 {
192 reg = <0x24 0x6>;
193 };
194
195 macaddr_factory_2a: macaddr@2a {
196 reg = <0x2a 0x6>;
197 };
198 };
199 };
200
201 partition@100000 {
202 label = "FIP";
203 reg = <0x100000 0x80000>;
204 read-only;
205 };
206
207 partition@180000 {
208 compatible = "denx,fit";
209 label = "firmware";
210 reg = <0x180000 0xe00000>;
211 };
212 };
213 };
214 };
215
216 &switch {
217 ports {
218 #address-cells = <1>;
219 #size-cells = <0>;
220
221 port@3 {
222 reg = <3>;
223 label = "lan";
224 };
225
226 port@4 {
227 reg = <4>;
228 label = "wan";
229 };
230
231 port@6 {
232 reg = <6>;
233 label = "cpu";
234 ethernet = <&gmac0>;
235 phy-mode = "2500base-x";
236
237 fixed-link {
238 speed = <2500>;
239 full-duplex;
240 pause;
241 };
242 };
243 };
244 };
245
246 &uart0 {
247 status = "okay";
248 };
249
250 &watchdog {
251 status = "okay";
252 };
253
254 &wifi {
255 status = "okay";
256 nvmem-cells = <&eeprom_factory 0>;
257 nvmem-cell-names = "eeprom";
258 };