1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
7 model = "ZyXEL NWA50AX Pro";
8 compatible = "zyxel,nwa50ax-pro", "mediatek,mt7981";
11 led-boot = &led_green;
12 led-failsafe = &led_red;
13 led-running = &led_green;
14 led-upgrade = &led_red;
16 label-mac-device = &gmac1;
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-keys";
28 linux,code = <KEY_RESTART>;
29 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
34 compatible = "gpio-leds";
37 label = "green:system";
38 gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
42 label = "blue:system";
43 gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
48 gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&mdio_pins>;
68 compatible = "mediatek,eth-mac";
70 phy-mode = "2500base-x";
74 nvmem-cells = <&macaddr_mrd_1fff8>;
75 nvmem-cell-names = "mac-address";
80 reset-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
81 reset-delay-us = <1500000>;
82 reset-post-delay-us = <1000000>;
84 phy0: ethernet-phy@5 {
86 compatible = "ethernet-phy-ieee802.3-c45";
88 /* LED0: Amber ; LED1: nc ; LED2: nc ; LED3: Green */
89 mxl,led-config = <0x3b0 0x0 0x0 0x3c0>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&spi0_flash_pins>;
101 compatible = "spi-nand";
103 spi-max-frequency = <52000000>;
106 spi-cal-mode = "read-data";
107 spi-cal-datalen = <7>;
108 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
109 spi-cal-addrlen = <5>;
110 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
112 spi-tx-buswidth = <4>;
113 spi-rx-buswidth = <4>;
115 mediatek,bmt-max-ratio = <1>;
116 mediatek,bmt-max-reserved-blocks = <64>;
118 mediatek,bmt-remap-range =
120 <0xef00000 0xef80000>;
123 compatible = "fixed-partitions";
124 #address-cells = <1>;
129 reg = <0x00000 0x0100000>;
134 label = "u-boot-env";
135 reg = <0x0100000 0x0080000>;
138 factory: partition@180000 {
140 reg = <0x180000 0x0200000>;
143 compatible = "nvmem-cells";
144 #address-cells = <1>;
154 reg = <0x380000 0x0200000>;
160 reg = <0x580000 0x3200000>;
165 reg = <0x3780000 0x3200000>;
170 label = "rootfs-data";
171 reg = <0x6980000 0x3c00000>;
177 reg = <0xa580000 0x3a80000>;
183 reg = <0xe000000 0xf00000>;
188 label = "bootconfig";
189 reg = <0xef00000 0x80000>;
194 reg = <0xef80000 0x80000>;
197 compatible = "nvmem-cells";
198 #address-cells = <1>;
201 macaddr_mrd_1fff8: macaddr@1fff8 {
210 spi0_flash_pins: spi0-pins {
213 groups = "spi0", "spi0_wp_hold";
217 pwm_pins: pwm0-pins {
228 mediatek,mtd-eeprom = <&factory 0x0>;