1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
7 model = "ZyXEL NWA50AX Pro";
8 compatible = "zyxel,nwa50ax-pro", "mediatek,mt7981";
11 led-boot = &led_green;
12 led-failsafe = &led_red;
13 led-running = &led_green;
14 led-upgrade = &led_red;
16 label-mac-device = &gmac1;
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-keys";
28 linux,code = <KEY_RESTART>;
29 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
34 compatible = "gpio-leds";
37 label = "green:system";
38 gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
42 label = "blue:system";
43 gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
48 gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&mdio_pins>;
68 compatible = "mediatek,eth-mac";
70 phy-mode = "2500base-x";
74 nvmem-cells = <&macaddr_mrd_1fff8>;
75 nvmem-cell-names = "mac-address";
80 reset-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
81 reset-delay-us = <1500000>;
82 reset-post-delay-us = <1000000>;
84 phy0: ethernet-phy@5 {
86 compatible = "ethernet-phy-ieee802.3-c45";
91 pinctrl-names = "default";
92 pinctrl-0 = <&spi0_flash_pins>;
98 compatible = "spi-nand";
100 spi-max-frequency = <52000000>;
103 spi-cal-mode = "read-data";
104 spi-cal-datalen = <7>;
105 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
106 spi-cal-addrlen = <5>;
107 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
109 spi-tx-buswidth = <4>;
110 spi-rx-buswidth = <4>;
112 mediatek,bmt-max-ratio = <1>;
113 mediatek,bmt-max-reserved-blocks = <64>;
115 mediatek,bmt-remap-range =
117 <0xef00000 0xef80000>;
120 compatible = "fixed-partitions";
121 #address-cells = <1>;
126 reg = <0x00000 0x0100000>;
131 label = "u-boot-env";
132 reg = <0x0100000 0x0080000>;
135 factory: partition@180000 {
137 reg = <0x180000 0x0200000>;
140 compatible = "nvmem-cells";
141 #address-cells = <1>;
151 reg = <0x380000 0x0200000>;
157 reg = <0x580000 0x3200000>;
162 reg = <0x3780000 0x3200000>;
167 label = "rootfs-data";
168 reg = <0x6980000 0x3c00000>;
174 reg = <0xa580000 0x3a80000>;
180 reg = <0xe000000 0xf00000>;
185 label = "bootconfig";
186 reg = <0xef00000 0x80000>;
191 reg = <0xef80000 0x80000>;
194 compatible = "nvmem-cells";
195 #address-cells = <1>;
198 macaddr_mrd_1fff8: macaddr@1fff8 {
207 spi0_flash_pins: spi0-pins {
210 groups = "spi0", "spi0_wp_hold";
214 pwm_pins: pwm0-pins {
225 mediatek,mtd-eeprom = <&factory 0x0>;