1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
8 #include "mt7986a.dtsi"
11 model = "Acer Predator W6";
12 compatible = "acer,predator-w6", "mediatek,mt7986a";
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
23 stdout-path = "serial0:115200n8";
24 bootargs = "dm-mod.create=\"dm-verity,,,ro,0 31544 verity 1 PARTLABEL=rootfs PARTLABEL=rootfs 4096 4096 3943 3944 sha256 2f969fa9e9e4e20b37746f22633e85b178f5db7c143e11f92733a704299cc933 2dd56e34b15c6c84573cf26c4392028421061d2c808975217b45e9a5b49d2087\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1";
28 reg = <0 0x40000000 0 0x20000000>;
31 reg_1p8v: regulator-1p8v {
32 compatible = "regulator-fixed";
33 regulator-name = "fixed-1.8V";
34 regulator-min-microvolt = <1800000>;
35 regulator-max-microvolt = <1800000>;
40 reg_3p3v: regulator-3p3v {
41 compatible = "regulator-fixed";
42 regulator-name = "fixed-3.3V";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
49 reg_5v: regulator-5v {
50 compatible = "regulator-fixed";
51 regulator-name = "fixed-5V";
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
59 compatible = "gpio-keys";
63 linux,code = <KEY_RESTART>;
64 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
69 linux,code = <KEY_WPS_BUTTON>;
70 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
76 compatible = "gpio-leds";
80 gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
81 default-state = "off";
86 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
87 default-state = "off";
92 gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
93 default-state = "off";
98 gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
99 default-state = "off";
103 label = "ant1:green";
104 gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
105 default-state = "off";
110 gpios = <&pio 33 GPIO_ACTIVE_HIGH>;
111 default-state = "off";
116 gpios = <&pio 38 GPIO_ACTIVE_HIGH>;
117 default-state = "off";
121 label = "ant2:green";
122 gpios = <&pio 37 GPIO_ACTIVE_HIGH>;
123 default-state = "off";
128 gpios = <&pio 26 GPIO_ACTIVE_HIGH>;
129 default-state = "off";
134 gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
135 default-state = "off";
139 label = "ant3:green";
140 gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
141 default-state = "off";
146 gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
147 default-state = "off";
152 gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
153 default-state = "off";
157 label = "ant4:green";
158 gpios = <&pio 27 GPIO_ACTIVE_HIGH>;
159 default-state = "off";
164 gpios = <&pio 32 GPIO_ACTIVE_HIGH>;
165 default-state = "off";
170 gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
171 default-state = "off";
175 label = "ant5:green";
176 gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
177 default-state = "off";
182 gpios = <&pio 43 GPIO_ACTIVE_HIGH>;
183 default-state = "off";
194 compatible = "mediatek,eth-mac";
196 phy-mode = "2500base-x";
207 compatible = "mediatek,eth-mac";
209 phy-mode = "2500base-x";
210 phy-handle = <&phy6>;
214 #address-cells = <1>;
221 compatible = "ethernet-phy-ieee802.3-c45";
224 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
225 reset-assert-us = <10000>;
226 reset-deassert-us = <10000>;
228 /* LED0: nc ; LED1: nc ; LED2: Amber ; LED3: Green */
229 mxl,led-config = <0x0 0x0 0x370 0x80>;
233 compatible = "mediatek,mt7531";
236 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
237 reset-assert-us = <10000>;
238 reset-deassert-us = <10000>;
243 mmc0_pins_default: mmc0-pins {
249 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
250 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
251 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
253 drive-strength = <4>;
254 mediatek,pull-up-adv = <1>; /* pull-up 10K */
258 drive-strength = <6>;
259 mediatek,pull-down-adv = <2>; /* pull-down 50K */
263 mediatek,pull-down-adv = <2>; /* pull-down 50K */
267 drive-strength = <4>;
268 mediatek,pull-up-adv = <1>; /* pull-up 10K */
272 mmc0_pins_uhs: mmc0-uhs-pins {
278 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
279 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
280 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
282 drive-strength = <4>;
283 mediatek,pull-up-adv = <1>; /* pull-up 10K */
287 drive-strength = <6>;
288 mediatek,pull-down-adv = <2>; /* pull-down 50K */
292 mediatek,pull-down-adv = <2>; /* pull-down 50K */
296 drive-strength = <4>;
297 mediatek,pull-up-adv = <1>; /* pull-up 10K */
301 pcie_pins: pcie-pins {
304 groups = "pcie_pereset";
308 wf_2g_5g_pins: wf_2g_5g-pins {
311 groups = "wf_2g", "wf_5g";
314 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
315 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
316 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
317 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
318 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
319 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
320 "WF1_TOP_CLK", "WF1_TOP_DATA";
321 drive-strength = <4>;
325 wf_dbdc_pins: wf-dbdc-pins {
331 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
332 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
333 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
334 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
335 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
336 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
337 "WF1_TOP_CLK", "WF1_TOP_DATA";
338 drive-strength = <4>;
345 #address-cells = <1>;
372 phy-mode = "2500base-x";
383 #address-cells = <1>;
389 mediatek,led-config = <
390 0x21 0x8009 /* BASIC_CTRL */
391 0x22 0x0c00 /* ON_DURATION */
392 0x23 0x1400 /* BLINK_DURATION */
393 0x24 0xc001 /* LED0_ON_CTRL */
394 0x25 0x0000 /* LED0_BLINK_CTRL */
395 0x26 0xc007 /* LED1_ON_CTRL */
396 0x27 0x003f /* LED1_BLINK_CTRL */
403 mediatek,led-config = <
404 0x21 0x8009 /* BASIC_CTRL */
405 0x22 0x0c00 /* ON_DURATION */
406 0x23 0x1400 /* BLINK_DURATION */
407 0x24 0xc001 /* LED0_ON_CTRL */
408 0x25 0x0000 /* LED0_BLINK_CTRL */
409 0x26 0xc007 /* LED1_ON_CTRL */
410 0x27 0x003f /* LED1_BLINK_CTRL */
417 mediatek,led-config = <
418 0x21 0x8009 /* BASIC_CTRL */
419 0x22 0x0c00 /* ON_DURATION */
420 0x23 0x1400 /* BLINK_DURATION */
421 0x24 0xc001 /* LED0_ON_CTRL */
422 0x25 0x0000 /* LED0_BLINK_CTRL */
423 0x26 0xc007 /* LED1_ON_CTRL */
424 0x27 0x003f /* LED1_BLINK_CTRL */
431 mediatek,led-config = <
432 0x21 0x8009 /* BASIC_CTRL */
433 0x22 0x0c00 /* ON_DURATION */
434 0x23 0x1400 /* BLINK_DURATION */
435 0x24 0xc001 /* LED0_ON_CTRL */
436 0x25 0x0000 /* LED0_BLINK_CTRL */
437 0x26 0xc007 /* LED1_ON_CTRL */
438 0x27 0x003f /* LED1_BLINK_CTRL */
446 pinctrl-names = "default", "dbdc";
447 pinctrl-0 = <&wf_2g_5g_pins>;
448 pinctrl-1 = <&wf_dbdc_pins>;
468 vusb33-supply = <®_3p3v>;
469 vbus-supply = <®_5v>;
479 pinctrl-names = "default", "state_uhs";
480 pinctrl-0 = <&mmc0_pins_default>;
481 pinctrl-1 = <&mmc0_pins_uhs>;
483 max-frequency = <200000000>;
487 hs400-ds-delay = <0x14014>;
488 vmmc-supply = <®_3p3v>;
489 vqmmc-supply = <®_1p8v>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&pcie_pins>;