1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
8 #include "mt7986a.dtsi"
11 model = "ASUS TUF-AX4200";
12 compatible = "asus,tuf-ax4200", "mediatek,mt7986a";
16 led-boot = &led_system;
17 led-failsafe = &led_system;
18 led-running = &led_system;
19 led-upgrade = &led_system;
23 stdout-path = "serial0:115200n8";
24 bootargs-override = "ubi.mtd=UBI_DEV";
28 reg = <0 0x40000000 0 0x20000000>;
32 compatible = "gpio-keys";
36 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
37 linux,code = <KEY_RESTART>;
42 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_WPS_BUTTON>;
48 compatible = "gpio-leds";
51 label = "white:wlan24";
52 gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
53 linux,default-trigger = "phy0tpt";
57 label = "white:wlan5";
58 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
59 linux,default-trigger = "phy1tpt";
63 label = "white:system";
64 gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
69 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
73 reg_3p3v: regulator-3p3v {
74 compatible = "regulator-fixed";
75 regulator-name = "fixed-3.3V";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
82 reg_5v: regulator-5v {
83 compatible = "regulator-fixed";
84 regulator-name = "fixed-5V";
85 regulator-min-microvolt = <5000000>;
86 regulator-max-microvolt = <5000000>;
97 compatible = "mediatek,eth-mac";
99 phy-mode = "2500base-x";
110 compatible = "mediatek,eth-mac";
112 phy-mode = "2500base-x";
113 phy-handle = <&phy6>;
117 #address-cells = <1>;
124 compatible = "ethernet-phy-ieee802.3-c45";
127 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
128 reset-assert-us = <10000>;
129 reset-deassert-us = <10000>;
131 /* LED0: CONN (WAN white) */
132 mxl,led-config = <0x00f0 0x0 0x0 0x0>;
136 compatible = "mediatek,mt7531";
139 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
140 reset-assert-us = <10000>;
141 reset-deassert-us = <10000>;
146 spi_flash_pins: spi-flash-pins-33-to-38 {
149 groups = "spi0", "spi0_wp_hold";
152 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
153 drive-strength = <8>;
154 mediatek,pull-up-adv = <0>; /* bias-disable */
157 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
158 drive-strength = <8>;
159 mediatek,pull-down-adv = <0>; /* bias-disable */
163 wf_2g_5g_pins: wf_2g_5g-pins {
166 groups = "wf_2g", "wf_5g";
169 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
170 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
171 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
172 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
173 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
174 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
175 "WF1_TOP_CLK", "WF1_TOP_DATA";
176 drive-strength = <4>;
180 wf_dbdc_pins: wf-dbdc-pins {
186 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
187 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
188 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
189 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
190 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
191 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
192 "WF1_TOP_CLK", "WF1_TOP_DATA";
193 drive-strength = <4>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&spi_flash_pins>;
203 spi_nand_flash: flash@0 {
204 compatible = "spi-nand";
205 #address-cells = <1>;
209 spi-max-frequency = <20000000>;
210 spi-tx-buswidth = <4>;
211 spi-rx-buswidth = <4>;
213 partitions: partitions {
214 compatible = "fixed-partitions";
215 #address-cells = <1>;
219 label = "bootloader";
220 reg = <0x0 0x400000>;
226 reg = <0x400000 0xfc00000>;
234 #address-cells = <1>;
261 phy-mode = "2500base-x";
272 #address-cells = <1>;
278 mediatek,led-config = <
279 0x21 0x8009 /* BASIC_CTRL */
280 0x22 0x0c00 /* ON_DURATION */
281 0x23 0x1400 /* BLINK_DURATION */
282 0x24 0x8000 /* LED0_ON_CTRL */
283 0x25 0x0000 /* LED0_BLINK_CTRL */
284 0x26 0xc007 /* LED1_ON_CTRL */
285 0x27 0x003f /* LED1_BLINK_CTRL */
292 mediatek,led-config = <
293 0x21 0x8009 /* BASIC_CTRL */
294 0x22 0x0c00 /* ON_DURATION */
295 0x23 0x1400 /* BLINK_DURATION */
296 0x24 0x8000 /* LED0_ON_CTRL */
297 0x25 0x0000 /* LED0_BLINK_CTRL */
298 0x26 0xc007 /* LED1_ON_CTRL */
299 0x27 0x003f /* LED1_BLINK_CTRL */
306 mediatek,led-config = <
307 0x21 0x8009 /* BASIC_CTRL */
308 0x22 0x0c00 /* ON_DURATION */
309 0x23 0x1400 /* BLINK_DURATION */
310 0x24 0x8000 /* LED0_ON_CTRL */
311 0x25 0x0000 /* LED0_BLINK_CTRL */
312 0x26 0xc007 /* LED1_ON_CTRL */
313 0x27 0x003f /* LED1_BLINK_CTRL */
320 mediatek,led-config = <
321 0x21 0x8009 /* BASIC_CTRL */
322 0x22 0x0c00 /* ON_DURATION */
323 0x23 0x1400 /* BLINK_DURATION */
324 0x24 0x8000 /* LED0_ON_CTRL */
325 0x25 0x0000 /* LED0_BLINK_CTRL */
326 0x26 0xc007 /* LED1_ON_CTRL */
327 0x27 0x003f /* LED1_BLINK_CTRL */
335 pinctrl-names = "default", "dbdc";
336 pinctrl-0 = <&wf_2g_5g_pins>;
337 pinctrl-1 = <&wf_dbdc_pins>;
345 vusb33-supply = <®_3p3v>;
346 vbus-supply = <®_5v>;