target/linux/mediatek/dts/mt7986a-glinet-gl-mt6000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/pinctrl/mt65xx.h>
   7
   8 #include "mt7986a.dtsi"
   9
  10 / {
  11         model = "GL.iNet GL-MT6000";
  12         compatible = "glinet,gl-mt6000", "mediatek,mt7986a";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20                 bootargs-append = " root=PARTLABEL=rootfs rootwait";
  21         };
  22
  23         reg_1p8v: regulator-1p8v {
  24                 compatible = "regulator-fixed";
  25                 regulator-name = "1.8vd";
  26                 regulator-min-microvolt = <1800000>;
  27                 regulator-max-microvolt = <1800000>;
  28                 regulator-boot-on;
  29                 regulator-always-on;
  30         };
  31
  32         reg_3p3v: regulator-3p3v {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "fixed-3.3V";
  35                 regulator-min-microvolt = <3300000>;
  36                 regulator-max-microvolt = <3300000>;
  37                 regulator-boot-on;
  38                 regulator-always-on;
  39         };
  40
  41         keys {
  42                 compatible = "gpio-keys";
  43
  44                 reset {
  45                         label = "reset";
  46                         linux,code = <KEY_RESTART>;
  47                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 led_run: led@0 {
  55                         label = "blue:run";
  56                         gpios = <&pio 38 GPIO_ACTIVE_LOW>;
  57                         default-state = "on";
  58                 };
  59
  60                 led@1 {
  61                         label = "white:system";
  62                         gpios = <&pio 37 GPIO_ACTIVE_LOW>;
  63                 };
  64         };
  65
  66         usb_vbus: regulator-usb-vbus {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "usb_vbus";
  69                 regulator-min-microvolt = <5000000>;
  70                 regulator-max-microvolt = <5000000>;
  71                 gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
  72                 enable-active-high;
  73                 regulator-boot-on;
  74         };
  75 };
  76
  77 &eth {
  78         status = "okay";
  79
  80         gmac0: mac@0 {
  81                 compatible = "mediatek,eth-mac";
  82                 reg = <0>;
  83                 phy-mode = "2500base-x";
  84
  85                 fixed-link {
  86                         speed = <2500>;
  87                         full-duplex;
  88                         pause;
  89                 };
  90         };
  91
  92         gmac1: mac@1 {
  93                 compatible = "mediatek,eth-mac";
  94                 reg = <1>;
  95                 phy-mode = "2500base-x";
  96                 phy-handle = <&phy1>;
  97         };
  98
  99         mdio: mdio-bus {
 100                 #address-cells = <1>;
 101                 #size-cells = <0>;
 102
 103                 phy1: phy@1 {
 104                         compatible = "ethernet-phy-ieee802.3-c45";
 105                         reg = <1>;
 106                         reset-assert-us = <100000>;
 107                         reset-deassert-us = <100000>;
 108                         reset-gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 109                         interrupt-parent = <&pio>;
 110                         interrupts = <46 IRQ_TYPE_LEVEL_LOW>;
 111                         realtek,aldps-enable;
 112                 };
 113
 114                 phy7: ethernet-phy@7 {
 115                         compatible = "ethernet-phy-ieee802.3-c45";
 116                         reg = <7>;
 117                         reset-assert-us = <100000>;
 118                         reset-deassert-us = <100000>;
 119                         reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>;
 120                         interrupt-parent = <&pio>;
 121                         interrupts = <47 IRQ_TYPE_LEVEL_LOW>;
 122                         realtek,aldps-enable;
 123                 };
 124
 125                 switch: switch@1f {
 126                         compatible = "mediatek,mt7531";
 127                         reg = <31>;
 128                         reset-gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
 129                         interrupt-controller;
 130                         #interrupt-cells = <1>;
 131                         interrupt-parent = <&pio>;
 132                         interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 133
 134                         ports {
 135                                 #address-cells = <1>;
 136                                 #size-cells = <0>;
 137
 138                                 port@0 {
 139                                         reg = <0>;
 140                                         label = "lan2";
 141                                 };
 142
 143                                 port@1 {
 144                                         reg = <1>;
 145                                         label = "lan3";
 146                                 };
 147
 148                                 port@2 {
 149                                         reg = <2>;
 150                                         label = "lan4";
 151                                 };
 152
 153                                 port@3 {
 154                                         reg = <3>;
 155                                         label = "lan5";
 156                                 };
 157
 158                                 port@5 {
 159                                         reg = <5>;
 160                                         label = "lan1";
 161                                         phy-handle = <&phy7>;
 162                                         phy-mode = "2500base-x";
 163                                 };
 164
 165                                 port@6 {
 166                                         reg = <6>;
 167                                         ethernet = <&gmac0>;
 168                                         phy-mode = "2500base-x";
 169
 170                                         fixed-link {
 171                                                 speed = <2500>;
 172                                                 full-duplex;
 173                                                 pause;
 174                                         };
 175                                 };
 176                         };
 177                 };
 178         };
 179 };
 180
 181 &pio {
 182         wf_2g_5g_pins: wf_2g_5g-pins {
 183                 mux {
 184                         function = "wifi";
 185                         groups = "wf_2g", "wf_5g";
 186                 };
 187                 conf {
 188                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 189                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 190                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 191                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 192                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 193                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 194                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 195                         drive-strength = <4>;
 196                 };
 197         };
 198
 199         mmc0_pins_default: mmc0-pins {
 200                 mux {
 201                         function = "emmc";
 202                         groups = "emmc_51";
 203                 };
 204                 conf-cmd-dat {
 205                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 206                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 207                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 208                         input-enable;
 209                         drive-strength = <4>;
 210                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 211                 };
 212                 conf-clk {
 213                         pins = "EMMC_CK";
 214                         drive-strength = <6>;
 215                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 216                 };
 217                 conf-ds {
 218                         pins = "EMMC_DSL";
 219                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 220                 };
 221                 conf-rst {
 222                         pins = "EMMC_RSTB";
 223                         drive-strength = <4>;
 224                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 225                 };
 226         };
 227
 228         mmc0_pins_uhs: mmc0-uhs-pins {
 229                 mux {
 230                         function = "emmc";
 231                         groups = "emmc_51";
 232                 };
 233                 conf-cmd-dat {
 234                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 235                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 236                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 237                         input-enable;
 238                         drive-strength = <4>;
 239                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 240                 };
 241                 conf-clk {
 242                         pins = "EMMC_CK";
 243                         drive-strength = <6>;
 244                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 245                 };
 246                 conf-ds {
 247                         pins = "EMMC_DSL";
 248                         mediatek,pull-down-adv = <2>;   /* pull-down 50K */
 249                 };
 250                 conf-rst {
 251                         pins = "EMMC_RSTB";
 252                         drive-strength = <4>;
 253                         mediatek,pull-up-adv = <1>;     /* pull-up 10K */
 254                 };
 255         };
 256 };
 257
 258 &crypto {
 259         status = "okay";
 260 };
 261
 262 &ssusb {
 263         vusb33-supply = <&reg_3p3v>;
 264         vbus-supply = <&usb_vbus>;
 265         status = "okay";
 266 };
 267
 268 &trng {
 269         status = "okay";
 270 };
 271
 272 &uart0 {
 273         status = "okay";
 274 };
 275
 276 &usb_phy {
 277         status = "okay";
 278 };
 279
 280 &watchdog {
 281         status = "okay";
 282 };
 283
 284 &wifi {
 285         pinctrl-names = "default";
 286         pinctrl-0 = <&wf_2g_5g_pins>;
 287         status = "okay";
 288 };
 289
 290 &mmc0 {
 291         pinctrl-names = "default", "state_uhs";
 292         pinctrl-0 = <&mmc0_pins_default>;
 293         pinctrl-1 = <&mmc0_pins_uhs>;
 294         bus-width = <8>;
 295         max-frequency = <200000000>;
 296         cap-mmc-highspeed;
 297         mmc-hs200-1_8v;
 298         mmc-hs400-1_8v;
 299         hs400-ds-delay = <0x14014>;
 300         vmmc-supply = <&reg_3p3v>;
 301         vqmmc-supply = <&reg_1p8v>;
 302         non-removable;
 303         no-sd;
 304         no-sdio;
 305         status = "okay";
 306 };