mediatek: add support for Adtran SmartRG Bonanza Peak series
[openwrt/staging/robimarko.git] / target / linux / mediatek / dts / mt7986a-smartrg-bonanza-peak.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2022 SmartRG Inc.
4 * Author: Chad Monroe <chad.monroe@smartrg.com>
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11
12 #include "mt7986a.dtsi"
13
14 / {
15 aliases {
16 serial0 = &uart0;
17 ethernet0 = &gmac0;
18 ethernet1 = &gmac1;
19 led-boot = &led_status_green;
20 led-failsafe = &led_status_red;
21 led-running = &led_status_white;
22 led-upgrade = &led_status_blue;
23 };
24
25 chosen {
26 stdout-path = "serial0:115200n8";
27 bootargs = "root=/dev/mmcblk0p5";
28 };
29
30 memory@40000000 {
31 device_type = "memory";
32 reg = <0 0x40000000 0 0x40000000>;
33 };
34
35 reserved-memory {
36 #address-cells = <2>;
37 #size-cells = <2>;
38 ranges;
39
40 /delete-node/ramoops@42ff0000;
41
42 bootdata_reserved: bootdata@45000000 {
43 no-map;
44 reg = <0x0 0x45000000 0x0 0x00001000>;
45 };
46
47 ramoops_reserved: ramoops@45001000 {
48 no-map;
49 compatible = "ramoops";
50 reg = <0x0 0x45001000 0x0 0x00140000>;
51 ftrace-size = <0x20000>;
52 record-size = <0x20000>;
53 console-size = <0x20000>;
54 pmsg-size = <0x80000>;
55 };
56 };
57
58 bootdata {
59 compatible = "bootdata";
60 memory-region = <&bootdata_reserved>;
61 };
62
63 reg_1p8v: regulator-1p8v {
64 compatible = "regulator-fixed";
65 regulator-name = "fixed-1.8V";
66 regulator-min-microvolt = <1800000>;
67 regulator-max-microvolt = <1800000>;
68 regulator-boot-on;
69 regulator-always-on;
70 };
71
72 reg_3p3v: regulator-3p3v {
73 compatible = "regulator-fixed";
74 regulator-name = "fixed-3.3V";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
77 regulator-boot-on;
78 regulator-always-on;
79 };
80
81 reg_5v: regulator-5v {
82 compatible = "regulator-fixed";
83 regulator-name = "fixed-5V";
84 regulator-min-microvolt = <5000000>;
85 regulator-max-microvolt = <5000000>;
86 regulator-boot-on;
87 regulator-always-on;
88 };
89
90 fan: pwm-fan {
91 compatible = "pwm-fan";
92 #cooling-cells = <2>;
93 pwms = <&pwm 1 40000 0>;
94
95 /**
96 * set fan speed
97 *
98 * 0 = off
99 * 51 = 20% duty cycle (minimum supported)
100 * 61 = 24% duty cycle (2020 RPM)
101 * 77 = 30% duty cycle (3000 RPM)
102 * 102 = 40% duty cycle (3600 RPM)
103 * 255 = 100% duty cycle
104 */
105 cooling-levels = <51 61 77 102>;
106
107 interrupt-parent = <&pio>;
108 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
109 pulses-per-revolution = <2>;
110
111 status = "okay";
112 };
113
114 keys {
115 compatible = "gpio-keys";
116 pinctrl-names = "default";
117 pinctrl-0 = <&button_pins>;
118
119 button-reset {
120 label = "reset";
121 linux,code = <KEY_RESTART>;
122 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
123 };
124 };
125 };
126
127 &cpu_thermal {
128 cooling-maps {
129 cpu-active-high {
130 /* active: set fan to cooling level 3 */
131 cooling-device = <&fan 3 3>;
132 trip = <&cpu_trip_active_high>;
133 };
134
135 cpu-active-medium {
136 /* active: set fan to cooling level 2 */
137 cooling-device = <&fan 2 2>;
138 trip = <&cpu_trip_active_medium>;
139 };
140
141 cpu-active-low {
142 /* active: set fan to cooling level 1 */
143 cooling-device = <&fan 1 1>;
144 trip = <&cpu_trip_active_low>;
145 };
146
147 cpu-active-silent {
148 /* active: set fan to cooling level 0 */
149 cooling-device = <&fan 0 0>;
150 trip = <&cpu_trip_active_silent>;
151 };
152 };
153
154 trips {
155 cpu_trip_active_high: active-high {
156 temperature = <110000>;
157 hysteresis = <2000>;
158 type = "active";
159 };
160
161 cpu_trip_active_medium: active-medium {
162 temperature = <80000>;
163 hysteresis = <2000>;
164 type = "active";
165 };
166
167 cpu_trip_active_low: active-low {
168 temperature = <60000>;
169 hysteresis = <2000>;
170 type = "active";
171 };
172
173 cpu_trip_active_silent: active-silent {
174 temperature = <40000>;
175 hysteresis = <2000>;
176 type = "active";
177 };
178 };
179 };
180
181 &crypto {
182 status = "okay";
183 };
184
185 &eth {
186 status = "okay";
187
188 gmac0: mac@0 {
189 compatible = "mediatek,eth-mac";
190 reg = <0>;
191
192 phy-mode = "2500base-x";
193 };
194
195 gmac1: mac@1 {
196 label = "wan";
197
198 compatible = "mediatek,eth-mac";
199 reg = <1>;
200
201 phy-mode = "2500base-x";
202 };
203
204 mdio: mdio-bus {
205 #address-cells = <1>;
206 #size-cells = <0>;
207 };
208 };
209
210 &mdio {
211 #address-cells = <1>;
212 #size-cells = <0>;
213
214 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
215 reset-delay-us = <1500000>;
216 reset-post-delay-us = <1000000>;
217
218 phy5: ethernet-phy@5 {
219 /* GPY211 */
220 compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
221 reg = <5>;
222
223 mxl,led-drive-vdd;
224 mxl,led-config = <0x30 0x40 0x80 0x0>;
225 };
226
227 phy6: ethernet-phy@6 {
228 /* GPY211 */
229 compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
230 reg = <6>;
231
232 mxl,led-drive-vdd;
233 mxl,led-config = <0x30 0x40 0x80 0x0>;
234 };
235 };
236
237 &crypto {
238 status = "okay";
239 };
240
241 &mmc0 {
242 pinctrl-names = "default", "state_uhs";
243 pinctrl-0 = <&mmc0_pins_default>;
244 pinctrl-1 = <&mmc0_pins_uhs>;
245 bus-width = <8>;
246 max-frequency = <200000000>;
247 cap-mmc-highspeed;
248 mmc-hs200-1_8v;
249 mmc-hs400-1_8v;
250 hs400-ds-delay = <0x14014>;
251 vmmc-supply = <&reg_3p3v>;
252 vqmmc-supply = <&reg_1p8v>;
253 non-removable;
254 no-sd;
255 no-sdio;
256 status = "okay";
257 };
258
259 &pcie {
260 pinctrl-names = "default";
261 pinctrl-0 = <&pcie_pins>;
262 status = "disabled";
263
264 slot0: pcie@0,0 {
265 reg = <0x0000 0 0 0 0>;
266
267 radio0: mt7915@0,0 {
268 reg = <0x0000 0 0 0 0>;
269 };
270 };
271 };
272
273 &pcie_phy {
274 status = "disabled";
275 };
276
277 &wifi {
278 status = "okay";
279 pinctrl-names = "default";
280 pinctrl-0 = <&wf_2g_5g_pins>;
281 };
282
283 &pio {
284 mmc0_pins_default: mmc0-pins {
285 mux {
286 function = "emmc";
287 groups = "emmc_51";
288 };
289 conf-cmd-dat {
290 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
291 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
292 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
293 input-enable;
294 drive-strength = <4>;
295 mediatek,pull-up-adv = <1>; /* pull-up 10K */
296 };
297 conf-clk {
298 pins = "EMMC_CK";
299 drive-strength = <6>;
300 mediatek,pull-down-adv = <2>; /* pull-down 50K */
301 };
302 conf-ds {
303 pins = "EMMC_DSL";
304 mediatek,pull-down-adv = <2>; /* pull-down 50K */
305 };
306 conf-rst {
307 pins = "EMMC_RSTB";
308 drive-strength = <4>;
309 mediatek,pull-up-adv = <1>; /* pull-up 10K */
310 };
311 };
312
313 mmc0_pins_uhs: mmc0-uhs-pins {
314 mux {
315 function = "emmc";
316 groups = "emmc_51";
317 };
318 conf-cmd-dat {
319 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
320 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
321 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
322 input-enable;
323 drive-strength = <4>;
324 mediatek,pull-up-adv = <1>; /* pull-up 10K */
325 };
326 conf-clk {
327 pins = "EMMC_CK";
328 drive-strength = <6>;
329 mediatek,pull-down-adv = <2>; /* pull-down 50K */
330 };
331 conf-ds {
332 pins = "EMMC_DSL";
333 mediatek,pull-down-adv = <2>; /* pull-down 50K */
334 };
335 conf-rst {
336 pins = "EMMC_RSTB";
337 drive-strength = <4>;
338 mediatek,pull-up-adv = <1>; /* pull-up 10K */
339 };
340 };
341
342 pcie_pins: pcie-pins {
343 mux {
344 function = "pcie";
345 groups = "pcie_clk", "pcie_pereset";
346 };
347 };
348
349 button_pins: button-pins {
350 pins = "GPIO_12";
351 mediatek,pull-down-adv = <0>; /* bias-disable */
352 };
353
354 uart1_pins: uart1-pins {
355 mux {
356 function = "uart";
357 groups = "uart1_2_rx_tx", "uart1_2_cts_rts";
358 };
359 };
360
361 i2c0_pins: i2c0-pins {
362 mux {
363 function = "i2c";
364 groups = "i2c";
365 };
366 };
367
368 pwm_pins: pwm-pins {
369 mux {
370 function = "pwm";
371 groups = "pwm0", "pwm1_0";
372 };
373 };
374
375 wf_2g_5g_pins: wf-2g-5g-pins {
376 mux {
377 function = "wifi";
378 groups = "wf_2g", "wf_5g";
379 };
380 conf {
381 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
382 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
383 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
384 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
385 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
386 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
387 "WF1_TOP_CLK", "WF1_TOP_DATA";
388 drive-strength = <4>;
389 };
390 };
391
392 mux_sel: mux-sel-hog {
393 gpio-hog;
394 gpios = <23 GPIO_ACTIVE_LOW>;
395 line-name = "mux-sel";
396 output-high;
397 };
398
399 mux_oe: mux-oe-hog {
400 gpio-hog;
401 gpios = <24 GPIO_ACTIVE_LOW>;
402 line-name = "mux-oe";
403 output-high;
404 };
405 };
406
407 &ssusb {
408 vusb33-supply = <&reg_3p3v>;
409 vbus-supply = <&reg_5v>;
410 status = "okay";
411 };
412
413 &trng {
414 status = "okay";
415 };
416
417 &uart0 {
418 status = "okay";
419 };
420
421 &uart1 {
422 pinctrl-names = "default";
423 pinctrl-0 = <&uart1_pins>;
424 status = "okay";
425
426 /* DA14531MOD Bluetooth */
427 bluetooth {
428 compatible = "renesas,DA14531";
429 reset-gpios = <&pio 27 GPIO_ACTIVE_LOW>;
430 };
431 };
432
433 &usb_phy {
434 status = "okay";
435 };
436
437 &i2c0 {
438 pinctrl-names = "default";
439 pinctrl-0 = <&i2c0_pins>;
440 status = "okay";
441
442 system-leds {
443 compatible = "srg,sysled";
444 reg = <0x30>;
445
446 led_status_red: led@1 {
447 color = <LED_COLOR_ID_RED>;
448 function = LED_FUNCTION_STATUS;
449 reg = <1>;
450 };
451
452 led_status_green: led@2 {
453 color = <LED_COLOR_ID_GREEN>;
454 function = LED_FUNCTION_STATUS;
455 reg = <2>;
456 };
457
458 led_status_blue: led@3 {
459 color = <LED_COLOR_ID_BLUE>;
460 function = LED_FUNCTION_STATUS;
461 reg = <3>;
462 };
463
464 led_status_white: led@4 {
465 color = <LED_COLOR_ID_WHITE>;
466 function = LED_FUNCTION_STATUS;
467 reg = <4>;
468 };
469 };
470 };
471
472 &pwm {
473 pinctrl-names = "default";
474 pinctrl-0 = <&pwm_pins>;
475 status = "okay";
476 };
477
478 &watchdog {
479 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
480 status = "okay";
481 };