1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
7 #include "mt7986a.dtsi"
12 label-mac-device = &gmac0;
13 led-boot = &led_status_green;
14 led-failsafe = &led_status_red;
15 led-running = &led_status_green;
16 led-upgrade = &led_status_red;
20 stdout-path = "serial0:115200n8";
24 reg = <0 0x40000000 0 0x20000000>;
27 reg_3p3v: regulator-3p3v {
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
36 reg_5v: regulator-5v {
37 compatible = "regulator-fixed";
38 regulator-name = "fixed-5V";
39 regulator-min-microvolt = <5000000>;
40 regulator-max-microvolt = <5000000>;
46 compatible = "gpio-keys";
50 linux,code = <KEY_RESTART>;
51 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
56 linux,code = <KEY_WPS_BUTTON>;
57 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
63 gpios = <&pio 11 GPIO_ACTIVE_LOW>;
68 compatible = "gpio-leds";
70 led_status_red: status_red {
71 function = LED_FUNCTION_STATUS;
72 color = <LED_COLOR_ID_RED>;
73 gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
76 led_status_green: status_green {
77 function = LED_FUNCTION_STATUS;
78 color = <LED_COLOR_ID_GREEN>;
79 gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
83 label = "green:turbo";
84 gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
97 compatible = "mediatek,eth-mac";
99 phy-mode = "2500base-x";
101 nvmem-cells = <&macaddr_config_1c 0>;
102 nvmem-cell-names = "mac-address";
112 compatible = "mediatek,eth-mac";
114 phy-handle = <&phy7>;
115 phy-mode = "2500base-x";
117 nvmem-cells = <&macaddr_config_1c 1>;
118 nvmem-cell-names = "mac-address";
122 #address-cells = <1>;
128 phy5: ethernet-phy@5 {
129 compatible = "ethernet-phy-ieee802.3-c45";
131 reset-assert-us = <100000>;
132 reset-deassert-us = <100000>;
133 reset-gpios = <&pio 13 GPIO_ACTIVE_LOW>;
134 realtek,aldps-enable;
137 phy7: ethernet-phy@7 {
138 compatible = "ethernet-phy-ieee802.3-c45";
140 reset-assert-us = <100000>;
141 reset-deassert-us = <100000>;
142 reset-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
143 realtek,aldps-enable;
147 compatible = "mediatek,mt7531";
149 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
150 interrupt-controller;
151 #interrupt-cells = <1>;
152 interrupt-parent = <&pio>;
153 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&spi_flash_pins>;
163 compatible = "spi-nand";
164 #address-cells = <1>;
168 spi-max-frequency = <20000000>;
169 spi-tx-bus-width = <4>;
170 spi-rx-bus-width = <4>;
173 compatible = "fixed-partitions";
174 #address-cells = <1>;
179 reg = <0x000000 0x0100000>;
183 config: partition@100000 {
185 reg = <0x100000 0x0060000>;
189 compatible = "fixed-layout";
190 #address-cells = <1>;
193 macaddr_config_1c: macaddr@1c {
194 compatible = "mac-base";
196 #nvmem-cell-cells = <1>;
201 factory: partition@160000 {
203 reg = <0x160000 0x0060000>;
209 reg = <0x1c0000 0x01c0000>;
215 reg = <0x380000 0x0200000>;
221 reg = <0x580000 0x7800000>;
228 spi_flash_pins: spi-flash-pins-33-to-38 {
231 groups = "spi0", "spi0_wp_hold";
234 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
235 drive-strength = <8>;
236 mediatek,pull-up-adv = <0>; /* bias-disable */
239 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
240 drive-strength = <8>;
241 mediatek,pull-down-adv = <0>; /* bias-disable */
247 vusb33-supply = <®_3p3v>;
248 vbus-supply = <®_5v>;
269 mediatek,mtd-eeprom = <&factory 0x0>;
270 nvmem-cells = <&macaddr_config_1c 2>;
271 nvmem-cell-names = "mac-address";