1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
8 #include "mt7986a.dtsi"
11 model = "Xiaomi Redmi Router AX6000";
12 compatible = "xiaomi,redmi-router-ax6000", "mediatek,mt7986a";
16 led-boot = &led_status_rgb;
17 led-failsafe = &led_status_rgb;
18 led-running = &led_status_rgb;
19 led-upgrade = &led_status_rgb;
23 stdout-path = "serial0:115200n8";
27 reg = <0 0x40000000 0 0x20000000>;
31 compatible = "gpio-keys";
35 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_RESTART>;
41 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
43 linux,input-type = <EV_SW>;
52 compatible = "mediatek,eth-mac";
54 phy-mode = "2500base-x";
56 nvmem-cells = <&macaddr_factory_4>;
57 nvmem-cell-names = "mac-address";
58 mac-address-increment = <(-1)>;
75 compatible = "mediatek,mt7531";
77 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
79 #interrupt-cells = <1>;
80 interrupt-parent = <&pio>;
81 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
86 spi_flash_pins: spi-flash-pins-33-to-38 {
89 groups = "spi0", "spi0_wp_hold";
92 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
94 mediatek,pull-up-adv = <0>; /* bias-disable */
97 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
99 mediatek,pull-down-adv = <0>; /* bias-disable */
103 spi_led_pins: spic-pins-29-to-32 {
110 wf_2g_5g_pins: wf_2g_5g-pins {
113 groups = "wf_2g", "wf_5g";
116 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
117 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
118 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
119 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
120 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
121 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
122 "WF1_TOP_CLK", "WF1_TOP_DATA";
123 drive-strength = <4>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&spi_flash_pins>;
135 compatible = "spi-nand";
136 #address-cells = <1>;
141 mediatek,bmt-max-ratio = <1>;
142 mediatek,bmt-max-reserved-blocks = <64>;
144 spi-max-frequency = <20000000>;
145 spi-tx-buswidth = <4>;
146 spi-rx-buswidth = <4>;
149 compatible = "fixed-partitions";
150 #address-cells = <1>;
155 reg = <0x0 0x100000>;
161 reg = <0x100000 0x40000>;
166 reg = <0x140000 0x40000>;
169 factory: partition@180000 {
171 reg = <0x180000 0x200000>;
174 compatible = "nvmem-cells";
175 #address-cells = <1>;
178 macaddr_factory_4: macaddr@4 {
185 reg = <0x380000 0x200000>;
191 reg = <0x580000 0x40000>;
197 reg = <0x5c0000 0x40000>;
201 /* ubi partition is the result of squashing
202 * consecutive stock partitions:
209 reg = <0x600000 0x6e00000>;
212 /* last 12 MiB is reserved for NMBM bad block table */
218 pinctrl-names = "default";
219 pinctrl-0 = <&spi_led_pins>;
223 #address-cells = <1>;
225 compatible = "worldsemi,ws2812b";
227 spi-max-frequency = <3000000>;
229 led_status_rgb: led@0 {
231 label = "rgb:status";
232 color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
235 led_network_rgb: led@1 {
237 label = "rgb:network";
238 color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
245 #address-cells = <1>;
272 phy-mode = "2500base-x";
285 pinctrl-names = "default";
286 pinctrl-0 = <&wf_2g_5g_pins>;
288 mediatek,mtd-eeprom = <&factory 0x0>;