target/linux/mediatek/dts/mt7986a-xiaomi-redmi-router-ax6000.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/leds/common.h>
   7
   8 #include "mt7986a.dtsi"
   9
  10 / {
  11         model = "Xiaomi Redmi Router AX6000";
  12         compatible = "xiaomi,redmi-router-ax6000", "mediatek,mt7986a";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 led-boot = &led_status_rgb;
  17                 led-failsafe = &led_status_rgb;
  18                 led-running = &led_status_rgb;
  19                 led-upgrade = &led_status_rgb;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         memory {
  27                 reg = <0 0x40000000 0 0x20000000>;
  28         };
  29
  30         keys {
  31                 compatible = "gpio-keys";
  32
  33                 reset {
  34                         label = "reset";
  35                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_RESTART>;
  37                 };
  38
  39                 mesh {
  40                         label = "mesh";
  41                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  42                         linux,code = <BTN_9>;
  43                         linux,input-type = <EV_SW>;
  44                 };
  45         };
  46 };
  47
  48 &eth {
  49         status = "okay";
  50
  51         gmac0: mac@0 {
  52                 compatible = "mediatek,eth-mac";
  53                 reg = <0>;
  54                 phy-mode = "2500base-x";
  55
  56                 nvmem-cells = <&macaddr_factory_4>;
  57                 nvmem-cell-names = "mac-address";
  58                 mac-address-increment = <(-1)>;
  59
  60                 fixed-link {
  61                         speed = <2500>;
  62                         full-duplex;
  63                         pause;
  64                 };
  65         };
  66
  67         mdio: mdio-bus {
  68                 #address-cells = <1>;
  69                 #size-cells = <0>;
  70         };
  71 };
  72
  73 &mdio {
  74         switch: switch@0 {
  75                 compatible = "mediatek,mt7531";
  76                 reg = <31>;
  77                 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  78                 interrupt-controller;
  79                 #interrupt-cells = <1>;
  80                 interrupt-parent = <&pio>;
  81                 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
  82         };
  83 };
  84
  85 &pio {
  86         spi_flash_pins: spi-flash-pins-33-to-38 {
  87                 mux {
  88                         function = "spi";
  89                         groups = "spi0", "spi0_wp_hold";
  90                 };
  91                 conf-pu {
  92                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
  93                         drive-strength = <8>;
  94                         mediatek,pull-up-adv = <0>; /* bias-disable */
  95                 };
  96                 conf-pd {
  97                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
  98                         drive-strength = <8>;
  99                         mediatek,pull-down-adv = <0>; /* bias-disable */
 100                 };
 101         };
 102
 103         spi_led_pins: spic-pins-29-to-32 {
 104                 mux {
 105                         function = "spi";
 106                         groups = "spi1_2";
 107                 };
 108         };
 109
 110         wf_2g_5g_pins: wf_2g_5g-pins {
 111                 mux {
 112                         function = "wifi";
 113                         groups = "wf_2g", "wf_5g";
 114                 };
 115                 conf {
 116                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 117                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 118                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 119                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 120                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 121                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 122                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 123                         drive-strength = <4>;
 124                 };
 125         };
 126 };
 127
 128 &spi0 {
 129         pinctrl-names = "default";
 130         pinctrl-0 = <&spi_flash_pins>;
 131         cs-gpios = <0>, <0>;
 132         status = "okay";
 133
 134         flash@0 {
 135                 compatible = "spi-nand";
 136                 #address-cells = <1>;
 137                 #size-cells = <1>;
 138                 reg = <0>;
 139
 140                 mediatek,nmbm;
 141                 mediatek,bmt-max-ratio = <1>;
 142                 mediatek,bmt-max-reserved-blocks = <64>;
 143
 144                 spi-max-frequency = <20000000>;
 145                 spi-tx-buswidth = <4>;
 146                 spi-rx-buswidth = <4>;
 147
 148                 partitions {
 149                         compatible = "fixed-partitions";
 150                         #address-cells = <1>;
 151                         #size-cells = <1>;
 152
 153                         partition@0 {
 154                                 label = "BL2";
 155                                 reg = <0x0 0x100000>;
 156                                 read-only;
 157                         };
 158
 159                         partition@100000 {
 160                                 label = "Nvram";
 161                                 reg = <0x100000 0x40000>;
 162                         };
 163
 164                         partition@140000 {
 165                                 label = "Bdata";
 166                                 reg = <0x140000 0x40000>;
 167                         };
 168
 169                         factory: partition@180000 {
 170                                 label = "Factory";
 171                                 reg = <0x180000 0x200000>;
 172                                 read-only;
 173
 174                                 compatible = "nvmem-cells";
 175                                 #address-cells = <1>;
 176                                 #size-cells = <1>;
 177
 178                                 macaddr_factory_4: macaddr@4 {
 179                                         reg = <0x4 0x6>;
 180                                 };
 181                         };
 182
 183                         partition@380000 {
 184                                 label = "FIP";
 185                                 reg = <0x380000 0x200000>;
 186                                 read-only;
 187                         };
 188
 189                         partition@580000 {
 190                                 label = "crash";
 191                                 reg = <0x580000 0x40000>;
 192                                 read-only;
 193                         };
 194
 195                         partition@5c0000 {
 196                                 label = "crash_log";
 197                                 reg = <0x5c0000 0x40000>;
 198                                 read-only;
 199                         };
 200
 201                         /* ubi partition is the result of squashing
 202                          * consecutive stock partitions:
 203                          * - ubi
 204                          * - ubi1
 205                          * - overlay
 206                          */
 207                         partition@600000 {
 208                                 label = "ubi";
 209                                 reg = <0x600000 0x6e00000>;
 210                         };
 211
 212                         /* last 12 MiB is reserved for NMBM bad block table */
 213                 };
 214         };
 215 };
 216
 217 &spi1 {
 218         pinctrl-names = "default";
 219         pinctrl-0 = <&spi_led_pins>;
 220         status = "okay";
 221
 222         ws2812b@0 {
 223                 #address-cells = <1>;
 224                 #size-cells = <0>;
 225                 compatible = "worldsemi,ws2812b";
 226                 reg = <0>;
 227                 spi-max-frequency = <3000000>;
 228
 229                 led_status_rgb: led@0 {
 230                         reg = <0>;
 231                         label = "rgb:status";
 232                         color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
 233                 };
 234
 235                 led_network_rgb: led@1 {
 236                         reg = <1>;
 237                         label = "rgb:network";
 238                         color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
 239                 };
 240         };
 241 };
 242
 243 &switch {
 244         ports {
 245                 #address-cells = <1>;
 246                 #size-cells = <0>;
 247
 248                 port@1 {
 249                         reg = <1>;
 250                         label = "lan4";
 251                 };
 252
 253                 port@2 {
 254                         reg = <2>;
 255                         label = "lan3";
 256                 };
 257
 258                 port@3 {
 259                         reg = <3>;
 260                         label = "lan2";
 261                 };
 262
 263                 port@4 {
 264                         reg = <4>;
 265                         label = "wan";
 266                 };
 267
 268                 port@6 {
 269                         reg = <6>;
 270                         label = "cpu";
 271                         ethernet = <&gmac0>;
 272                         phy-mode = "2500base-x";
 273
 274                         fixed-link {
 275                                 speed = <2500>;
 276                                 full-duplex;
 277                                 pause;
 278                         };
 279                 };
 280         };
 281 };
 282
 283 &wmac {
 284         status = "okay";
 285         pinctrl-names = "default";
 286         pinctrl-0 = <&wf_2g_5g_pins>;
 287
 288         mediatek,mtd-eeprom = <&factory 0x0>;
 289 };
 290
 291 &uart0 {
 292         status = "okay";
 293 };