mediatek: use mac-base
[openwrt/staging/hauke.git] / target / linux / mediatek / dts / mt7986a-zyxel-ex5601-t0-common.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7 #include "mt7986a.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10
11 / {
12 aliases {
13 serial0 = &uart0;
14 label-mac-device = &gmac0;
15 led-boot = &led_status_green;
16 led-failsafe = &led_status_red;
17 led-running = &led_status_green;
18 led-upgrade = &led_status_red;
19 };
20
21 chosen {
22 stdout-path = "serial0:115200n8";
23 };
24
25 memory {
26 reg = <0 0x40000000 0 0x40000000>;
27 };
28
29 reg_1p8v: regulator-1p8v {
30 compatible = "regulator-fixed";
31 regulator-name = "fixed-1.8V";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 regulator-boot-on;
35 regulator-always-on;
36 };
37
38 reg_3p3v: regulator-3p3v {
39 compatible = "regulator-fixed";
40 regulator-name = "fixed-3.3V";
41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>;
43 regulator-boot-on;
44 regulator-always-on;
45 };
46
47 reg_5v: regulator-5v {
48 compatible = "regulator-fixed";
49 regulator-name = "fixed-5V";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
52 regulator-boot-on;
53 regulator-always-on;
54 };
55
56 gpio-keys {
57 compatible = "gpio-keys";
58 poll-interval = <20>;
59
60 reset-button {
61 label = "reset";
62 gpios = <&pio 21 GPIO_ACTIVE_LOW>;
63 linux,code = <KEY_RESTART>;
64 };
65
66 wlan-button {
67 label = "wlan";
68 gpios = <&pio 11 GPIO_ACTIVE_LOW>;
69 linux,code = <KEY_WLAN>;
70 };
71 wps-button {
72 label = "wps";
73 gpios = <&pio 56 GPIO_ACTIVE_LOW>;
74 linux,code = <KEY_WPS_BUTTON>;
75 };
76 };
77
78 leds {
79 compatible = "gpio-leds";
80
81 led_green_wifi24g {
82 label = "green:wifi24g";
83 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
84 default-state = "off";
85 };
86
87 led_green_wifi5g {
88 label = "green:wifi5g";
89 gpios = <&pio 2 GPIO_ACTIVE_LOW>;
90 default-state = "off";
91 };
92
93 led_green_inet {
94 label = "green:inet";
95 gpios = <&pio 14 GPIO_ACTIVE_LOW>;
96 default-state = "off";
97 };
98
99 led_red_inet {
100 label = "red:inet";
101 gpios = <&pio 15 GPIO_ACTIVE_LOW>;
102 default-state = "off";
103 };
104
105 led_status_green: led_green_pwr {
106 label = "green:pwr";
107 gpios = <&pio 13 GPIO_ACTIVE_LOW>;
108 linux,default-trigger = "timer"; /* Default blinking */
109 led-pattern = <125 125>; /* Fast blink is 4 HZ */
110 };
111
112 led_status_red: led_red_pwr {
113 label = "red:pwr";
114 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
115 default-state = "off";
116 };
117
118 led_green_fxs {
119 label = "green:fxs";
120 gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
121 default-state = "off";
122 };
123
124 led_amber_fxs {
125 label = "amber:fxs";
126 gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
127 default-state = "off";
128 };
129
130 led_amber_wps24g {
131 label = "amber:wps24g";
132 gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
133 default-state = "off";
134 };
135
136 led_amber_wps5g {
137 label = "amber:wps5g";
138 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
139 default-state = "off";
140 };
141
142 led_green_lan {
143 label = "green:lan";
144 gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
145 default-state = "off";
146 };
147
148 led_green_sfp {
149 label = "green:sfp";
150 gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
151 default-state = "off";
152 };
153 };
154 };
155
156 &spi0 {
157 pinctrl-names = "default";
158 pinctrl-0 = <&spi_flash_pins>;
159 cs-gpios = <0>, <0>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 status = "okay";
163
164 spi_nand: spi_nand@0 {
165 #address-cells = <1>;
166 #size-cells = <1>;
167 compatible = "spi-nand";
168 reg = <1>;
169 spi-max-frequency = <10000000>;
170 spi-tx-bus-width = <4>;
171 spi-rx-bus-width = <4>;
172
173 nand_partitions: partitions {
174 compatible = "fixed-partitions";
175 #address-cells = <1>;
176 #size-cells = <1>;
177 };
178 };
179 };
180
181 &eth {
182 pinctrl-names = "default";
183 pinctrl-0 = <&eth_pins>;
184 status = "okay";
185
186 gmac0: mac@0 {
187 compatible = "mediatek,eth-mac";
188 reg = <0>;
189 phy-mode = "2500base-x";
190
191 fixed-link {
192 speed = <2500>;
193 full-duplex;
194 pause;
195 };
196 };
197
198 gmac1: mac@1 {
199 compatible = "mediatek,eth-mac";
200 reg = <1>;
201 phy-mode = "2500base-x";
202 phy = <&phy6>;
203 };
204
205 mdio: mdio-bus {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
209 reset-delay-us = <1500000>;
210 reset-post-delay-us = <1000000>;
211
212 phy5: phy@5 {
213 compatible = "ethernet-phy-ieee802.3-c45";
214 reg = <5>;
215 mxl,led-config = <0x03f0 0x0 0x0 0x0>;
216 };
217
218 phy6: phy@6 {
219 compatible = "ethernet-phy-ieee802.3-c45";
220 reg = <6>;
221 mxl,led-config = <0x00f0 0x0 0x0 0x0>;
222 };
223
224 switch@1f {
225 compatible = "mediatek,mt7531";
226 reg = <31>;
227 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
228
229 ports {
230 #address-cells = <1>;
231 #size-cells = <0>;
232
233 port@1 {
234 reg = <1>;
235 label = "lan2";
236 };
237
238 port@2 {
239 reg = <2>;
240 label = "lan3";
241 };
242
243 port@3 {
244 reg = <3>;
245 label = "lan4";
246 };
247
248 port@5 {
249 reg = <5>;
250 label = "lan1";
251 phy-mode = "2500base-x";
252 phy = <&phy5>;
253 };
254
255 port@6 {
256 reg = <6>;
257 ethernet = <&gmac0>;
258 phy-mode = "2500base-x";
259
260 fixed-link {
261 speed = <2500>;
262 full-duplex;
263 pause;
264 };
265 };
266 };
267 };
268 };
269 };
270
271 &watchdog {
272 status = "okay";
273 };
274
275 &wifi {
276 status = "okay";
277 pinctrl-names = "default", "dbdc";
278 pinctrl-0 = <&wf_2g_5g_pins>;
279 pinctrl-1 = <&wf_dbdc_pins>;
280 };
281
282 &crypto {
283 status = "okay";
284 };
285
286 &pio {
287 eth_pins: eth-pins {
288 mux {
289 function = "eth";
290 groups = "switch_int", "mdc_mdio";
291 };
292 };
293
294 spic_pins_g2: spic-pins-29-to-32 {
295 mux {
296 function = "spi";
297 groups = "spi1_2";
298 };
299 };
300
301 spi_flash_pins: spi-flash-pins-33-to-38 {
302 mux {
303 function = "spi";
304 groups = "spi0", "spi0_wp_hold";
305 };
306 conf-pu {
307 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
308 drive-strength = <8>;
309 mediatek,pull-up-adv = <0>; /* bias-disable */
310 };
311 conf-pd {
312 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
313 drive-strength = <8>;
314 mediatek,pull-down-adv = <0>; /* bias-disable */
315 };
316 };
317
318 uart0_pins: uart0-pins {
319 mux {
320 function = "uart";
321 groups = "uart0";
322 };
323 };
324
325 uart1_pins: uart1-pins {
326 mux {
327 function = "uart";
328 groups = "uart1";
329 };
330 };
331
332 uart2_pins: uart2-pins {
333 mux {
334 function = "uart";
335 groups = "uart2";
336 };
337 };
338
339 wf_2g_5g_pins: wf_2g_5g-pins {
340 mux {
341 function = "wifi";
342 groups = "wf_2g", "wf_5g";
343 };
344 conf {
345 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
346 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
347 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
348 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
349 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
350 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
351 "WF1_TOP_CLK", "WF1_TOP_DATA";
352 drive-strength = <4>;
353 };
354 };
355
356 wf_dbdc_pins: wf_dbdc-pins {
357 mux {
358 function = "wifi";
359 groups = "wf_dbdc";
360 };
361 conf {
362 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
363 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
364 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
365 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
366 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
367 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
368 "WF1_TOP_CLK", "WF1_TOP_DATA";
369 drive-strength = <4>;
370 };
371 };
372
373 usb-oc-hog {
374 gpio-hog;
375 gpios = <7 GPIO_ACTIVE_LOW>;
376 input;
377 line-name = "usb-oc";
378 };
379 };
380
381 &spi1 {
382 pinctrl-names = "default";
383 pinctrl-0 = <&spic_pins_g2>;
384 status = "okay";
385
386 proslic_spi: proslic_spi@0 {
387 compatible = "silabs,proslic_spi";
388 reg = <0>;
389 spi-max-frequency = <10000000>;
390 spi-cpha = <1>;
391 spi-cpol = <1>;
392 channel_count = <1>;
393 debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */
394 reset_gpio = <&pio 25 GPIO_ACTIVE_HIGH>;
395 ig,enable-spi = <1>; /* 1: Enable, 0: Disable */
396 };
397 };
398
399 &ssusb {
400 vusb33-supply = <&reg_3p3v>;
401 vbus-supply = <&reg_5v>;
402 status = "okay";
403 };
404
405 &trng {
406 status = "okay";
407 };
408
409 &uart0 {
410 pinctrl-names = "default";
411 pinctrl-0 = <&uart0_pins>;
412 status = "okay";
413 };
414
415 &uart1 {
416 pinctrl-names = "default";
417 pinctrl-0 = <&uart1_pins>;
418 status = "disabled";
419
420 /* EFR32MG21 Zigbee (BOOT)*/
421 };
422
423 &uart2 {
424 pinctrl-names = "default";
425 pinctrl-0 = <&uart2_pins>;
426 status = "disabled";
427
428 /* EFR32MG21 Zigbee */
429 };
430
431 &usb_phy {
432 status = "okay";
433 };