mediatek: convert to new LED color/function format where possible
[openwrt/staging/nbd.git] / target / linux / mediatek / dts / mt7986a-zyxel-ex5601-t0-common.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7 #include "mt7986a.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 aliases {
14 serial0 = &uart0;
15 label-mac-device = &gmac0;
16 led-boot = &led_status_green;
17 led-failsafe = &led_status_red;
18 led-running = &led_status_green;
19 led-upgrade = &led_status_red;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory {
27 reg = <0 0x40000000 0 0x40000000>;
28 };
29
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
34 regulator-max-microvolt = <1800000>;
35 regulator-boot-on;
36 regulator-always-on;
37 };
38
39 reg_3p3v: regulator-3p3v {
40 compatible = "regulator-fixed";
41 regulator-name = "fixed-3.3V";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-boot-on;
45 regulator-always-on;
46 };
47
48 reg_5v: regulator-5v {
49 compatible = "regulator-fixed";
50 regulator-name = "fixed-5V";
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 regulator-boot-on;
54 regulator-always-on;
55 };
56
57 gpio-keys {
58 compatible = "gpio-keys";
59 poll-interval = <20>;
60
61 reset-button {
62 label = "reset";
63 gpios = <&pio 21 GPIO_ACTIVE_LOW>;
64 linux,code = <KEY_RESTART>;
65 };
66
67 wlan-button {
68 label = "wlan";
69 gpios = <&pio 11 GPIO_ACTIVE_LOW>;
70 linux,code = <KEY_WLAN>;
71 };
72 wps-button {
73 label = "wps";
74 gpios = <&pio 56 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_WPS_BUTTON>;
76 };
77 };
78
79 leds {
80 compatible = "gpio-leds";
81
82 led_green_wifi24g {
83 label = "green:wifi24g";
84 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
85 default-state = "off";
86 };
87
88 led_green_wifi5g {
89 label = "green:wifi5g";
90 gpios = <&pio 2 GPIO_ACTIVE_LOW>;
91 default-state = "off";
92 };
93
94 led_green_inet {
95 label = "green:inet";
96 gpios = <&pio 14 GPIO_ACTIVE_LOW>;
97 default-state = "off";
98 };
99
100 led_red_inet {
101 label = "red:inet";
102 gpios = <&pio 15 GPIO_ACTIVE_LOW>;
103 default-state = "off";
104 };
105
106 led_status_green: led_green_pwr {
107 label = "green:pwr";
108 gpios = <&pio 13 GPIO_ACTIVE_LOW>;
109 linux,default-trigger = "timer"; /* Default blinking */
110 led-pattern = <125 125>; /* Fast blink is 4 HZ */
111 };
112
113 led_status_red: led_red_pwr {
114 label = "red:pwr";
115 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
116 default-state = "off";
117 };
118
119 led_green_fxs {
120 label = "green:fxs";
121 gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
122 default-state = "off";
123 };
124
125 led_amber_fxs {
126 label = "amber:fxs";
127 gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
128 default-state = "off";
129 };
130
131 led_amber_wps24g {
132 label = "amber:wps24g";
133 gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
134 default-state = "off";
135 };
136
137 led_amber_wps5g {
138 label = "amber:wps5g";
139 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
140 default-state = "off";
141 };
142
143 led_green_lan {
144 function = LED_FUNCTION_LAN;
145 color = <LED_COLOR_ID_GREEN>;
146 gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
147 default-state = "off";
148 };
149
150 led_green_sfp {
151 label = "green:sfp";
152 gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
153 default-state = "off";
154 };
155 };
156 };
157
158 &spi0 {
159 pinctrl-names = "default";
160 pinctrl-0 = <&spi_flash_pins>;
161 cs-gpios = <0>, <0>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 status = "okay";
165
166 spi_nand: spi_nand@0 {
167 #address-cells = <1>;
168 #size-cells = <1>;
169 compatible = "spi-nand";
170 reg = <1>;
171 spi-max-frequency = <10000000>;
172 spi-tx-bus-width = <4>;
173 spi-rx-bus-width = <4>;
174
175 nand_partitions: partitions {
176 compatible = "fixed-partitions";
177 #address-cells = <1>;
178 #size-cells = <1>;
179 };
180 };
181 };
182
183 &eth {
184 pinctrl-names = "default";
185 pinctrl-0 = <&eth_pins>;
186 status = "okay";
187
188 gmac0: mac@0 {
189 compatible = "mediatek,eth-mac";
190 reg = <0>;
191 phy-mode = "2500base-x";
192
193 fixed-link {
194 speed = <2500>;
195 full-duplex;
196 pause;
197 };
198 };
199
200 gmac1: mac@1 {
201 compatible = "mediatek,eth-mac";
202 reg = <1>;
203 phy-mode = "2500base-x";
204 phy = <&phy6>;
205 };
206
207 mdio: mdio-bus {
208 #address-cells = <1>;
209 #size-cells = <0>;
210 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
211 reset-delay-us = <1500000>;
212 reset-post-delay-us = <1000000>;
213
214 phy5: phy@5 {
215 compatible = "ethernet-phy-ieee802.3-c45";
216 reg = <5>;
217 mxl,led-config = <0x03f0 0x0 0x0 0x0>;
218 };
219
220 phy6: phy@6 {
221 compatible = "ethernet-phy-ieee802.3-c45";
222 reg = <6>;
223 mxl,led-config = <0x00f0 0x0 0x0 0x0>;
224 };
225
226 switch@1f {
227 compatible = "mediatek,mt7531";
228 reg = <31>;
229 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
230
231 ports {
232 #address-cells = <1>;
233 #size-cells = <0>;
234
235 port@1 {
236 reg = <1>;
237 label = "lan2";
238 };
239
240 port@2 {
241 reg = <2>;
242 label = "lan3";
243 };
244
245 port@3 {
246 reg = <3>;
247 label = "lan4";
248 };
249
250 port@5 {
251 reg = <5>;
252 label = "lan1";
253 phy-mode = "2500base-x";
254 phy = <&phy5>;
255 };
256
257 port@6 {
258 reg = <6>;
259 ethernet = <&gmac0>;
260 phy-mode = "2500base-x";
261
262 fixed-link {
263 speed = <2500>;
264 full-duplex;
265 pause;
266 };
267 };
268 };
269 };
270 };
271 };
272
273 &watchdog {
274 status = "okay";
275 };
276
277 &wifi {
278 status = "okay";
279 pinctrl-names = "default", "dbdc";
280 pinctrl-0 = <&wf_2g_5g_pins>;
281 pinctrl-1 = <&wf_dbdc_pins>;
282 };
283
284 &crypto {
285 status = "okay";
286 };
287
288 &pio {
289 eth_pins: eth-pins {
290 mux {
291 function = "eth";
292 groups = "switch_int", "mdc_mdio";
293 };
294 };
295
296 spic_pins_g2: spic-pins-29-to-32 {
297 mux {
298 function = "spi";
299 groups = "spi1_2";
300 };
301 };
302
303 spi_flash_pins: spi-flash-pins-33-to-38 {
304 mux {
305 function = "spi";
306 groups = "spi0", "spi0_wp_hold";
307 };
308 conf-pu {
309 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
310 drive-strength = <8>;
311 mediatek,pull-up-adv = <0>; /* bias-disable */
312 };
313 conf-pd {
314 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
315 drive-strength = <8>;
316 mediatek,pull-down-adv = <0>; /* bias-disable */
317 };
318 };
319
320 uart0_pins: uart0-pins {
321 mux {
322 function = "uart";
323 groups = "uart0";
324 };
325 };
326
327 uart1_pins: uart1-pins {
328 mux {
329 function = "uart";
330 groups = "uart1";
331 };
332 };
333
334 uart2_pins: uart2-pins {
335 mux {
336 function = "uart";
337 groups = "uart2";
338 };
339 };
340
341 wf_2g_5g_pins: wf_2g_5g-pins {
342 mux {
343 function = "wifi";
344 groups = "wf_2g", "wf_5g";
345 };
346 conf {
347 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
348 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
349 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
350 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
351 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
352 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
353 "WF1_TOP_CLK", "WF1_TOP_DATA";
354 drive-strength = <4>;
355 };
356 };
357
358 wf_dbdc_pins: wf_dbdc-pins {
359 mux {
360 function = "wifi";
361 groups = "wf_dbdc";
362 };
363 conf {
364 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
365 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
366 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
367 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
368 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
369 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
370 "WF1_TOP_CLK", "WF1_TOP_DATA";
371 drive-strength = <4>;
372 };
373 };
374
375 usb-oc-hog {
376 gpio-hog;
377 gpios = <7 GPIO_ACTIVE_LOW>;
378 input;
379 line-name = "usb-oc";
380 };
381 };
382
383 &spi1 {
384 pinctrl-names = "default";
385 pinctrl-0 = <&spic_pins_g2>;
386 status = "okay";
387
388 proslic_spi: proslic_spi@0 {
389 compatible = "silabs,proslic_spi";
390 reg = <0>;
391 spi-max-frequency = <10000000>;
392 spi-cpha = <1>;
393 spi-cpol = <1>;
394 channel_count = <1>;
395 debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */
396 reset_gpio = <&pio 25 GPIO_ACTIVE_HIGH>;
397 ig,enable-spi = <1>; /* 1: Enable, 0: Disable */
398 };
399 };
400
401 &ssusb {
402 vusb33-supply = <&reg_3p3v>;
403 vbus-supply = <&reg_5v>;
404 status = "okay";
405 };
406
407 &trng {
408 status = "okay";
409 };
410
411 &uart0 {
412 pinctrl-names = "default";
413 pinctrl-0 = <&uart0_pins>;
414 status = "okay";
415 };
416
417 &uart1 {
418 pinctrl-names = "default";
419 pinctrl-0 = <&uart1_pins>;
420 status = "disabled";
421
422 /* EFR32MG21 Zigbee (BOOT)*/
423 };
424
425 &uart2 {
426 pinctrl-names = "default";
427 pinctrl-0 = <&uart2_pins>;
428 status = "disabled";
429
430 /* EFR32MG21 Zigbee */
431 };
432
433 &usb_phy {
434 status = "okay";
435 };